URL
https://opencores.org/ocsvn/next186/next186/trunk
Subversion Repositories next186
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- This comparison shows the changes necessary to convert path
/next186
- from Rev 7 to Rev 8
- ↔ Reverse comparison
Rev 7 → Rev 8
/trunk/Next186_CPU.v
51,7 → 51,8
// It is able to execute up to 40Mips on Spartan XC3S700AN speed grade -4, performances comparable with a 486 CPU. |
// Small size, the CPU + BIU requires ~25% or 1500 slices - on Spartan XC3S700AN |
// |
// 16May2012 - fixed REP CMPS/SCAS bug when interrupted on the <equal> item |
// 16May2012 - fixed REP CMPS/SCAS bug when interrupted on the <equal> item |
// 23Dec2012 - fixed DIV bug (exception on sign bit) |
/////////////////////////////////////////////////////////////////////////////////// |
`timescale 1ns / 1ps |
|
916,7 → 917,8
DIVSTAGE = ~DIVEND; |
ALUSTAGE = ~DIVEND | ~DIVQSGN; |
DIVOP = 1'b1; |
IRQ = ~|STAGE[6:3] & DIVC & ~(STAGE[2] & DIVSGN); // early overflow for positive quotient |
// IRQ = ~|STAGE[6:3] & DIVC & ~(STAGE[2] & DIVSGN); - DIV bug, fixed 23Dec2012 |
IRQ = ~|STAGE[6:3] & DIVC & (~STAGE[2] | (~DIVSGN & IDIV)); // early overflow for positive quotient |
IFETCH = (DIVEND && ~DIVQSGN && ~DIVRSGN) || IRQ; |
end |
3'b100: begin // stage5, post inc R |