URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
Subversion Repositories open8_urisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/open8_urisc/trunk/VHDL
- from Rev 287 to Rev 288
- ↔ Reverse comparison
Rev 287 → Rev 288
/o8_hd44780_if.vhd
28,6 → 28,7
-- All low-level timing of the control signals are handled by this |
-- module, allowing client firmware to use a simple register |
-- interface to program the LCD panel. |
-- Note that this module assumes that the R/Wn line has been tied LOW |
-- |
-- Register Map |
-- Address Function |
119,7 → 120,6
Interrupt : out std_logic; |
-- |
LCD_E : out std_logic; |
LCD_RW : out std_logic; |
LCD_RS : out std_logic; |
LCD_DQ : out std_logic_vector(7 downto 0); |
LCD_BL : out std_logic |
253,8 → 253,6
-- LCD and Register logic |
-------------------------------------------------------------------------------- |
|
LCD_RW <= '0'; -- Permanently wire the RW line low |
|
LCD_Ctrl_proc: process( Clock, Reset ) |
begin |
if( Reset = Reset_Level )then |