URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
Subversion Repositories open8_urisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/open8_urisc/trunk/VHDL
- from Rev 297 to Rev 298
- ↔ Reverse comparison
Rev 297 → Rev 298
/o8_cpu.vhd
1,4 → 1,5
-- Copyright (c)2006, 2011, 2012, 2013, 2015, 2019, 2020 Jeremy Seth Henry |
-- Copyright (c)2006, 2011, 2012, 2013, 2015, 2019, 2020, 2022 |
-- Jeremy Seth Henry |
-- All rights reserved. |
-- |
-- Redistribution and use in source and binary forms, with or without |
275,6 → 276,9
-- Seth Henry 05/01/21 Added the Rotate_Ignores_Carry generic, which |
-- alters the ROR and ROL instructions to behave more |
-- like expected by not rotating through the C flag |
-- Seth Henry 07/12/22 Fixed a long-standing bug in the SBC instruction |
-- where the 2's complement inversion wasn't adding |
-- the additional 1, causing off by 1 errors |
|
library ieee; |
use ieee.std_logic_1164.all; |
1605,8 → 1609,8
Regfile(Index) <= Sum(7 downto 0); |
|
when ALU_SBC => -- Rn = R0 - Rn - C : Flags N,C,Z |
Sum := ("0" & Regfile(0)) + |
("1" & (not Regfile(Index))) + |
Sum := ("0" & Regfile(0)) - |
("0" & Regfile(Index)) - |
Flags(PSR_C); |
Flags(PSR_Z) <= nor_reduce(Sum(7 downto 0)); |
Flags(PSR_C) <= Sum(8); |