URL
https://opencores.org/ocsvn/openarty/openarty/trunk
Subversion Repositories openarty
Compare Revisions
- This comparison shows the changes necessary to convert path
/openarty/trunk/bench
- from Rev 11 to Rev 15
- ↔ Reverse comparison
Rev 11 → Rev 15
/cpp/eqspiflashsim.cpp
280,7 → 280,9
|
m_oreg = 0x0fe; |
m_count= 0; |
int out = m_nxtout[1]; |
int out = m_nxtout[3]; |
m_nxtout[3] = m_nxtout[2]; |
m_nxtout[2] = m_nxtout[1]; |
m_nxtout[1] = m_nxtout[0]; |
m_nxtout[0] = dat; |
return out; |
288,7 → 290,9
// Only change on the falling clock edge |
// printf("SFLASH-SKIP, CLK=%d -> %d\n", m_last_sck, sck); |
m_last_sck = sck; |
int out = m_nxtout[1]; |
int out = m_nxtout[3]; |
m_nxtout[3] = m_nxtout[2]; |
m_nxtout[2] = m_nxtout[1]; |
m_nxtout[1] = m_nxtout[0]; |
if (m_quad_mode) |
m_nxtout[0] = (m_oreg>>8)&0x0f; |
312,8 → 316,6
} |
|
|
printf("QSPI: STATE = %d, COUNT = %d\n", m_state, m_count); |
|
// printf("PROCESS, COUNT = %d, IREG = %02x\n", m_count, m_ireg); |
if (m_state == EQSPIF_XIP) { |
assert(m_quad_mode); |
549,10 → 551,10
m_otp[64] = (m_otp_wp)?0:1; |
|
if (m_debug) printf("READOTP, SETTING ADDR = %08x (%02x:%02x:%02x:%02x)\n", m_addr, |
(m_addr<65)?m_otp[m_addr]:0, |
(m_addr<64)?m_otp[m_addr+1]:0, |
(m_addr<63)?m_otp[m_addr+2]:0, |
(m_addr<62)?m_otp[m_addr+3]:0); |
((m_addr<65)?m_otp[m_addr]:0)&0x0ff, |
((m_addr<64)?m_otp[m_addr+1]:0)&0x0ff, |
((m_addr<63)?m_otp[m_addr+2]:0)&0x0ff, |
((m_addr<62)?m_otp[m_addr+3]:0)&0x0ff); |
if (m_debug) printf("READOTP, Array is %s, m_otp[64] = %d\n", |
(m_otp_wp)?"Locked":"Unlocked", |
m_otp[64]); |
635,7 → 637,7
// printf("EQSPIF[%08x]/QR = %02x\n", |
// m_addr-1, m_oreg); |
} else { |
printf("ERR: EQSPIF--TRYING TO READ WHILE BUSY!\n"); |
printf("ERR: EQSPIF--TRYING TO READ WHILE BUSY! (count = %d)\n", m_count); |
m_oreg = 0; |
} |
break; |
713,7 → 715,9
} // else printf("SFLASH->count = %d\n", m_count); |
|
m_last_sck = sck; |
int out = m_nxtout[1]; |
int out = m_nxtout[3]; |
m_nxtout[3] = m_nxtout[2]; |
m_nxtout[2] = m_nxtout[1]; |
m_nxtout[1] = m_nxtout[0]; |
if (m_quad_mode) |
m_nxtout[0] = (m_oreg>>8)&0x0f; |
/cpp/eqspiflashsim.h
83,7 → 83,7
int m_last_sck; |
unsigned m_write_count, m_ireg, m_oreg, m_sreg, m_addr, |
m_count, m_config, m_mode_byte, m_creg, |
m_nvconfig, m_evconfig, m_flagreg, m_nxtout[2]; |
m_nvconfig, m_evconfig, m_flagreg, m_nxtout[4]; |
bool m_quad_mode, m_debug, m_otp_wp; |
|
public: |
/cpp/eqspiflash_tb.cpp
129,7 → 129,7
|
printf(" LL:[%s%s%d(%08x)->%08x]", |
(m_core->v__DOT__spi_busy)?"BSY":" ", |
(m_core->v__DOT__lowlvl__DOT__rd_valid_2)?"VAL":" ", |
(m_core->v__DOT__spi_valid)?"VAL":" ", |
(m_core->v__DOT__lowlvl__DOT__state), |
(m_core->v__DOT__lowlvl__DOT__r_input), |
(m_core->v__DOT__spi_out)); |
154,10 → 154,15
(m_core->v__DOT__idotp__DOT__set_val)?"SET":" ", |
(m_core->v__DOT__idotp__DOT__set_addr)); |
|
printf(" RD:IACK[%x]", |
(m_core->v__DOT__rdproc__DOT__invalid_ack_pipe)); |
printf(" CT:IACK[%x]", |
(m_core->v__DOT__ctproc__DOT__invalid_ack_pipe)); |
|
{ |
unsigned counts = m_flash->counts_till_idle(); |
if (counts) |
printf(" %8d ", counts); |
printf(" %8dI ", counts); |
} |
printf("%s%s%s%s", |
(m_core->v__DOT__rdproc__DOT__accepted)?"RD-ACC":"", |
199,8 → 204,6
fputs(" RD:R_REQUESTED", stdout); |
if (m_core->v__DOT__rdproc__DOT__r_leave_xip) |
fputs(" RD:R_LVXIP", stdout); |
if (m_core->v__DOT__rdproc__DOT__ack_valid) |
fputs(" RD:R_ACKV", stdout); |
|
|
printf("\n"); |
406,6 → 409,63
} tick(); |
} |
|
void wb_write_slow(unsigned a, unsigned int ln, unsigned int *buf, |
int slowcounts) { |
unsigned errcount = 0, nacks = 0; |
|
m_core->i_wb_cyc = 1; |
m_core->i_wb_data_stb = (a & QSPIFLASH)?1:0; |
m_core->i_wb_ctrl_stb = !(m_core->i_wb_data_stb); |
for(unsigned stbcnt=0; stbcnt<ln; stbcnt++) { |
m_core->i_wb_we = 1; |
m_core->i_wb_addr= (a+stbcnt) & 0x03fffff; |
m_core->i_wb_data= buf[stbcnt]; |
errcount = 0; |
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall)) { |
tick(); if (m_core->o_wb_ack) nacks++; |
} |
|
// Tick, now that we're not stalled. This is the tick |
// that gets accepted. |
tick(); if (m_core->o_wb_ack) nacks++; |
|
|
m_core->i_wb_data_stb = 0; |
m_core->i_wb_ctrl_stb = 0; |
for(int j=0; j<slowcounts; j++) { |
tick(); if (m_core->o_wb_ack) nacks++; |
} |
|
// Turn our strobe signal back on again, after we just |
// turned it off. |
m_core->i_wb_data_stb = (a & QSPIFLASH)?1:0; |
m_core->i_wb_ctrl_stb = !(m_core->i_wb_data_stb); |
} |
|
m_core->i_wb_data_stb = 0; |
m_core->i_wb_ctrl_stb = 0; |
|
errcount = 0; |
while((nacks < ln)&&(errcount++ < BOMBCOUNT)) { |
tick(); |
if (m_core->o_wb_ack) { |
nacks++; |
errcount = 0; |
} |
} |
|
// Release the bus |
m_core->i_wb_cyc = 0; |
m_core->i_wb_data_stb = 0; |
m_core->i_wb_ctrl_stb = 0; |
|
if(errcount >= BOMBCOUNT) { |
printf("SETTING ERR TO TRUE!!!!!\n"); |
m_bomb = true; |
} tick(); |
} |
|
bool bombed(void) const { return m_bomb; } |
|
}; |
603,7 → 663,8
|
printf("Writing from %08x to %08x from rdbuf\n", |
QSPIFLASH+1024+i, QSPIFLASH+1024+i+63); |
tb->wb_write(QSPIFLASH+1024+i, 64, &rdbuf[i]); |
// tb->wb_write(QSPIFLASH+1024+i, 64, &rdbuf[i]); |
tb->wb_write_slow(QSPIFLASH+1024+i, 64, &rdbuf[i], 32); |
while(tb->wb_read(0)&(0x80000000)) |
; |
} |