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URL https://opencores.org/ocsvn/openarty/openarty/trunk

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  • This comparison shows the changes necessary to convert path 
    /openarty/trunk/sw
    from Rev 16 to Rev 18
    ↔ Reverse comparison
  •

Rev 16 → Rev 18

/host/wbprogram.cpp
1,17 → 1,41
////////////////////////////////////////////////////////////////////////////////
//
//
// Filename: wbprogram.cpp
//
// Project: FPGA library development (Basys3 development board)
// Project: OpenArty, an entirely open SoC based upon the Arty platform
//
// Purpose: Program the memory with a given '.bin' file.
//
// Creator: Dan Gisselquist
// Gisselquist Tecnology, LLC
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
// Copyright: 2015
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
32,6 → 56,17
exit(0);
}
 
unsigned byteswap(unsigned x) {
unsigned r;
 
r = x&0x0ff; x>>=8; r<<= 8;
r |= x&0x0ff; x>>=8; r<<= 8;
r |= x&0x0ff; x>>=8; r<<= 8;
r |= x&0x0ff;
 
return r;
}
 
int main(int argc, char **argv) {
FILE *fp;
const int BUFLN = (1<<20); // 4MB Flash
89,6 → 124,10
sz = fread(buf, sizeof(buf[0]), BUFLN, fp);
fclose(fp);
 
for(int i=0; i<sz; i++) {
buf[i] = byteswap(buf[i]);
}
 
try {
flash->write(addr, sz, buf, true);
} catch(BUSERR b) {
/host/flashdrvr.h
1,11 → 1,43
////////////////////////////////////////////////////////////////////////////////
//
//
// Filename: flashdrvr.h
//
// Project: FPGA library development (Basys3 development board)
// Project: OpenArty, an entirely open SoC based upon the Arty platform
//
// Purpose: Flash driver. Encapsulate writing to the flash device.
// Purpose: Flash driver. Encapsulates writing, both erasing sectors and
// the programming pages, to the flash device.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
//
//
// Creator: Dan Gisselquist
// Gisselquist Tecnology, LLC
//
21,6 → 53,8
private:
DEVBUS *m_fpga;
 
bool verify_config(void);
void set_config(void);
void flwait(void);
public:
FLASHDRVR(DEVBUS *fpga) : m_fpga(fpga) {}
/host/regdefs.cpp
171,11 → 171,11
{ R_QSPI_EREG, "QSPIEREG" },
{ R_QSPI_EREG, "QSPIE" },
{ R_QSPI_STAT, "QSPIS" },
{ R_QSPI_NVCONF,"QSPINVCONF" },
{ R_QSPI_NVCONF,"QSPINVCF" },
{ R_QSPI_NVCONF,"QSPINV" },
{ R_QSPI_VCONF, "QSPIVCONF" },
{ R_QSPI_VCONF, "QSPIVCNF" },
{ R_QSPI_VCONF, "QSPIV" },
{ R_QSPI_EVCONF,"QSPIEVCONF" },
{ R_QSPI_EVCONF,"QSPIEVCF" },
{ R_QSPI_EVCONF,"QSPIEV" },
{ R_QSPI_LOCK, "QSPILOCK" },
{ R_QSPI_FLAG, "QSPIFLAG" },
/host/dumpflash.cpp
55,6 → 55,45
}
 
// #define DUMPMEM RAMBASE
////////////////////////////////////////////////////////////////////////////////
//
// Filename: dumpflash.cpp
//
// Project: OpenArty, an entirely open SoC based upon the Arty platform
//
// Purpose: The purpose of this program is to read the entire flash memory,
// and dump it to a file.
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
// #define DUMPWORDS MEMWORDS
 
#define DUMPMEM EQSPIFLASH
62,7 → 101,7
 
int main(int argc, char **argv) {
FILE *fp;
const int BUFLN = MEMWORDS; // 1MB Flash
const int BUFLN = FLASHWORDS;
FPGA::BUSW *buf = new FPGA::BUSW[BUFLN];
 
FPGAOPEN(m_fpga);
/host/regdefs.h
51,7 → 51,7
#define R_CLR2 0x0000010a
#define R_CLR3 0x0000010b
#define R_DATE 0x0000010c
#define R_GPIO 0x0000010d
#define R_GPIO 0x0000010d // No GPIO device exists ... yet
#define R_UARTRX 0x0000010e
#define R_UARTTX 0x0000010f
#define R_GPSRX 0x00000110
/host/flashdrvr.cpp
84,10 → 84,13
bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
DEVBUS::BUSW page[SZPAGEW];
 
printf("EREG before : %08x\n", m_fpga->readio(R_QSPI_EREG));
printf("Erasing sector: %08x\n", sector);
m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
printf("EREG with WEL : %08x\n", m_fpga->readio(R_QSPI_EREG));
SETSCOPE;
m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
printf("EREG after : %08x\n", m_fpga->readio(R_QSPI_EREG));
 
// If we're in high speed mode and we want to verify the erase, then
// we can skip waiting for the erase to complete by issueing a read
160,16 → 163,41
} return true;
}
 
#define VCONF_VALUE 0x8b
 
bool FLASHDRVR::verify_config(void) {
unsigned cfg = m_fpga->readio(R_QSPI_VCONF);
printf("CFG = %02x\n", cfg);
return (cfg == VCONF_VALUE);
}
 
void FLASHDRVR::set_config(void) {
// There is some delay associated with these commands, but it should
// be dwarfed by the communication delay. If you wish to do this on the
// device itself, you may need to use some timers.
//
// Set the write-enable latch
m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
// Set the volatile configuration register
m_fpga->writeio(R_QSPI_VCONF, VCONF_VALUE);
// Clear the write-enable latch, since it didn't clear automatically
printf("EREG = %08x\n", m_fpga->readio(R_QSPI_EREG));
m_fpga->writeio(R_QSPI_EREG, ENABLEWP);
}
 
bool FLASHDRVR::write(const unsigned addr, const unsigned len,
const unsigned *data, const bool verify) {
 
if (!verify_config()) {
set_config();
if (!verify_config())
return false;
}
 
// Work through this one sector at a time.
// If this buffer is equal to the sector value(s), go on
// If not, erase the sector
 
/*
fprintf(stderr, "FLASH->write(%08x, %d, ..., %s)\n", addr, len,
(verify)?"Verify":"");
*/
// m_fpga->writeio(R_QSPI_CREG, 2);
// m_fpga->readio(R_VERSION); // Read something innocuous
 
/host/Makefile
37,7 → 37,7
##
##
.PHONY: all
PROGRAMS := wbregs netuart wbsettime dumpflash wbprogram
PROGRAMS := wbregs netuart wbsettime dumpflash wbprogram eqspiscope
all: $(PROGRAMS)
CXX := g++
OBJDIR := obj-pc

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