URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk/core/sim/rtl_sim/src
- from Rev 192 to Rev 200
- ↔ Reverse comparison
Rev 192 → Rev 200
/sing-op_sxt.s43
120,21 → 120,21
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_218, DMEM_218 |
.set EDE_21A, DMEM_21A |
.set EDE_21C, DMEM_21C |
.set EDE_21E, DMEM_21E |
.set EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_21A, DMEM_21A+PMEM_EDE_LENGTH |
.set EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
|
mov #0x0100, r2 ;# Test 1 |
mov #0x7524, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
sxt EDE_218+PMEM_LENGTH ;# SXT (mem0c=0x7524 => {mem0c=0x0024) |
sxt EDE_218 ;# SXT (mem0c=0x7524 => {mem0c=0x0024) |
mov r2, r5 |
|
mov #0x0100, r2 ;# Test 2 |
mov #0x1cb6, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
sxt EDE_21A+PMEM_LENGTH ;# SXT (mem0d=0x1cb6 => {mem0d=0xffb6) |
sxt EDE_21A ;# SXT (mem0d=0x1cb6 => {mem0d=0xffb6) |
mov r2, r7 |
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mov #0x5000, r15 |
/two-op_mov-b.s43
35,7 → 35,7
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
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.global main |
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main: |
58,8 → 58,8
|
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/* ---------------------- TEST WHEN SOURCE IS Rn ------------------- */ |
.set Rn_EDEL, DMEM_214 |
.set Rn_EDEH, DMEM_217 |
.set Rn_EDEL, DMEM_214+PMEM_EDE_LENGTH |
.set Rn_EDEH, DMEM_217+PMEM_EDE_LENGTH |
.set Rn_TONYL, DMEM_218 |
.set Rn_TONYH, DMEM_21B |
|
75,10 → 75,10
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mov #0x1111, &DMEM_214 |
mov #0xabcd, r7 |
mov.b r7, Rn_EDEL+PMEM_LENGTH ;# Write 0xcd to memory @0x0214 |
mov.b r7, Rn_EDEL ;# Write 0xcd to memory @0x0214 |
mov #0x9999, &DMEM_216 |
mov #0xef12, r7 |
mov.b r7, Rn_EDEH+PMEM_LENGTH ;# Write 0x12 to memory @0x0217 |
mov.b r7, Rn_EDEH ;# Write 0x12 to memory @0x0217 |
|
mov #0x7777, &DMEM_218 |
mov #0x1f2e, r8 |
91,10 → 91,10
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn ------------------ */ |
.set aRn_EDE_218, DMEM_218 |
.set aRn_EDE_21B, DMEM_21B |
.set aRn_EDE_21C, DMEM_21C |
.set aRn_EDE_21F, DMEM_21F |
.set aRn_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aRn_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aRn_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aRn_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set aRn_TONY_220, DMEM_220 |
.set aRn_TONY_223, DMEM_223 |
140,13 → 140,13
mov #0xe1e1, &DMEM_21E |
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mov #DMEM_200, r8 |
mov.b @r8, aRn_EDE_218+PMEM_LENGTH ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r8, aRn_EDE_218 ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov #DMEM_202, r8 |
mov.b @r8, aRn_EDE_21B+PMEM_LENGTH ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov.b @r8, aRn_EDE_21B ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov #DMEM_205, r8 |
mov.b @r8, aRn_EDE_21C+PMEM_LENGTH ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r8, aRn_EDE_21C ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov #DMEM_207, r8 |
mov.b @r8, aRn_EDE_21F+PMEM_LENGTH ;# Move memory @0x207 (0xff) to memory @0x21F |
mov.b @r8, aRn_EDE_21F ;# Move memory @0x207 (0xff) to memory @0x21F |
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mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
170,10 → 170,10
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/* ---------------------- TEST WHEN SOURCE IS @Rn+ ----------------- */ |
.set aRni_EDE_218, DMEM_218 |
.set aRni_EDE_21B, DMEM_21B |
.set aRni_EDE_21C, DMEM_21C |
.set aRni_EDE_21F, DMEM_21F |
.set aRni_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aRni_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aRni_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aRni_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
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.set aRni_TONY_220, DMEM_220 |
.set aRni_TONY_223, DMEM_223 |
202,11 → 202,11
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mov #DMEM_200, r9 |
mov.b @r9+, 16(r8) ;# Move memory @0x200 (0x22) to memory @0x210 |
mov.b @r9+, r10 |
mov.b @r9+, r10 |
mov.b @r9+, 19(r8) ;# Move memory @0x202 (0x44) to memory @0x213 |
mov @r9+, r10 |
mov @r9+, r10 |
mov.b @r9+, 20(r8) ;# Move memory @0x205 (0x55) to memory @0x214 |
mov.b @r9+, r10 |
mov.b @r9+, r10 |
mov.b @r9+, 23(r8) ;# Move memory @0x207 (0x77) to memory @0x217 |
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mov #0x99aa, &DMEM_200 |
219,13 → 219,13
mov #0xe1e1, &DMEM_21E |
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mov #DMEM_200, r10 |
mov.b @r10+, aRni_EDE_218+PMEM_LENGTH ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21B+PMEM_LENGTH ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov @r10+, r11 |
mov.b @r10+, aRni_EDE_21C+PMEM_LENGTH ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21F+PMEM_LENGTH ;# Move memory @0x207 (0xff) to memory @0x21F |
mov.b @r10+, aRni_EDE_218 ;# Move memory @0x200 (0xaa) to memory @0x218 |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21B ;# Move memory @0x202 (0xcc) to memory @0x21B |
mov @r10+, r11 |
mov.b @r10+, aRni_EDE_21C ;# Move memory @0x205 (0xdd) to memory @0x21C |
mov.b @r10+, r11 |
mov.b @r10+, aRni_EDE_21F ;# Move memory @0x207 (0xff) to memory @0x21F |
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mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
249,10 → 249,10
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/* ---------------------- TEST WHEN SOURCE IS #N ------------------- */ |
.set N_EDE_218, DMEM_218 |
.set N_EDE_21B, DMEM_21B |
.set N_EDE_21C, DMEM_21C |
.set N_EDE_21F, DMEM_21F |
.set N_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set N_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set N_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set N_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set N_TONY_220, DMEM_220 |
.set N_TONY_223, DMEM_223 |
278,10 → 278,10
mov #0xeeee, &DMEM_21A |
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
mov.b #0x99aa, N_EDE_218+PMEM_LENGTH ;# Move value 0xaa to memory @0x218 |
mov.b #0xbbcc, N_EDE_21B+PMEM_LENGTH ;# Move value 0xcc to memory @0x21B |
mov.b #0xddee, N_EDE_21C+PMEM_LENGTH ;# Move value 0xee to memory @0x21C |
mov.b #0xff11, N_EDE_21F+PMEM_LENGTH ;# Move value 0x11 to memory @0x21F |
mov.b #0x99aa, N_EDE_218 ;# Move value 0xaa to memory @0x218 |
mov.b #0xbbcc, N_EDE_21B ;# Move value 0xcc to memory @0x21B |
mov.b #0xddee, N_EDE_21C ;# Move value 0xee to memory @0x21C |
mov.b #0xff11, N_EDE_21F ;# Move value 0x11 to memory @0x21F |
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mov #0xaaaa, &DMEM_220 |
mov #0xeeee, &DMEM_222 |
296,10 → 296,10
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/* ---------------------- TEST WHEN SOURCE IS x(Rn) ---------------- */ |
.set xRn_EDE_218, DMEM_218 |
.set xRn_EDE_21B, DMEM_21B |
.set xRn_EDE_21C, DMEM_21C |
.set xRn_EDE_21F, DMEM_21F |
.set xRn_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set xRn_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set xRn_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set xRn_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
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.set xRn_TONY_220, DMEM_220 |
.set xRn_TONY_223, DMEM_223 |
341,10 → 341,10
mov #0xe1e1, &DMEM_21E |
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mov #DMEM_200, r8 |
mov.b 2(r8), xRn_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b 4(r8), xRn_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b 7(r8), xRn_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b 9(r8), xRn_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b 2(r8), xRn_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b 4(r8), xRn_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b 7(r8), xRn_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b 9(r8), xRn_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
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mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
365,16 → 365,16
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/* ---------------------- TEST WHEN SOURCE IS 'EDE' ---------------- */ |
.set EDE_EDE_202, DMEM_202 |
.set EDE_EDE_204, DMEM_204 |
.set EDE_EDE_207, DMEM_207 |
.set EDE_EDE_209, DMEM_209 |
.set EDE_EDE_210, DMEM_210 |
.set EDE_EDE_213, DMEM_213 |
.set EDE_EDE_218, DMEM_218 |
.set EDE_EDE_21B, DMEM_21B |
.set EDE_EDE_21C, DMEM_21C |
.set EDE_EDE_21F, DMEM_21F |
.set EDE_EDE_202, DMEM_202+PMEM_EDE_LENGTH |
.set EDE_EDE_204, DMEM_204+PMEM_EDE_LENGTH |
.set EDE_EDE_207, DMEM_207+PMEM_EDE_LENGTH |
.set EDE_EDE_209, DMEM_209+PMEM_EDE_LENGTH |
.set EDE_EDE_210, DMEM_210+PMEM_EDE_LENGTH |
.set EDE_EDE_213, DMEM_213+PMEM_EDE_LENGTH |
.set EDE_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set EDE_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
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.set EDE_TONY_220, DMEM_220 |
.set EDE_TONY_223, DMEM_223 |
384,10 → 384,10
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mov #0x2233, &DMEM_210 |
mov #0xffff, r5 |
mov.b EDE_EDE_210+PMEM_LENGTH, r5 ;# r5 takes @0x0210 value: 0x0033 |
mov.b EDE_EDE_210, r5 ;# r5 takes @0x0210 value: 0x0033 |
mov #0x4455, &DMEM_212 |
mov #0xffff, r6 |
mov.b EDE_EDE_213+PMEM_LENGTH, r6 ;# r6 takes @0x0213 value: 0x0044 |
mov.b EDE_EDE_213, r6 ;# r6 takes @0x0213 value: 0x0044 |
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mov #0x1122, &DMEM_202 |
mov #0x3344, &DMEM_204 |
399,10 → 399,10
mov #0x5a5a, &DMEM_214 |
mov #0xa5a5, &DMEM_216 |
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mov.b EDE_EDE_202+PMEM_LENGTH, 16(r7) ;# Move memory @0x202 (0x22) to memory @0x210 |
mov.b EDE_EDE_204+PMEM_LENGTH, 19(r7) ;# Move memory @0x204 (0x44) to memory @0x213 |
mov.b EDE_EDE_207+PMEM_LENGTH, 20(r7) ;# Move memory @0x207 (0x55) to memory @0x214 |
mov.b EDE_EDE_209+PMEM_LENGTH, 23(r7) ;# Move memory @0x209 (0x77) to memory @0x217 |
mov.b EDE_EDE_202, 16(r7) ;# Move memory @0x202 (0x22) to memory @0x210 |
mov.b EDE_EDE_204, 19(r7) ;# Move memory @0x204 (0x44) to memory @0x213 |
mov.b EDE_EDE_207, 20(r7) ;# Move memory @0x207 (0x55) to memory @0x214 |
mov.b EDE_EDE_209, 23(r7) ;# Move memory @0x209 (0x77) to memory @0x217 |
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mov #0x99aa, &DMEM_202 |
mov #0xbbcc, &DMEM_204 |
413,10 → 413,10
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
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mov.b EDE_EDE_202+PMEM_LENGTH, EDE_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b EDE_EDE_204+PMEM_LENGTH, EDE_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b EDE_EDE_207+PMEM_LENGTH, EDE_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b EDE_EDE_209+PMEM_LENGTH, EDE_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b EDE_EDE_202, EDE_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b EDE_EDE_204, EDE_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b EDE_EDE_207, EDE_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b EDE_EDE_209, EDE_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
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mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
427,10 → 427,10
mov #0x2d2d, &DMEM_224 |
mov #0xd2d2, &DMEM_226 |
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mov.b EDE_EDE_202+PMEM_LENGTH, &EDE_TONY_220 ;# Move memory @0x202 (0x33) to memory @0x220 |
mov.b EDE_EDE_204+PMEM_LENGTH, &EDE_TONY_223 ;# Move memory @0x204 (0x55) to memory @0x223 |
mov.b EDE_EDE_207+PMEM_LENGTH, &EDE_TONY_224 ;# Move memory @0x207 (0x66) to memory @0x224 |
mov.b EDE_EDE_209+PMEM_LENGTH, &EDE_TONY_227 ;# Move memory @0x209 (0x88) to memory @0x227 |
mov.b EDE_EDE_202, &EDE_TONY_220 ;# Move memory @0x202 (0x33) to memory @0x220 |
mov.b EDE_EDE_204, &EDE_TONY_223 ;# Move memory @0x204 (0x55) to memory @0x223 |
mov.b EDE_EDE_207, &EDE_TONY_224 ;# Move memory @0x207 (0x66) to memory @0x224 |
mov.b EDE_EDE_209, &EDE_TONY_227 ;# Move memory @0x209 (0x88) to memory @0x227 |
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mov #0x7000, r15 |
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437,10 → 437,10
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/* ---------------------- TEST WHEN SOURCE IS '&EDE' --------------- */ |
.set aEDE_EDE_218, DMEM_218 |
.set aEDE_EDE_21B, DMEM_21B |
.set aEDE_EDE_21C, DMEM_21C |
.set aEDE_EDE_21F, DMEM_21F |
.set aEDE_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aEDE_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aEDE_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aEDE_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
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.set aEDE_TONY_220, DMEM_220 |
.set aEDE_TONY_223, DMEM_223 |
479,10 → 479,10
mov #0x1e1e, &DMEM_21C |
mov #0xe1e1, &DMEM_21E |
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mov.b &DMEM_202, aEDE_EDE_218+PMEM_LENGTH ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b &DMEM_204, aEDE_EDE_21B+PMEM_LENGTH ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b &DMEM_207, aEDE_EDE_21C+PMEM_LENGTH ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b &DMEM_209, aEDE_EDE_21F+PMEM_LENGTH ;# Move memory @0x209 (0xff) to memory @0x21F |
mov.b &DMEM_202, aEDE_EDE_218 ;# Move memory @0x202 (0xaa) to memory @0x218 |
mov.b &DMEM_204, aEDE_EDE_21B ;# Move memory @0x204 (0xcc) to memory @0x21B |
mov.b &DMEM_207, aEDE_EDE_21C ;# Move memory @0x207 (0xdd) to memory @0x21C |
mov.b &DMEM_209, aEDE_EDE_21F ;# Move memory @0x209 (0xff) to memory @0x21F |
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mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
502,18 → 502,18
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/* ---------------------- TEST WHEN SOURCE IS CONSTANT ------------- */ |
.set CONSTL_EDE0, DMEM_230 |
.set CONSTL_EDE1, DMEM_232 |
.set CONSTL_EDE2, DMEM_234 |
.set CONSTL_EDE4, DMEM_236 |
.set CONSTL_EDE8, DMEM_238 |
.set CONSTL_EDEm1, DMEM_23A |
.set CONSTH_EDE0, DMEM_23D |
.set CONSTH_EDE1, DMEM_23F |
.set CONSTH_EDE2, DMEM_241 |
.set CONSTH_EDE4, DMEM_243 |
.set CONSTH_EDE8, DMEM_245 |
.set CONSTH_EDEm1, DMEM_247 |
.set CONSTL_EDE0, DMEM_230+PMEM_EDE_LENGTH |
.set CONSTL_EDE1, DMEM_232+PMEM_EDE_LENGTH |
.set CONSTL_EDE2, DMEM_234+PMEM_EDE_LENGTH |
.set CONSTL_EDE4, DMEM_236+PMEM_EDE_LENGTH |
.set CONSTL_EDE8, DMEM_238+PMEM_EDE_LENGTH |
.set CONSTL_EDEm1, DMEM_23A+PMEM_EDE_LENGTH |
.set CONSTH_EDE0, DMEM_23D+PMEM_EDE_LENGTH |
.set CONSTH_EDE1, DMEM_23F+PMEM_EDE_LENGTH |
.set CONSTH_EDE2, DMEM_241+PMEM_EDE_LENGTH |
.set CONSTH_EDE4, DMEM_243+PMEM_EDE_LENGTH |
.set CONSTH_EDE8, DMEM_245+PMEM_EDE_LENGTH |
.set CONSTH_EDEm1, DMEM_247+PMEM_EDE_LENGTH |
|
.set CONSTL_TONY0, DMEM_250 |
.set CONSTL_TONY1, DMEM_252 |
584,18 → 584,18
mov #0xeeee, &DMEM_244 |
mov #0x3333, &DMEM_246 |
|
mov.b #0x0000, CONSTL_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x230 |
mov.b #0x0001, CONSTL_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x232 |
mov.b #0x0002, CONSTL_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x234 |
mov.b #0x0004, CONSTL_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x236 |
mov.b #0x0008, CONSTL_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x238 |
mov.b #0xffff, CONSTL_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x23A |
mov.b #0x0000, CONSTH_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x23D |
mov.b #0x0001, CONSTH_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x23F |
mov.b #0x0002, CONSTH_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x241 |
mov.b #0x0004, CONSTH_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x243 |
mov.b #0x0008, CONSTH_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x245 |
mov.b #0xffff, CONSTH_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x247 |
mov.b #0x0000, CONSTL_EDE0 ;# Move +0 to memory @0x230 |
mov.b #0x0001, CONSTL_EDE1 ;# Move +1 to memory @0x232 |
mov.b #0x0002, CONSTL_EDE2 ;# Move +2 to memory @0x234 |
mov.b #0x0004, CONSTL_EDE4 ;# Move +4 to memory @0x236 |
mov.b #0x0008, CONSTL_EDE8 ;# Move +8 to memory @0x238 |
mov.b #0xffff, CONSTL_EDEm1 ;# Move -1 to memory @0x23A |
mov.b #0x0000, CONSTH_EDE0 ;# Move +0 to memory @0x23D |
mov.b #0x0001, CONSTH_EDE1 ;# Move +1 to memory @0x23F |
mov.b #0x0002, CONSTH_EDE2 ;# Move +2 to memory @0x241 |
mov.b #0x0004, CONSTH_EDE4 ;# Move +4 to memory @0x243 |
mov.b #0x0008, CONSTH_EDE8 ;# Move +8 to memory @0x245 |
mov.b #0xffff, CONSTH_EDEm1 ;# Move -1 to memory @0x247 |
|
|
# |
/dbg_i2c_mem.s43
42,14 → 42,21
|
.global main |
|
/* ---------------------- SOME VARIABLES IN ROM --------------- */ |
diverse_data: |
.word 0x5ab7 |
.word 0x6bc8 |
|
/* ---------------------- WAIT FUNCTION --------------- */ |
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
ret |
|
|
/* ---------------------- MAIN --------------- */ |
main: |
mov #0x5a10, &WDTCTL ; # Disable Watchdog |
|
mov #0x5a10, &WDTCTL ; # Disable Watchdog |
|
mov #DMEM_250, r1 ; # Initialize stack pointer |
|
mov #0x1122, &DMEM_210 |
63,17 → 70,12
|
mov #0x1000, r15 |
|
|
|
/* ---------------------- END OF TEST --------------- */ |
end_of_test: |
nop |
br #0xffff |
|
/* ---------------------- SOME VARIABLES IN ROM --------------- */ |
diverse_data: |
.word 0x5ab7 |
.word 0x6bc8 |
|
/* ---------------------- INTERRUPT VECTORS --------------- */ |
|
.section .vectors, "a" |
/dbg_uart_mem.s43
42,11 → 42,18
|
.global main |
|
/* ---------------------- SOME VARIABLES IN ROM --------------- */ |
diverse_data: |
.word 0x5ab7 |
.word 0x6bc8 |
|
/* ---------------------- WAIT FUNCTION --------------- */ |
WAIT_FUNC: |
dec r14 |
jnz WAIT_FUNC |
ret |
|
|
/* ---------------------- MAIN --------------- */ |
main: |
mov #DMEM_250, r1 ; # Initialize stack pointer |
|
61,17 → 68,12
|
mov #0x1000, r15 |
|
|
|
/* ---------------------- END OF TEST --------------- */ |
end_of_test: |
nop |
br #0xffff |
|
/* ---------------------- SOME VARIABLES IN ROM --------------- */ |
diverse_data: |
.word 0x5ab7 |
.word 0x6bc8 |
|
/* ---------------------- INTERRUPT VECTORS --------------- */ |
|
.section .vectors, "a" |
/sing-op_push.s43
50,7 → 50,7
clr 0(r5) |
incd r5 |
dec r4 |
jnz clear_mem_loop |
jnz clear_mem_loop |
|
|
mov #DMEM_252, r1 ;# Initialize stack pointer |
121,17 → 121,17
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_21E, DMEM_21E |
.set EDE_220, DMEM_220 |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
.set EDE_220, DMEM_220+PMEM_EDE_LENGTH |
|
mov #DMEM_200, r4 |
mov #0x8765, &DMEM_21E |
mov #0x5555, &DMEM_300 |
push EDE_21E+PMEM_LENGTH ;# PUSH (0x8765 => @=0x0240) |
push EDE_21E ;# PUSH (0x8765 => @=0x0240) |
|
mov #0x4321, &DMEM_220 |
mov #0x5555, &DMEM_300 |
push EDE_220+PMEM_LENGTH ;# PUSH (0x4321 => @=0x023E) |
push EDE_220 ;# PUSH (0x4321 => @=0x023E) |
|
mov #0x6000, r15 |
|
236,17 → 236,17
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_B_21E, DMEM_21E |
.set EDE_B_221, DMEM_221 |
.set EDE_B_21E, DMEM_21E+PMEM_EDE_LENGTH |
.set EDE_B_221, DMEM_221+PMEM_EDE_LENGTH |
|
mov #DMEM_200, r4 |
mov #0xd10e, &DMEM_21E |
mov #0x5555, &DMEM_300 |
push.b EDE_B_21E+PMEM_LENGTH ;# PUSH (0x0e => @=0x0240) |
push.b EDE_B_21E ;# PUSH (0x0e => @=0x0240) |
|
mov #0xfed0, &DMEM_220 |
mov #0x5555, &DMEM_300 |
push.b EDE_B_221+PMEM_LENGTH ;# PUSH (0xfe => @=0x023E) |
push.b EDE_B_221 ;# PUSH (0xfe => @=0x023E) |
|
mov #0xD000, r15 |
|
260,7 → 260,7
mov #0x1bc2, &DMEM_222 |
mov #0x5555, &DMEM_300 |
push.b &aEDE_B_222 ;# PUSH (0xc2 => @=0x023C) |
|
|
mov #0x3ba4, &DMEM_224 |
mov #0x5555, &DMEM_300 |
push.b &aEDE_B_225 ;# PUSH (0x3b => @=0x023A) |
280,7 → 280,7
mov #0xF000, r15 |
|
/* -------------- TEST INSTRUCTION WITH SR AS ARGUMENT ------------------- */ |
|
|
# Addressing mode: SR |
#------------------------ |
|
320,16 → 320,16
|
# Addressing mode: x(SR) |
#------------------------ |
|
|
nop |
push 12(r1) ;# PUSH (r1=0x022C+12 => @=0x022C) |
push 12(r1) ;# PUSH (r1=0x022A+12 => @=0x022A) |
nop |
|
|
mov #0xF400, r15 |
|
/* -------------- TEST POP INSTRUCTION WITH SR AS ARGUMENT ------------------- */ |
|
|
# Addressing mode: x(SR) |
#------------------------ |
|
350,7 → 350,7
|
mov #0xF600, r15 |
|
|
|
/* ---------------------- END OF TEST --------------- */ |
end_of_test: |
nop |
/dbg_i2c_sync.v
135,13 → 135,13
dbg_i2c_wr(CPU_CTL, 16'h0002); |
|
// Generate an IRQ |
wkup[0] = 1'b1; |
wkup[0] = 1'b1; |
@(negedge mclk); |
irq[0] = 1'b1; |
@(negedge irq_acc[0]) |
irq[`IRQ_NR-16] = 1'b1; |
@(negedge irq_acc[`IRQ_NR-16]) |
@(negedge mclk); |
wkup[0] = 1'b0; |
irq[0] = 1'b0; |
wkup[0] = 1'b0; |
irq[`IRQ_NR-16] = 1'b0; |
|
repeat(10) @(posedge mclk); |
|
/clock_module_asic_lfxt.v
92,13 → 92,13
// Generate IRQ and make sure CPU re-runs with LFXT_CLK |
//-------------------------------------------------------- |
|
wkup[0] = 1'b1; |
wkup[0] = 1'b1; |
@(negedge mclk); |
irq[0] = 1'b1; |
@(negedge irq_acc[0]) |
irq[`IRQ_NR-16] = 1'b1; |
@(negedge irq_acc[`IRQ_NR-16]) |
@(negedge mclk); |
wkup[0] = 1'b0; |
irq[0] = 1'b0; |
wkup[0] = 1'b0; |
irq[`IRQ_NR-16] = 1'b0; |
|
@(r15 === 16'h0003); |
#10; |
/sing-op_call.s43
110,12 → 110,12
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_21E, DMEM_21E |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
|
mov #0x0000, r5 |
mov #TEST_ROUTINE_EDE, &DMEM_21E |
mov #0x5555, &DMEM_300 |
call EDE_21E+PMEM_LENGTH ;# CALL TEST_ROUTINE_EDE |
call EDE_21E ;# CALL TEST_ROUTINE_EDE |
|
mov #0x7000, r15 |
|
133,8 → 133,8
|
|
/* -------------- TEST INSTRUCTION WITH SR AS ARGUMENT ------------------- */ |
|
|
|
# Addressing mode: SR |
#------------------------ |
|
141,7 → 141,7
mov #0x0000, r5 |
nop |
#call r1 ;# NOT VALID BECAUSE IT JUMPS IN THE DATA MEMORY |
nop ;# WHICH IS NOT EXECUTABLE |
nop ;# WHICH IS NOT EXECUTABLE |
|
mov #0x9000, r15 |
|
195,7 → 195,7
|
# Addressing mode: x(SR) |
#------------------------ |
|
|
mov #DMEM_252, r1 ;# Initialize stack pointer |
push #TEST_ROUTINE_RN |
push #TEST_ROUTINE_aRN |
216,11 → 216,11
mov #0x0000, r5 |
call 10(r1) ;# CALL #TEST_ROUTINE_aRNi (r5 = 0x9abc) |
nop |
|
|
mov #0xc000, r15 |
|
|
|
|
/* ---------------------- END OF TEST --------------- */ |
end_of_test: |
nop |
/two-op_autoincr.v
44,7 → 44,6
|
// Initialize memory |
//-------------------------------------------------------- |
@(mem200==16'h0000); |
|
@(mem200==16'h0001); |
if (mem200 !== 16'h0001) tb_error("====== Initialize memory error: @0x200 ====="); |
923,7 → 922,6
|
|
|
|
|
stimulus_done = 1; |
end |
|
/template_periph_16b.s43
39,12 → 39,12
|
.global main |
|
.set UNUSED_0, (((DMEM_BASE-0x0070)&0x7ff8)-0x0002) |
.set CNTRL1, (((DMEM_BASE-0x0070)&0x7ff8)+0x0000) |
.set CNTRL2, (((DMEM_BASE-0x0070)&0x7ff8)+0x0002) |
.set CNTRL3, (((DMEM_BASE-0x0070)&0x7ff8)+0x0004) |
.set CNTRL4, (((DMEM_BASE-0x0070)&0x7ff8)+0x0006) |
.set UNUSED_1, (((DMEM_BASE-0x0070)&0x7ff8)-0x0008) |
.set UNUSED_0, (((PER_LENGTH-0x0070) & 0x7ff8)-0x0002) |
.set CNTRL1, (((PER_LENGTH-0x0070) & 0x7ff8)+0x0000) |
.set CNTRL2, (((PER_LENGTH-0x0070) & 0x7ff8)+0x0002) |
.set CNTRL3, (((PER_LENGTH-0x0070) & 0x7ff8)+0x0004) |
.set CNTRL4, (((PER_LENGTH-0x0070) & 0x7ff8)+0x0006) |
.set UNUSED_1, (((PER_LENGTH-0x0070) & 0x7ff8)-0x0008) |
|
main: |
/* -------------- TEST RD/WR REGISTER ACCESS --------------- */ |
78,7 → 78,7
mov &UNUSED_1, &DMEM_214 |
mov #0x4321, &UNUSED_1 |
mov &UNUSED_1, &DMEM_216 |
|
|
mov #0x0001, r15 |
|
|
/lp_modes_asic.v
72,7 → 72,7
else wkup2_sync <= {wkup2_sync[0], wkup[2]}; |
|
always @(wkup2_sync) |
irq[2] = wkup2_sync[1]; |
irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2 |
|
// Wakeup synchronizer to generate IRQ |
reg [1:0] wkup3_sync; |
81,7 → 81,7
else wkup3_sync <= {wkup3_sync[0], wkup[3]}; |
|
always @(wkup3_sync) |
irq[3] = wkup3_sync[1]; |
irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3 |
|
|
initial |
92,10 → 92,10
repeat(5) @(posedge mclk); |
stimulus_done = 0; |
|
irq[2] = 0; |
irq[`IRQ_NR-14] = 0; // IRQ-2 |
wkup[2] = 0; |
|
irq[3] = 0; |
irq[`IRQ_NR-13] = 0; // IRQ-3 |
wkup[3] = 0; |
|
|
157,7 → 157,7
|
@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
201,7 → 201,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
276,7 → 276,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
320,7 → 320,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
396,7 → 396,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
444,7 → 444,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
520,7 → 520,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
568,7 → 568,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
652,7 → 652,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
708,7 → 708,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
/sing-op_swpb.s43
120,21 → 120,21
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_218, DMEM_218 |
.set EDE_21A, DMEM_21A |
.set EDE_21C, DMEM_21C |
.set EDE_21E, DMEM_21E |
.set EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_21A, DMEM_21A+PMEM_EDE_LENGTH |
.set EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
|
mov #0x0102, r2 ;# Test 1 |
mov #0x7524, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
swpb EDE_218+PMEM_LENGTH ;# SWPB (mem0c=0x7524 => {mem0c=0x2475) |
swpb EDE_218 ;# SWPB (mem0c=0x7524 => {mem0c=0x2475) |
mov r2, r5 |
|
mov #0x0005, r2 ;# Test 2 |
mov #0x1cb6, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
swpb EDE_21A+PMEM_LENGTH ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c) |
swpb EDE_21A ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c) |
mov r2, r7 |
|
mov #0x5000, r15 |
/dbg_uart_mem.v
39,7 → 39,7
/*===========================================================================*/ |
|
`define LONG_TIMEOUT |
|
|
initial |
begin |
$display(" ==============================================="); |
57,7 → 57,7
`ifdef DBG_RST_BRK_EN |
dbg_uart_wr(CPU_CTL, 16'h0002); // RUN |
`endif |
|
|
// RD/WR ACCESS: CPU REGISTERS (16b) |
//-------------------------------------------------------- |
|
83,7 → 83,7
repeat(20) @(posedge mclk); |
if (r6 !== 16'hcb54) tb_error("====== CPU REGISTERS (16b): Write R6 ====="); |
|
|
|
// RD/WR ACCESS: RAM (16b) |
//-------------------------------------------------------- |
|
135,16 → 135,16
repeat(20) @(posedge mclk); |
if (mem210 !== 16'hc4b3) tb_error("====== RAM (8b): Write @0x211 ====="); |
|
|
|
// RD/WR ACCESS: ROM (16b) |
//-------------------------------------------------------- |
|
// READ ROM |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2e)); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h00)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0001); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h5ab7) tb_error("====== ROM (16b): Read @0xf82e ====="); |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h30)); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h02)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0001); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h6bc8) tb_error("====== ROM (16b): Read @0xf830 ====="); |
166,11 → 166,11
//-------------------------------------------------------- |
|
// READ ROM |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2e)); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h00)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0009); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h00b7) tb_error("====== ROM (8b): Read @0xf82e ====="); |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2f)); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h01)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0009); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h005a) tb_error("====== ROM (8b): Read @0xf82f ====="); |
187,10 → 187,10
repeat(20) @(posedge mclk); |
if (irq_vect_00 !== 16'h2514) tb_error("====== ROM (8b): Write @0xffe1 ====="); |
|
|
|
// RD/WR ACCESS: PERIPHERALS (16b) |
//-------------------------------------------------------- |
|
|
// WRITE PERIPHERAL |
dbg_uart_wr(MEM_ADDR, 16'h0170); // select memory address |
dbg_uart_wr(MEM_DATA, 16'h9dc7); // write data |
261,7 → 261,7
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h00fa) tb_error("====== Peripheral (8b): Read @0x0023 ====="); |
|
|
|
stimulus_done = 1; |
`else |
|
279,4 → 279,3
$finish; |
`endif |
end |
|
/two-op_add.s43
58,7 → 58,7
|
|
/* ---------------------- TEST WHEN SOURCE IS Rn ------------------- */ |
.set Rn_EDE, DMEM_212 |
.set Rn_EDE, DMEM_212+PMEM_EDE_LENGTH |
.set Rn_TONY, DMEM_214 |
|
mov #0x4444, r4 |
80,7 → 80,7
|
mov #0x4444, &DMEM_212 |
mov #0x5678, r7 |
add r7, Rn_EDE+PMEM_LENGTH ;# Write 0x4444+0x5678=0x9abc to memory @0x0212 |
add r7, Rn_EDE ;# Write 0x4444+0x5678=0x9abc to memory @0x0212 |
|
mov #0x5555, &DMEM_214 |
mov #0x1234, r8 |
90,7 → 90,7
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn ------------------ */ |
.set aRn_EDE, DMEM_212 |
.set aRn_EDE, DMEM_212+PMEM_EDE_LENGTH |
.set aRn_TONY, DMEM_214 |
|
mov #DMEM_200, r4 |
116,7 → 116,7
mov #0x5f12, &DMEM_200 |
mov #0x8e1c, &DMEM_212 |
mov #DMEM_200, r7 |
add @r7, aRn_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r7, aRn_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x3112, &DMEM_202 |
mov #0x1541, &DMEM_214 |
128,7 → 128,7
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn+ ----------------- */ |
.set aRni_EDE, DMEM_212 |
.set aRni_EDE, DMEM_212+PMEM_EDE_LENGTH |
.set aRni_TONY, DMEM_214 |
|
mov #DMEM_200, r4 |
154,7 → 154,7
mov #0x5f12, &DMEM_206 |
mov #0x8e1c, &DMEM_212 |
mov #DMEM_206, r8 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x3112, &DMEM_202 |
mov #0x1541, &DMEM_214 |
166,7 → 166,7
|
|
/* ---------------------- TEST WHEN SOURCE IS #N ------------------- */ |
.set N_EDE, DMEM_210 |
.set N_EDE, DMEM_210+PMEM_EDE_LENGTH |
.set N_TONY, DMEM_206 |
|
mov #0x3210, r4 |
185,7 → 185,7
add #0x5a5a, 48(r6) ;# Write 0x5432+0x5a5a=0xae8c to memory @0x0230 |
|
mov #0x4325, &DMEM_210 |
add #0x1a2b, N_EDE+PMEM_LENGTH ;# Write 0x4325+0x1a2b=0x5d50 to memory @0x0210 |
add #0x1a2b, N_EDE ;# Write 0x4325+0x1a2b=0x5d50 to memory @0x0210 |
|
mov #0x3254, &DMEM_206 |
add #0x3c4d, &N_TONY ;# Write 0x3254+0x3c4d=0x6ea1 to memory @0x0206 |
194,7 → 194,7
|
|
/* ---------------------- TEST WHEN SOURCE IS x(Rn) ---------------- */ |
.set xRn_EDE, DMEM_220 |
.set xRn_EDE, DMEM_220+PMEM_EDE_LENGTH |
.set xRn_TONY, DMEM_208 |
|
mov #0x8347, &DMEM_210 |
222,7 → 222,7
mov #0x7238, &DMEM_204 |
mov #0x2143, &DMEM_220 |
mov #DMEM_200, r7 |
add 4(r7), xRn_EDE+PMEM_LENGTH ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
add 4(r7), xRn_EDE ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
|
mov #0x98b2, &DMEM_216 |
mov #0x1432, &DMEM_208 |
233,24 → 233,24
|
|
/* ---------------------- TEST WHEN SOURCE IS 'EDE' ---------------- */ |
.set EDE_EDE, DMEM_216 |
.set EDE_EDE, DMEM_216+PMEM_EDE_LENGTH |
.set EDE_TONY, DMEM_212 |
|
.set EDE_200, DMEM_200 |
.set EDE_202, DMEM_202 |
.set EDE_204, DMEM_204 |
.set EDE_206, DMEM_206 |
.set EDE_208, DMEM_208 |
.set EDE_200, DMEM_200+PMEM_EDE_LENGTH |
.set EDE_202, DMEM_202+PMEM_EDE_LENGTH |
.set EDE_204, DMEM_204+PMEM_EDE_LENGTH |
.set EDE_206, DMEM_206+PMEM_EDE_LENGTH |
.set EDE_208, DMEM_208+PMEM_EDE_LENGTH |
|
mov #0xc3d6, &DMEM_200 |
mov #0x1234, &DMEM_204 |
mov #0x4321, r4 |
add EDE_200+PMEM_LENGTH, r4 ;# Write 0xc3d6+0x4321=0x06f7 to R4 |
add EDE_200, r4 ;# Write 0xc3d6+0x4321=0x06f7 to R4 |
|
mov #0x000a, &DMEM_202 |
mov #0x1234, &DMEM_204 |
mov #0x3456, r6 |
add EDE_202+PMEM_LENGTH, r0 |
add EDE_202, r0 |
nop |
nop |
nop |
262,17 → 262,17
mov #0xf712, &DMEM_204 |
mov #0x1234, &DMEM_214 |
mov #0x0000, &DMEM_208 |
add EDE_204+PMEM_LENGTH, 18(r8) ;# Write 0xf712+0x1234=0x0946 to memory @0x214 |
add EDE_204, 18(r8) ;# Write 0xf712+0x1234=0x0946 to memory @0x214 |
|
mov #0xb3a9, &DMEM_206 |
mov #0x058a, &DMEM_216 |
mov #0x1234, &DMEM_208 |
add EDE_206+PMEM_LENGTH, EDE_EDE+PMEM_LENGTH ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
add EDE_206, EDE_EDE ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
|
mov #0x837A, &DMEM_208 |
mov #0xA738, &DMEM_212 |
mov #0x1234, &DMEM_20A |
add EDE_208+PMEM_LENGTH, &EDE_TONY ;# Write 0x837A+0xA738=0x2ab2 to memory @0x212 |
add EDE_208, &EDE_TONY ;# Write 0x837A+0xA738=0x2ab2 to memory @0x212 |
|
mov #0x7000, r15 |
|
279,7 → 279,7
|
|
/* ---------------------- TEST WHEN SOURCE IS '&EDE' --------------- */ |
.set aEDE_EDE, DMEM_218 |
.set aEDE_EDE, DMEM_218+PMEM_EDE_LENGTH |
.set aEDE_TONY, DMEM_202 |
|
mov #0x23d4, &DMEM_200 |
307,7 → 307,7
mov #0x5c1f, &DMEM_206 |
mov #0x6e2f, &DMEM_218 |
mov #0x1234, &DMEM_208 |
add &DMEM_206, aEDE_EDE+PMEM_LENGTH ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
add &DMEM_206, aEDE_EDE ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
|
mov #0xc16e, &DMEM_208 |
mov #0x51ca, &DMEM_202 |
318,12 → 318,12
|
|
/* ---------------------- TEST WHEN SOURCE IS CONSTANT ------------- */ |
.set CONST_EDE0, DMEM_220 |
.set CONST_EDE1, DMEM_222 |
.set CONST_EDE2, DMEM_224 |
.set CONST_EDE4, DMEM_226 |
.set CONST_EDE8, DMEM_228 |
.set CONST_EDEm1, DMEM_22A |
.set CONST_EDE0, DMEM_220+PMEM_EDE_LENGTH |
.set CONST_EDE1, DMEM_222+PMEM_EDE_LENGTH |
.set CONST_EDE2, DMEM_224+PMEM_EDE_LENGTH |
.set CONST_EDE4, DMEM_226+PMEM_EDE_LENGTH |
.set CONST_EDE8, DMEM_228+PMEM_EDE_LENGTH |
.set CONST_EDEm1, DMEM_22A+PMEM_EDE_LENGTH |
|
.set CONST_TONY0, DMEM_230 |
.set CONST_TONY1, DMEM_232 |
376,12 → 376,12
mov #0x7777, &DMEM_226 |
mov #0x8888, &DMEM_228 |
mov #0x9999, &DMEM_22A |
add #0x0000, CONST_EDE0+PMEM_LENGTH ;# Move 0x4444+0 to memory @0x220 |
add #0x0001, CONST_EDE1+PMEM_LENGTH ;# Move 0x5555+1 to memory @0x222 |
add #0x0002, CONST_EDE2+PMEM_LENGTH ;# Move 0x6666+2 to memory @0x224 |
add #0x0004, CONST_EDE4+PMEM_LENGTH ;# Move 0x7777+4 to memory @0x226 |
add #0x0008, CONST_EDE8+PMEM_LENGTH ;# Move 0x8888+8 to memory @0x228 |
add #0xffff, CONST_EDEm1+PMEM_LENGTH ;# Move 0x9999-1 to memory @0x22A |
add #0x0000, CONST_EDE0 ;# Move 0x4444+0 to memory @0x220 |
add #0x0001, CONST_EDE1 ;# Move 0x5555+1 to memory @0x222 |
add #0x0002, CONST_EDE2 ;# Move 0x6666+2 to memory @0x224 |
add #0x0004, CONST_EDE4 ;# Move 0x7777+4 to memory @0x226 |
add #0x0008, CONST_EDE8 ;# Move 0x8888+8 to memory @0x228 |
add #0xffff, CONST_EDEm1 ;# Move 0x9999-1 to memory @0x22A |
|
mov #0x4444, &DMEM_230 ;# Initialize Memory |
mov #0x5555, &DMEM_232 |
/two-op_mov.s43
35,7 → 35,7
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
|
.global main |
|
main: |
58,7 → 58,7
|
|
/* ---------------------- TEST WHEN SOURCE IS Rn ------------------- */ |
.set Rn_EDE, DMEM_200 |
.set Rn_EDE, DMEM_200+PMEM_EDE_LENGTH |
.set Rn_TONY, DMEM_204 |
|
mov r4, r3 ;# Overwrite r3 with 0x4444 |
74,7 → 74,7
mov #0x1234, r6 |
mov r6, 16(r5) ;# Write 0x1234 to memory @0x0210 |
mov #0x5678, r7 |
mov r7, Rn_EDE+PMEM_LENGTH ;# Write 0x5678 to memory @0x0200 |
mov r7, Rn_EDE ;# Write 0x5678 to memory @0x0200 |
mov #0x9abc, r8 |
mov r8, &Rn_TONY ;# Write 0x9abc to memory @0x0204 |
|
82,7 → 82,7
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn ------------------ */ |
.set aRn_EDE, DMEM_200 |
.set aRn_EDE, DMEM_200+PMEM_EDE_LENGTH |
.set aRn_TONY, DMEM_204 |
|
mov #DMEM_210, r4 |
102,7 → 102,7
mov @r6, 16(r5) ;# Move memory @0x204 (0x9abc) to memory @0x210 |
mov #0xfedc, &DMEM_202 |
mov #DMEM_202, r6 |
mov @r6, aRn_EDE+PMEM_LENGTH ;# Move memory @0x202 (0xfedc) to memory @0x200 |
mov @r6, aRn_EDE ;# Move memory @0x202 (0xfedc) to memory @0x200 |
mov #0xf1d2, &DMEM_202 |
mov #DMEM_202, r6 |
mov @r6, &aRn_TONY ;# Move memory @0x202 (0xf1d2) to memory @0x204 |
111,7 → 111,7
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn+ ----------------- */ |
.set aRni_EDE, DMEM_200 |
.set aRni_EDE, DMEM_200+PMEM_EDE_LENGTH |
.set aRni_TONY, DMEM_214 |
|
mov #0x1111, &DMEM_200 |
137,7 → 137,7
mov @r7+, 16(r8) ;# Move memory @0x216 (0xdef0) to memory @0x220 |
|
mov #DMEM_212, r8 |
mov @r8+, aRni_EDE+PMEM_LENGTH ;# Move memory @0x212 (0x5678) to memory @0x200 |
mov @r8+, aRni_EDE ;# Move memory @0x212 (0x5678) to memory @0x200 |
|
mov #DMEM_210, r9 |
mov @r9+, &aRni_TONY ;# Move memory @0x210 (0x1234) to memory @0x214 |
147,7 → 147,7
|
|
/* ---------------------- TEST WHEN SOURCE IS #N ------------------- */ |
.set N_EDE, DMEM_210 |
.set N_EDE, DMEM_210+PMEM_EDE_LENGTH |
.set N_TONY, DMEM_206 |
|
mov #0x3210, r4 ;# Write 0x3210 to R4 |
161,7 → 161,7
test_N_PC: |
mov #DMEM_200, r6 |
mov #0x5a5a, 48(r6) ;# Move memory 0x5a5a to memory @0x230 |
mov #0x1a2b, N_EDE+PMEM_LENGTH ;# Move memory 0x1a2b to memory @0x210 |
mov #0x1a2b, N_EDE ;# Move memory 0x1a2b to memory @0x210 |
mov #0x3c4d, &N_TONY ;# Move memory 0x3c4d to memory @0x206 |
|
mov #0x5000, r15 |
169,7 → 169,7
|
|
/* ---------------------- TEST WHEN SOURCE IS x(Rn) ---------------- */ |
.set xRn_EDE, DMEM_220 |
.set xRn_EDE, DMEM_220+PMEM_EDE_LENGTH |
.set xRn_TONY, DMEM_208 |
|
mov #0x8347, &DMEM_210 |
196,7 → 196,7
mov #0x7238, &DMEM_204 |
mov #0x1234, &DMEM_200 |
mov #DMEM_200, r7 |
mov 4(r7), xRn_EDE+PMEM_LENGTH ;# Move memory @0x204 (0x7238) to memory @0x220 |
mov 4(r7), xRn_EDE ;# Move memory @0x204 (0x7238) to memory @0x220 |
mov #0x98b2, &DMEM_216 |
mov #0x1234, &DMEM_200 |
mov #DMEM_200, r7 |
207,24 → 207,24
|
|
/* ---------------------- TEST WHEN SOURCE IS 'EDE' ---------------- */ |
.set EDE_EDE, DMEM_216 |
.set EDE_EDE, DMEM_216+PMEM_EDE_LENGTH |
.set EDE_TONY, DMEM_212 |
|
.set EDE_200, DMEM_200 |
.set EDE_202, DMEM_202 |
.set EDE_204, DMEM_204 |
.set EDE_206, DMEM_206 |
.set EDE_208, DMEM_208 |
.set EDE_200, DMEM_200+PMEM_EDE_LENGTH |
.set EDE_202, DMEM_202+PMEM_EDE_LENGTH |
.set EDE_204, DMEM_204+PMEM_EDE_LENGTH |
.set EDE_206, DMEM_206+PMEM_EDE_LENGTH |
.set EDE_208, DMEM_208+PMEM_EDE_LENGTH |
|
mov #0xc3d6, &DMEM_200 |
mov #0x1234, &DMEM_202 |
mov #0x4321, r4 |
mov EDE_200+PMEM_LENGTH, r4 ;# Write 0xc3d6 to R4 |
mov EDE_200, r4 ;# Write 0xc3d6 to R4 |
|
mov #test_EDE_PC, &DMEM_202 |
mov #0x1234, &DMEM_204 |
mov #0x3456, r6 |
br EDE_202+PMEM_LENGTH |
br EDE_202 |
nop |
nop |
nop |
235,15 → 235,15
mov #DMEM_202, r8 |
mov #0xf712, &DMEM_204 |
mov #0x1234, &DMEM_206 |
mov EDE_204+PMEM_LENGTH, 18(r8) ;# Move memory @0x204 (0xf712) to memory @0x214 |
mov EDE_204, 18(r8) ;# Move memory @0x204 (0xf712) to memory @0x214 |
|
mov #0xb3a9, &DMEM_206 |
mov #0x1234, &DMEM_208 |
mov EDE_206+PMEM_LENGTH, EDE_EDE+PMEM_LENGTH ;# Move memory @0x206 (0xb3a9) to memory @0x216 |
mov EDE_206, EDE_EDE ;# Move memory @0x206 (0xb3a9) to memory @0x216 |
|
mov #0x837A, &DMEM_208 |
mov #0x1234, &DMEM_20A |
mov EDE_208+PMEM_LENGTH, &EDE_TONY ;# Move memory @0x208 (0x837A) to memory @0x212 |
mov EDE_208, &EDE_TONY ;# Move memory @0x208 (0x837A) to memory @0x212 |
|
mov #0x7000, r15 |
|
250,7 → 250,7
|
|
/* ---------------------- TEST WHEN SOURCE IS '&EDE' --------------- */ |
.set aEDE_EDE, DMEM_218 |
.set aEDE_EDE, DMEM_218+PMEM_EDE_LENGTH |
.set aEDE_TONY, DMEM_202 |
|
mov #0x23d4, &DMEM_200 |
276,7 → 276,7
|
mov #0x5c1f, &DMEM_206 |
mov #0x1234, &DMEM_208 |
mov &DMEM_206, aEDE_EDE+PMEM_LENGTH ;# Move memory @0x206 (0x5c1f) to memory @0x218 |
mov &DMEM_206, aEDE_EDE ;# Move memory @0x206 (0x5c1f) to memory @0x218 |
|
mov #0xc16e, &DMEM_208 |
mov #0x1234, &DMEM_20A |
287,12 → 287,12
|
|
/* ---------------------- TEST WHEN SOURCE IS CONSTANT ------------- */ |
.set CONST_EDE0, DMEM_220 |
.set CONST_EDE1, DMEM_222 |
.set CONST_EDE2, DMEM_224 |
.set CONST_EDE4, DMEM_226 |
.set CONST_EDE8, DMEM_228 |
.set CONST_EDEm1, DMEM_22A |
.set CONST_EDE0, DMEM_220+PMEM_EDE_LENGTH |
.set CONST_EDE1, DMEM_222+PMEM_EDE_LENGTH |
.set CONST_EDE2, DMEM_224+PMEM_EDE_LENGTH |
.set CONST_EDE4, DMEM_226+PMEM_EDE_LENGTH |
.set CONST_EDE8, DMEM_228+PMEM_EDE_LENGTH |
.set CONST_EDEm1, DMEM_22A+PMEM_EDE_LENGTH |
|
.set CONST_TONY0, DMEM_230 |
.set CONST_TONY1, DMEM_232 |
325,12 → 325,12
mov #0x0008, 22(r10) ;# Move +8 to memory @0x218 |
mov #0xffff, 24(r10) ;# Move -1 to memory @0x21A |
|
mov #0x0000, CONST_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x220 |
mov #0x0001, CONST_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x222 |
mov #0x0002, CONST_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x224 |
mov #0x0004, CONST_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x226 |
mov #0x0008, CONST_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x228 |
mov #0xffff, CONST_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x22A |
mov #0x0000, CONST_EDE0 ;# Move +0 to memory @0x220 |
mov #0x0001, CONST_EDE1 ;# Move +1 to memory @0x222 |
mov #0x0002, CONST_EDE2 ;# Move +2 to memory @0x224 |
mov #0x0004, CONST_EDE4 ;# Move +4 to memory @0x226 |
mov #0x0008, CONST_EDE8 ;# Move +8 to memory @0x228 |
mov #0xffff, CONST_EDEm1 ;# Move -1 to memory @0x22A |
|
mov #0x0000, &CONST_TONY0 ;# Move +0 to memory @0x230 |
mov #0x0001, &CONST_TONY1 ;# Move +1 to memory @0x232 |
/dbg_uart_onoff_asic.v
236,9 → 236,9
test_nr = 9; |
|
// Generate IRQ to terminate the test pattern |
irq[1] = 1'b1; |
irq[`IRQ_NR-15] = 1'b1; |
@(r13); |
irq[1] = 1'b0; |
irq[`IRQ_NR-15] = 1'b0; |
|
stimulus_done = 1; |
|
/dbg_i2c_onoff.v
39,7 → 39,7
integer test_nr; |
integer test_var; |
|
|
|
initial |
begin |
$display(" ==============================================="); |
68,29 → 68,29
repeat(300) @(posedge mclk); |
if (r14 === 16'h0000) tb_error("====== CPU is stopped event though the debug interface is disabled - test 1 ====="); |
test_var = r14; |
|
|
|
|
// Make sure that enabling the debug interface after the POR |
// don't stop the cpu |
//-------------------------------------------------------- |
dbg_en = 1; |
test_nr = 2; |
|
|
repeat(300) @(posedge mclk); |
if (r14 === test_var[15:0]) tb_error("====== CPU is stopped when the debug interface is disabled after POR - test 2 ====="); |
|
|
|
// Create POR with debug enable and observe the |
// behavior depending on the DBG_RST_BRK_EN define |
//-------------------------------------------------------- |
dbg_en = 1; |
test_nr = 3; |
|
|
@(posedge mclk); // Generate POR |
reset_n = 1'b0; |
@(posedge mclk); |
reset_n = 1'b1; |
|
|
repeat(300) @(posedge mclk); |
`ifdef DBG_RST_BRK_EN |
if (r14 !== 16'h0000) tb_error("====== CPU is not stopped with the debug interface enabled and DBG_RST_BRK_EN=1 - test 3 ====="); |
103,7 → 103,7
`ifdef DBG_RST_BRK_EN |
if (dbg_i2c_buf !== 16'h0030) tb_error("====== CPU_CTL wrong reset value - test 4 ====="); |
`else |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 4 ====="); |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 4 ====="); |
`endif |
|
|
122,10 → 122,10
dbg_i2c_rd(MEM_DATA); |
if (dbg_i2c_buf !== 16'haa55) tb_error("====== MEM_DATA write access failed - test 6 ====="); |
|
|
|
test_var = r14; // Backup the current register value |
|
|
|
@(posedge mclk); // Resets the debug interface |
dbg_en = 1'b0; |
repeat(2) @(posedge mclk); |
133,14 → 133,14
|
// Make sure that the register was not reseted |
if (r14 < test_var) tb_error("====== CPU was reseted with DBG_EN - test 7 ====="); |
repeat(2) @(posedge mclk); |
|
repeat(2) @(posedge mclk); |
|
// Check CPU_CTL reset value |
dbg_i2c_rd(CPU_CTL); |
`ifdef DBG_RST_BRK_EN |
if (dbg_i2c_buf !== 16'h0030) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
`else |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
`endif |
dbg_i2c_rd(MEM_DATA); |
if (dbg_i2c_buf !== 16'h0000) tb_error("====== MEM_DATA read access failed - test 9 ====="); |
171,7 → 171,7
// Make sure that the register was reseted |
if (r14 !== 16'h0000) tb_error("====== CPU was not reseted with RESET_N - test 12 ====="); |
repeat(2) @(posedge mclk); |
|
|
test_nr = 7; |
|
// Check CPU_CTL reset value |
179,12 → 179,12
`ifdef DBG_RST_BRK_EN |
if (dbg_i2c_buf !== 16'h0030) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
`else |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
if (dbg_i2c_buf !== 16'h0010) tb_error("====== CPU_CTL wrong reset value - test 8 ====="); |
`endif |
dbg_i2c_rd(MEM_DATA); |
if (dbg_i2c_buf !== 16'h0000) tb_error("====== MEM_DATA read access failed - test 9 ====="); |
|
|
|
// Let the CPU run |
dbg_i2c_wr(CPU_CTL, 16'h0002); |
|
191,10 → 191,10
test_nr = 8; |
|
// Generate IRQ to terminate the test pattern |
irq[1] = 1'b1; |
irq[`IRQ_NR-15] = 1'b1; |
@(r13); |
irq[1] = 1'b0; |
|
irq[`IRQ_NR-15] = 1'b0; |
|
stimulus_done = 1; |
|
`endif |
215,4 → 215,3
$finish; |
`endif |
end |
|
/op_modes_asic.v
65,7 → 65,7
else wkup2_sync <= {wkup2_sync[0], wkup[2]}; |
|
always @(wkup2_sync) |
irq[2] = wkup2_sync[1]; |
irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2 |
|
// Wakeup synchronizer to generate IRQ |
reg [1:0] wkup3_sync; |
74,7 → 74,7
else wkup3_sync <= {wkup3_sync[0], wkup[3]}; |
|
always @(wkup3_sync) |
irq[3] = wkup3_sync[1]; |
irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3 |
|
|
initial |
85,10 → 85,10
repeat(5) @(posedge mclk); |
stimulus_done = 0; |
|
irq[2] = 0; |
irq[`IRQ_NR-14] = 0; // IRQ-2 |
wkup[2] = 0; |
|
irq[3] = 0; |
irq[`IRQ_NR-13] = 0; // IRQ-3 |
wkup[3] = 0; |
|
|
118,7 → 118,7
|
@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
aclk_cnt = 0; |
repeat (10) @(posedge mclk); |
smclk_cnt = 0; |
149,7 → 149,7
|
@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
repeat (10) @(posedge mclk); |
smclk_cnt = 0; |
repeat (50) @(posedge mclk); |
206,7 → 206,7
|
@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
repeat (100) @(posedge mclk); |
aclk_cnt = 0; |
repeat (100) @(posedge mclk); |
245,7 → 245,7
|
@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
repeat (100) @(posedge mclk); |
aclk_cnt = 0; |
repeat (100) @(posedge mclk); |
299,7 → 299,7
|
@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
repeat(10) @(negedge dco_clk); |
mclk_cnt = 0; |
repeat (80) @(negedge dco_clk); |
317,7 → 317,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
repeat (10) @(posedge dco_clk); |
mclk_cnt = 0; |
repeat (80) @(posedge dco_clk); |
361,7 → 361,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(10*50); |
dco_clk_cnt = 0; |
#(80*50); |
378,7 → 378,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(10*50); |
dco_clk_cnt = 0; |
#(80*50); |
/dbg_i2c_onoff_asic.v
227,9 → 227,9
test_nr = 9; |
|
// Generate IRQ to terminate the test pattern |
irq[1] = 1'b1; |
irq[`IRQ_NR-15] = 1'b1; |
@(r13); |
irq[1] = 1'b0; |
irq[`IRQ_NR-15] = 1'b0; |
|
stimulus_done = 1; |
|
/two-op_add-b.s43
58,8 → 58,8
|
|
/* ---------------------- TEST WHEN SOURCE IS Rn ------------------- */ |
.set Rn_EDEL, DMEM_214 |
.set Rn_EDEH, DMEM_217 |
.set Rn_EDEL, DMEM_214+PMEM_EDE_LENGTH |
.set Rn_EDEH, DMEM_217+PMEM_EDE_LENGTH |
.set Rn_TONYL, DMEM_218 |
.set Rn_TONYH, DMEM_21B |
|
77,10 → 77,10
|
mov #0x1122, &DMEM_214 |
mov #0xabcd, r7 |
add.b r7, Rn_EDEL+PMEM_LENGTH ;# Write 0x22+0xcd=0xef to memory @0x0214 |
add.b r7, Rn_EDEL ;# Write 0x22+0xcd=0xef to memory @0x0214 |
mov #0x99aa, &DMEM_216 |
mov #0xef12, r7 |
add.b r7, Rn_EDEH+PMEM_LENGTH ;# Write 0x99+0x12=0xab to memory @0x0217 |
add.b r7, Rn_EDEH ;# Write 0x99+0x12=0xab to memory @0x0217 |
|
mov #0x7788, &DMEM_218 |
mov #0x1f2e, r8 |
93,10 → 93,10
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn ------------------ */ |
.set aRn_EDE_218, DMEM_218 |
.set aRn_EDE_21B, DMEM_21B |
.set aRn_EDE_21C, DMEM_21C |
.set aRn_EDE_21F, DMEM_21F |
.set aRn_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aRn_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aRn_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aRn_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set aRn_TONY_220, DMEM_220 |
.set aRn_TONY_223, DMEM_223 |
142,13 → 142,13
mov #0xd12e, &DMEM_21E |
|
mov #DMEM_200, r8 |
add.b @r8, aRn_EDE_218+PMEM_LENGTH ;# Write 0xaa+0xee=0x98 to memory @0x218 |
add.b @r8, aRn_EDE_218 ;# Write 0xaa+0xee=0x98 to memory @0x218 |
mov #DMEM_202, r8 |
add.b @r8, aRn_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x22=0xee to memory @0x21B |
add.b @r8, aRn_EDE_21B ;# Write 0xcc+0x22=0xee to memory @0x21B |
mov #DMEM_205, r8 |
add.b @r8, aRn_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0xe2=0xbf to memory @0x21C |
add.b @r8, aRn_EDE_21C ;# Write 0xdd+0xe2=0xbf to memory @0x21C |
mov #DMEM_207, r8 |
add.b @r8, aRn_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xd1=0xd0 to memory @0x21F |
add.b @r8, aRn_EDE_21F ;# Write 0xff+0xd1=0xd0 to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
173,10 → 173,10
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn+ ----------------- */ |
.set aRni_EDE_218, DMEM_218 |
.set aRni_EDE_21B, DMEM_21B |
.set aRni_EDE_21C, DMEM_21C |
.set aRni_EDE_21F, DMEM_21F |
.set aRni_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aRni_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aRni_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aRni_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set aRni_TONY_220, DMEM_220 |
.set aRni_TONY_223, DMEM_223 |
205,11 → 205,11
|
mov #DMEM_200, r9 |
add.b @r9+, 16(r8) ;# Write 0x22+0xbb=0xdd to memory @0x210 |
mov.b @r9+, r10 |
mov.b @r9+, r10 |
add.b @r9+, 19(r8) ;# Write 0x44+0x55=0x99 to memory @0x213 |
mov @r9+, r10 |
mov @r9+, r10 |
add.b @r9+, 20(r8) ;# Write 0x55+0x6b=0xc0 to memory @0x214 |
mov.b @r9+, r10 |
mov.b @r9+, r10 |
add.b @r9+, 23(r8) ;# Write 0x77+0xa5=0x1c to memory @0x217 |
|
mov #0x99aa, &DMEM_200 |
222,13 → 222,13
mov #0xe1f2, &DMEM_21E |
|
mov #DMEM_200, r10 |
add.b @r10+, aRni_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
mov @r10+, r11 |
add.b @r10+, aRni_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
add.b @r10+, aRni_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
mov @r10+, r11 |
add.b @r10+, aRni_EDE_21C ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
mov.b @r10+, r11 |
add.b @r10+, aRni_EDE_21F ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
|
mov #0x2233, &DMEM_200 |
mov #0x4455, &DMEM_202 |
253,10 → 253,10
|
|
/* ---------------------- TEST WHEN SOURCE IS #N ------------------- */ |
.set N_EDE_218, DMEM_218 |
.set N_EDE_21B, DMEM_21B |
.set N_EDE_21C, DMEM_21C |
.set N_EDE_21F, DMEM_21F |
.set N_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set N_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set N_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set N_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set N_TONY_220, DMEM_220 |
.set N_TONY_223, DMEM_223 |
281,10 → 281,10
mov #0xeecc, &DMEM_21A |
mov #0x1e2c, &DMEM_21C |
mov #0xe1c2, &DMEM_21E |
add.b #0x99aa, N_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b #0xbbcc, N_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b #0xddee, N_EDE_21C+PMEM_LENGTH ;# Write 0xee+0x2c=0x1a to memory @0x21C |
add.b #0xff11, N_EDE_21F+PMEM_LENGTH ;# Write 0x11+0xe1=0xf2 to memory @0x21F |
add.b #0x99aa, N_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b #0xbbcc, N_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b #0xddee, N_EDE_21C ;# Write 0xee+0x2c=0x1a to memory @0x21C |
add.b #0xff11, N_EDE_21F ;# Write 0x11+0xe1=0xf2 to memory @0x21F |
|
mov #0xaa88, &DMEM_220 |
mov #0x22ee, &DMEM_222 |
300,10 → 300,10
|
|
/* ---------------------- TEST WHEN SOURCE IS x(Rn) ---------------- */ |
.set xRn_EDE_218, DMEM_218 |
.set xRn_EDE_21B, DMEM_21B |
.set xRn_EDE_21C, DMEM_21C |
.set xRn_EDE_21F, DMEM_21F |
.set xRn_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set xRn_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set xRn_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set xRn_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set xRn_TONY_220, DMEM_220 |
.set xRn_TONY_223, DMEM_223 |
345,10 → 345,10
mov #0x73c4, &DMEM_21E |
|
mov #DMEM_200, r8 |
add.b 2(r8), xRn_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x44=0xee to memory @0x218 |
add.b 4(r8), xRn_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x77=0x43 to memory @0x21B |
add.b 7(r8), xRn_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x4c=0x29 to memory @0x21C |
add.b 9(r8), xRn_EDE_21F+PMEM_LENGTH ;# Write 0xff+0x73=0x72 to memory @0x21F |
add.b 2(r8), xRn_EDE_218 ;# Write 0xaa+0x44=0xee to memory @0x218 |
add.b 4(r8), xRn_EDE_21B ;# Write 0xcc+0x77=0x43 to memory @0x21B |
add.b 7(r8), xRn_EDE_21C ;# Write 0xdd+0x4c=0x29 to memory @0x21C |
add.b 9(r8), xRn_EDE_21F ;# Write 0xff+0x73=0x72 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
370,16 → 370,16
|
|
/* ---------------------- TEST WHEN SOURCE IS 'EDE' ---------------- */ |
.set EDE_EDE_202, DMEM_202 |
.set EDE_EDE_204, DMEM_204 |
.set EDE_EDE_207, DMEM_207 |
.set EDE_EDE_209, DMEM_209 |
.set EDE_EDE_210, DMEM_210 |
.set EDE_EDE_213, DMEM_213 |
.set EDE_EDE_218, DMEM_218 |
.set EDE_EDE_21B, DMEM_21B |
.set EDE_EDE_21C, DMEM_21C |
.set EDE_EDE_21F, DMEM_21F |
.set EDE_EDE_202, DMEM_202+PMEM_EDE_LENGTH |
.set EDE_EDE_204, DMEM_204+PMEM_EDE_LENGTH |
.set EDE_EDE_207, DMEM_207+PMEM_EDE_LENGTH |
.set EDE_EDE_209, DMEM_209+PMEM_EDE_LENGTH |
.set EDE_EDE_210, DMEM_210+PMEM_EDE_LENGTH |
.set EDE_EDE_213, DMEM_213+PMEM_EDE_LENGTH |
.set EDE_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set EDE_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set EDE_TONY_220, DMEM_220 |
.set EDE_TONY_223, DMEM_223 |
389,10 → 389,10
|
mov #0x2233, &DMEM_210 |
mov #0xcb43, r5 |
add.b EDE_EDE_210+PMEM_LENGTH, r5 ;# Write 0x33+0x43=0x76 to r5 |
add.b EDE_EDE_210, r5 ;# Write 0x33+0x43=0x76 to r5 |
mov #0x4455, &DMEM_212 |
mov #0x32a5, r6 |
add.b EDE_EDE_213+PMEM_LENGTH, r6 ;# Write 0x44+0xa5=0xe9 to r6 |
add.b EDE_EDE_213, r6 ;# Write 0x44+0xa5=0xe9 to r6 |
|
mov #0x1122, &DMEM_202 |
mov #0x3344, &DMEM_204 |
404,10 → 404,10
mov #0xa6b5, &DMEM_214 |
mov #0x6a5b, &DMEM_216 |
|
add.b EDE_EDE_202+PMEM_LENGTH, 16(r7) ;# Write 0x22+0xbb=0xdd to memory @0x210 |
add.b EDE_EDE_204+PMEM_LENGTH, 19(r7) ;# Write 0x44+0x66=0xaa to memory @0x213 |
add.b EDE_EDE_207+PMEM_LENGTH, 20(r7) ;# Write 0x55+0xb5=0x0a to memory @0x214 |
add.b EDE_EDE_209+PMEM_LENGTH, 23(r7) ;# Write 0x77+0x6a=0xe1 to memory @0x217 |
add.b EDE_EDE_202, 16(r7) ;# Write 0x22+0xbb=0xdd to memory @0x210 |
add.b EDE_EDE_204, 19(r7) ;# Write 0x44+0x66=0xaa to memory @0x213 |
add.b EDE_EDE_207, 20(r7) ;# Write 0x55+0xb5=0x0a to memory @0x214 |
add.b EDE_EDE_209, 23(r7) ;# Write 0x77+0x6a=0xe1 to memory @0x217 |
|
mov #0x99aa, &DMEM_202 |
mov #0xbbcc, &DMEM_204 |
418,10 → 418,10
mov #0x1e2f, &DMEM_21C |
mov #0xe1f2, &DMEM_21E |
|
add.b EDE_EDE_202+PMEM_LENGTH, EDE_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b EDE_EDE_204+PMEM_LENGTH, EDE_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b EDE_EDE_207+PMEM_LENGTH, EDE_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
add.b EDE_EDE_209+PMEM_LENGTH, EDE_EDE_21F+PMEM_LENGTH ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
add.b EDE_EDE_202, EDE_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b EDE_EDE_204, EDE_EDE_21B ;# Write 0xcc+0xee=0xba to memory @0x21B |
add.b EDE_EDE_207, EDE_EDE_21C ;# Write 0xdd+0x2f=0x0c to memory @0x21C |
add.b EDE_EDE_209, EDE_EDE_21F ;# Write 0xff+0xe1=0xe0 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
433,19 → 433,19
mov #0x2c3d, &DMEM_224 |
mov #0xc2d3, &DMEM_226 |
|
add.b EDE_EDE_202+PMEM_LENGTH, &EDE_TONY_220 ;# Write 0x33+0x07=0x3a to memory @0x220 |
add.b EDE_EDE_204+PMEM_LENGTH, &EDE_TONY_223 ;# Write 0x55+0xcc=0x21 to memory @0x223 |
add.b EDE_EDE_207+PMEM_LENGTH, &EDE_TONY_224 ;# Write 0x66+0x3d=0xa3 to memory @0x224 |
add.b EDE_EDE_209+PMEM_LENGTH, &EDE_TONY_227 ;# Write 0x88+0xc2=0x4a to memory @0x227 |
add.b EDE_EDE_202, &EDE_TONY_220 ;# Write 0x33+0x07=0x3a to memory @0x220 |
add.b EDE_EDE_204, &EDE_TONY_223 ;# Write 0x55+0xcc=0x21 to memory @0x223 |
add.b EDE_EDE_207, &EDE_TONY_224 ;# Write 0x66+0x3d=0xa3 to memory @0x224 |
add.b EDE_EDE_209, &EDE_TONY_227 ;# Write 0x88+0xc2=0x4a to memory @0x227 |
|
mov #0x7000, r15 |
|
|
/* ---------------------- TEST WHEN SOURCE IS '&EDE' --------------- */ |
.set aEDE_EDE_218, DMEM_218 |
.set aEDE_EDE_21B, DMEM_21B |
.set aEDE_EDE_21C, DMEM_21C |
.set aEDE_EDE_21F, DMEM_21F |
.set aEDE_EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set aEDE_EDE_21B, DMEM_21B+PMEM_EDE_LENGTH |
.set aEDE_EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set aEDE_EDE_21F, DMEM_21F+PMEM_EDE_LENGTH |
|
.set aEDE_TONY_220, DMEM_220 |
.set aEDE_TONY_223, DMEM_223 |
484,10 → 484,10
mov #0x1627, &DMEM_21C |
mov #0x6172, &DMEM_21E |
|
add.b &DMEM_202, aEDE_EDE_218+PMEM_LENGTH ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b &DMEM_204, aEDE_EDE_21B+PMEM_LENGTH ;# Write 0xcc+0x66=0x32 to memory @0x21B |
add.b &DMEM_207, aEDE_EDE_21C+PMEM_LENGTH ;# Write 0xdd+0x27=0x04 to memory @0x21C |
add.b &DMEM_209, aEDE_EDE_21F+PMEM_LENGTH ;# Write 0xff+0x61=0x60 to memory @0x21F |
add.b &DMEM_202, aEDE_EDE_218 ;# Write 0xaa+0x22=0xcc to memory @0x218 |
add.b &DMEM_204, aEDE_EDE_21B ;# Write 0xcc+0x66=0x32 to memory @0x21B |
add.b &DMEM_207, aEDE_EDE_21C ;# Write 0xdd+0x27=0x04 to memory @0x21C |
add.b &DMEM_209, aEDE_EDE_21F ;# Write 0xff+0x61=0x60 to memory @0x21F |
|
mov #0x2233, &DMEM_202 |
mov #0x4455, &DMEM_204 |
507,18 → 507,18
|
|
/* ---------------------- TEST WHEN SOURCE IS CONSTANT ------------- */ |
.set CONSTL_EDE0, DMEM_230 |
.set CONSTL_EDE1, DMEM_232 |
.set CONSTL_EDE2, DMEM_234 |
.set CONSTL_EDE4, DMEM_236 |
.set CONSTL_EDE8, DMEM_238 |
.set CONSTL_EDEm1, DMEM_23A |
.set CONSTH_EDE0, DMEM_23D |
.set CONSTH_EDE1, DMEM_23F |
.set CONSTH_EDE2, DMEM_241 |
.set CONSTH_EDE4, DMEM_243 |
.set CONSTH_EDE8, DMEM_245 |
.set CONSTH_EDEm1, DMEM_247 |
.set CONSTL_EDE0, DMEM_230+PMEM_EDE_LENGTH |
.set CONSTL_EDE1, DMEM_232+PMEM_EDE_LENGTH |
.set CONSTL_EDE2, DMEM_234+PMEM_EDE_LENGTH |
.set CONSTL_EDE4, DMEM_236+PMEM_EDE_LENGTH |
.set CONSTL_EDE8, DMEM_238+PMEM_EDE_LENGTH |
.set CONSTL_EDEm1, DMEM_23A+PMEM_EDE_LENGTH |
.set CONSTH_EDE0, DMEM_23D+PMEM_EDE_LENGTH |
.set CONSTH_EDE1, DMEM_23F+PMEM_EDE_LENGTH |
.set CONSTH_EDE2, DMEM_241+PMEM_EDE_LENGTH |
.set CONSTH_EDE4, DMEM_243+PMEM_EDE_LENGTH |
.set CONSTH_EDE8, DMEM_245+PMEM_EDE_LENGTH |
.set CONSTH_EDEm1, DMEM_247+PMEM_EDE_LENGTH |
|
.set CONSTL_TONY0, DMEM_250 |
.set CONSTL_TONY1, DMEM_252 |
589,18 → 589,18
mov #0xee55, &DMEM_244 |
mov #0x3355, &DMEM_246 |
|
add.b #0x0000, CONSTL_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x230 |
add.b #0x0001, CONSTL_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x232 |
add.b #0x0002, CONSTL_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x234 |
add.b #0x0004, CONSTL_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x236 |
add.b #0x0008, CONSTL_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x238 |
add.b #0xffff, CONSTL_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x23A |
add.b #0x0000, CONSTH_EDE0+PMEM_LENGTH ;# Move +0 to memory @0x23D |
add.b #0x0001, CONSTH_EDE1+PMEM_LENGTH ;# Move +1 to memory @0x23F |
add.b #0x0002, CONSTH_EDE2+PMEM_LENGTH ;# Move +2 to memory @0x241 |
add.b #0x0004, CONSTH_EDE4+PMEM_LENGTH ;# Move +4 to memory @0x243 |
add.b #0x0008, CONSTH_EDE8+PMEM_LENGTH ;# Move +8 to memory @0x245 |
add.b #0xffff, CONSTH_EDEm1+PMEM_LENGTH ;# Move -1 to memory @0x247 |
add.b #0x0000, CONSTL_EDE0 ;# Move +0 to memory @0x230 |
add.b #0x0001, CONSTL_EDE1 ;# Move +1 to memory @0x232 |
add.b #0x0002, CONSTL_EDE2 ;# Move +2 to memory @0x234 |
add.b #0x0004, CONSTL_EDE4 ;# Move +4 to memory @0x236 |
add.b #0x0008, CONSTL_EDE8 ;# Move +8 to memory @0x238 |
add.b #0xffff, CONSTL_EDEm1 ;# Move -1 to memory @0x23A |
add.b #0x0000, CONSTH_EDE0 ;# Move +0 to memory @0x23D |
add.b #0x0001, CONSTH_EDE1 ;# Move +1 to memory @0x23F |
add.b #0x0002, CONSTH_EDE2 ;# Move +2 to memory @0x241 |
add.b #0x0004, CONSTH_EDE4 ;# Move +4 to memory @0x243 |
add.b #0x0008, CONSTH_EDE8 ;# Move +8 to memory @0x245 |
add.b #0xffff, CONSTH_EDEm1 ;# Move -1 to memory @0x247 |
|
|
# |
/nmi.v
71,7 → 71,7
@(negedge irq_acc[`IRQ_NR-16]) |
wkup[0] = 1'b0; |
irq[`IRQ_NR-16] = 1'b0; |
|
|
@(r15==16'h1002); |
nmi = 1'b0; |
|
81,7 → 81,7
if (r12 !==16'h0000) tb_error("====== NMI disabled: flag was not cleared ====="); |
if (r11 !==16'h0000) tb_error("====== NMI disabled: flag is set ====="); |
|
|
|
// Test NMI rising edge |
//-------------------------- |
@(r15==16'h2000); |
126,8 → 126,12
// Test NMI falling edge |
//-------------------------- |
@(r15==16'h3000); |
`ifdef WATCHDOG |
$display(" Test NMI falling edge"); |
|
`else |
$display(" Skip NMI falling edge (Watchdog is not included)"); |
`endif |
|
@(r15==16'h3001); |
|
#(2000); |
138,11 → 142,15
nmi = 1'b1; |
|
#(2000); |
`ifdef WATCHDOG |
if (r6 !==16'h0000) tb_error("====== NMI falling edge: NMI irq was taken with rising edge ====="); |
if (inst_cnt !==16'h0000) tb_error("====== NMI falling edge: CPU is not sleeping ====="); |
#(2000); |
if (inst_cnt !==16'h0000) tb_error("====== NMI falling edge: CPU is not sleeping ====="); |
`else |
#(2000); |
`endif |
#(2000); |
nmi = 1'b0; |
|
#(2000); |
155,11 → 163,15
nmi = 1'b1; |
|
#(2000); |
`ifdef WATCHDOG |
if (r6 !==16'h0001) tb_error("====== NMI falling edge: NMI irq was taken with rising edge ====="); |
if (inst_cnt !==16'h0000) tb_error("====== NMI falling edge: CPU is not sleeping ====="); |
#(2000); |
if (inst_cnt !==16'h0000) tb_error("====== NMI falling edge: CPU is not sleeping ====="); |
`else |
#(2000); |
`endif |
#(2000); |
nmi = 1'b0; |
|
#(2000); |
170,12 → 182,11
if (inst_cnt ===16'h0000) tb_error("====== NMI falling edge: CPU is not out of LPM4 ====="); |
#(2000); |
|
|
// Test NMI nested from Maskable-IRQ |
//----------------------------------- |
@(r15==16'h4000); |
$display(" Test NMI nested from Maskable-IRQ"); |
|
|
@(r15==16'h4001); |
#(2000); |
inst_cnt = 0; |
205,4 → 216,3
|
stimulus_done = 1; |
end |
|
/two-op_autoincr-b.v
44,7 → 44,6
|
// Initialize memory |
//-------------------------------------------------------- |
@(mem200==16'h0000); |
|
@(mem200==16'h0001); |
if (mem200 !== 16'h0001) tb_error("====== Initialize memory error: @0x200 ====="); |
923,7 → 922,6
|
|
|
|
|
stimulus_done = 1; |
end |
|
/lp_modes_dbg_asic.v
72,7 → 72,7
else wkup2_sync <= {wkup2_sync[0], wkup[2]}; |
|
always @(wkup2_sync) |
irq[2] = wkup2_sync[1]; |
irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2 |
|
// Wakeup synchronizer to generate IRQ |
reg [1:0] wkup3_sync; |
81,7 → 81,7
else wkup3_sync <= {wkup3_sync[0], wkup[3]}; |
|
always @(wkup3_sync) |
irq[3] = wkup3_sync[1]; |
irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3 |
|
|
initial |
96,10 → 96,10
// Enable debug interface |
dbg_en = 1; |
|
irq[2] = 0; |
irq[`IRQ_NR-14] = 0; |
wkup[2] = 0; |
|
irq[3] = 0; |
irq[`IRQ_NR-13] = 0; |
wkup[3] = 0; |
|
//$display("dco_clk_cnt: %d / mclk_cnt: %d / smclk_cnt: %d / aclk_cnt: %d / inst_cnt: %d ", dco_clk_cnt, mclk_cnt, smclk_cnt, aclk_cnt, inst_cnt); |
154,7 → 154,7
|
@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
190,7 → 190,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
253,7 → 253,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
289,7 → 289,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(10*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
353,7 → 353,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
393,7 → 393,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
457,7 → 457,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
497,7 → 497,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
569,7 → 569,7
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------// |
wkup[2] = 1'b1; |
@(posedge irq_acc[2]); |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
617,7 → 617,7
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------// |
wkup[3] = 1'b1; |
@(posedge irq_acc[3]); |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3 |
#(100*50); |
dco_clk_cnt = 0; |
mclk_cnt = 0; |
/two-op_add_rom-rd.s43
36,15 → 36,15
/*===========================================================================*/ |
|
.include "pmem_defs.asm" |
|
|
.global main |
|
main: |
/* ---------------------- TEST WHEN SOURCE IS @Rn ------------------ */ |
.set aRn_EDE, DMEM_212 |
.set aRn_EDE, DMEM_212+PMEM_EDE_LENGTH |
.set aRn_TONY, DMEM_214 |
|
|
|
mov #data_aRn_0x1111, r4 |
mov #0x6666, r5 |
add @r4, r5 ;# Add @r4+r5 (0x1111+0x6666=0x7777) |
64,7 → 64,7
|
mov #0x8e1c, &DMEM_212 |
mov #data_aRn_0x5f12, r7 |
add @r7, aRn_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r7, aRn_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
|
mov #0x1541, &DMEM_214 |
mov #data_aRn_0x3112, r8 |
75,7 → 75,7
|
|
/* ---------------------- TEST WHEN SOURCE IS @Rn+ ----------------- */ |
.set aRni_EDE, DMEM_212 |
.set aRni_EDE, DMEM_212+PMEM_EDE_LENGTH |
.set aRni_TONY, DMEM_214 |
|
mov #data_aRni_0x2222, r4 |
103,13 → 103,13
mov #0x5432, &DMEM_210 |
mov #DMEM_200, r8 |
mov #data_aRni_0x1234, r10 |
add @r10+, 16(r8) ;# Write 0x1234+0x5432=0x6666 to memory @0x0210 |
add @r10+, 16(r8) ;# Write 0x2345+0x6666=0x89AB to memory @0x0210 |
add @r10+, 16(r8) ;# Write 0x1234+0x5432=0x6666 to memory @0x0210 |
add @r10+, 16(r8) ;# Write 0x2345+0x6666=0x89AB to memory @0x0210 |
|
mov #0x8e1c, &DMEM_212 |
mov #data_aRni_0x5f12, r8 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE+PMEM_LENGTH ;# Write 0x6345+0xed2e=0x5073 to memory @0x0212 |
add @r8+, aRni_EDE ;# Write 0x5f12+0x8e1c=0xed2e to memory @0x0212 |
add @r8+, aRni_EDE ;# Write 0x6345+0xed2e=0x5073 to memory @0x0212 |
|
mov #0x1541, &DMEM_214 |
mov #data_aRni_0x3112, r9 |
120,7 → 120,7
|
|
/* ---------------------- TEST WHEN SOURCE IS x(Rn) ---------------- */ |
.set xRn_EDE, DMEM_220 |
.set xRn_EDE, DMEM_220+PMEM_EDE_LENGTH |
.set xRn_TONY, DMEM_208 |
|
mov #0x1234, r5 |
144,7 → 144,7
|
mov #0x2143, &DMEM_220 |
mov #data_xRn_0x7238, r7 |
add 4(r7), xRn_EDE+PMEM_LENGTH ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
add 4(r7), xRn_EDE ;# Write 0x7238+0x2143=0x937b to memory @0x220 |
|
mov #0x1432, &DMEM_208 |
mov #data_xRn_0x98b2, r4 |
154,7 → 154,7
|
|
/* ---------------------- TEST WHEN SOURCE IS 'EDE' ---------------- */ |
.set EDE_EDE, DMEM_216 |
.set EDE_EDE, DMEM_216+PMEM_EDE_LENGTH |
.set EDE_TONY, DMEM_212 |
|
|
177,7 → 177,7
|
mov #0x058a, &DMEM_216 |
mov #0x1234, &DMEM_208 |
add data_EDE_0xb3a9, EDE_EDE+PMEM_LENGTH ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
add data_EDE_0xb3a9, EDE_EDE ;# Write 0xb3a9+0x058a=0xb933 to memory @0x216 |
|
mov #0xA738, &DMEM_212 |
mov #0x1234, &DMEM_20A |
188,7 → 188,7
|
|
/* ---------------------- TEST WHEN SOURCE IS '&EDE' --------------- */ |
.set aEDE_EDE, DMEM_218 |
.set aEDE_EDE, DMEM_218+PMEM_EDE_LENGTH |
.set aEDE_TONY, DMEM_202 |
|
mov #0x4321, r4 |
210,7 → 210,7
|
mov #0x6e2f, &DMEM_218 |
mov #0x1234, &DMEM_208 |
add &data_aEDE_0x5c1f, aEDE_EDE+PMEM_LENGTH ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
add &data_aEDE_0x5c1f, aEDE_EDE ;# Write 0x5c1f+0x6e2f=0xca4e to memory @0x218 |
|
mov #0x51ca, &DMEM_202 |
mov #0x1234, &DMEM_20A |
219,7 → 219,7
mov #0x5000, r15 |
|
|
|
|
end_of_test: |
nop |
br #0xffff |
296,7 → 296,7
.word 0x0000 |
.word 0x0000 |
.word 0x98b2 |
|
|
data_EDE_0xc3d6: |
.word 0xc3d6 |
data_EDE_0x000a: |
320,7 → 320,7
.word 0xc16e |
|
|
|
|
/* ---------------------- INTERRUPT VECTORS --------------- */ |
|
.section .vectors, "a" |
/sing-op_rra.s43
172,33 → 172,33
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_218, DMEM_218 |
.set EDE_21A, DMEM_21A |
.set EDE_21C, DMEM_21C |
.set EDE_21E, DMEM_21E |
.set EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_21A, DMEM_21A+PMEM_EDE_LENGTH |
.set EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
|
mov #0x0001, r2 ;# Test 1 |
mov #0x7332, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
rra EDE_218+PMEM_LENGTH ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0}) |
rra EDE_218 ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x7333, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
rra EDE_21A+PMEM_LENGTH ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1}) |
rra EDE_21A ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x8332, &DMEM_21C |
mov #0xaaaa, &DMEM_21E |
rra EDE_21C+PMEM_LENGTH ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0}) |
rra EDE_21C ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x8333, &DMEM_21E |
mov #0xaaaa, &DMEM_220 |
rra EDE_21E+PMEM_LENGTH ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1}) |
rra EDE_21E ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1}) |
mov r2, r11 |
|
mov #0x5000, r15 |
245,7 → 245,7
clr 0(r5) |
incd r5 |
dec r4 |
jnz clear_mem_loop |
jnz clear_mem_loop |
|
mov #0x7000, r15 |
|
481,33 → 481,33
|
# Addressing mode: EDE (Low Byte) |
#--------------------------------- |
.set EDE_230, DMEM_230 |
.set EDE_232, DMEM_232 |
.set EDE_234, DMEM_234 |
.set EDE_236, DMEM_236 |
.set EDE_230, DMEM_230+PMEM_EDE_LENGTH |
.set EDE_232, DMEM_232+PMEM_EDE_LENGTH |
.set EDE_234, DMEM_234+PMEM_EDE_LENGTH |
.set EDE_236, DMEM_236+PMEM_EDE_LENGTH |
|
mov #0x0001, r2 ;# Test 1 |
mov #0x2572, &DMEM_230 |
mov #0xaaaa, &DMEM_232 |
rra.b EDE_230+PMEM_LENGTH ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0}) |
rra.b EDE_230 ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x2573, &DMEM_232 |
mov #0xaaaa, &DMEM_234 |
rra.b EDE_232+PMEM_LENGTH ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1}) |
rra.b EDE_232 ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x2582, &DMEM_234 |
mov #0xaaaa, &DMEM_236 |
rra.b EDE_234+PMEM_LENGTH ;# RRA ({mem1a=0x2582} => {mem1a=0x25c1, C=0}) |
rra.b EDE_234 ;# RRA ({mem1a=0x2582} => {mem1a=0x25c1, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x2583, &DMEM_236 |
mov #0xaaaa, &DMEM_238 |
rra.b EDE_236+PMEM_LENGTH ;# RRA ({mem1b=0x2583} => {mem1b=0x25c1, C=1}) |
rra.b EDE_236 ;# RRA ({mem1b=0x2583} => {mem1b=0x25c1, C=1}) |
mov r2, r11 |
|
mov #0xC000, r15 |
514,33 → 514,33
|
# Addressing mode: EDE (High Byte) |
#---------------------------------- |
.set EDE_239, DMEM_239 |
.set EDE_23B, DMEM_23B |
.set EDE_23D, DMEM_23D |
.set EDE_23F, DMEM_23F |
.set EDE_239, DMEM_239+PMEM_EDE_LENGTH |
.set EDE_23B, DMEM_23B+PMEM_EDE_LENGTH |
.set EDE_23D, DMEM_23D+PMEM_EDE_LENGTH |
.set EDE_23F, DMEM_23F+PMEM_EDE_LENGTH |
|
mov #0x0001, r2 ;# Test 1 |
mov #0x7225, &DMEM_238 |
mov #0xaaaa, &DMEM_23A |
rra.b EDE_239+PMEM_LENGTH ;# RRA ({mem1c=0x7225} => {mem1c=0x3925, C=0}) |
rra.b EDE_239 ;# RRA ({mem1c=0x7225} => {mem1c=0x3925, C=0}) |
mov r2, r5 |
|
mov #0x0001, r2 ;# Test 2 |
mov #0x7325, &DMEM_23A |
mov #0xaaaa, &DMEM_23C |
rra.b EDE_23B+PMEM_LENGTH ;# RRA ({mem1d=0x7325} => {mem1d=0x3925, C=1}) |
rra.b EDE_23B ;# RRA ({mem1d=0x7325} => {mem1d=0x3925, C=1}) |
mov r2, r7 |
|
mov #0x0000, r2 ;# Test 3 |
mov #0x8225, &DMEM_23C |
mov #0xaaaa, &DMEM_23E |
rra.b EDE_23D+PMEM_LENGTH ;# RRA ({mem1e=0x8225} => {mem1e=0xc125, C=0}) |
rra.b EDE_23D ;# RRA ({mem1e=0x8225} => {mem1e=0xc125, C=0}) |
mov r2, r9 |
|
mov #0x0000, r2 ;# Test 4 |
mov #0x8325, &DMEM_23E |
mov #0xaaaa, &DMEM_240 |
rra.b EDE_23F+PMEM_LENGTH ;# RRA ({mem1f=0x8325} => {mem1f=0xc125, C=1}) |
rra.b EDE_23F ;# RRA ({mem1f=0x8325} => {mem1f=0xc125, C=1}) |
mov r2, r11 |
|
mov #0xC001, r15 |
/sing-op_rrc.s43
172,33 → 172,33
|
# Addressing mode: EDE |
#------------------------ |
.set EDE_218, DMEM_218 |
.set EDE_21A, DMEM_21A |
.set EDE_21C, DMEM_21C |
.set EDE_21E, DMEM_21E |
.set EDE_218, DMEM_218+PMEM_EDE_LENGTH |
.set EDE_21A, DMEM_21A+PMEM_EDE_LENGTH |
.set EDE_21C, DMEM_21C+PMEM_EDE_LENGTH |
.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH |
|
mov #0x0000, r2 ;# Test 1 |
mov #0x3332, &DMEM_218 |
mov #0xaaaa, &DMEM_21A |
rrc EDE_218+PMEM_LENGTH ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0}) |
rrc EDE_218 ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x3333, &DMEM_21A |
mov #0xaaaa, &DMEM_21C |
rrc EDE_21A+PMEM_LENGTH ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1}) |
rrc EDE_21A ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x3332, &DMEM_21C |
mov #0xaaaa, &DMEM_21E |
rrc EDE_21C+PMEM_LENGTH ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0}) |
rrc EDE_21C ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0}) |
mov r2, r9 |
|
mov #0x0001, r2 ;# Test 4 |
mov #0x3333, &DMEM_21E |
mov #0xaaaa, &DMEM_220 |
rrc EDE_21E+PMEM_LENGTH ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1}) |
rrc EDE_21E ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1}) |
mov r2, r11 |
|
mov #0x5000, r15 |
245,7 → 245,7
clr 0(r5) |
incd r5 |
dec r4 |
jnz clear_mem_loop |
jnz clear_mem_loop |
|
mov #0x7000, r15 |
|
481,33 → 481,33
|
# Addressing mode: EDE (Low Byte) |
#--------------------------------- |
.set EDE_230, DMEM_230 |
.set EDE_232, DMEM_232 |
.set EDE_234, DMEM_234 |
.set EDE_236, DMEM_236 |
.set EDE_230, DMEM_230+PMEM_EDE_LENGTH |
.set EDE_232, DMEM_232+PMEM_EDE_LENGTH |
.set EDE_234, DMEM_234+PMEM_EDE_LENGTH |
.set EDE_236, DMEM_236+PMEM_EDE_LENGTH |
|
mov #0x0000, r2 ;# Test 1 |
mov #0x2532, &DMEM_230 |
mov #0xaaaa, &DMEM_232 |
rrc.b EDE_230+PMEM_LENGTH ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0}) |
rrc.b EDE_230 ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x2533, &DMEM_232 |
mov #0xaaaa, &DMEM_234 |
rrc.b EDE_232+PMEM_LENGTH ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1}) |
rrc.b EDE_232 ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x2532, &DMEM_234 |
mov #0xaaaa, &DMEM_236 |
rrc.b EDE_234+PMEM_LENGTH ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0}) |
rrc.b EDE_234 ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0}) |
mov r2, r9 |
|
mov #0x0001, r2 ;# Test 4 |
mov #0x2533, &DMEM_236 |
mov #0xaaaa, &DMEM_238 |
rrc.b EDE_236+PMEM_LENGTH ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1}) |
rrc.b EDE_236 ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1}) |
mov r2, r11 |
|
mov #0xC000, r15 |
514,33 → 514,33
|
# Addressing mode: EDE (High Byte) |
#---------------------------------- |
.set EDE_239, DMEM_239 |
.set EDE_23B, DMEM_23B |
.set EDE_23D, DMEM_23D |
.set EDE_23F, DMEM_23F |
.set EDE_239, DMEM_239+PMEM_EDE_LENGTH |
.set EDE_23B, DMEM_23B+PMEM_EDE_LENGTH |
.set EDE_23D, DMEM_23D+PMEM_EDE_LENGTH |
.set EDE_23F, DMEM_23F+PMEM_EDE_LENGTH |
|
mov #0x0000, r2 ;# Test 1 |
mov #0x3225, &DMEM_238 |
mov #0xaaaa, &DMEM_23A |
rrc.b EDE_239+PMEM_LENGTH ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0}) |
rrc.b EDE_239 ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0}) |
mov r2, r5 |
|
mov #0x0000, r2 ;# Test 2 |
mov #0x3325, &DMEM_23A |
mov #0xaaaa, &DMEM_23C |
rrc.b EDE_23B+PMEM_LENGTH ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1}) |
rrc.b EDE_23B ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1}) |
mov r2, r7 |
|
mov #0x0001, r2 ;# Test 3 |
mov #0x3225, &DMEM_23C |
mov #0xaaaa, &DMEM_23E |
rrc.b EDE_23D+PMEM_LENGTH ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0}) |
rrc.b EDE_23D ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0}) |
mov r2, r9 |
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mov #0x0001, r2 ;# Test 4 |
mov #0x3325, &DMEM_23E |
mov #0xaaaa, &DMEM_240 |
rrc.b EDE_23F+PMEM_LENGTH ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1}) |
rrc.b EDE_23F ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1}) |
mov r2, r11 |
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mov #0xC001, r15 |
/dbg_i2c_mem.v
39,7 → 39,7
/*===========================================================================*/ |
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`define LONG_TIMEOUT |
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initial |
begin |
$display(" ==============================================="); |
54,7 → 54,7
`ifdef DBG_RST_BRK_EN |
dbg_i2c_wr(CPU_CTL, 16'h0002); // RUN |
`endif |
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// RD/WR ACCESS: CPU REGISTERS (16b) |
//-------------------------------------------------------- |
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80,7 → 80,7
repeat(20) @(posedge mclk); |
if (r6 !== 16'hcb54) tb_error("====== CPU REGISTERS (16b): Write R6 ====="); |
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// RD/WR ACCESS: RAM (16b) |
//-------------------------------------------------------- |
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132,16 → 132,16
repeat(20) @(posedge mclk); |
if (mem210 !== 16'hc4b3) tb_error("====== RAM (8b): Write @0x211 ====="); |
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// RD/WR ACCESS: ROM (16b) |
//-------------------------------------------------------- |
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// READ ROM |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h34)); // select memory address |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h00)); // select memory address |
dbg_i2c_wr(MEM_CTL, 16'h0001); // read memory |
dbg_i2c_rd(MEM_DATA); // read data |
if (dbg_i2c_buf !== 16'h5ab7) tb_error("====== ROM (16b): Read @0xf834 ====="); |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h36)); // select memory address |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h02)); // select memory address |
dbg_i2c_wr(MEM_CTL, 16'h0001); // read memory |
dbg_i2c_rd(MEM_DATA); // read data |
if (dbg_i2c_buf !== 16'h6bc8) tb_error("====== ROM (16b): Read @0xf836 ====="); |
163,11 → 163,11
//-------------------------------------------------------- |
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// READ ROM |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h34)); // select memory address |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h00)); // select memory address |
dbg_i2c_wr(MEM_CTL, 16'h0009); // read memory |
dbg_i2c_rd(MEM_DATA); // read data |
if (dbg_i2c_buf !== 16'h00b7) tb_error("====== ROM (8b): Read @0xf834 ====="); |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h35)); // select memory address |
dbg_i2c_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h01)); // select memory address |
dbg_i2c_wr(MEM_CTL, 16'h0009); // read memory |
dbg_i2c_rd(MEM_DATA); // read data |
if (dbg_i2c_buf !== 16'h005a) tb_error("====== ROM (8b): Read @0xf835 ====="); |
184,10 → 184,10
repeat(20) @(posedge mclk); |
if (irq_vect_00 !== 16'h2514) tb_error("====== ROM (8b): Write @0xffe1 ====="); |
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// RD/WR ACCESS: PERIPHERALS (16b) |
//-------------------------------------------------------- |
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// WRITE PERIPHERAL |
dbg_i2c_wr(MEM_ADDR, 16'h0170); // select memory address |
dbg_i2c_wr(MEM_DATA, 16'h9dc7); // write data |
258,7 → 258,7
dbg_i2c_rd(MEM_DATA); // read data |
if (dbg_i2c_buf !== 16'h00fa) tb_error("====== Peripheral (8b): Read @0x0023 ====="); |
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stimulus_done = 1; |
`else |
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277,4 → 277,3
$finish; |
`endif |
end |
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