OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/core/sim/rtl_sim
    from Rev 141 to Rev 142
    Reverse comparison

Rev 141 → Rev 142

/src/ldscript_example.x
1,6 → 1,6
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-msp430","elf32-msp430","elf32-msp430")
OUTPUT_ARCH(msp:110)
OUTPUT_ARCH("msp430")
MEMORY
{
text (rx) : ORIGIN = 0xf800, LENGTH = 2048
7,8 → 7,12
data (rwx) : ORIGIN = 0x0200, LENGTH = 128
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 32
}
__WDTCTL = 0x0120;
 
SECTIONS
{
PROVIDE (__stack = 0x0280) ;
 
/* Read-only sections, merged into text segment. */
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
165,7 → 169,6
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
PROVIDE (__stack = 0x0280) ;
PROVIDE (__data_start_rom = _etext) ;
PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ;
PROVIDE (__noinit_start_rom = _etext + SIZEOF (.data)) ;
/src-c/sandbox/linker.x
8,8 → 8,11
vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
}
__WDTCTL = 0x0120;
 
SECTIONS
{
PROVIDE (__stack = 0x280) ;
 
/* Read-only sections, merged into text segment. */
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
169,7 → 172,6
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
PROVIDE (__stack = 0x280) ;
PROVIDE (__data_start_rom = _etext) ;
PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ;
PROVIDE (__noinit_start_rom = _etext + SIZEOF (.data)) ;

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