URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1200/rtl/verilog
- from Rev 813 to Rev 808
- ↔ Reverse comparison
Rev 813 → Rev 808
/or1200_defines.v
1809,6 → 1809,7
// vector to allow for power-on code to be run, if desired. // |
// // |
// OR1200_BOOT_ADR should be the 32-bit address of the boot location // |
// OR1200_BOOT_PCREG_DEFAULT should be ((OR1200_BOOT_ADR-4)>>2) // |
// // |
// For default reset behavior uncomment the settings under the "Boot 0x100" // |
// comment below. // |
1815,6 → 1816,8
// // |
/////////////////////////////////////////////////////////////////////////////// |
// Boot from 0xf0000100 |
//`define OR1200_BOOT_PCREG_DEFAULT 30'h3c00003f |
//`define OR1200_BOOT_ADR 32'hf0000100 |
// Boot from 0x100 |
`define OR1200_BOOT_PCREG_DEFAULT 30'h0000003f |
`define OR1200_BOOT_ADR 32'h00000100 |
/or1200_cpu.v
90,7 → 90,6
|
parameter dw = `OR1200_OPERAND_WIDTH; |
parameter aw = `OR1200_REGFILE_ADDR_WIDTH; |
parameter boot_adr = `OR1200_BOOT_ADR; |
|
// |
// I/O ports |
414,7 → 413,7
// |
// Instantiation of instruction fetch block |
// |
or1200_genpc #(.boot_adr(boot_adr)) or1200_genpc( |
or1200_genpc or1200_genpc( |
.clk(clk), |
.rst(rst), |
.icpu_adr_o(icpu_adr_o), |
/or1200_top.v
616,9 → 616,7
// |
// Instantiation of Instruction Cache |
// |
or1200_cpu |
#(.boot_adr(boot_adr)) |
or1200_cpu( |
or1200_cpu or1200_cpu( |
.clk(clk_i), |
.rst(rst_i), |
|
/or1200_genpc.v
109,11 → 109,11
input genpc_freeze; |
input no_more_dslot; |
|
parameter boot_adr = `OR1200_BOOT_ADR; |
// |
// Internal wires and regs |
// |
reg [31:2] pcreg_default; |
wire [31:0] pcreg_boot; |
reg pcreg_select; |
reg [31:2] pcreg; |
reg [31:0] pc; |
258,7 → 258,7
always @(posedge clk or `OR1200_RST_EVENT rst) |
// default value |
if (rst == `OR1200_RST_VALUE) begin |
pcreg_default <= (boot_adr >>2) - 4; |
pcreg_default <= `OR1200_BOOT_PCREG_DEFAULT; // jb |
pcreg_select <= 1'b1;// select async. value due to reset state |
end |
// selected value (different from default) is written into FF after |
278,7 → 278,7
|
// select async. value for pcreg after reset - PC jumps to the address selected |
// after boot. |
wire [31:0] pcreg_boot = boot_adr; |
assign pcreg_boot = `OR1200_BOOT_ADR; // changed JB |
|
always @(pcreg_boot or pcreg_default or pcreg_select) |
if (pcreg_select) |