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  • This comparison shows the changes necessary to convert path
    /
    from Rev 787 to Rev 788
    Reverse comparison

Rev 787 → Rev 788

/openrisc/trunk/or1200/rtl/verilog/or1200_alu.v
90,7 → 90,9
reg [width-1:0] result;
reg [width-1:0] shifted_rotated;
reg [width-1:0] extended;
`ifdef OR1200_IMPL_ALU_CUST5
reg [width-1:0] result_cust5;
`endif
reg flagforw;
reg flagcomp;
reg flag_we;
187,10 → 189,13
// Central part of the ALU
//
always @(alu_op or alu_op2 or a or b or result_sum or result_and or macrc_op
or shifted_rotated or mult_mac_result or flag or result_cust5 or carry
or shifted_rotated or mult_mac_result or flag or carry
`ifdef OR1200_IMPL_ALU_EXT
or extended
`endif
`ifdef OR1200_IMPL_ALU_CUST5
or result_cust5
`endif
) begin
`ifdef OR1200_CASE_DEFAULT
casez (alu_op) // synopsys parallel_case
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v
90,7 → 90,9
reg [width-1:0] result;
reg [width-1:0] shifted_rotated;
reg [width-1:0] extended;
`ifdef OR1200_IMPL_ALU_CUST5
reg [width-1:0] result_cust5;
`endif
reg flagforw;
reg flagcomp;
reg flag_we;
187,10 → 189,13
// Central part of the ALU
//
always @(alu_op or alu_op2 or a or b or result_sum or result_and or macrc_op
or shifted_rotated or mult_mac_result or flag or result_cust5 or carry
or shifted_rotated or mult_mac_result or flag or carry
`ifdef OR1200_IMPL_ALU_EXT
or extended
`endif
`ifdef OR1200_IMPL_ALU_CUST5
or result_cust5
`endif
) begin
`ifdef OR1200_CASE_DEFAULT
casez (alu_op) // synopsys parallel_case

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