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- This comparison shows the changes necessary to convert path
/openrisc/trunk/orpsocv2/rtl/verilog/include
- from Rev 363 to Rev 373
- ↔ Reverse comparison
Rev 363 → Rev 373
/uart_defines.v
240,8 → 240,11
`define FAST_TEST 1 // 64/1024 packets are sent |
|
// Defines hard baud prescaler register - uncomment to enable |
//`define PRESCALER_PRESET_HARD |
`define PRESCALER_PRESET_HARD |
// 115200 baud preset values |
// 20MHz: prescaler 10.8 (11, rounded up) |
//`define PRESCALER_HIGH_PRESET 8'd0 |
//`define PRESCALER_LOW_PRESET 8'd11 |
// 50MHz: prescaler 27.1 |
`define PRESCALER_HIGH_PRESET 8'd0 |
`define PRESCALER_LOW_PRESET 8'd11 |
`define PRESCALER_LOW_PRESET 8'd27 |