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/trunk/gdb-6.8/gdb/doc/gdb.texinfo
15100,15 → 15100,20
@item target jtag jtag://@var{host}:@var{port}
@itemx target jtag @var{device}
 
Connects to JTAG. The first format uses the propietary OpenRISC 1000
remote JTAG protocol, second format is for directly connected hardware
using a JP1 interface (typically via the parallel port). The remote
server can be running either the architectural simulator (Or1ksim) or
driving real hardware.
Connect to the OpenRISC 1000 via its JTAG port. The first format uses
the propietary OpenRISC 1000 remote JTAG protocol, second format is for
directly connected hardware using a JP1 interface (typically via the
parallel port). The remote server can be running either the
architectural simulator (Or1ksim) or driving real hardware.
 
Example: @code{target jtag jtag://localhost:50000}@*
Example: @code{target jtag /dev/lp}
 
@emph{Note:} This interface is now deprecated and documented here only for
backwards compatibility. The OpenRISC 1000 now supports the @value{GDBN}
@dfn{Remote Serial Protocol}. The recommended way to connect is using the
@command{@w{target remote}} or @command{@w{target extended-remote}} commands.
 
@kindex target jtag_mohor
@kindex target jtag_orpsoc
@item target jtag jtag_mohor://@var{host}:@var{port}
15126,18 → 15131,24
@b{jtag://}. For completeness @b{jtag_orpsoc://} can be specified as a
synonum for @b{jtag://}.
 
@emph{Note:} The recommended connection using the @value{GDBN} @dfn{Remote
Serial Protocol} is independent of the JTAG implementation and will work with
either.
 
@kindex target jtag reset
@item target jtag jtag://@var{host}:@var{port} reset
 
By default, establishing a connection @emph{does not} reset the
target. This allows debugging to resume a partially complete program
on connection. If a reset is required, the keyworkd @b{RESET} (case
insensitive) may be added at the end of the @b{target} command.
By default, establishing a connection using the OpenRISC 1000 Remote JTAG
Protocol @emph{does not} reset the target. This allows debugging to resume a
partially complete program on connection. If a reset is required, the keyworkd
@b{RESET} (case insensitive) may be added at the end of the @b{target}
command.
 
Example: @code{target jtag jtag://localhost:50000 reset}
 
@emph{Note.} The proprietary remote JTAG protocol will be dropped in a
future implementation and replaced by the @value{GDBN} Remote Serial Protocol.
@emph{Note.} The proprietary remote JTAG protocol is now deprecated. Users
should instead use the @value{GDBN} Remote Serial Protocol via the
@command{@w{target remote}} and @command{@w{target extended-remote}} commands.
 
@kindex info spr
@item info spr
/trunk/gdb-6.8/gdb/doc/or1k.texinfo
26,7 → 26,7
@syncodeindex fn cp
 
@c !!set manual's edition!
@set EDITION First
@set EDITION Second
 
@c !!set GDB edit command default editor
@set EDITOR /bin/ex
67,8 → 67,8
@page
@tex
{\parskip=0pt
\hfill Please report bugs using the OpenCores tracker:
@uref{www.opencores.org/ptracker.cgi/list/or1k}.\par
\hfill Please report bugs using the OpenCores tracker:\par
\hfill @uref{www.opencores.org/ptracker.cgi/list/or1k}.\par
\hfill {\it Debugging the OpenRISC 1000 with @value{GDBN}}\par
\hfill \TeX{}info \texinfoversion\par
}
129,25 → 129,29
@value{GDBN} is described well in its user manual, ``Debugging with GDB: The
GNU Source-Level Debugger''.
 
@cindex RSP
@cindex Remote Serial Protocol
This manual describes how to use @value{GDBN} to debug C programs cross
compiled for and running on processors using the OpenRISC 1000
architecture. In general @value{GDBN} does not run on the actual target, but
on a separate host processor. It communicates with the target via a custom
remote protocol, which drives the JTAG interface on the OpenRISC 1000.
on a separate host processor. It communicates with the target via the
@value{GDBN} @dfn{Remote Serial Protocol} (@acronym{RSP}).
 
@cindex JTAG
@cindex jtag, target
@cindex target jtag
This is provided by adding a special target, ``jtag'' to @value{GDBN},
allowing the debugger to connect via the JTAG interface. @xref{Connecting
to the Target,,Connecting to the Target}.
For backwards compatibility, @value{GDBN} for OpenRISC also supports the
legacy custom remote protocol, which drives the JTAG interface on the OpenRISC
1000. This is provided by adding a special target, ``jtag'' to @value{GDBN},
allowing the debugger to connect via the JTAG interface. @xref{Connecting to
the Target,,Connecting to the Target}.
 
@cindex SPR
@cindex Special Purpose Registers
@cindex @b{spr} command
@cindex commands, @b{spr}
@cindex @b{info spr} command
@cindex commands, @b{info spr}
@cindex @command{spr} command
@cindex commands, @command{spr}
@cindex @command{info spr} command
@cindex commands, @command{info spr}
@cindex OpenRISC 1000 specific commands
@cindex commands, OpenRISC 1000 specific
In addition the info command is extended to allow inspection of
155,29 → 159,29
added to set the value of a Special Purpose Register. @xref{OpenRISC 1000
Specific Commands,,OpenRISC 1000 Specific Commands}.
 
@cindex @b{info registers} command for OpenRISC 1000
@cindex commands, @b{info registers} for OpenRISC 1000
@cindex @command{info registers} command for OpenRISC 1000
@cindex commands, @command{info registers} for OpenRISC 1000
All the normal GDB commands should work, although hardware watchpoints are not
tested at present. The @b{info registers} command will show the 32 general
purpose registers, while the @b{info registers all} command will add the
tested at present. The @command{info registers} command will show the 32 general
purpose registers, while the @command{info registers all} command will add the
program counter, supervision register and exception program counter register.
 
@iftex
Throughout this document, user input is emphasised like this: @b{input},
Throughout this document, user input is emphasised like this: @command{input},
program output is show like this: @code{Hello World!}.
@end iftex
 
@cindex graphical debugging
@cindex graphical debugging, @b{gdbtui}
@cindex graphical debugging, @b{ddd}
@cindex @b{gdbtui}
@cindex @b{ddd}
For those who like their debugging graphical, the @b{gdbtui} command is
available (typically as @b{or32-uclinux-gdbtui}). @value{GDBN} for OpenRISC
1000 can also be run under @b{ddd} as follows:
@cindex graphical debugging, @command{gdbtui}
@cindex graphical debugging, @command{ddd}
@cindex @command{gdbtui}
@cindex @command{ddd}
For those who like their debugging graphical, the @command{gdbtui} command is
available (typically as @command{or32-uclinux-gdbtui}). @value{GDBN} for
OpenRISC 1000 can also be run under @command{ddd} as follows:
 
@example
@b{ddd --debugger=or32-uclinux-gdb --gdb}
@command{ddd --debugger=or32-uclinux-gdb --gdb}
@end example
 
@menu
232,11 → 236,11
The port to @value{GDBN} @value{GDBVN} is the work of Jeremy Bennett
of Embecosm Limited (jeremy.bennett@@embecosm.com).
 
@quotation
@quotation Plea
@cindex contributors, unknown
@emph{Plea.} If you know of anyone who has been omitted from this list, please
email the current author, so the omission can be corrected, and credit given
where it is due.
If you know of anyone who has been omitted from this list, please email the
current author, so the omission can be corrected, and credit given where it is
due.
@end quotation
 
@node Connecting to the Target
248,6 → 252,8
 
@enumerate
@item
@cindex @command{target jtag} command
@cindex commands, @command{target jtag}
@cindex OpenRISC 1000 target, local connecting
@cindex target, local, OpenRISC 1000, connecting
@cindex connecting, OpenRISC 1000 target, local
256,28 → 262,64
@cindex target, direct, OpenRISC 1000, connecting
@cindex connecting, OpenRISC 1000 target, direct
@cindex direct OpenRISC 1000 target, connecting
To hardware directly connected via a JP1 header linked to the parallel port.
To hardware directly connected via a JP1 header linked to the parallel
port. This uses the @value{GDBN} command @command{target jtag}.
 
@item
@cindex OpenRISC 1000 target, remote connecting
@cindex target, remote, OpenRISC 1000, connecting
@cindex connecting, OpenRISC 1000 target, remote
@cindex remote OpenRISC 1000 target, connecting
@cindex @command{target remote} command
@cindex commands, @command{target remote}
@cindex @command{target extended-remote} command
@cindex commands, @command{target extended-remote}
@cindex OpenRISC 1000 target, remote connecting via RSP
@cindex target, remote, OpenRISC 1000, connecting via RSP
@cindex connecting, OpenRISC 1000 target, remote via RSP
@cindex remote OpenRISC 1000 target, connecting via RSP
Via a TCP/IP socket to a machine which has the hardware connected, or
is running the architectural simulator
is running the architectural simulator using the standard @value{GDBN}
@dfn{Remote Serial Protocol}. This uses the @value{GDBN} commands
@command{target remote} or @command{target extended-remote}.
 
@item
@cindex @command{target jtag} command
@cindex commands, @command{target jtag}
@cindex OpenRISC 1000 target, remote connecting via JTAG
@cindex target, remote, OpenRISC 1000, connecting via JTAG
@cindex connecting, OpenRISC 1000 target, remote via JTAG
@cindex remote OpenRISC 1000 target, connecting via JTAG
Via a TCP/IP socket to a machine which has the hardware connected, or
is running the architectural simulator using the custom OpenRISC 1000 Remote
JTAG protocol. This uses the @value{GDBN} command @command{target jtag}.
 
@quotation Note
This connection mechanism is deprecated. It remains for backward compatibility
only.
@end quotation
 
@end enumerate
 
@cindex @b{target jtag} command
@cindex commands, @b{target jtag}
Both are achieved via the GDB command
@cindex OpenRISC 1000 Architectural Simulator
@cindex OpenRISC 1000 Architectural Simulator, patch
@cindex patch, OpenRISC 1000 Architectural Simulator
@cindex Or1ksim
@cindex Or1ksim, patch
@cindex patch, Or1ksim
@quotation Caution
If used with version 0.2.0 of the architectural simulator, Or1ksim,
@value{GDBN} version @value{GDBVN} requires a patch to be applied to the
architectural simulator. This should be available on the OpenCores website, or
contact the author directly. Only the legacy OpenRISC 1000 Remote JTAG
Protocol interface is available for this version of the architectural
simualtor.
 
@example
@b{target jtag}
@end example
The user is strongly recommended to use Or1ksim 0.3.0 or later, since this
interfaces directly to @value{GDBN} using the @dfn{Remote Serial Protocol}.
@end quotation
 
@menu
* Direct JTAG Connection:: Direct connection via a JTAG JP1
interface
* Remote Serial Protocol Connection:: Connection via the @value{GDBN} Remote
Serial Protocol Interface
* Remote JTAG Connection:: Connection via the OpenRISC 1000 Remote
JTAG Interface
@end menu
294,33 → 336,75
@cindex direct OpenRISC 1000 target, connecting
 
In this case the the device to which the JP1 header is connected must be
specifed to the @b{target jtag} command. Typically that will be the parallel
printer port, so the command would be:
specifed to the @command{target jtag} command. Typically that will be the
parallel printer port, so the command would be:
 
@cindex local @b{target jtag} command
@cindex direct @b{target jtag} command
@cindex @b{target jtag} command, local
@cindex @b{target jtag} command, direct
@cindex commands, @b{target jtag}, local
@cindex commands, @b{target jtag}, direct
@cindex local @command{target jtag} command
@cindex direct @command{target jtag} command
@cindex @command{target jtag} command, local
@cindex @command{target jtag} command, direct
@cindex commands, @command{target jtag}, local
@cindex commands, @command{target jtag}, direct
@cindex local target specification
@cindex direct target specification
@cindex target specification, local
@cindex target specification, direct
@example
@b{target jtag /dev/lp}
@command{target jtag /dev/lp}
@end example
 
@cindex @b{target jtag} command, local, testing
@cindex @b{target jtag} command, direct, testing
@cindex commands, @b{target jtag}, local, testing
@cindex commands, @b{target jtag}, direct, testing
@emph{Warning.} The current author is not aware of anyone using the JP1
@cindex @command{target jtag} command, local, testing
@cindex @command{target jtag} command, direct, testing
@cindex commands, @command{target jtag}, local, testing
@cindex commands, @command{target jtag}, direct, testing
@quotation Caution
The current author is not aware of anyone using the JP1
interface. As a result this code has not been tested in the port to
@value{GDBN} version @value{GDBVN}. Modern hardware connections are usually via
interfaces such as USB, for which the OpenRISC Remote Interface can be used
(@pxref{Remote JTAG Connection,,Remote JTAG Connection}).
@end quotation
 
@node Remote Serial Protocol Connection
@section Connection via the @value{GDBN} Remote Serial Protocol
@cindex OpenRISC 1000 target, remote connecting via RSP
@cindex target, remote, OpenRISC 1000, connecting via RSP
@cindex connecting, OpenRISC 1000 target, remote via RSP
@cindex remote OpenRISC 1000 target, connecting via RSP
 
The usual mode of operation is through the @value{GDBN} @dfn{Remote Serial
Protocol} (@acronym{RSP}). This communicates to the target through a TCP/IP
socket. The target must then implement the server side of the interface to
drive either physical hardware (for example through a USB/JTAG connector) or a
simulation of the hardware (such as the OpenRISC Architectural Simulator).
 
Although referred to as a @emph{remote} interface, the target may actually
be on the same machine, just running in a separate process, with its own
terminal window.
 
For example, to connect to the OpenRISC 1000 Architectural simulator, which is
running on machine ``thomas'' and has been configured to talk to @value{GDBN}
on port 51000, the following command would be used:
 
@cindex remote @command{target jtag} command
@cindex @command{target jtag} command, remote
@cindex commands, @command{target jtag}, remote
@cindex remote target specification for RSP
@cindex target specification for RSP
@example
@command{target remote thomas:51000}
@end example
 
The target machine is specified as the machine name and port number. If the
architectural simulator was running on the same machine, its name may be
omitted, thus:
 
@cindex remote target specification, same machine for RSP
@cindex target specification for RSP, same machine
@example
@command{target remote :51000}
@end example
 
@node Remote JTAG Connection
@section Connection via the OpenRISC 1000 Remote JTAG Interface
@cindex OpenRISC 1000 target, remote connecting
328,8 → 412,12
@cindex connecting, OpenRISC 1000 target, remote
@cindex remote OpenRISC 1000 target, connecting
 
The more common mode of operation is through the OpenRISC 1000 Remote JTAG
Interface. This communicates to the target through a TCP/IP socket. The target
Historically, @value{GDBN} communicated with remote OpenRISC 1000 targets
using a customer protocol, the @dfn{OpenRISC 1000 Remote JTAG
Interface}.
 
This protocol is maintained for backwards compatibility, but is now
deprecated. It communicates to the target through a TCP/IP socket. The target
must then implement the client side of the interface to drive either physical
hardware (for example through a USB/JTAG connector) or a simulation of the
hardware (such as the OpenRISC Architectural Simulator).
342,13 → 430,13
running on machine ``thomas'' and has been configured to talk to @value{GDBN}
on port 50000, I could use the command:
 
@cindex remote @b{target jtag} command
@cindex @b{target jtag} command, remote
@cindex commands, @b{target jtag}, remote
@cindex remote @command{target jtag} command
@cindex @command{target jtag} command, remote
@cindex commands, @command{target jtag}, remote
@cindex remote target specification
@cindex target specification, remote
@example
@b{target jtag jtag://thomas:50000}
@command{target jtag jtag://thomas:50000}
@end example
 
The target machine is specified after the @b{jtag://} and separated from the
358,7 → 446,7
@cindex remote target specification, same machine
@cindex target specification, same machine
@example
@b{target jtag jtag://localhost:50000}
@command{target jtag jtag://localhost:50000}
@end example
 
@cindex Igor Mohor
375,59 → 463,57
use the Igor Mohor version by specifying for example:
 
@example
@b{target jtag jtag_mohor://localhost:50000}
@command{target jtag jtag_mohor://localhost:50000}
@end example
 
This interface is only available with remote JTAG connections, since all
modern interfaces are based on the remote connection. For completeness
This interface is only available with remote connections using the legacy
OpenRISC 1000 Remote JTAG Protocol (deprecated). The direct JP1 interface can
support only the ORPSoC version of JTAG.
 
The recommended approach is to use the @value{GDBN} @dfn{Remote Serial
Protocol} which interfaces directly to the simulator, and is independent of
the JTAG implementation used.
 
For completeness
 
@example
@b{target jtag jtag_orpsoc://localhost:50000}
@command{target jtag jtag_orpsoc://localhost:50000}
@end example
 
is provided as a synonym for:
 
@example
@b{target jtag jtag://localhost:50000}
@command{target jtag jtag://localhost:50000}
@end example
 
@cindex reset
@cindex resetting the target
@cindex target reset
By default, establishing a connection @emph{does not} reset the
target. This allows debugging to resume a partially complete program
on connection. If a reset is required, the keyworkd @b{RESET} (case
insensitive) may be added at the end of the @b{target} command. For example:
By default, establishing a connection @emph{does not} reset the target. This
allows debugging to resume a partially complete program on connection. If a
reset is required, the keyworkd @command{RESET} (case insensitive) may be
added at the end of the @command{target} command. For example:
 
@example
@b{target jtag jtag://localhost:50000 reset}
@command{target jtag jtag://localhost:50000 reset}
@end example
 
@cindex OpenRISC 1000 Architectural Simulator
@cindex OpenRISC 1000 Architectural Simulator, patch
@cindex patch, OpenRISC 1000 Architectural Simulator
@cindex Or1ksim
@cindex Or1ksim, patch
@cindex patch, Or1ksim
@emph{Warning.} @value{GDBN} version @value{GDBVN} requires a patch to the
architectural simulator. This should be available on the OpenCores website, or
contact the author directly.
 
@cindex robustness, OpenRISC remote JTAG interface
@cindex JTAG, robustness or remote interface
@cindex Remote Serial Protocol
@cindex RSP
@emph{Warning.} The OpenRISC remote JTAG interface is not particularly
robust. In particular dropping and reconnecting sessions does not seem
to work well. Eventually this interface will be replaced by the
generic @value{GDBN} Remote Serial Interface.
@quotation Warning
The OpenRISC remote JTAG interface is not particularly robust. In particular
dropping and reconnecting sessions does not seem to work well. This was a key
factor in its replacement by the generic @value{GDBN} Remote Serial Interface.
@end quotation
 
@node OpenRISC 1000 Specific Commands
@chapter Commands just for the OpenRISC 1000
@cindex @b{info spr} command
@cindex @b{spr} command
@cindex commands, @b{info spr}
@cindex commands, @b{spr} command
@cindex @command{info spr} command
@cindex @command{spr} command
@cindex commands, @command{info spr}
@cindex commands, @command{spr} command
@cindex custom commands, OpenRISC 1000
@cindex OpenRISC 1000, custom commands
The OpenRISC 1000 has one particular feature that is difficult for
438,9 → 524,9
The OpenRISC 1000 Special Purpose Registers (SPR) do not really fit well into
this structure. There are too many of them (12 groups each with 2000+ entries
so far, with up to 32 groups permitted) to be implemented as ordinary
registers in @value{GDBN}. Think what this would mean for the command @b{info
registers all}. However they cannot be considered memory, since they do not
reside in the main memory map.
registers in @value{GDBN}. Think what this would mean for the command
@command{info registers all}. However they cannot be considered memory, since
they do not reside in the main memory map.
 
The solution is to add two new commands to @value{GDBN} to see the value of a
particular SPR and to set the value of a particular SPR.
447,10 → 533,10
 
@enumerate
@item
@b{info spr} is used to show the value of a SPR or group of SPRs.
@command{info spr} is used to show the value of a SPR or group of SPRs.
 
@item
@b{spr} is used to set the value of an individual SPR.
@command{spr} is used to set the value of an individual SPR.
@end enumerate
 
@menu
459,11 → 545,11
@end menu
 
@node Reading SPRs
@section Using the @b{info spr} Command
@cindex @b{info spr} command
@cindex commands, @b{info spr}
@cindex @b{info spr} command, argument specification
@cindex @b{info spr} command, single register
@section Using the @command{info spr} Command
@cindex @command{info spr} command
@cindex commands, @command{info spr}
@cindex @command{info spr} command, argument specification
@cindex @command{info spr} command, single register
 
The value of an SPR is read by specifying either the unique name of the SPR,
or the its group and index in that group. For example the Debug Reason
471,11 → 557,11
the following commands:
 
@example
@b{info spr DRR}
@b{info spr debug DRR}
@b{info spr debug 21}
@b{info spr 6 DRR}
@b{info spr 6 21}
@command{info spr DRR}
@command{info spr debug DRR}
@command{info spr debug 21}
@command{info spr 6 DRR}
@command{info spr 6 21}
@end example
 
In each case the output will be:
484,15 → 570,15
@code{DEBUG.DRR = SPR6_21 = 0 (0x0)}
@end example
 
@cindex @b{info spr} command, argument specification
@cindex @b{info spr} command, complete group
@cindex @command{info spr} command, argument specification
@cindex @command{info spr} command, complete group
It is also possible to inspect all the registers in a group. For example to
look at all the Programmable Interrupt Controller registers (group 9), either
of the following commands could be used:
 
@example
@b{info spr PIC}
@b{info spr 9}
@command{info spr PIC}
@command{info spr 9}
@end example
 
And the output would be:
505,55 → 591,36
Indicating that interrupts 0 and 4 are enabled and interrupt 4 is pending.
 
@node Writing SPRs
@section Using the @b{spr} Command
@cindex @b{spr} command
@cindex commands, @b{spr} command
@cindex @b{spr} command, argument specification
@section Using the @command{spr} Command
@cindex @command{spr} command
@cindex commands, @command{spr} command
@cindex @command{spr} command, argument specification
 
The value of an SPR is written by specifying the unique name of the SPR or its
group and index in the same manner as for the @b{info spr} command. An
group and index in the same manner as for the @command{info spr} command. An
additional argument specifies the value to be written. So for example the
Programmable Interrupt Controller mask register could be changed to enable
interrupts 5 and 3 only by any of the following commands.
 
@example
@b{spr PICMR 0x24}
@b{spr PIC PICMR 0x24}
@b{spr PIC 0 0x24}
@b{spr 9 PICMR 0x24}
@b{spr 9 2 0x24}
@command{spr PICMR 0x24}
@command{spr PIC PICMR 0x24}
@command{spr PIC 0 0x24}
@command{spr 9 PICMR 0x24}
@command{spr 9 2 0x24}
@end example
 
@node OpenRISC 1000 Examples
@chapter Small and Large Examples
@node OpenRISC 1000 Example
@chapter A Small Example
@cindex examples
@cindex examples, Hello World
@cindex examples, Linux
@cindex Hello World example
@cindex Linux kernel example
Two examples are given:
 
@enumerate
@item
A simple ``Hello World'' program (what else) to show the basics
A simple ``Hello World'' program (what else) is used to show the basics
 
@item
Linux 2.6.19 kernel, as an example of a @emph{large} program.
@end enumerate
 
Both use the OpenRISC 1000 architectural simulator, Or1ksim.
 
@menu
* A Small Example:: ``Hello World'' program
* A Large Example:: Linux 2.6.19 kernel boot
@end menu
 
@node A Small Example
@section A ``Hello World'' program
@cindex examples
@cindex examples, Hello World
@cindex Hello World example
 
This is the cannonical small program. Here is the main program and its two
subprograms (added to demonstrate a meaningful backtrace).
 
641,14 → 708,14
@end example
 
The architectural simulator is started in its own terminal window. If the
configuration is in @code{debug.cfg}, then the command might be:
configuration is in @code{rsp.cfg}, then the command might be:
 
@example
@b{or32-uclinux-sim -f debug.cfg}
Reading script file from 'debug.cfg'...
@command{or32-uclinux-sim -f rsp.cfg}
Reading script file from 'rsp.cfg'...
Building automata... done, num uncovered: 0/213.
Parsing operands data... done.
JTAG Proxy server started on port 50000
Resetting memory controller.
Resetting PIC.
@end example
 
657,10 → 724,11
In a separate window start up @value{GDBN}.
 
@example
@b{or32-uclinux-gdb}
@command{or32-uclinux-gdb}
@end example
 
A local copy of the symbol table is needed, specified with the @b{file} command.
A local copy of the symbol table is needed, specified with the @command{file}
command.
 
@cindex examples, symbol file loading
@cindex symbol file loading
675,24 → 743,25
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=i686-pc-linux-gnu --target=or32-uclinux".
(gdb) @b{file hello}
(gdb) @command{file hello}
Reading symbols from /home/jeremy/svntrunk/GNU/gdb-6.8/progs_or32/hello...done.
(gdb)
@end example
 
@cindex examples, remote @b{target jtag} command
@cindex remote @b{target jtag} command, example
@cindex @b{target jtag} command, remote, example
@cindex commands, @b{target jtag}, remote, example
@cindex examples, remote target specification
@cindex remote target specification, example
@cindex target specification, remote, example
@cindex examples, remote @command{target remote} command
@cindex remote @command{target remote} command, example
@cindex @command{target remote} command, remote, example
@cindex commands, @command{target remote}, remote, example
@cindex examples, remote target specification via RSP
@cindex remote target specification via RSP, example
@cindex target specification, remote via RSP, example
The connection to the target (the architectural simulator) is then
established, using the port number given in the configuration file.
 
@example
(gdb) @b{target jtag jtag://localhost:50000}
0x00000104 in _start ()
(gdb) @command{target remote :51000}
Remote debugging using :51000
0x00000100 in _start ()
(gdb)
@end example
 
704,29 → 773,29
The program of interest can now be loaded:
 
@example
(gdb) @b{load hello}
(gdb) @command{load hello}
Loading section .text, size 0x1290 lma 0x0
Loading section .rodata, size 0xe lma 0x1290
Start address 0x100, load size 4766
Transfer rate: 38128 bits in <1 sec, 2383 bytes/write.
Transfer rate: 5 KB/sec, 238 bytes/write.
(gdb)
@end example
 
The program does not immediately start running, since on opening the
connection to the target, GDB stalls the processor via the JTAG interface.
connection to the target, Or1ksim stalls.
 
@cindex examples, @b{bt} command
@cindex @b{bt} command example
@cindex commands, @b{bt}, example
@cindex examples, @b{info spr} command
@cindex @b{info spr} command example
@cindex commands, @b{info spr}, example
@cindex examples, @command{bt} command
@cindex @command{bt} command example
@cindex commands, @command{bt}, example
@cindex examples, @command{info spr} command
@cindex @command{info spr} command example
@cindex commands, @command{info spr}, example
All the GDB commands (including the SPR commands are available). For example
 
@example
(gdb) @b{bt}
#0 0x00000104 in _start ()
(gdb) @b{info spr 0 17}
(gdb) @command{bt}
#0 0x00000100 in _start ()
(gdb) @command{info spr 0 17}
SYS.SR = SPR0_17 = 32769 (0x8001)
(gdb)
@end example
738,60 → 807,56
@value{GDBN} @code{$ps} processor status variable, so can also be accessed as:
 
@example
(gdb) @b{print $ps}
(gdb) @command{print $ps}
$1 = 32769
(gdb)
@end example
 
@cindex examples, @b{breakpoint} command
@cindex @b{breakpoint} command example
@cindex commands, @b{breakpoint}, example
@cindex examples, @b{run} command
@cindex @b{run} command example
@cindex commands, @b{run}, example
@cindex running the remote program
@cindex examples, running a program
For this example set a breakpoint at the start of main and then run the
@cindex examples, @command{breakpoint} command
@cindex @command{breakpoint} command example
@cindex commands, @command{breakpoint}, example
@cindex examples, @command{continue} command
@cindex @command{continue} command example
@cindex commands, @command{continue}, example
@cindex continuening the remote program
@cindex examples, continuing a program
For this example set a breakpoint at the start of main and then continue the
program
 
@example
(gdb) @b{break main}
(gdb) @command{break main}
Breakpoint 1 at 0x1264: file hello.c, line 41.
(gdb) @b{run}
Starting program: /home/jeremy/svntrunk/GNU/gdb-6.8/progs_or32/hello
[Switching to process -1]
(gdb) @command{continue}
Continuing.
 
Breakpoint 1, main () at hello.c:44
Breakpoint 1, main () at hello.c:41
41 simputs( "Hello World!\n" );
(gdb)
@end example
 
@emph{Note.} Since the connection is to the native code on the OpenRISC 1000
target, there is no concept of a process number. Thus process number -1 is
used throughout.
 
@cindex examples, @b{step} command
@cindex @b{step} command example
@cindex commands, @b{step}, example
@cindex examples, @command{step} command
@cindex @command{step} command example
@cindex commands, @command{step}, example
It is now possible to step through the code:
@example
(gdb) @b{step}
(gdb) @command{step}
simputs (str=0x1290 "Hello World!\n") at utils.c:90
90 for( i = 0; str[i] != '\0' ; i++ ) @{
(gdb) @b{step}
(gdb) @command{step}
91 simputc( (int)(str[i]) );
(gdb) @b{step}
(gdb) @command{step}
simputc (c=72) at utils.c:58
58 __asm__ __volatile__ ( "\tl.nop\t%0" : : "K"( NOP_PUTC ));
(gdb)
@end example
 
@cindex examples, @b{bt} command
@cindex @b{bt} command example
@cindex commands, @b{bt}, example
@cindex examples, @command{bt} command
@cindex @command{bt} command example
@cindex commands, @command{bt}, example
At this point a backtrace will show where the code has reached:
 
@example
(gdb) @b{bt}
(gdb) @command{bt}
#0 simputc (c=72) at utils.c:58
#1 0x000011cc in simputs (str=0x1290 "Hello World!\n") at utils.c:91
#2 0x00001274 in main () at hello.c:41
808,21 → 873,18
H
@end example
 
@cindex examples, @b{continue} command
@cindex @b{continue} command example
@cindex commands, @b{continue}, example
@cindex examples, @command{continue} command
@cindex @command{continue} command example
@cindex commands, @command{continue}, example
Let the program run to completion by giving @value{GDBN} the continue command:
@example
(gdb) @b{cont}
(gdb) @command{continue}
Continuing.
 
Program exited normally.
Remote connection closed
(gdb)
@end example
 
@cindex remote program stall
@cindex remote program termination
@cindex stall, remote program
With completion of the program, the terminal running Or1ksim shows its final
output:
 
838,230 → 900,12
 
@cindex remote program restart
@cindex restart, remote program
@cindex examples, @b{set} command
@cindex @b{set} command example
@cindex commands, @b{set}, example
@cindex examples, @command{set} command
@cindex @command{set} command example
@cindex commands, @command{set}, example
When execution exits (by execution of a @code{l.nop 1}), the connection to the
target is automatically broken.
target is automatically broken as the simulator exits.
 
However it is perfectly possible to re-establish a connection to the target,
either in the current @value{GDBN} session or in a separate session.
 
If the session is new, the symbols will need to be reloaded with the @b{file}
command. Re-establish the connection using the @b{remote jtag} command:
 
@example
(gdb) target jtag jtag://localhost:50000
 
Program exited normally.
(gdb)
@end example
 
The connection is re-established. Since the last instruction executed was
@code{l.nop 1}, @value{GDBN} reports that the program executed normally.
 
To rerun the program, the program counter must be placed somewhere
appropriate. The reset vector (0x100) is appropriate, and the program can then
be rerun.
 
@example
(gdb) @b{set $pc = 0x100}
(gdb) @b{run}
Starting program: /home/jeremy/svntrunk/GNU/gdb-6.8/progs_or32/hello
 
Program exited normally.
(gdb)
@end example
 
@node A Large Example
@section Linux 2.6.19 Kernel Boot
@cindex examples, Linux kernel
@cindex Linux kernel, example
 
In this example, a Linux 2.6.19 Kernel is booted under control of GDB. The
kernel should be built using the OpenRISC 1000 toolchain as described on the
OpenCores website (@uref{www.opencores.org}) or Embecosm Application Note #2
(@uref{www.embecosm.com/download.html}). Once again the target is the Or1ksim
architectural simulator.
 
@cindex OpenRISC 1000 Architectural Simulator, configuration
@cindex configuration, OpenRISC 1000 Architectural Simulator
@cindex Or1ksim, configuration
@cindex configuration, Or1ksim
Start the architectural simulator with a configuration suitable for Linux and
with debugging enabled on port 50000:
 
@example
$ @b{or32-uclinux-sim -f linux_debug.cfg}
Reading script file from '/home/jeremy/svntrunk/GNU/gdb-6.8/linux_debug.cfg'...
WARNING: config: Unknown section: tick; ignoring.
WARNING: config: Unknown section: pic; ignoring.
Building automata... done, num uncovered: 0/213.
Parsing operands data... done.
JTAG Proxy server started on port 50000
WARNING: Unable to open RX file stream.
Resetting memory controller.
Resetting PIC.
@end example
 
If using the configuration suggested on the OpenCores website or the Embecosm
application note, this will open up a @b{xterm} to be used as the Linux
console.
 
In a separate terminal start @value{GDBN} use the @b{file} command to get the
symbols, connect to the target via JTAG and @b{load} the Linux image.
@cindex symbol file, Linux kernel
@cindex Linux kernel, symbol file
@cindex examples, remote @b{target jtag} command
@cindex remote @b{target jtag} command, example
@cindex @b{target jtag} command, remote, example
@cindex commands, @b{target jtag}, remote, example
@cindex examples, remote target specification
@cindex remote target specification, example
@cindex target specification, remote, example
@cindex examples, Linux kernel loading
@cindex Linux kernel, loading
@cindex program loading, example
@cindex program loading, remote
@cindex remote program loading, example
 
@example
$ @b{or32-uclinux-gdb}
Building automata... done, num uncovered: 0/216.
Parsing operands data... done.
GNU gdb 6.8
Copyright (C) 2008 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=i686-pc-linux-gnu --target=or32-uclinux".
(gdb) @b{file vmlinux}
Reading symbols from /home/jeremy/projects/openrisc/linux-2.6.19/vmlinux...done.
(gdb) @b{target jtag jtag://localhost:50000}
esp4_fini () at net/ipv4/esp4.c:466
466 if (xfrm_unregister_type(&esp_type, AF_INET) < 0)
(gdb) @b{load vmlinux}
Loading section .text, size 0x227d74 lma 0xf0000000
Loading section .rodata, size 0x23694 lma 0xf0228000
Loading section __param, size 0x258 lma 0xf024b694
Loading section __ex_table, size 0xbf8 lma 0xf024c000
Loading section .data, size 0x1950c lma 0xf024e000
Loading section .data.cacheline_aligned, size 0xd0 lma 0xf0267520
Loading section .data.init_task, size 0x2000 lma 0xf0268000
Loading section .init.text, size 0x17018 lma 0xf026a000
Loading section .init.data, size 0x704 lma 0xf0281018
Loading section .init.setup, size 0x1ec lma 0xf0281720
Loading section .initcall.init, size 0x168 lma 0xf028190c
Loading section .con_initcall.init, size 0xc lma 0xf0281a74
Loading section .init.ramfs, size 0x2000 lma 0xf0282000
Loading section .initrd, size 0x200000 lma 0xf0284000
Start address 0xc0000000, load size 4723376
Transfer rate: 25068 KB/sec, 337384 bytes/write.
(gdb)
@end example
 
Using @b{run} at this point will not work, since loading the Linux kernel has
specified an entry point (0xc0000000) at the start of the ROM image:
 
@cindex Linux kernel, initial program counter
@cindex program counter, default for Linux kernel
@example
(gdb) @b{x/i $pc}
0xc0000000: l.j 0x0
(gdb)
@end example
 
This can be corrected, and then the program will run:
@cindex program counter, resetting
 
@example
(gdb) @b{set $pc = 0x100}
(gdb) @b{run}
Starting program: /home/jeremy/projects/openrisc/linux-2.6.19/vmlinux
@end example
 
The initial message will appear on the console output @b{xterm} as Linux copies itself
from ROM to main memory:
 
@example
Copying Linux... Ok, booting the kernel.
@end example
 
Little else appears for some time, since the serial driver is not yet
initialized. However the terminal running the architectural simulator will be
reflecting the progress:
 
@example
Resetting PIC.
 
Copying Linux... Ok, booting the kernel.
****************** counters reset ******************
cycles 340441616, insn #29500690
****************** counters reset ******************
<5>Linux version 2.6.19-or32 (jeremy@@thomas) (gcc version 3.4.4) #3 Sat Jun 28 19:30:06 BST 2008
Detecting Processor units:
Signed 0x391
Setting up paging and PTEs.
write protecting ro sections (0xc0002000 - 0xc024c000)
Setting up identical mapping (0x80000000 - 0x90000000)
Setting up identical mapping (0x92000000 - 0x92002000)
Setting up identical mapping (0xb8070000 - 0xb8072000)
Setting up identical mapping (0x97000000 - 0x97002000)
Setting up identical mapping (0x99000000 - 0x9a000000)
Setting up identical mapping (0x93000000 - 0x93002000)
Setting up identical mapping (0xa6000000 - 0xa6100000)
Setting up identical mapping (0x1e50000 - 0x1fa0000)
<7>On node 0 totalpages: 3968
<7> DMA zone: 0 pages used for memmap
<7> Normal zone: 15 pages used for memmap
<7> Normal zone: 3953 pages, LIFO batch:0
dtlb_miss_handler c00040c8
itlb_miss_handler c00041a8
Built 1 zonelists. Total pages: 3953
<5>Kernel command line: root=/dev/ram console=ttyS0
@end example
 
Eventually the serial port driver is initialized and the Linux console
@b{xterm} will show the Linux output, eventually giving the console prompt:
 
@example
VFS: Mounted root (ext2 filesystem) readonly.
Freeing unused kernel memory: 104k freed
init started: BusyBox v1.4.1 (2007-03-22 18:53:56 EST) multi-call binary
init started: BusyBox v1.4.1 (2007-03-22 18:53:56 EST) multi-call binary
Starting pid 22, console /dev/ttyS0: '/etc/init.d/rcS'
 
Please press Enter to activate this console.
 
Starting pid 25, console /dev/ttyS0: '/bin/sh'
 
 
BusyBox v1.4.1 (2007-03-22 18:53:56 EST) Built-in shell (ash)
Enter 'help' for a list of built-in commands.
 
#
@end example
 
The full range of GDB debugging facilities are then available to debug the
kernel:
@cindex Linux kernel, symbolic debugging, virtual memory
@cindex symbolic debugging, Linux kernel virtual memory
@cindex virtual memory, Linux kernel debugging
 
@emph{Warning.} Linux is loaded into ROM at address 0xf0000000, then relocated
by copying into main memory at adress 0x00000000, but with a virtual
memory start address of 0xc0000000 (as recorded in the
image). Plain @value{GDBN} for OpenRISC 1000 is designed for bare
metal debugging, and does not cope well with the virtual memory and
relocation in the Linux kernel. In addition, the architectural
simulator does not handle virtual addresses read and written through the
debug interface correctly. Hardware breakpoints will work
correctly (they are not changed by copying), but examining the data
and restarting will fail. For Linux kernel debugging, @b{KGDB} should
be used. This is derived from @value{GDBN}, but at present a port for
@value{GDBN} @value{GDBVN} has not been completed.
 
@node OpenRISC 1000 Limitations
@chapter Known Problems
@cindex known problems
1119,7 → 963,7
@cindex bugs, Or1ksim architectural simulator
@cindex Or1ksim, bugs fixed
The OpenRISC 1000 architecture uses its General Purpose
Register (GPR) 2 as a frame pointer register. However the @b{$fp}
Register (GPR) 2 as a frame pointer register. However the @command{$fp}
variable in @value{GDBN} is not currently implemented, and will return
the value of the stack pointer (GPR 1) instead.
@end enumerate
/trunk/gdb-6.8/gdb/remote-or1k.c
189,47 → 189,11
char **env,
int from_tty);
static void or1k_mourn_inferior ();
static void or1k_rcmd (char *command,
struct ui_file *outbuf);
 
 
/* Global target operations specific to the OR1K */
 
/*---------------------------------------------------------------------------*/
/*!Read a special purpose register from the target
 
Use the target operation for this.
 
@param[in] regnum The register to read
 
@return The value read */
/*---------------------------------------------------------------------------*/
 
ULONGEST
or1k_read_spr (unsigned int regnum)
{
return or1k_jtag_read_spr (regnum);
 
} /* or1k_read_spr() */
 
 
/*---------------------------------------------------------------------------*/
/*!Write a special purpose register on the target
 
Use the target operation for this.
 
@param[in] regnum The register to write
@param[in] data The value to write */
/*---------------------------------------------------------------------------*/
 
void
or1k_write_spr (unsigned int regnum,
ULONGEST data)
{
or1k_jtag_write_spr (regnum, data);
 
} /* or1k_write_spr() */
 
 
/*---------------------------------------------------------------------------*/
/*!Ask the user about an interrupt
 
Ctrl-C has been received. */
667,8 → 631,9
/* The "special" registers */
switch (regnum)
{
case OR1K_SR_REGNUM: return OR1K_SR_SPRNUM;
case OR1K_PC_REGNUM: return OR1K_NPC_SPRNUM;
case OR1K_PPC_REGNUM: return OR1K_NPC_SPRNUM;
case OR1K_NPC_REGNUM: return OR1K_NPC_SPRNUM;
case OR1K_SR_REGNUM: return OR1K_SR_SPRNUM;
 
default:
error ("or1k_regnum_to_sprnum: invalid register number!");
708,14 → 673,14
dcr |= or1k_dbgcache.dcr[i].sc ? OR1K_DCR_SC : 0;
dcr |= (or1k_dbgcache.dcr[i].ct << OR1K_DCR_CT_OFF) & OR1K_DCR_CT;
 
or1k_write_spr (OR1K_DVR0_SPRNUM + i, or1k_dbgcache.dvr[i]);
or1k_write_spr (OR1K_DCR0_SPRNUM + i, dcr);
or1k_jtag_write_spr (OR1K_DVR0_SPRNUM + i, or1k_dbgcache.dvr[i]);
or1k_jtag_write_spr (OR1K_DCR0_SPRNUM + i, dcr);
}
 
or1k_write_spr (OR1K_DMR1_SPRNUM, or1k_dbgcache.dmr1);
or1k_write_spr (OR1K_DMR2_SPRNUM, or1k_dbgcache.dmr2);
or1k_write_spr (OR1K_DSR_SPRNUM, or1k_dbgcache.dsr);
or1k_write_spr (OR1K_DRR_SPRNUM, or1k_dbgcache.drr);
or1k_jtag_write_spr (OR1K_DMR1_SPRNUM, or1k_dbgcache.dmr1);
or1k_jtag_write_spr (OR1K_DMR2_SPRNUM, or1k_dbgcache.dmr2);
or1k_jtag_write_spr (OR1K_DSR_SPRNUM, or1k_dbgcache.dsr);
or1k_jtag_write_spr (OR1K_DRR_SPRNUM, or1k_dbgcache.drr);
 
} /* or1k_commit_debug_registers() */
 
809,7 → 774,7
or1k_jtag_init (name);
 
/* Make sure we have system and debug groups implemented. */
tmp = or1k_read_spr (OR1K_UPR_SPRNUM);
tmp = or1k_jtag_read_spr (OR1K_UPR_SPRNUM);
if (0 == (tmp & OR1K_SPR_UPR_UP))
{
error ("or1k_open: system group missing");
822,10 → 787,10
/* Determine number of gpr_regs (this is a bit simplified - the bit just
means "less than 32", but we assume that means 16) and the number of
supported watchpoints. */
tmp = or1k_read_spr (OR1K_CPUCFGR_SPRNUM);
tmp = or1k_jtag_read_spr (OR1K_CPUCFGR_SPRNUM);
tdep->num_gpr_regs = (0 == (tmp & OR1K_SPR_CPUCFGR_CGF)) ? 32 : 16;
 
tmp = or1k_read_spr (OR1K_DCFGR_SPRNUM);
tmp = or1k_jtag_read_spr (OR1K_DCFGR_SPRNUM);
tdep->num_matchpoints = (tmp & OR1K_SPR_DCFGR_NDP) + 1;
 
/* Stall the processor. A pause after stalling is appropriate for real
952,7 → 917,7
}
 
/* Convert to SPRNUM and read. */
val = or1k_read_spr (or1k_regnum_to_sprnum (regnum));
val = or1k_jtag_read_spr (or1k_regnum_to_sprnum (regnum));
 
/* We got the number the register holds, but gdb expects to see a value in
the target byte ordering.
998,7 → 963,7
 
regcache = get_current_regcache();
regcache_cooked_read_unsigned (regcache, regnum, &res);
or1k_write_spr (or1k_regnum_to_sprnum (regnum), res);
or1k_jtag_write_spr (or1k_regnum_to_sprnum (regnum), res);
 
} /* or1k_store_registers() */
 
1491,7 → 1456,7
the first time due to a run command, we won't actually be executing, so
start the target running. */
 
or1k_write_spr( OR1K_NPC_SPRNUM, read_pc());
or1k_jtag_write_spr( OR1K_NPC_SPRNUM, read_pc());
target_has_execution = 1;
or1k_jtag_unstall ();
 
1536,8 → 1501,8
registers_changed();
 
/* Refresh the debug registers that may have changed */
or1k_dbgcache.drr = or1k_read_spr (OR1K_DRR_SPRNUM);
or1k_dbgcache.dmr2 = or1k_read_spr (OR1K_DMR2_SPRNUM);
or1k_dbgcache.drr = or1k_jtag_read_spr (OR1K_DRR_SPRNUM);
or1k_dbgcache.dmr2 = or1k_jtag_read_spr (OR1K_DMR2_SPRNUM);
 
/* If we got a trap, then it was a breakpoint/watchpoint of some sort (but
not single step, which does not set the trap exception). We need to back
1546,7 → 1511,7
 
if (OR1K_DRR_TE == (or1k_dbgcache.drr & OR1K_DRR_TE))
{
write_pc (or1k_read_spr (OR1K_PPC_SPRNUM));
write_pc (or1k_jtag_read_spr (OR1K_PPC_SPRNUM));
}
 
/* Single step does not set trap exception, so we set it manually to
1585,7 → 1550,7
"l.nop NOP_EXIT". If this is the case, get the result from GPR 3 and
set the NPC to the reset vector, so a new start will behave well. */
 
addr = or1k_read_spr (OR1K_PPC_SPRNUM);
addr = or1k_jtag_read_spr (OR1K_PPC_SPRNUM);
res = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
if (0 != res)
{
1723,6 → 1688,71
 
 
/*---------------------------------------------------------------------------*/
/*!Send a command to the remote target
 
The target can't actually run any remote commands, in the sense of having a
command interpreter. However we use this as a GDB "standard" way of
wrapping up commands to access the SPRs.
 
Current commands supported are:
- readspr <regno>
- writespr <regno> <value>
 
The output is either the value read (for successful read) or OK (for
successful write) or E01 to indicate and wrror. All values are represented
as unsigned hex.
 
@param[in] command The command to execute
@param[out] output The result of the command */
/*---------------------------------------------------------------------------*/
 
static void or1k_rcmd (char *command,
struct ui_file *outbuf)
{
/* Sort out which command */
if (0 == strncmp ("readspr", command, strlen ("readspr")))
{
unsigned int regno; /* SPR to read */
 
if (1 != sscanf (command, "readspr %4x", &regno))
{
error ("or1k_rcmd: unrecognized readspr");
fputs_unfiltered ("E01", outbuf);
}
else
{
char strbuf[sizeof ("ffffffff")];
ULONGEST data = or1k_jtag_read_spr (regno);
 
sprintf (strbuf, "%8llx", data);
fputs_unfiltered (strbuf, outbuf);
}
}
else if (0 == strncmp ("writespr", command, strlen ("writespr")))
{
unsigned int regno; /* SPR to write */
ULONGEST data; /* Value to write */
 
if (2 != sscanf (command, "writespr %4x %8llx", &regno, &data))
{
error ("or1k_rcmd: unrecognized writespr");
fputs_unfiltered ("E01", outbuf);
}
else
{
or1k_jtag_write_spr (regno, data);
fputs_unfiltered ("OK", outbuf);
}
}
else
{
error ("or1k_rcmd: unrecognized remote command");
fputs_unfiltered ("E01", outbuf);
}
} /* or1k_rcmd () */
 
 
/*---------------------------------------------------------------------------*/
/*!Main entry point for the remote OpenRISC JTAG protocol
 
Initializes the target ops for each version of the remote
1792,6 → 1822,8
or1k_target.to_create_inferior = or1k_create_inferior;
or1k_target.to_mourn_inferior = or1k_mourn_inferior;
 
or1k_target.to_rcmd = or1k_rcmd;
 
or1k_target.to_magic = OPS_MAGIC;
 
/* Tell GDB about the new target */
/trunk/gdb-6.8/gdb/ChangeLog
1,3 → 1,22
2008-11-08 Jeremy Bennett <jeremy.bennett@embecosm.com>
* or1k-tdep.c (or1k_read_spr, or1k_write_spr): Moved here from
remote-or1k.c and made local to this file. Rewritten to use
commands via the target remote command (to_rcmd) function.
* or1k-tdep.c (or1k_spr_command). Invalidates register cache when
SPR is written.
* or1k-tdep.h: or1k_read_spr and Or1k_write_spr are removed as
global functions.
* or1k-tdep.c (or1k_read_spr, or1k_write_spr). Functions removed
and made local to or1k-tdep.c. All or1k-tdep.c references to these
functions changed to use or1k_jtag_read_spr and
or1k_jtag_write_spr (for which these were only wrappers).
* or1k-tdep.c (or1k_rcmd): Function added to process SPR access
requests.
 
2008-10-23
* or1k-tdep.h, or1k-tdep.c: Extend the number of registers to
include the PPC as well as the NPC
 
2008-08-13 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* or1k-tdep.c, or1k-tdep.h, remote-or1k.c: Numerous bug fixes
/trunk/gdb-6.8/gdb/or1k-tdep.c
200,6 → 200,9
int *group,
int *index,
int is_set);
static ULONGEST or1k_read_spr (unsigned int regnum);
static void or1k_write_spr (unsigned int regnum,
ULONGEST data);
static void info_spr_command (char *args,
int from_tty);
static void or1k_spr_command (char *args,
669,7 → 672,7
/* The default is to find the PC of the PREVIOUS frame in the link register
of this frame. This may be changed if we find the link register was saved
on the stack. */
trad_frame_set_reg_realreg (info, OR1K_PC_REGNUM, OR1K_LR_REGNUM);
trad_frame_set_reg_realreg (info, OR1K_NPC_REGNUM, OR1K_LR_REGNUM);
 
/* All the following analysis only occurs if we are in the prologue and have
executed the code. Get THIS frame size (which implies framelessness if
745,7 → 748,7
if ((-1 != tmp) && (tmp == (fp_save_offset - OR1K_INSTLEN)))
{
trad_frame_set_reg_addr (info, OR1K_LR_REGNUM, this_sp + tmp);
trad_frame_set_reg_addr (info, OR1K_PC_REGNUM, this_sp + tmp);
trad_frame_set_reg_addr (info, OR1K_NPC_REGNUM, this_sp + tmp);
saved_regs_iaddr = start_iaddr + (3 * OR1K_INSTLEN);
}
else
1021,12 → 1024,18
or1k_single_step_through_delay( struct gdbarch *gdbarch,
struct frame_info *this_frame )
{
CORE_ADDR ppc = or1k_read_spr (OR1K_PPC_SPRNUM);
int index = insn_decode (or1k_fetch_instruction (this_frame, ppc));
struct regcache *regcache = get_current_regcache ();
ULONGEST val;
CORE_ADDR ppc;
int index;
 
/* Get and decode the previous instruction. */
regcache_cooked_read_unsigned (regcache, OR1K_PPC_REGNUM, &val);
ppc = (CORE_ADDR)val;
index = insn_decode (or1k_fetch_instruction (this_frame, ppc));
 
/* We are only executing a delay slot if the previous instruction was a
branch or jump. */
 
return or32_opcodes[index].flags & OR32_IF_DELAY;
 
} /* or1k_single_step_through_delay() */
1109,8 → 1118,8
"gpr16", "gpr17", "gpr18", "gpr19", "gpr20", "gpr21", "gpr22", "gpr23",
"gpr24", "gpr25", "gpr26", "gpr27", "gpr28", "gpr29", "gpr30", "gpr31",
 
/* program counter and status register */
"pc", "sr"
/* previous program counter, next program counter and status register */
"ppc", "npc", "sr"
 
/* Floating point and vector registers may appear as pseudo registers in
the future. */
1152,7 → 1161,8
{
switch (regnum)
{
case OR1K_PC_REGNUM:
case OR1K_PPC_REGNUM:
case OR1K_NPC_REGNUM:
return void_func_ptr; /* Pointer to code */
 
case OR1K_SP_REGNUM:
1261,7 → 1271,8
{
return ((regnum >= OR1K_ZERO_REGNUM) &&
(regnum < tdep->num_gpr_regs) &&
(regnum != OR1K_PC_REGNUM));
(regnum != OR1K_PPC_REGNUM) &&
(regnum != OR1K_NPC_REGNUM));
}
 
if (group == float_reggroup)
1540,7 → 1551,7
or1k_unwind_pc (struct gdbarch *gdbarch,
struct frame_info *next_frame)
{
return frame_unwind_register_unsigned (next_frame, OR1K_PC_REGNUM);
return frame_unwind_register_unsigned (next_frame, OR1K_NPC_REGNUM);
 
} /* or1k_unwind_pc() */
 
1579,7 → 1590,7
@param[in] args The arguments
@param[in] sp The stack pointer
@param[in] struct_return True (1) if this returns a structure
@param[in] struct_addr Address for returning structurs
@param[in] struct_addr Address for returning structures
 
@return The updated stack pointer */
/*---------------------------------------------------------------------------*/
1898,7 → 1909,7
set_gdbarch_num_regs (gdbarch, OR1K_NUM_REGS);
set_gdbarch_num_pseudo_regs (gdbarch, OR1K_NUM_PSEUDO_REGS);
set_gdbarch_sp_regnum (gdbarch, OR1K_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, OR1K_PC_REGNUM);
set_gdbarch_pc_regnum (gdbarch, OR1K_NPC_REGNUM);
set_gdbarch_ps_regnum (gdbarch, OR1K_SR_REGNUM);
set_gdbarch_deprecated_fp_regnum (gdbarch, OR1K_FP_REGNUM);
 
2782,6 → 2793,77
} /* or1k_parse_spr_params() */
 
 
/*---------------------------------------------------------------------------*/
/*!Read a special purpose register from the target
 
This has to be done using the target remote command "readspr"
 
@param[in] regnum The register to read
 
@return The value read */
/*---------------------------------------------------------------------------*/
 
static ULONGEST
or1k_read_spr (unsigned int regnum)
{
struct ui_file *uibuf = mem_fileopen ();
char cmd[sizeof ("readspr ffff")];
unsigned long int data;
char *res;
long int len;
 
/* Create the command string and pass it to target remote command function */
sprintf (cmd, "readspr %4x", regnum);
target_rcmd (cmd, uibuf);
 
/* Get the output for the UI file as a string */
res = ui_file_xstrdup (uibuf, &len);
sscanf (res, "%lx", &data);
 
/* Tidy up */
xfree (res);
ui_file_delete (uibuf);
 
return (ULONGEST)data;
 
} /* or1k_read_spr() */
 
 
/*---------------------------------------------------------------------------*/
/*!Write a special purpose register on the target
 
This has to be done using the target remote command "writespr"
 
Since the SPRs may map to GPR's or the other GDB register (PPC, NPC, SR),
any register cache is flushed.
 
@param[in] regnum The register to write
@param[in] data The value to write */
/*---------------------------------------------------------------------------*/
 
static void
or1k_write_spr (unsigned int regnum,
ULONGEST data)
{
struct ui_file *uibuf = mem_fileopen ();
char cmd[sizeof ("writespr ffff ffffffff")];
char *res;
long int len;
 
/* Create the command string and pass it to target remote command function */
sprintf (cmd, "writespr %4x %8llx", regnum, data);
target_rcmd (cmd, uibuf);
 
/* Flush the register cache */
registers_changed ();
 
/* We ignore the result - Rcmd can put out its own error messages. Just
tidy up */
ui_file_delete (uibuf);
 
} /* or1k_write_spr() */
 
 
/*----------------------------------------------------------------------------*/
/*!Show the value of a special purpose register or group
 
2811,10 → 2893,10
if (index >= 0)
{
ULONGEST value = or1k_read_spr (OR1K_SPR (group, index));
 
ui_out_field_fmt (uiout, NULL, "%s.%s = SPR%i_%i = %llu (0x%llx)\n",
or1k_spr_group_name (group),
or1k_spr_register_name (group, index, spr_name) , group,
or1k_spr_register_name (group, index, spr_name), group,
index, value, value);
}
else
2879,6 → 2961,7
}
 
old_val = or1k_read_spr (OR1K_SPR (group, index));
 
or1k_write_spr (OR1K_SPR (group, index) , new_val);
 
ui_out_field_fmt (uiout, NULL,
/trunk/gdb-6.8/gdb/NEWS
9,6 → 9,9
configuring and building GDB, go to this directory and use "make info", "make
html", "make pdf", "make ps" as required to build the document.
 
This interface supports both the proprietary OpenRISC Remote JTAG Protocol and
GDB Remote Serial Protocol.
 
*** Changes in GDB 6.8
 
* New native configurations
/trunk/gdb-6.8/gdb/or1k-tdep.h
226,8 → 226,9
#define OR1K_LAST_ARG_REGNUM 8
#define OR1K_LR_REGNUM 9
#define OR1K_RV_REGNUM 11
#define OR1K_PC_REGNUM (OR1K_MAX_GPR_REGS + 0)
#define OR1K_SR_REGNUM (OR1K_MAX_GPR_REGS + 1)
#define OR1K_PPC_REGNUM (OR1K_MAX_GPR_REGS + 0)
#define OR1K_NPC_REGNUM (OR1K_MAX_GPR_REGS + 1)
#define OR1K_SR_REGNUM (OR1K_MAX_GPR_REGS + 2)
 
/* Defines for Debug Control Register bits */
 
315,11 → 316,11
#define OR1K_SPR_DCFGR_WPCI 0x00000008 /* Watchpoint ctrs implemented */
 
/* Properties of the architecture. GDB mapping of registers is all the GPRs
followed by the PC and SR at the end. Red zone is the area past the end of
the stack reserved for exception handlers etc. */
followed by the PPC, NPC and SR at the end. Red zone is the area past the
end of the stack reserved for exception handlers etc. */
#define OR1K_MAX_GPR_REGS 32
#define OR1K_NUM_PSEUDO_REGS 0
#define OR1K_NUM_REGS (OR1K_MAX_GPR_REGS + 2)
#define OR1K_NUM_REGS (OR1K_MAX_GPR_REGS + 3)
#define OR1K_TOTAL_NUM_REGS (OR1K_NUM_REGS + OR1K_NUM_PSEUDO_REGS)
#define OR1K_MAX_MATCHPOINTS 8
#define OR1K_MAX_HW_WATCHES OR1K_MAX_MATCHPOINTS
446,11 → 447,4
extern int print_insn_little_or32 (bfd_vma memaddr,
struct disassemble_info *info);
 
/* Global OR1K target access functions */
 
extern ULONGEST or1k_read_spr (unsigned int regnum);
extern void or1k_write_spr (unsigned int regnum,
ULONGEST data);
 
 
#endif /* OR1K_TDEP__H */
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