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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk/axi4_stream_lib/src
    from Rev 34 to Rev 35
    Reverse comparison

Rev 34 → Rev 35

/axis_downsizer.sv
165,11 → 165,13
 
// --------------------------------------------------------------------
//
genvar j;
generate
begin: tdata_gen
for(genvar j = 0; j < M_D; j++)
for(j = 0; j < M_D; j++)
begin : tdata_gen
assign mux_in_tdata[j] = tdata_r[j*M_NW +: M_NW];
end
end
endgenerate
 
 
176,19 → 178,23
// --------------------------------------------------------------------
//
generate
begin: tuser_gen
begin : tuser_gen
if(BYTES_PER_TUSER != 0)
begin
begin : tuser_tuser_0_gen
wire [M_UW-1:0] mux_in_tuser [M_D-1:0];
 
recursive_mux #(.A(M_A), .W(M_UW))
tuser_mux_i(.data_in(mux_in_tuser), .data_out(axis_downsizer_bus.tuser), .*);
 
for(genvar j = 0; j < M_D; j++)
for(j = 0; j < M_D; j++)
begin : tuser_j_gen
assign mux_in_tuser[j] = tuser_r[j*M_UW +: M_UW] & {M_UW{axis_downsizer_bus.tvalid}};
end
end
else
begin : tuser_tuser_gen
assign axis_downsizer_bus.tuser = tuser_r & {U{axis_downsizer_bus.tvalid}};
end
end
endgenerate
 
/axis_if.sv
29,7 → 29,7
interface
axis_if
#(
N = 0, // data bus width in bytes
N, // data bus width in bytes
I = 1, // TID width
D = 1, // TDEST width
U = 1 // TUSER width
/axis_upsizer.sv
53,7 → 53,7
a_tstrb_unsuported: assert(USE_TSTRB == 0) else $fatal;
a_tkeep_unsuported: assert(USE_TKEEP == 0) else $fatal;
a_bytes_per_tuser: assert((BYTES_PER_TUSER == 0) | (N % BYTES_PER_TUSER == 0)) else $fatal;
a_tuser: assert((BYTES_PER_TUSER == 0) | (U % S == 0)) else $fatal;
// a_tuser: assert((BYTES_PER_TUSER == 0) | (U % S == 0)) else $fatal;
end
 
// synthesis translate_on

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