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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk/PCIe/sim/tests/tb_riffa_register_file
    from Rev 32 to Rev 34
    Reverse comparison

Rev 32 → Rev 34

/tb_riffa_register_file.sv
53,12 → 53,12
// --------------------------------------------------------------------
//
riffa_chnl_if #(.N(N)) chnl_in(.*);
riffa_register_if #(.N(N), .MW(MW)) r_if(.*);
riffa_register_if #(.N(N), .B(B)) r_if(.*); // dword sized (32 bit) registers
 
 
// --------------------------------------------------------------------
//
riffa_register_file #(.A(A), .N(N), .MW(MW))
riffa_register_file #(.N(N), .B(B))
dut(.*);
 
 
70,7 → 70,7
 
// --------------------------------------------------------------------
//
for(genvar j = 0; j < MI; j++)
for(genvar j = 0; j < r_if.RC; j++)
assign r_if.register_in[j] = r_if.register_out[j];
 
 
/tb_riffa_register_file_pkg.sv
35,11 → 35,9
 
// --------------------------------------------------------------------
//
localparam A = 32;
localparam N = 16; // width of the bus in bytes
localparam MW = 3; // mux select width
localparam MI = 2 ** MW; // mux inputs
localparam RW = (N/4); // width of the bus in 32 bit words
localparam B = 5; // number of register banks
 
 
// --------------------------------------------------------------------
/the_test.sv
59,7 → 59,7
#200ns;
 
// --------------------------------------------------------------------
tb_top.a_h.queue_tx_random(RW*MI, 0, 1);
tb_top.a_h.queue_tx_random(RW*B, 0, 1);
tb_top.a_h.wait_for_tx();
 
// --------------------------------------------------------------------
66,7 → 66,7
#200ns;
 
// --------------------------------------------------------------------
tb_top.a_h.queue_rx(RW*MI, 0, 1);
tb_top.a_h.queue_rx(RW*B, 0, 1);
tb_top.a_h.wait_for_rx();
 
// --------------------------------------------------------------------

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