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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

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  • This comparison shows the changes necessary to convert path 
    /qaz_libs/trunk/basal/src
    from Rev 49 to Rev 50
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Rev 49 → Rev 50

/FIFOs/tiny_async_fifo.sv File deleted
/FIFOs/sync_fifo.sv
25,7 → 25,6
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
sync_fifo
#(
37,11 → 36,9
output wr_full,
input [W-1:0] wr_data,
input wr_en,
 
output rd_empty,
output [W-1:0] rd_data,
input rd_en,
 
output [UB:0] count,
input clk,
input reset
48,12 → 45,21
);
 
// --------------------------------------------------------------------
//
generate
begin: fifo_gen
if(D == 2)
begin
assign count = 0;
reg [UB:0] count_r;
assign count = count_r;
 
always_comb
case({wr_full, rd_empty})
2'b0_0: count_r = 1;
2'b0_1: count_r = 0;
2'b1_0: count_r = 2;
2'b1_1: count_r = 'x; // should never happen
endcase
 
tiny_sync_fifo #(.W(W))
tiny_sync_fifo_i(.*);
end
73,7 → 79,6
end
endgenerate
 
 
// --------------------------------------------------------------------
// synthesis translate_off
always_ff @(posedge clk)
85,9 → 90,5
// synthesis translate_on
// --------------------------------------------------------------------
 
 
// --------------------------------------------------------------------
//
endmodule
 
 
/misc/barrel_shifter.v
0,0 → 1,73
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2019 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
module
barrel_shifter
#(
parameter W = 32,
parameter D = W,
parameter UB = $clog2(D)
)
(
input direction, // right = 0, left = 1
input op, // logical = 0, arithmetic = 1; left arithmetic not supported
input [UB-1:0] amount, // 0 not allowed
input [W-1:0] data_in,
output [W-1:0] data_out,
 
input reset,
input clk
);
 
// --------------------------------------------------------------------
wire [W-1:0] out [UB:0];
wire shift_in = direction & op ? data_in[W-1] : 0;
genvar j, k;
 
// --------------------------------------------------------------------
generate
for(k = 0; k < D; k = k + 1)
begin : reversal
assign out[5][k] = direction ? data_in[k] : data_in[D - 1 - k];
assign data_out[k] = direction ? out[0][k] : out[0][D - 1 - k];
end
endgenerate
 
// --------------------------------------------------------------------
generate
for(j = 0; j < UB; j = j + 1)
for(k = 0; k < D; k = k + 1)
begin : shifter
if(k > D - 1 - (2**j))
assign out[j][k] = amount[j] ? shift_in : out[j+1][k];
else
assign out[j][k] = amount[j] ? out[j+1][k + (2**j)] : out[j+1][k];
end
endgenerate
 
// --------------------------------------------------------------------
endmodule

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