URL
https://opencores.org/ocsvn/radiohdl/radiohdl/trunk
Subversion Repositories radiohdl
Compare Revisions
- This comparison shows the changes necessary to convert path
/radiohdl/trunk/core
- from Rev 5 to Rev 4
- ↔ Reverse comparison
Rev 5 → Rev 4
/test/cdf_dir/correct_files/dangling_test.txt
0,0 → 1,6
# Testfile for testing sections the CommonDictFile class |
# |
# First some keys with different spacing (spaces and tabs) |
this is a lost value which causes an exception |
|
global_key_1 = global_1 |
/test/cdf_dir/correct_files/key_value_test.txt
0,0 → 1,43
# Testfile for testing the CommonDictFile class |
# |
# First some keys with different spacing (spaces and tabs) |
|
space_key_0= |
space_key_1=value_1 |
space_key_2 =value_2 |
space_key_3= value_3 |
space_key_4 = value_4 |
space_key_5 = value_5 |
space_key_6 = value_6 |
space_key_7 = value_7 |
|
# Test keys with multiple values |
multi_key_1 = value10 value11 value12 |
multi_key_2 = value20, value21, value22 |
multi_key_3 = value30 |
value31 |
value32 |
value33 |
multi_key_4 = value40 = value41 = |
value42 |
|
# Difference between empty keys and multiline keys |
tricky_key_1 = |
tricky_key_2 = |
tricky_value_2 |
tricky_key_3 = |
|
["my_section"] |
section_key_1 = |
section_value_10 |
|
section_value_11 |
= # equal sign without a key is added as value |
value which is also part of section_key_1 |
|
warning_key_1 = Be aware that multiline values can be tricky: |
|
this also belongs |
to previous |
key 'warning_key_1' |
but_this = a new key-value pair |
/test/cdf_dir/correct_files/section_test.txt
0,0 → 1,18
# Testfile for testing sections the CommonDictFile class |
# |
# First some keys with different spacing (spaces and tabs) |
|
global_key_1 = global_1 |
global_key_2 = [ "aap", "noot", "mies" ] # this is seen as a section header instead of a value!!! |
|
just_some_key_1 = global value1 which is lost without a warning |
just_some_key_2 = global value2 which is lost without a warning |
|
[section_1] |
just_some_key_1 = section1 value1 which is lost without a warning |
just_some_key_2 = section1 value2 which is lost without a warning |
|
[section_2] |
just_some_key_1 = section2 value1 |
just_some_key_2 = section2 value2 |
|
/test/cdf_dir/empty_file/comment_only_dict.txt
0,0 → 1,4
# This file only |
# contains comments |
# and no |
# key = value lines |
/test/cdf_dir/empty_file/empty_dict.txt
--- test/cdf_dir/hdlbuildset_files/hdl_buildset_rsp.cfg (nonexistent)
+++ test/cdf_dir/hdlbuildset_files/hdl_buildset_rsp.cfg (revision 4)
@@ -0,0 +1,22 @@
+# TODO: Does RadioHDL still works for RSP??
+buildset_name = rsp
+technology_names = ip_virtex4
+family_names = virtex4
+block_design_names = sopc
+
+sim_tool_name = modelsim
+sim_tool_version = 6.6c
+synth_tool_name = ise
+synth_tool_version = 11.1
+ip_tool_name = coregen
+
+project_dir_depth_sim = 4
+project_dir_depth_synth = 0
+
+lib_root_dir = $RSP
+build_dir = $RADIOHDL_BUILD_DIR
+quartus_dir = /home/software/Altera/
+model_tech_altera_lib = /home/software/modelsim_altera_libs/
+model_tech_dir = /home/software/Mentor//modeltech
+vsim_dir = /linux_x86_64
+modelsim_search_libraries =
/test/cdf_dir/hdlbuildset_files/hdl_buildset_unb1.cfg
0,0 → 1,21
# Uniboardd 1 configuration |
buildset_name = unb1 |
technology_names = ip_stratixiv |
family_names = stratixiv |
block_design_names = sopc |
|
sim_tool_name = modelsim |
sim_tool_version = 6.6c |
synth_tool_name = quartus |
synth_tool_version = 11.1sp2 |
|
lib_root_dirs = ${RADIOHDL_WORK}/libraries ${RADIOHDL_WORK}/applications ${RADIOHDL_WORK}/boards |
build_dir = $RADIOHDL_BUILD_DIR |
quartus_dir = /home/software/Altera/<synth_tool_version> |
model_tech_altera_lib = /home/software/modelsim_altera_libs/<synth_tool_version> |
model_tech_dir = /home/software/Mentor/<sim_tool_version>/modeltech |
vsim_dir = <model_tech_dir>/linux_x86_64 |
modelsim_search_libraries = |
# stratixiv only |
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver |
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip |
/test/cdf_dir/hdlbuildset_files/hdl_buildset_wrong.cfg
0,0 → 1,21
# Uniboardd 1 configuration |
buildset_name = unb1 |
#technology_names = ip_stratixiv |
family_names = stratixiv |
block_design_names = sopc |
|
sim_tool_name = modelsim |
sim_tool_version = 6.6c |
synth_tool_name = quartus |
synth_tool_version = 11.1sp2 |
|
lib_root_dir = $HDL |
build_dir = $RADIOHDL_BUILD_DIR |
quartus_dir = /home/software/Altera/<synth_tool_version> |
model_tech_altera_lib = /home/software/modelsim_altera_libs/<synth_tool_version> |
model_tech_dir = /home/software/Mentor/<sim_tool_version>/modeltech |
vsim_dir = <model_tech_dir>/linux_x86_64 |
modelsim_search_libraries = |
# stratixiv only |
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver |
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip |
/test/cdf_dir/hdllib_files/hdllib_wrong.cfg
0,0 → 1,24
hdl_lib_name = technology |
hdl_library_clause_name = technology_lib |
#hdl_lib_uses_synth = |
hdl_lib_uses_sim = |
hdl_lib_technology = |
|
synth_files = |
technology_pkg.vhd |
$RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
test_bench_files = |
|
regression_test_vhdl = |
# no self checking tb available yet |
|
|
[modelsim_project_file] |
modelsim_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
|
|
|
[quartus_project_file] |
quartus_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/quartus/technology/technology_select_pkg.vhd |
/test/cdf_dir/hdllib_files/test_hdllib.cfg
0,0 → 1,24
hdl_lib_name = technology |
hdl_library_clause_name = technology_lib |
hdl_lib_uses_synth = |
hdl_lib_uses_sim = |
hdl_lib_technology = |
|
synth_files = |
technology_pkg.vhd |
$RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
test_bench_files = |
|
regression_test_vhdl = |
# no self checking tb available yet |
|
|
[modelsim_project_file] |
modelsim_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
|
|
|
[quartus_project_file] |
quartus_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/quartus/technology/technology_select_pkg.vhd |
/test/cdf_dir/hdltool_files/hdl_tool_quartus.cfg
0,0 → 1,27
# configuration file for defining the quartus installation on this system |
quartus_rootdir = ${QUARTUS_DIR}/quartus |
quartus_rootdir_override = ${QUARTUS_DIR}/quartus |
niosdir = ${QUARTUS_DIR}/nios2eds |
|
# extension to the PATH variable |
quartus_paths = |
<quartus_rootdir>/bin |
<niosdir>/bin |
<niosdir>/bin/gnu/H-i686-pc-linux-gnu/bin |
<niosdir>/bin/gnu/H-x86_64-pc-linux-gnu/bin |
<niosdir>/sdk2/bin |
|
[sopc] |
sopc_paths = |
<quartus_rootdir>/sopc_builder/bin |
sopc_environment_variables = |
sopc_kit_nios2 <niosdir> |
|
[qsys] |
qsys_paths = |
<quartus_rootdir>/../qsys/bin |
|
[user settings] |
user_environment_variables = |
altera_hw_tcl_keep_temp_files 1 |
|
/test/cdf_dir/referenced_files/reference_test.txt
0,0 → 1,34
# Testfile for testing the CommonDictFile class |
# |
non_ref_key_1 = some_value |
non_ref_key_2 = some_other_value |
|
early_ref_key1 = before <ref_key_2> is defined |
|
ref_key_1 = single_reference |
ref_key_2 = multiple words in the value |
|
simple_ref_1 = a value with <ref_key_1> |
double_ref_1 = a value with twice <ref_key_1><ref_key_1> |
triple_key_1 = its here <ref_key_1> and here <ref_key_1> and here <ref_key_1>!!! |
triple_key_2 = its here <ref_key_2> and here <ref_key_1>!!! |
|
ref_only_key_1 = <ref_key_1> |
|
wrong_ref_1 = what will double brackets <<ref_key_2>> do? # will not be replaced |
|
# this will give all nested_key_x the value 'some_value' |
nested_key_1 = some_value |
nested_key_2 = <nested_key_1> |
nested_key_3 = <nested_key_2> |
|
reverse_nested_key_1 = <reverse_nested_key_2> # becomes <reverse_nested_key_3> after substitution!!! |
reverse_nested_key_2 = <reverse_nested_key_3> |
reverse_nested_key_3 = some_value |
|
mutual_key_1 = <mutual_key_2> # becomes <<mutual_key_1> after substitution |
mutual_key_2 = <mutual_key_1> # remains the same |
|
loop_key_1 = <loop_key_1> # remains the same |
|
undefined_key_1 = reference to <non existing key> |
/test/cdf_dir/tree/cfgfile/a/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/a |
/test/cdf_dir/tree/cfgfile/b/0/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/b/0 |
/test/cdf_dir/tree/cfgfile/b/1/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/b/1 |
/test/cdf_dir/tree/cfgfile/b/2/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/b/2 |
/test/cdf_dir/tree/cfgfile/b/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/b |
/test/cdf_dir/tree/cfgfile/c/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir/c |
/test/cdf_dir/tree/cfgfile/dict.txt
0,0 → 1,3
# Testfile for testing the CommonDictFile class |
# |
key_1 = top_dir |
/test/cdf_dir/tree/hdlbuildset/hdl_buildset_rsp.cfg
0,0 → 1,22
# TODO: Does RadioHDL still works for RSP?? |
buildset_name = rsp |
technology_names = ip_virtex4 |
family_names = virtex4 |
block_design_names = sopc |
|
sim_tool_name = modelsim |
sim_tool_version = 6.6c |
synth_tool_name = ise |
synth_tool_version = 11.1 |
ip_tool_name = coregen |
|
project_dir_depth_sim = 4 |
project_dir_depth_synth = 0 |
|
lib_root_dir = $RSP |
build_dir = $RADIOHDL_BUILD_DIR |
quartus_dir = /home/software/Altera/<synth_tool_version> |
model_tech_altera_lib = /home/software/modelsim_altera_libs/<synth_tool_version> |
model_tech_dir = /home/software/Mentor/<sim_tool_version>/modeltech |
vsim_dir = <model_tech_dir>/linux_x86_64 |
modelsim_search_libraries = |
/test/cdf_dir/tree/hdlbuildset/hdl_buildset_unb1.cfg
0,0 → 1,21
# Uniboardd 1 configuration |
buildset_name = unb1 |
technology_names = ip_stratixiv |
family_names = stratixiv |
block_design_names = sopc |
|
sim_tool_name = modelsim |
sim_tool_version = 6.6c |
synth_tool_name = quartus |
synth_tool_version = 11.1sp2 |
|
lib_root_dir = $HDL |
build_dir = $RADIOHDL_BUILD_DIR |
quartus_dir = /home/software/Altera/<synth_tool_version> |
model_tech_altera_lib = /home/software/modelsim_altera_libs/<synth_tool_version> |
model_tech_dir = /home/software/Mentor/<sim_tool_version>/modeltech |
vsim_dir = <model_tech_dir>/linux_x86_64 |
modelsim_search_libraries = |
# stratixiv only |
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver |
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip |
/test/cdf_dir/tree/hdllib/technology/test_hdllib.cfg
0,0 → 1,24
hdl_lib_name = technology |
hdl_library_clause_name = technology_lib |
hdl_lib_uses_synth = |
hdl_lib_uses_sim = |
hdl_lib_technology = |
|
synth_files = |
technology_pkg.vhd |
$RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
test_bench_files = |
|
regression_test_vhdl = |
# no self checking tb available yet |
|
|
[modelsim_project_file] |
modelsim_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd |
|
|
|
[quartus_project_file] |
quartus_copy_files = |
technology_select_pkg_<buildset_name>.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/quartus/technology/technology_select_pkg.vhd |
/test/cdf_dir/tree/hdllib/util/test_hdllib.cfg
0,0 → 1,22
hdl_lib_name = util |
hdl_library_clause_name = util_lib |
hdl_lib_uses_synth = mm common common_mult technology |
hdl_lib_uses_sim = |
hdl_lib_technology = |
|
synth_files = |
src/vhdl/util_logic.vhd |
src/vhdl/util_heater_pkg.vhd |
src/vhdl/util_heater.vhd |
|
test_bench_files = |
tb/vhdl/tb_util_heater.vhd |
|
regression_test_vhdl = |
# no self checking tb available yet |
|
[modelsim_project_file] |
|
|
[quartus_project_file] |
|
/test/cdf_dir/tree/hdltool/hdl_tool_altera.cfg
0,0 → 1,23
# configuration file for defining the altera installation on this system |
altera_rootdir = ${ALTERA_DIR}/altera |
altera_rootdir_override = ${ALTERA_DIR}/altera |
niosdir = ${ALTERA_DIR}/nios2eds |
|
# extension to the PATH variable |
altera_paths = |
<altera_rootdir>/bin |
<niosdir>/bin |
<niosdir>/bin/gnu/H-i686-pc-linux-gnu/bin |
<niosdir>/bin/gnu/H-x86_64-pc-linux-gnu/bin |
<niosdir>/sdk2/bin |
|
[sopc] |
sopc_paths = |
sopc_environment_variables = |
|
[qsys] |
qsys_paths = |
|
[user settings] |
user_environment_variables = |
|
/test/cdf_dir/tree/hdltool/hdl_tool_quartus.cfg
0,0 → 1,27
# configuration file for defining the quartus installation on this system |
quartus_rootdir = ${QUARTUS_DIR}/quartus |
quartus_rootdir_override = ${QUARTUS_DIR}/quartus |
niosdir = ${QUARTUS_DIR}/nios2eds |
|
# extension to the PATH variable |
quartus_paths = |
<quartus_rootdir>/bin |
<niosdir>/bin |
<niosdir>/bin/gnu/H-i686-pc-linux-gnu/bin |
<niosdir>/bin/gnu/H-x86_64-pc-linux-gnu/bin |
<niosdir>/sdk2/bin |
|
[sopc] |
sopc_paths = |
<quartus_rootdir>/sopc_builder/bin |
sopc_environment_variables = |
sopc_kit_nios2 <niosdir> |
|
[qsys] |
qsys_paths = |
<quartus_rootdir>/../qsys/bin |
|
[user settings] |
user_environment_variables = |
altera_hw_tcl_keep_temp_files 1 |
|
/test/cdf_dir/wrong_files/dangling_test.txt
0,0 → 1,6
# Testfile for testing sections the CommonDictFile class |
# |
# First some keys with different spacing (spaces and tabs) |
this is a lost value which causes an exception |
|
global_key_1 = global_1 |
/test/cdf_dir/wrong_files/wrong_key_test.txt
0,0 → 1,6
# Testfile for testing the CommonDictFile class |
# |
# First some keys with different spacing (spaces and tabs) |
|
key with spaces = should result in an exception |
|
/test/t_hdl_configfile.py
0,0 → 1,147
import unittest |
from configfile import * |
from hdl_configfile import * |
|
|
class Test_construction(unittest.TestCase): |
"Class to the various ways of construction" |
|
def test_wrong_filename(self): |
"Test constructor with non-existing file" |
self.assertRaises(ConfigFileException, ConfigFile, "/Is/Not/A/Valid/Directory") |
|
def test_empty_dictfile(self): |
"Test constructor with empty config file" |
cfg = ConfigFile("./cdf_dir/empty_file/empty_dict.txt") |
self.assertEqual(len(cfg.content), 0) |
|
def test_comment_only_dictfile(self): |
"Test constructor with comment-only config files" |
cfg = ConfigFile("./cdf_dir/empty_file/comment_only_dict.txt") |
self.assertEqual(len(cfg.content), 0) |
|
|
class Test_key_value_spacing(unittest.TestCase): |
"Class to the various kind of spacing between the keys and the values" |
|
def test_key_value_spacing(self): |
cfg = ConfigFile("./cdf_dir/correct_files/key_value_test.txt") |
self.assertEqual(cfg.space_key_1, "value_1") |
self.assertEqual(cfg.space_key_2, "value_2") |
self.assertEqual(cfg.space_key_3, "value_3") |
self.assertEqual(cfg.space_key_4, "value_4") |
self.assertEqual(cfg.space_key_5, "value_5") |
self.assertEqual(cfg.space_key_6, "value_6") |
self.assertEqual(cfg.space_key_7, "value_7") |
self.assertEqual(cfg.multi_key_1, "value10 value11 value12") |
self.assertEqual(cfg.multi_key_2, "value20, value21, value22") |
self.assertEqual(cfg.multi_key_3, "value30 value31 value32 value33") |
self.assertEqual(cfg.multi_key_4, "value40 = value41 = value42") |
self.assertEqual(cfg.tricky_key_1, "") |
self.assertEqual(cfg.tricky_key_2, "tricky_value_2") |
self.assertEqual(cfg.tricky_key_3, "") |
self.assertEqual(cfg.section_headers, ['"my_section"']) |
self.assertEqual(cfg.warning_key_1, "Be aware that multiline values can be tricky: this also belongs to previous key 'warning_key_1'") |
# also test attribute access versus item access |
self.assertEqual(cfg.multi_key_2, cfg['multi_key_2']) |
print(cfg.content) |
|
def test_sections(self): |
cfg = ConfigFile("./cdf_dir/correct_files/section_test.txt") |
self.assertEqual(cfg.global_key_1, "global_1"), |
self.assertEqual(cfg.global_key_2, '[ "aap", "noot", "mies" ]'), |
self.assertEqual(cfg.just_some_key_1, "section2 value1"), |
self.assertEqual(cfg.just_some_key_2, "section2 value2"), |
self.assertEqual(cfg.section_headers, ['section_1', 'section_2']) |
|
def test_dangling_value(self): |
"Test if a value without a key is detected" |
self.assertRaises(ConfigFileException, ConfigFile, "./cdf_dir/wrong_files/dangling_test.txt") |
|
def test_keys_with_spaces(self): |
"Test if a key that contains spaces is detected" |
self.assertRaises(ConfigFileException, ConfigFile, "./cdf_dir/wrong_files/wrong_key_test.txt") |
|
|
class Test_reference_key_substitution(unittest.TestCase): |
"Class to the the substitution of referenced keys." |
|
def test_read_the_file(self): |
cfg = ConfigFile("./cdf_dir/referenced_files/reference_test.txt") |
self.assertEqual(cfg.early_ref_key1, "before <ref_key_2> is defined") |
self.assertEqual(cfg.simple_ref_1, "a value with <ref_key_1>") |
self.assertEqual(cfg.double_ref_1, "a value with twice <ref_key_1><ref_key_1>") |
self.assertEqual(cfg.triple_key_1, "its here <ref_key_1> and here <ref_key_1> and here <ref_key_1>!!!") |
self.assertEqual(cfg.triple_key_2, "its here <ref_key_2> and here <ref_key_1>!!!") |
self.assertEqual(cfg.ref_only_key_1, "<ref_key_1>") |
self.assertEqual(cfg.wrong_ref_1, "what will double brackets <<ref_key_2>> do?") |
self.assertEqual(cfg.undefined_key_1, "reference to <non existing key>") |
|
self.assertEqual(cfg.nested_key_1, "some_value") |
self.assertEqual(cfg.nested_key_2, "<nested_key_1>") |
self.assertEqual(cfg.nested_key_3, "<nested_key_2>") |
self.assertEqual(cfg.reverse_nested_key_1, "<reverse_nested_key_2>") |
self.assertEqual(cfg.reverse_nested_key_2, "<reverse_nested_key_3>") |
self.assertEqual(cfg.reverse_nested_key_3, "some_value") |
self.assertEqual(cfg.mutual_key_1, "<mutual_key_2>") |
self.assertEqual(cfg.mutual_key_2, "<mutual_key_1>") |
self.assertEqual(cfg.loop_key_1, "<loop_key_1>") |
|
cfg.resolve_key_references() |
|
self.assertEqual(cfg.early_ref_key1, "before multiple words in the value is defined") |
self.assertEqual(cfg.simple_ref_1, "a value with single_reference") |
self.assertEqual(cfg.double_ref_1, "a value with twice single_referencesingle_reference") |
self.assertEqual(cfg.triple_key_1, "its here single_reference and here single_reference and here single_reference!!!") |
self.assertEqual(cfg.triple_key_2, "its here multiple words in the value and here single_reference!!!") |
self.assertEqual(cfg.ref_only_key_1, "single_reference") |
self.assertEqual(cfg.wrong_ref_1, "what will double brackets <<ref_key_2>> do?") |
self.assertEqual(cfg.undefined_key_1, "reference to <non existing key>") |
|
self.assertEqual(cfg.nested_key_1, "some_value") |
self.assertEqual(cfg.nested_key_2, "some_value") |
self.assertEqual(cfg.nested_key_3, "some_value") |
self.assertEqual(cfg.reverse_nested_key_1, "<reverse_nested_key_3>") |
self.assertEqual(cfg.reverse_nested_key_2, "some_value") |
self.assertEqual(cfg.reverse_nested_key_3, "some_value") |
self.assertEqual(cfg.mutual_key_1, "<mutual_key_1>") |
self.assertEqual(cfg.mutual_key_2, "<mutual_key_1>") |
self.assertEqual(cfg.loop_key_1, "<loop_key_1>") |
|
|
class Test_hdltool_file(unittest.TestCase): |
"Class to test the hdltool class." |
|
def test_read_good_hdltool_file(self): |
tool = HdlTool("./cdf_dir/hdltool_files/hdl_tool_quartus.cfg") |
self.assertEqual(tool.user_environment_variables, "altera_hw_tcl_keep_temp_files 1") |
|
|
class Test_hdl_buildset_file(unittest.TestCase): |
"Class to test the hdltool class." |
|
def test_read_good_hdlbuildset_file(self): |
buildset = HdlBuildset("./cdf_dir/hdlbuildset_files/hdl_buildset_unb1.cfg") |
self.assertEqual(buildset.buildset_name, "unb1") |
self.assertEqual(buildset.technology_names, "ip_stratixiv") |
self.assertEqual(buildset.lib_root_dirs, "${RADIOHDL_WORK}/libraries ${RADIOHDL_WORK}/applications ${RADIOHDL_WORK}/boards") |
|
def test_read_wrong_hdlbuildset_file(self): |
self.assertRaises(ConfigFileException, HdlBuildset, "./cdf_dir/hdlbuildset_files/hdl_buildset_wrong.cfg") |
|
|
class Test_hdllib_file(unittest.TestCase): |
"Class to test the hdllib class." |
|
def test_read_good_hdllib_file(self): |
lib = HdlLib("./cdf_dir/hdllib_files/test_hdllib.cfg") |
self.assertEqual(lib.hdl_lib_name, "technology") |
self.assertEqual(lib.hdl_library_clause_name, "technology_lib") |
self.assertEqual(lib.hdl_lib_technology, "") |
|
def test_read_wrong_hdllib_file(self): |
self.assertRaises(ConfigFileException, HdlLib, "./cdf_dir/hdllib_files/hdllib_wrong.cfg") |
|
|
if __name__ == '__main__': |
unittest.main(verbosity=2) |
/test/t_hdl_configtree.py
0,0 → 1,70
import unittest |
from configtree import * |
from hdl_configtree import * |
|
|
class Test_construction(unittest.TestCase): |
"Class to the various ways of construction" |
|
def test_wrong_filename(self): |
"Test constructor with non-existing rootdir" |
self.assertRaises(ConfigFileException, ConfigTree, "/Is/Not/A/Valid/Directory", "dict.txt") |
|
def test_empty_dictfile(self): |
"Test constructor with empty config file" |
tree = ConfigTree("./cdf_dir/empty_file", "empty_dict.txt") |
self.assertEqual(len(tree.configfiles), 1) |
|
def test_comment_only_dictfile(self): |
"Test constructor with comment-only config files" |
tree = ConfigTree("./cdf_dir/empty_file", "comment_only_dict.txt") |
self.assertEqual(len(tree.configfiles), 1) |
|
|
class Test_tree_behaviour(unittest.TestCase): |
"Class to test the 'tree' functionality of the class" |
|
def test_tree_with_configfiles(self): |
"Test constructor with a tree with configfiles all containing a 'key_1' label" |
"that holds its relative path in the tree" |
tree = ConfigTree("./cdf_dir/tree/cfgfile", "dict.txt") |
for cfg in list(tree.configfiles.values()): |
# print cfg.ID, cfg.content |
expected_value = cfg.ID.replace("./cdf_dir/tree/cfgfile", "top_dir").replace("/dict.txt", "") |
self.assertEqual(expected_value, cfg.key_1) |
|
def test_hdllib_tree(self): |
"Test if we can read in a tree with hdllib files." |
tree = HdlLibTree("./cdf_dir/tree/hdllib", "test_hdllib.cfg") |
self.assertEqual(len(tree.configfiles), 2) |
util = tree.configfiles['util'] |
self.assertEqual(util.hdl_library_clause_name, 'util_lib') |
self.assertEqual(util.synth_files, 'src/vhdl/util_logic.vhd src/vhdl/util_heater_pkg.vhd src/vhdl/util_heater.vhd') |
technology = tree.configfiles['technology'] |
self.assertEqual(technology.hdl_library_clause_name, 'technology_lib') |
self.assertEqual(technology.synth_files, 'technology_pkg.vhd $RADIOHDL_BUILD_DIR/<buildset_name>/modelsim/technology/technology_select_pkg.vhd') |
|
def test_hdlbuildset_tree(self): |
"Test if we can read in a tree with hdlbuildset files." |
tree = HdlBuildsetTree("./cdf_dir/tree/hdlbuildset", "hdl_buildset_*.cfg") |
self.assertEqual(len(tree.configfiles), 2) |
rsp = tree.configfiles['rsp'] |
self.assertEqual(rsp.technology_names, 'ip_virtex4') |
self.assertEqual(rsp.model_tech_altera_lib, '/home/software/modelsim_altera_libs/<synth_tool_version>') |
unb1 = tree.configfiles['unb1'] |
self.assertEqual(unb1.technology_names, 'ip_stratixiv') |
self.assertEqual(unb1.model_tech_altera_lib, '/home/software/modelsim_altera_libs/<synth_tool_version>') |
|
def test_hdltool_tree(self): |
"Test if we can read in a tree with hdltool files." |
tree = HdlToolTree("./cdf_dir/tree/hdltool", "hdl_tool_*.cfg") |
self.assertEqual(len(tree.configfiles), 2) |
altera = tree.configfiles['./cdf_dir/tree/hdltool/hdl_tool_altera.cfg'] |
self.assertEqual(altera.altera_rootdir, "${ALTERA_DIR}/altera") |
quartus = tree.configfiles['./cdf_dir/tree/hdltool/hdl_tool_quartus.cfg'] |
self.assertEqual(quartus.quartus_rootdir, "${QUARTUS_DIR}/quartus") |
|
|
if __name__ == '__main__': |
unittest.main(verbosity=2) |
|