URL
https://opencores.org/ocsvn/s6soc/s6soc/trunk
Subversion Repositories s6soc
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- This comparison shows the changes necessary to convert path
/s6soc/trunk/rtl
- from Rev 11 to Rev 12
- ↔ Reverse comparison
Rev 11 → Rev 12
/wbpwmaudio.v
82,11 → 82,11
i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data, |
o_wb_ack, o_wb_stall, o_wb_data, |
o_pwm, o_aux, o_int); |
parameter DEFAULT_RELOAD = 12'd1814, // about 44.1 kHz @ 80MHz |
parameter DEFAULT_RELOAD = 17'd1814, // about 44.1 kHz @ 80MHz |
//DEFAULT_RELOAD = 32'd2268,//about 44.1 kHz @ 100MHz |
NAUX=2, // Dev control values |
VARIABLE_RATE=0, |
TIMING_BITS=12; |
TIMING_BITS=17; |
input i_clk; |
input i_wb_cyc, i_wb_stb, i_wb_we; |
input i_wb_addr; |
101,7 → 101,7
|
// How often shall we create an interrupt? Every reload_value clocks! |
// If VARIABLE_RATE==0, this value will never change and will be kept |
// at the default reload rate (44.1 kHz, for a 100 MHz clock) |
// at the default reload rate (defined up top) |
wire [(TIMING_BITS-1):0] w_reload_value; |
generate |
if (VARIABLE_RATE != 0) |
154,7 → 154,7
reg [15:0] pwm_counter; |
initial pwm_counter = 16'h00; |
always @(posedge i_clk) |
pwm_counter <= pwm_counter + 1; |
pwm_counter <= pwm_counter + 16'h01; |
|
wire [15:0] br_counter; |
genvar k; |
/toplevel.v
53,7 → 53,7
module toplevel(i_clk_8mhz, |
o_qspi_cs_n, o_qspi_sck, io_qspi_dat, |
i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain, |
i_uart, o_uart, i_uart_cts, o_uart_rts, |
i_uart, o_uart, o_uart_cts, i_uart_rts, |
i_kp_row, o_kp_col, |
i_gpio, o_gpio, |
io_scl, io_sda); |
73,8 → 73,8
input i_uart; |
output wire o_uart; |
// and it's associated control wires |
input i_uart_cts; |
output wire o_uart_rts; |
output wire o_uart_cts; |
input i_uart_rts; |
// Our keypad |
input [3:0] i_kp_row; |
output wire [3:0] o_kp_col; |
149,7 → 149,7
i_uart, rx_stb, rx_data, |
rx_break, rx_parity_err, rx_frame_err, rx_ck_uart); |
txuart tcvuart(clk_s, reset_s, uart_setup, tx_break, tx_stb, tx_data, |
o_uart, i_uart_cts, tx_busy); |
o_uart, tx_busy); |
|
|
// |
167,7 → 167,7
|
busmaster masterbus(clk_s, reset_s, |
// External ... bus control (if enabled) |
rx_stb, rx_data, tx_stb, tx_data, tx_busy, o_uart_rts, |
rx_stb, rx_data, tx_stb, tx_data, tx_busy, w_uart_cts, |
// SPI/SD-card flash |
o_qspi_cs_n, o_qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod, |
// Board lights and switches |
179,6 → 179,7
// GPIO lines |
{ i_gpio, io_scl, io_sda }, w_gpio |
); |
assign o_uart_cts = (w_uart_cts)&&(i_uart_rts); |
|
// |
// Quad SPI support |
/busmaster.v
48,7 → 48,7
// `define INCLUDE_RTC // About 90 LUTs |
module busmaster(i_clk, i_rst, |
i_rx_stb, i_rx_data, o_tx_stb, o_tx_data, i_tx_busy, |
o_uart_rts, |
o_uart_cts, |
// The SPI Flash lines |
o_qspi_cs_n, o_qspi_sck, o_qspi_dat, i_qspi_dat, o_qspi_mod, |
// The board I/O |
68,7 → 68,7
output reg o_tx_stb; |
output reg [7:0] o_tx_data; |
input i_tx_busy; |
output wire o_uart_rts; |
output wire o_uart_cts; |
// SPI flash control |
output wire o_qspi_cs_n, o_qspi_sck; |
output wire [3:0] o_qspi_dat; |
319,11 → 319,13
assign io_stall = 1'b0; |
|
wire pwm_ack, pwm_stall; |
wbpwmaudio theaudio(i_clk, wb_cyc, |
((wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h4)), wb_we, |
1'b0, wb_data, |
pwm_ack, pwm_stall, pwm_data, o_pwm, o_pwm_aux, |
pwm_int); |
wbpwmaudio #(14'd10000,2,0,14) |
theaudio(i_clk, wb_cyc, |
((wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h4)), |
wb_we, 1'b0, wb_data, |
pwm_ack, pwm_stall, pwm_data, o_pwm, |
o_pwm_aux, //={pwm_shutdown_n,pwm_gain} |
pwm_int); |
|
// |
// Special Purpose I/O: Keypad, button, LED status and control |
376,7 → 378,7
else if (i_rx_stb) |
rx_rdy <= (rx_rdy | i_rx_stb); |
end |
assign o_uart_rts = (~rx_rdy); |
assign o_uart_cts = (~rx_rdy); |
assign uart_data = { 23'h0, ~rx_rdy, r_rx_data }; |
// |
// uart_ack gets returned as part of io_ack, since that happens when |