URL
https://opencores.org/ocsvn/sgmii/sgmii/trunk
Subversion Repositories sgmii
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 26 to Rev 27
- ↔ Reverse comparison
Rev 26 → Rev 27
/sgmii/trunk/build/OpenCore_MAC.qip
0,0 → 1,39
#this file is to add Open mac controller files |
set OpenCore_MAC_directory OpenCore_MAC |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/RGMII2GMII.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/GMII2RGMII.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/CLK_DIV2.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/CLK_SWITCH.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/duram.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/afifo.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Broadcast_filter.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Clk_ctrl.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/CRC_chk.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/CRC_gen.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_clockgen.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_miim.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_outputcontrol.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_shiftreg.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/flow_ctrl.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/GbMAC.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/header.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_add_chk.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_ctrl.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_FF.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_top.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_addr_add.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_Ctrl.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_FF.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Phy_int.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Ramdon_gen.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/reg_int.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_addr_gen.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_ctrl.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_dpram.v |
set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/timescale.v |
set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/TECH/altera/DDR_O.qip |
set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/TECH/altera/DDR_I.qip |
set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/LoopbackFF/lpbff.qip |