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URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

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Rev 28 → Rev 29

/systemC/link_sc.h
1,3 → 1,35
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
#ifndef CONTROL_SC_H
#define CONTROL_SC_H
 
/systemC/main.cc
0,0 → 1,914
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
#include <systemc.h>
#include <stdio.h>
#include <vector>
#include <string>
#include <stdlib.h>
#include <gtkmm.h>
#include <random>
#include <boost/thread.hpp>
 
using namespace std;
using namespace Gtk;
using namespace boost;
 
#include "../gladicapi/data_recorder.h"
#include "../gladicapi/data_check.h"
 
bool enable_null;
bool enable_fct;
bool enable_time_code;
bool enable_n_char;
 
bool EEP_EOP;
 
unsigned int finish = 0;
bool link_start = false;
bool link_disable = false;
bool auto_start = false;
 
//systemc and verilog
bool global_reset = false;
 
//verilog variables
bool verilog_link_start = false;
bool verilog_link_disable = false;
bool verilog_auto_start = false;
int frquency_nano_second = 500;
 
vector<string> data_col_store;
data_recorder *REC_TX_SPW;
data_check *COMPARE_SPW;
 
vector<string> data_col_store0;
data_recorder *REC_TX_SPWSC;
data_check *COMPARE_SPW_RX;
 
unsigned long int a = 0;
int clock_systemc = 2;
 
//send data systemC
 
bool start_send_data_verilog = false;
bool enable_time_code_verilog = false;
 
bool start_send_data = false;
bool start_tick_data = false;
 
vector<sc_uint<9> > data_generated_sc;
sc_uint<9> intermediate_systemc;
sc_uint<9> intermediate_sc;
unsigned int data_iteration_sc_aux = 0;
unsigned int data_iteration_sc = 0;
 
vector<sc_uint<9> > data_generated_verilog;
sc_uint<9> intermediate;
sc_uint<9> intermediate_verilog;
 
unsigned int data_iteration = 0;
unsigned int data_iteration_vlog = 0;
sc_uint<9> intermediate_data;
 
#include "top_spw.h"
 
//Data generation
unsigned long int max_data = 100;
 
std::random_device rd;
std::uniform_int_distribution<unsigned long int> data_in(0,255);
std::uniform_int_distribution<unsigned long int> nchar(1,max_data-1);//eop-eep
 
class sc_TOP_SPW;
 
SC_MODULE(sc_TOP_SPW)
{
 
sc_clock CLOCK;
sc_signal<bool> RESET;
sc_signal<bool> LINK_START;
sc_signal<bool> LINK_DISABLE;
sc_signal<bool> AUTO_START;
sc_signal<sc_uint<4> > FSM_SPW_OUT;
sc_signal<sc_uint<4> > FSM_TX;
 
sc_signal<sc_uint<10> > CLOCK_GEN;
sc_signal<bool> E_SEND_DATA;
//sc_signal<bool> TICKIN_TX;
//sc_signal<sc_uint<8> > TIMEIN_CONTROL_FLAG_TX;
 
//sc_signal<bool> TXWRITE_TX;
//sc_signal<sc_uint<9> > TXDATA_FLAGCTRL_TX;
 
//sc_signal<bool> READY_TX;
//sc_signal<bool> READY_TICK;
 
sc_signal<bool> BUFFER_READY;
sc_signal<sc_uint<9> > DATARX_FLAG;
sc_signal<bool> BUFFER_WRITE;
 
sc_signal<sc_uint<8> > TIME_OUT;
sc_signal<bool> TICK_OUT;
sc_signal<bool> CONTROL_FLAG_OUT;
 
sc_signal<uint> DOUT;
sc_signal<uint> SOUT;
sc_signal<uint> DIN;
sc_signal<uint> SIN;
 
sc_TOP DUT;
 
SC_CTOR(sc_TOP_SPW) :CLOCK("CLOCK",20,SC_NS),
RESET("RESET"),
LINK_DISABLE("LINK_DISABLE"),
LINK_START("LINK_START"),
AUTO_START("AUTO_START"),
FSM_SPW_OUT("FSM_SPW_OUT"),
CLOCK_GEN("CLOCK_GEN"),
E_SEND_DATA("E_SEND_DATA"),
//TICKIN_TX("TICKIN_TX"),
//TIMEIN_CONTROL_FLAG_TX("TIMEIN_CONTROL_FLAG_TX"),
//TXWRITE_TX("TXWRITE_TX"),
//TXDATA_FLAGCTRL_TX("TXDATA_FLAGCTRL_TX"),
 
//READY_TX("READY_TX"),
//READY_TICK("READY_TICK"),
DOUT("DOUT"),
SOUT("SOUT"),
 
FSM_TX("FSM_TX"),
DIN("DIN"),
SIN("SIN"),
BUFFER_READY("BUFFER_READY"),
DATARX_FLAG("DATARX_FLAG"),
BUFFER_WRITE("BUFFER_WRITE"),
TIME_OUT("TIME_OUT"),
TICK_OUT("TICK_OUT"),
CONTROL_FLAG_OUT("CONTROL_FLAG_OUT"),
 
 
DUT("DUT") {
DUT.CLOCK(CLOCK);
DUT.RESET(RESET);
DUT.LINK_DISABLE(LINK_DISABLE);
DUT.AUTO_START(AUTO_START);
DUT.LINK_START(LINK_START);
DUT.FSM_SPW_OUT(FSM_SPW_OUT);
DUT.CLOCK_GEN(CLOCK_GEN);
DUT.E_SEND_DATA(E_SEND_DATA);
//DUT.TICKIN_TX(TICKIN_TX);
//DUT.TIMEIN_CONTROL_FLAG_TX(TIMEIN_CONTROL_FLAG_TX);
//DUT.TXWRITE_TX(TXWRITE_TX);
//DUT.TXDATA_FLAGCTRL_TX(TXDATA_FLAGCTRL_TX);
DUT.FSM_TX(FSM_TX);
//DUT.READY_TX(READY_TX);
//DUT.READY_TICK(READY_TICK);
DUT.DOUT(DOUT);
DUT.SOUT(SOUT);
 
DUT.DIN(DIN);
DUT.SIN(SIN);
DUT.BUFFER_READY(BUFFER_READY);
DUT.DATARX_FLAG(DATARX_FLAG);
DUT.BUFFER_WRITE(BUFFER_WRITE);
DUT.TIME_OUT(TIME_OUT);
DUT.TICK_OUT(TICK_OUT);
DUT.CONTROL_FLAG_OUT(CONTROL_FLAG_OUT);
 
cout << "SC_CTOR(sc_TOP_SPW)" << endl;
}
 
};
 
Glib::RefPtr<Gtk::Builder> builder;
 
Gtk::Window *window;
 
Gtk::Button *BtnFinsihSimulation;
Gtk::Button *BtnLinkEnable;
Gtk::Button *BtnLinkDisable;
Gtk::Button *BtnAutoStart;
Gtk::Button *BtnReset;
 
Gtk::Button *BtnSpaceWireVerilog;
Gtk::CheckButton *CheckbtnLinkEnable;
Gtk::CheckButton *CheckbtnAutoStart;
Gtk::CheckButton *CheckbtnLinkDisable;
 
//Execute test
Gtk::Button *BtnSimpleTest;
Gtk::CheckButton *CheckBtnEop;
Gtk::CheckButton *CheckBtnEep;
Gtk::CheckButton *CheckBtnTimeCode;
 
//Generate data
Gtk::Button *BtnGenerationDataVerilog;
Gtk::CheckButton *CheckBtnEopGenVerilog;
Gtk::CheckButton *CheckBtnEepGenVerilog;
Gtk::CheckButton *CheckBtnTimeCodeGenVerilog;
 
Gtk::Button *BtnTxFrequency;
Gtk::Entry *EntryFrequency;
 
Gtk::Button *BtnChangeFrequencyVerilog;
Gtk::Entry *EntryFrequencyVerilog;
 
Gtk::Button *BtnSendDataScTx;
Gtk::Button *BtnTimeCodeScTx;
Gtk::Button *BtnGenerateDataSc;
 
Gtk::CheckButton *CheckBtnEepGenSystemC;
Gtk::CheckButton *CheckBtnEopGenSystemC;
 
 
Gtk::Label *lblStatus;
 
 
sc_TOP_SPW *sn_top;
 
extern "C" Control_SC* create_object()
{
return new Control_SC;
}
 
extern "C" void destroy_object( Control_SC* object )
{
delete object;
}
 
/*GTKMM CONTROL*/
void on_BtnFinsihSimulation_clicked()
{
cout<< "End Simulation" <<endl;
Gtk::Main::quit();
finish = 1;
REC_TX_SPW->endsimulation();
REC_TX_SPWSC->endsimulation();
}
 
void on_BtnLinkEnable_clicked()
{
link_start = !link_start;
}
 
void on_BtnLinkDisable_clicked()
{
link_disable = !link_disable;
}
 
void on_BtnAutoStart_clicked()
{
auto_start = !auto_start;
}
 
void on_BtnReset_clicked()
{
global_reset = !global_reset;
}
 
 
void on_BtnSpaceWireVerilog_clicked()
{
 
 
if(!CheckbtnLinkEnable->get_active())
{
verilog_link_start = false;
lblStatus->set_text("LINKENABLE VERILOG IS OFF");
}
 
if(!CheckbtnAutoStart->get_active())
{
verilog_auto_start = false;
lblStatus->set_text("AUTOSTART VERILOG IS OFF");
}
 
if(!CheckbtnLinkDisable->get_active())
{
verilog_link_disable = false;
lblStatus->set_text("AUTOSTART VERILOG IS OFF");
}
 
if(CheckbtnLinkEnable->get_active())
{
verilog_link_start = true;
lblStatus->set_text("LINKENABLE VERILOG IS ON");
}
 
if(CheckbtnAutoStart->get_active())
{
verilog_auto_start = true;
lblStatus->set_text("AUTOSTART VERILOG IS ON");
}
 
if(CheckbtnLinkDisable->get_active())
{
verilog_link_disable = true;
lblStatus->set_text("LINKDISABLE VERILOG IS ON");
}
 
}
 
 
void on_BtnSimpleTest_clicked()
{
 
if(CheckBtnEopGenVerilog->get_active())
{
start_send_data_verilog = true;
}
else
{
start_send_data_verilog = false;
}
 
if(CheckBtnTimeCodeGenVerilog->get_active())
{
enable_time_code_verilog = true;
}
else
{
enable_time_code_verilog = false;
}
 
/*
data_generated.clear();
data_iteration=0;
data_iteration_vlog=0;
if(CheckBtnEop->get_active())
{
for(int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate(8,8) = 1;
intermediate(7,0) = 0;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate(7,0) = data_in(rd);
intermediate(8,8) = 0;
}
data_generated.push_back(intermediate);
}
start_send_data_verilog = true;
}else if(CheckBtnEep->get_active())
{
for(int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate(8,8) = 1;
intermediate(7,0) = 1;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate(7,0) = data_in(rd);
intermediate(8,8) = 0;
}
data_generated.push_back(intermediate);
}
intermediate(7,0) = 1;
intermediate(8,8) = 1;
data_generated[nchar(rd)] = intermediate;
start_send_data_verilog = true;
}
 
if(CheckBtnTimeCode->get_active())
{
enable_time_code_verilog = true;
}
*/
 
 
}
 
void on_BtnGenerationDataVerilog_clicked()
{
data_generated_verilog.clear();
data_iteration=0;
data_iteration_vlog=0;
if(CheckBtnEopGenVerilog->get_active())
{
for(unsigned int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate_verilog(8,8) = 1;
intermediate_verilog(7,0) = 0;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate_verilog(7,0) = data_in(rd);
intermediate_verilog(8,8) = 0;
}
data_generated_verilog.push_back(intermediate_verilog);
}
}else if(CheckBtnEepGenVerilog->get_active())
{
for(unsigned int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate_verilog(8,8) = 1;
intermediate_verilog(7,0) = 1;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate_verilog(7,0) = data_in(rd);
intermediate_verilog(8,8) = 0;
}
data_generated_verilog.push_back(intermediate_verilog);
}
intermediate_verilog(7,0) = 1;
intermediate_verilog(8,8) = 1;
data_generated_verilog[nchar(rd)] = intermediate_verilog;
}
}
 
void on_BtnTxFrequency_clicked()
{
 
string aux = EntryFrequency->get_text();
switch(atoi(aux.c_str()))
{
case 2:
sn_top->CLOCK_GEN = 1;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 2MHz");
break;
case 10:
sn_top->CLOCK_GEN = 2;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 10MHz");
break;
case 20:
sn_top->CLOCK_GEN = 4;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 20MHz");
break;
case 50:
sn_top->CLOCK_GEN = 8;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 50MHz");
break;
case 100:
sn_top->CLOCK_GEN = 16;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 100MHz");
break;
case 150:
sn_top->CLOCK_GEN = 32;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 150MHz");
break;
case 200:
sn_top->CLOCK_GEN = 64;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 200MHz");
break;
case 201:
sn_top->CLOCK_GEN = 128;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 201MHz");
break;
case 250:
sn_top->CLOCK_GEN = 256;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 250MHz");
break;
case 280:
sn_top->CLOCK_GEN = 512;
lblStatus->set_text("TX CLOCK SYSTEMC SET IN 280MHz");
break;
}
 
}
 
void on_BtnTimeCodeScTx_clicked()
{
start_tick_data = !start_tick_data;
if(start_tick_data)
{lblStatus->set_text("TIME CODE ENABLED ON TX SYSTEMC");}
else
{lblStatus->set_text("TIME CODE DISABLED ON TX SYSTEMC");}
}
 
void on_BtnSendDataScTx_clicked()
{
start_send_data = !start_send_data;
if(start_send_data)
{lblStatus->set_text("SEND DATA ENABLED TX SYSTEMC");}
else
{lblStatus->set_text("SEND DATA DISABLED TX SYSTEMC");}
}
 
void on_BtnGenerateDataSc_clicked()
{
data_generated_sc.clear();
data_iteration_sc_aux=0;
data_iteration_sc=0;
if(CheckBtnEopGenSystemC->get_active())
{
for(unsigned int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate_sc(8,8) = 1;
intermediate_sc(7,0) = 0;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate_sc(7,0) = data_in(rd);
intermediate_sc(8,8) = 0;
}
data_generated_sc.push_back(intermediate_sc);
}
}else if(CheckBtnEepGenSystemC->get_active())
{
for(unsigned int cnt_max_data = 0; cnt_max_data <= max_data;cnt_max_data++)
{
if(cnt_max_data == 0 || cnt_max_data == max_data)
{
intermediate_sc(8,8) = 1;
intermediate_sc(7,0) = 1;
}else if(cnt_max_data > 0 && cnt_max_data < max_data)
{
intermediate_sc(7,0) = data_in(rd);
intermediate_sc(8,8) = 0;
}
data_generated_sc.push_back(intermediate_sc);
}
intermediate_sc(7,0) = 1;
intermediate_sc(8,8) = 1;
data_generated_sc[nchar(rd)] = intermediate_sc;
}
}
 
 
void on_BtnChangeFrequencyVerilog_clicked()
{
string aux = EntryFrequencyVerilog->get_text();
 
switch(atoi(aux.c_str()))
{
case 2:
frquency_nano_second = 500;
break;
case 10:
frquency_nano_second = 100;
break;
case 20:
frquency_nano_second = 50;
break;
case 50:
frquency_nano_second = 20;
break;
case 100:
frquency_nano_second = 10;
break;
case 150:
frquency_nano_second = 7;
break;
case 200:
frquency_nano_second = 5;
break;
case 201:
frquency_nano_second = 4;
break;
case 250:
frquency_nano_second = 4;
break;
case 280:
frquency_nano_second = 3;
break;
default:
frquency_nano_second = 500;
break;
}
}
 
void thread_gtkmm_run()
{
//GRAPHICAL INTERFACE
Main Application(true);
builder = Gtk::Builder::create_from_file("SpaceWrireTestSuit.glade");
 
builder->get_widget("SpaceWireTestStress", window);
builder->get_widget("BtnFinsihSimulation", BtnFinsihSimulation);
builder->get_widget("BtnLinkEnable", BtnLinkEnable);
builder->get_widget("BtnLinkDisable", BtnLinkDisable);
builder->get_widget("BtnAutoStart", BtnAutoStart);
builder->get_widget("BtnReset", BtnReset);
 
builder->get_widget("BtnSpaceWireVerilog", BtnSpaceWireVerilog);
builder->get_widget("CheckbtnLinkDisable", CheckbtnLinkDisable);
builder->get_widget("CheckbtnAutoStart", CheckbtnAutoStart);
builder->get_widget("CheckbtnLinkEnable", CheckbtnLinkEnable);
 
builder->get_widget("BtnGenerationDataVerilog", BtnGenerationDataVerilog);
builder->get_widget("BtnSimpleTest", BtnSimpleTest);
builder->get_widget("CheckBtnEopGenVerilog", CheckBtnEopGenVerilog);
builder->get_widget("CheckBtnEepGenVerilog", CheckBtnEepGenVerilog);
builder->get_widget("CheckBtnTimeCodeGenVerilog", CheckBtnTimeCodeGenVerilog);
 
builder->get_widget("BtnChangeFrequencyVerilog", BtnChangeFrequencyVerilog);
builder->get_widget("EntryFrequencyVerilog", EntryFrequencyVerilog);
 
builder->get_widget("BtnTxFrequency", BtnTxFrequency);
builder->get_widget("EntryFrequency", EntryFrequency);
 
builder->get_widget("BtnSendDataScTx", BtnSendDataScTx);
builder->get_widget("BtnTimeCodeScTx", BtnTimeCodeScTx);
builder->get_widget("BtnGenerateDataSc", BtnGenerateDataSc);
builder->get_widget("CheckBtnEepGenSystemC", CheckBtnEepGenSystemC);
builder->get_widget("CheckBtnEopGenSystemC", CheckBtnEopGenSystemC);
 
builder->get_widget("lblStatus",lblStatus);
 
BtnFinsihSimulation->signal_clicked().connect(sigc::ptr_fun(&on_BtnFinsihSimulation_clicked));
BtnLinkEnable->signal_clicked().connect(sigc::ptr_fun(&on_BtnLinkEnable_clicked));
BtnLinkDisable->signal_clicked().connect(sigc::ptr_fun(&on_BtnLinkDisable_clicked));
BtnAutoStart->signal_clicked().connect(sigc::ptr_fun(&on_BtnAutoStart_clicked));
BtnReset->signal_clicked().connect(sigc::ptr_fun(&on_BtnReset_clicked));
 
BtnSpaceWireVerilog->signal_clicked().connect(sigc::ptr_fun(&on_BtnSpaceWireVerilog_clicked));
 
BtnSimpleTest->signal_clicked().connect(sigc::ptr_fun(&on_BtnSimpleTest_clicked));
 
BtnChangeFrequencyVerilog->signal_clicked().connect(sigc::ptr_fun(&on_BtnChangeFrequencyVerilog_clicked));
 
BtnGenerationDataVerilog->signal_clicked().connect(sigc::ptr_fun(&on_BtnGenerationDataVerilog_clicked));
 
BtnTxFrequency->signal_clicked().connect(sigc::ptr_fun(&on_BtnTxFrequency_clicked));
 
BtnSendDataScTx->signal_clicked().connect(sigc::ptr_fun(&on_BtnSendDataScTx_clicked));
BtnTimeCodeScTx->signal_clicked().connect(sigc::ptr_fun(&on_BtnTimeCodeScTx_clicked));
BtnGenerateDataSc->signal_clicked().connect(sigc::ptr_fun(&on_BtnGenerateDataSc_clicked));
 
window->set_title("GLADIC SPACEWIRE TEST TOOL");
 
Application.run(*window);
}
 
Control_SC::Control_SC()
{
clock_systemc = 2;
sn_top = new sc_TOP_SPW("sc_TOP_SPW");
boost::thread workerThreadGTKMM(thread_gtkmm_run);
 
data_col_store.push_back("CONTROL TYPE");
data_col_store.push_back("NUMBER GENERATED");
data_col_store.push_back("NUMBER RECEIVED");
data_col_store.push_back("COMPARE");
data_col_store.push_back("TIME STAMP");
REC_TX_SPW = new data_recorder("test_suit_vlog_sc.html",data_col_store,"test_suit_vlog_sc.html","TX VERILOG 2 RX SYSTEMC");
REC_TX_SPW->initialize();
COMPARE_SPW = new data_check();
data_col_store.clear();
 
data_col_store0.push_back("CONTROL TYPE");
data_col_store0.push_back("NUMBER GENERATED");
data_col_store0.push_back("NUMBER RECEIVED");
data_col_store0.push_back("COMPARE");
data_col_store0.push_back("TIME STAMP");
REC_TX_SPWSC = new data_recorder("test_suit_sc_vlog.html",data_col_store0,"test_suit_sc_vlog.html","TX SYSTEMC 2 RX VERILOG");
COMPARE_SPW_RX = new data_check();
REC_TX_SPWSC->initialize();
data_col_store0.clear();
}
 
void Control_SC::init()
{
 
sn_top->RESET = true;
 
sn_top->LINK_DISABLE = false;
sn_top->LINK_START = false;
sn_top->AUTO_START = false;
 
sn_top->E_SEND_DATA = false;
 
sn_top->CLOCK_GEN = 1;
frquency_nano_second = 500;
//sn_top->TICKIN_TX = false;
//sn_top->TIMEIN_CONTROL_FLAG_TX = 0;
 
//sn_top->TXWRITE_TX = false;
//sn_top->TXDATA_FLAGCTRL_TX = 0;
}
 
void autostart()
{
if(auto_start)
{
sn_top->AUTO_START = true;
//lblStatus->set_text("AUTOSTART ENABLED ON TX SYSTEMC");
}
else
{
sn_top->AUTO_START = false;
//lblStatus->set_text("AUTOSTART DISABLED ON TX SYSTEMC");
}
}
 
void linkstart()
{
if(link_start)
{
sn_top->LINK_START = true;
//lblStatus->set_text("LINKSTART ENABLED ON TX SYSTEMC");
}
else
{
sn_top->LINK_START = false;
//lblStatus->set_text("LINKSTART DISABLED ON TX SYSTEMC");
}
}
 
void linkdisable()
{
if(link_disable)
{
sn_top->LINK_DISABLE = true;
//lblStatus->set_text("LINKDISABLE ENABLED ON TX SYSTEMC");
}
else
{
sn_top->LINK_DISABLE = false;
//lblStatus->set_text("LINKDISABLE DISABLED ON TX SYSTEMC");
}
}
 
void send_data_tx_sc()
{
if(start_send_data)
{
sn_top->E_SEND_DATA = true;
}
else
{
sn_top->E_SEND_DATA = false;
}
 
}
 
void Control_SC::run_sim()
{
 
autostart();
linkstart();
linkdisable();
send_data_tx_sc();
 
sc_start(clock_systemc,SC_NS);
 
}
 
/* END OF SIMULATION */
void Control_SC::stop_sim()
{
sc_stop();
}
 
/* RESET HIGH */
bool Control_SC::reset_set()
{
 
if(global_reset)
{
sn_top->RESET = false;
}else
{
sn_top->RESET = true;
}
 
return sn_top->RESET;
}
 
unsigned int Control_SC::get_value_dout()
{
return sn_top->DOUT.read();
}
 
unsigned int Control_SC::get_value_sout()
{
return sn_top->SOUT.read();
}
 
void Control_SC::set_rx_sin(unsigned int strobe)
{
sn_top->SIN = strobe;
}
 
void Control_SC::set_rx_din(unsigned int data)
{
sn_top->DIN = data;
}
 
unsigned int Control_SC::get_spw_fsm()
{
return sn_top->FSM_SPW_OUT.read();
}
 
unsigned int Control_SC::finish_simulation()
{
return finish;
}
 
//verilog variables
bool Control_SC::verilog_linkenable()
{
return verilog_link_start;
}
 
bool Control_SC::verilog_autostart()
{
return verilog_auto_start;
}
 
bool Control_SC::verilog_linkdisable()
{
return verilog_link_disable;
}
 
float Control_SC::verilog_frequency()
{
return frquency_nano_second;
}
 
//Test verilog
bool Control_SC::start_tx_test()
{
return start_send_data_verilog;
}
 
bool Control_SC::enable_time_code_tx_test()
{
return enable_time_code_verilog;
}
 
void Control_SC::end_tx_test()
{
start_send_data_verilog = enable_time_code_verilog = false;
}
 
int Control_SC::size_data_test()
{
return data_generated_verilog.size()-1;
}
 
unsigned int Control_SC::take_data(unsigned int a)
{
intermediate = data_generated_verilog[a];
return intermediate(8,0);
}
 
void Control_SC::data_o(unsigned int data, unsigned int pos)
{
sc_uint<9> intermediate = data;
 
data_col_store0.clear();
if(data_iteration_sc <= data_generated_sc.size()-1)
{
data_col_store0.push_back("DATA");
 
intermediate_sc=data_generated_sc[pos];
data_col_store0.push_back(intermediate_sc.to_string(SC_HEX));
 
data_col_store0.push_back(intermediate.to_string(SC_HEX));
 
data_col_store0.push_back(" ");
COMPARE_SPW_RX->compare_test(&data_col_store0);
 
data_col_store0.push_back(sc_time_stamp().to_string());
REC_TX_SPWSC->storedata(data_col_store0);
data_iteration_sc++;
}else
{
data_iteration_sc = 0;
}
}
 
unsigned int Control_SC::clock_tx()
{
return sn_top->DUT.CLOCK_TX_OUT.read();
}
 
/systemC/rx_spw.h
0,0 → 1,695
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
 
#ifndef SPW_RX_H
#define SPW_RX_H
 
#define STATE_RESET 0
#define STATE_ENABLED 1
#define STATE_GOT_BIT 2
#define STATE_GOT_NULL 3
 
#define ESC 0
#define FCT 1
#define EOP 2
#define EEP 3
#define DATA 4
#define TIME_CODE 5
 
class SPW_RX_SC;
 
SC_MODULE(SPW_RX_SC)
{
 
sc_in<bool> RX_CLOCK;
sc_in<uint> DIN;
sc_in<uint> SIN;
 
sc_in<bool> CLOCK_SYS;
 
sc_in<bool> ENABLE_RX;
sc_in<bool> RESET_RX;
 
sc_out<bool> RX_ERROR;
sc_out<bool> RX_CREDIT_ERROR;
sc_out<bool> GOT_BIT;
sc_out<bool> GOT_NULL;
sc_out<bool> GOT_NCHAR;
sc_out<bool> GOT_TIME_CODE;
sc_out<bool> GOT_FCT;
 
sc_out<bool> SEND_FCT_NOW_RX;
 
sc_in<bool> BUFFER_READY;
sc_out<sc_uint<9> > DATARX_FLAG;
sc_out<bool> BUFFER_WRITE;
 
sc_out<sc_uint<8> > TIME_OUT;
sc_out<bool> TICK_OUT;
sc_out<bool> CONTROL_FLAG_OUT;
 
//INTERNAL
sc_uint<4> state_rx;
 
sc_uint<4> control;
sc_uint<10> data;
sc_uint<10> timecode;
 
sc_uint<4> control_sys =4;
sc_uint<4> last_control_sys =4;
 
sc_uint<10> data_sys;
sc_uint<10> last_data;
 
sc_uint<10> timecode_sys;
sc_uint<10> last_timecode;
 
sc_signal<bool> tag_found;
 
unsigned int counter = 0;
unsigned int counter_fct = 0;
unsigned int counter_received_data = 0;
bool enable_bit;
bool first_time;
 
bool connected = false;
 
int cycles=0;
 
bool control_found;
bool data_found;
bool time_code_found;
 
 
bool NULL_FOUND;
bool FCT_FOUND;
bool DATA_FOUND;
bool TIMECODE_FOUND;
 
bool control_parity_error;
bool data_parity_error;
bool time_code_parity_error;
bool invalid_combination;
 
vector<sc_uint<9> > data_store;
vector<sc_uint<9> > time_code;
 
unsigned int last_char;
 
void CalcPARITY()
{
control_parity_error = false;
data_parity_error = false;
time_code_parity_error = false;
if(last_char == ESC || last_char == FCT || last_char == EOP || last_char == EEP)
{
if(control_found)
{
if(!(control_sys[2]^last_control_sys[0]^last_control_sys[1]) != control_sys[3])
{
control_parity_error = true;
}
}else if(data_found)
{
if(!(data_sys[8]^last_control_sys[0]^last_control_sys[1]) != data_sys[9])
{
data_parity_error = true;
}
}else if(time_code_found)
{
if(!(timecode_sys[8]^last_control_sys[0]^last_control_sys[1]) != timecode_sys[9])
{
time_code_parity_error = true;
}
}
}else if(last_char == DATA)
{
if(control_found)
{
if(!(data_sys[8]^last_control_sys[0]^last_control_sys[1]) != data_sys[9])
{
control_parity_error = true;
}
}else if(data_found)
{
if(!(data_sys[8]^last_data[0]^last_data[1]^last_data[2]^last_data[3]^last_data[4]^last_data[5]^last_data[6]^last_data[7]) != data_sys[9])
{
data_parity_error = true;
}
}else if(time_code_found)
{
if(!(data_sys[8]^timecode_sys[0]^timecode_sys[1]^timecode_sys[2]^timecode_sys[3]^timecode_sys[4]^timecode_sys[5]^timecode_sys[6]^timecode_sys[7]) != data_sys[9])
{
time_code_parity_error = true;
}
}
}else if(last_char == TIME_CODE)
{
if(control_found)
{
if(!(timecode_sys[8]^last_control_sys[0]^last_control_sys[1]) != timecode_sys[9])
{
control_parity_error = true;
}
}/*else if(data_found)
{
if(!(timecode[8]^data_sys[0]^data_sys[1]^data_sys[2]^data_sys[3]^data_sys[4])^data_sys[5]^data_sys[6]^data_sys[7] != timecode[9])
{
data_parity_error = true;
}
}else if(time_code_found)
{
if(!(timecode[8]^timecode_sys[0]^timecode_sys[1]^timecode_sys[2]^timecode_sys[3]^timecode_sys[4]^timecode_sys[5]^timecode_sys[6]^timecode_sys[7]) != timecode[9])
{
time_code_parity_error = true;
}
}*/
}
}
 
void gotFCT()
{
while(1)
{
if(!ENABLE_RX)
{
RX_CREDIT_ERROR = false;
counter_fct = 1;
}else
{
if(counter_fct*8 > 56)
{
RX_CREDIT_ERROR = true;
wait(1);
RX_CREDIT_ERROR = false;
}
}
wait(1);
}
}
 
void UPDATE_FCT()
{
while(1)
{
if(!ENABLE_RX)
{
SEND_FCT_NOW_RX = false;
counter_received_data = 0;
}else if(counter_received_data >= 64)
{
SEND_FCT_NOW_RX = true;
counter_received_data = 0;
}else { SEND_FCT_NOW_RX = false;}
wait(1);
}
}
 
 
void TIMER_ADTER850()
{
if(GOT_BIT)
{
cycles=0;
}
}
 
void TIMER_850COUNTER()
{
if(!ENABLE_RX)
{
RX_ERROR = false;
control_parity_error = false;
data_parity_error = false;
time_code_parity_error = false;
invalid_combination = false;
cycles = 0;
}
else
{
//if(GOT_BIT)
//{
if(cycles == 43 || control_parity_error || data_parity_error || time_code_parity_error || invalid_combination)
{
//RX_ERROR = true;
#ifdef RX_ERROR_ENABLE
cout << "ERROR RX ENABLE" << endl;
cout << control_parity_error << endl;
cout << data_parity_error << endl;
cout << time_code_parity_error << endl;
cout << invalid_combination << endl;
#endif
}
else
{
RX_ERROR = false;
cycles++;
}
//}
}
}
 
 
void RX_GET_SIGNAL()
{
 
if( NULL_FOUND )
{
GOT_NULL = true;
GOT_FCT = false;
GOT_NCHAR = false;
}else if( FCT_FOUND )
{
GOT_FCT = true;
GOT_NULL = false;
GOT_NCHAR = false;
}else if( DATA_FOUND )
{
GOT_NCHAR = true;
GOT_FCT = false;
GOT_NULL = false;
}else if( TIMECODE_FOUND )
{
GOT_TIME_CODE = true;
GOT_NCHAR = false;
GOT_FCT = false;
GOT_NULL = false;
}
 
}
 
void RX_RECEIVER()
{
GOT_BIT = true;
NULL_FOUND = false;
FCT_FOUND = false;
DATA_FOUND = false;
TIMECODE_FOUND = false;
data_col_store.clear();
 
if(!connected)
{
if(counter == 0)
{
timecode(0,0) = data(9,9) = control(3,3) = DIN;
counter++;
}
else if(counter == 1)
{
timecode(1,1) = data(8,8) = control(2,2) = DIN;
counter++;
}
else if(counter == 2)
{
timecode(2,2) = data(0,0) = control(1,1) = DIN;
counter++;
}else if(counter == 3)
{
data_col_store.clear();
 
timecode(3,3) = data(1,1) = control(0,0) = DIN;
 
counter = 0;
 
if(last_control_sys(2,0) == 7 && control(2,0) == 4)
{
control_found = true;
NULL_FOUND = true;
FCT_FOUND = false;
DATA_FOUND = false;
last_char = ESC;
 
data_col_store.push_back("NULL");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
 
}else if(last_control_sys(2,0) != 7 && control(2,0) == 4)
{
last_char = FCT;
counter_fct++;
FCT_FOUND = true;
connected = true;
NULL_FOUND = false;
 
data_col_store.push_back("FCT");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
 
}else if(last_control_sys(2,0) == 4 && control(2,0) == 7)
{
last_char = ESC;
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
}else
{
invalid_combination = true;
connected = false;
//cout << last_control_sys(2,0) << control_sys(2,0) << endl;
data_col_store.push_back("INVALID CONNECTION");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
}
last_control_sys = control;
//control_sys = control;
 
}
}
else
{
if(counter == 0)
{
timecode(9,9) = data(9,9) = control(3,3) = DIN;
counter++;
}
else if(counter == 1)
{
timecode(8,8) = data(8,8) = control(2,2) = DIN;
counter++;
}
else if(counter == 2)
{
timecode(0,0) = data(0,0) = control(1,1) = DIN;
counter++;
}else if(counter == 3)
{
timecode(1,1) = data(1,1) = control(0,0) = DIN;
if(control(2,2) == 1)
{
control_found = true;
counter = 0;
if(last_control_sys(2,0) == 7 && control(2,0) == 4)
{
data_col_store.clear();
 
control_found = true;
NULL_FOUND = true;
FCT_FOUND = false;
DATA_FOUND = false;
last_char = ESC;
 
data_col_store.push_back("NULL");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
 
}else if(last_control_sys(2,0) != 7 && control(2,0) == 4)
{
data_col_store.clear();
 
last_char = FCT;
counter_fct++;
 
FCT_FOUND = true;
NULL_FOUND = false;
DATA_FOUND = false;
 
data_col_store.push_back("FCT");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
}else if(last_control_sys(2,0) != 7 && control(2,0) == 5)
{
data_col_store.clear();
 
last_char = EOP;
data_col_store.push_back("EOP");
 
FCT_FOUND = false;
NULL_FOUND = false;
DATA_FOUND = true;
 
intermediate_data = data_generated_verilog[data_iteration];
data_col_store.push_back(intermediate_data.to_string(SC_HEX));
 
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" ");
COMPARE_SPW->compare_test(&data_col_store);
data_iteration++;
 
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
if(counter_fct > 0)
{
counter_fct = counter_fct - 1;
}
 
counter_received_data = counter_received_data + 8;
}else if(last_control_sys(2,0) != 7 && control(2,0) == 6)
{
 
data_col_store.clear();
 
last_char = EEP;
 
FCT_FOUND = false;
NULL_FOUND = false;
DATA_FOUND = true;
 
data_col_store.push_back("EEP");
intermediate_data = data_generated_verilog[data_iteration];
data_col_store.push_back(intermediate_data.to_string(SC_HEX));
 
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control(2,0).to_string());
data_col_store.push_back(" ");
COMPARE_SPW->compare_test(&data_col_store);
data_iteration++;
 
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
 
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
 
counter_received_data = counter_received_data + 8;
}else if((last_control_sys(2,0) == 0 || last_control_sys(2,0) == 6) && control(2,0) == 7)
{
last_char = ESC;
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
}else if(last_control_sys(2,0) == 4 && control(2,0) == 7)
{
last_char = ESC;
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
}else if(last_control_sys(2,0) == 5 && control(2,0) == 7)
{
last_char = ESC;
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
}else
{
data_col_store.clear();
 
invalid_combination = true;
connected = false;
//cout << last_control_sys(2,0) << control_sys(2,0) << endl;
data_col_store.push_back("INVALID CONNECTION");
data_col_store.push_back(" - ");
data_col_store.push_back(last_control_sys(2,0).to_string(SC_HEX) + control_sys(2,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
}
last_control_sys = control;
 
 
}
else
{
counter++;
}
 
//cout << control.to_string(SC_HEX) << endl;
}else if(counter == 4)
{
timecode(2,2) = data(2,2) = DIN;
counter++;
}else if(counter == 5)
{
timecode(3,3) = data(3,3) = DIN;
counter++;
}else if(counter == 6)
{
timecode(4,4) = data(4,4) = DIN;
counter++;
}else if(counter == 7)
{
timecode(5,5) = data(5,5) = DIN;
counter++;
}else if(counter == 8)
{
timecode(6,6) = data(6,6) = DIN;
counter++;
}else if(counter == 9)
{
timecode(7,7) = data(7,7) = DIN;
if(data(8,8) == 0 && last_control_sys(2,0) != 7)
{
data_col_store.clear();
 
data_found = true;
FCT_FOUND = false;
NULL_FOUND = false;
DATA_FOUND = true;
//data_store.push_back(data);
last_char = DATA;
 
control_sys = 0;
last_control_sys =0;
 
data_col_store.push_back("DATA");
 
intermediate_data = data_generated_verilog[data_iteration];
data_col_store.push_back(intermediate_data.to_string(SC_HEX));
 
data_col_store.push_back(data(8,0).to_string(SC_HEX));
data_col_store.push_back(" ");
COMPARE_SPW->compare_test(&data_col_store);
 
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
counter_received_data = counter_received_data + 8;
 
data_iteration++;
last_data = data;
 
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
 
 
}else if(data(8,8) == 0 && last_control_sys(2,0) == 7)
{
FCT_FOUND = false;
NULL_FOUND = false;
DATA_FOUND = false;
TIMECODE_FOUND = true;
 
time_code_found = true;
timecode_sys = timecode;
time_code_found = false;
last_char = TIME_CODE;
control_sys = 0;
last_control_sys =0;
data_col_store.push_back("TIMECODE");
data_col_store.push_back(" - ");
data_col_store.push_back(timecode_sys(7,0).to_string());
data_col_store.push_back(" - ");
data_col_store.push_back(sc_time_stamp().to_string());
REC_TX_SPW->storedata(data_col_store);
last_timecode = timecode_sys;
 
if(counter_fct > 0)
{
counter_fct = counter_fct -1;
}
}
counter = 0;
}
}
 
}
 
SC_CTOR(SPW_RX_SC)
{
SC_CTHREAD(gotFCT,CLOCK_SYS.pos());
 
SC_CTHREAD(UPDATE_FCT,CLOCK_SYS.pos());
 
SC_METHOD(TIMER_ADTER850);
sensitive << RX_CLOCK.pos() << RX_CLOCK.neg();
dont_initialize();
 
SC_METHOD(TIMER_850COUNTER);
sensitive << CLOCK_SYS.pos();
dont_initialize();
 
SC_METHOD(CalcPARITY);
sensitive << RX_CLOCK.pos() << RX_CLOCK.neg();
dont_initialize();
 
SC_METHOD(RX_RECEIVER);
sensitive << RX_CLOCK.pos() << RX_CLOCK.neg();
dont_initialize();
 
SC_METHOD(RX_GET_SIGNAL);
sensitive << RX_CLOCK.pos() << RX_CLOCK.neg();
dont_initialize();
 
}
};
#endif
/systemC/rx_spw_clock_recovery.h
0,0 → 1,57
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
 
#ifndef SPW_RX_CLOCK_RECOVERY_H
#define SPW_RX_CLOCK_RECOVERY_H
 
class SPW_RX_CLOCK_RECOVERY_SC;
 
SC_MODULE(SPW_RX_CLOCK_RECOVERY_SC)
{
sc_in<uint> DIN_REC;
sc_in<uint> SIN_REC;
 
sc_out<bool> RX_CLOCK_OUT;
 
void RX_CLOCK_XOR()
{
RX_CLOCK_OUT = DIN_REC ^ SIN_REC;
}
 
SC_CTOR(SPW_RX_CLOCK_RECOVERY_SC)
{
SC_METHOD(RX_CLOCK_XOR);
sensitive << DIN_REC << SIN_REC;
}
};
#endif
/systemC/send_module_sc.h
0,0 → 1,143
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
 
#ifndef SPW_TX_SEND
#define SPW_TX_SEND
 
class SPW_TX_SEND_DATA;
 
SC_MODULE(SPW_TX_SEND_DATA)
{
sc_in<bool> CLOCK_SEND_DATA;
sc_in<bool> RESET_SEND_DATA;
sc_in<bool> E_SEND_DATA;
 
sc_out<bool> TICKIN_TX_SEND_DATA;
sc_out<sc_uint<8> > TIMEIN_CONTROL_FLAG_TX_SEND_DATA;
 
sc_out<bool> TXWRITE_TX_SEND_DATA;
sc_out<sc_uint<9> > TXDATA_FLAGCTRL_TX_SEND_DATA;
 
sc_in<bool> READY_TX_SEND_DATA;
sc_in<bool> READY_TICK_DATA;
 
sc_uint<9> data_send;
 
int a = 0;
int c = 0;
 
void SEND_DATA()
{
if(!RESET_SEND_DATA)
{
TXWRITE_TX_SEND_DATA = false;
a=0;
}
else
{
if(E_SEND_DATA && data_generated_sc.size() > 0)
{
if(a < data_generated_sc.size()-(unsigned int)1)
{
data_send = data_generated_sc[a];
if(!READY_TX_SEND_DATA)
{
TXWRITE_TX_SEND_DATA = true;
}else
{
TXWRITE_TX_SEND_DATA = false;
TXDATA_FLAGCTRL_TX_SEND_DATA= data_send;
}
}
//cout << TXDATA_FLAGCTRL_TX_SEND_DATA.read().to_string(SC_HEX) << " " << READY_TX_SEND_DATA << " " << TXWRITE_TX_SEND_DATA << endl;
}
}
}
 
 
void INCREMMENT_DATA()
{
if(a < data_generated_sc.size()-(unsigned int)1)
a++;
else
a=0;
}
 
void SEND_TIME_CODE()
{
if(!RESET_SEND_DATA)
{
TICKIN_TX_SEND_DATA = false;
TIMEIN_CONTROL_FLAG_TX_SEND_DATA = 0;
c=0;
}
else
{
if(start_tick_data)
{
if( c < 256)
{
 
if(!READY_TICK_DATA)
{
TICKIN_TX_SEND_DATA = true;
}
else
{
TICKIN_TX_SEND_DATA = false;
c++;
TIMEIN_CONTROL_FLAG_TX_SEND_DATA = TIMEIN_CONTROL_FLAG_TX_SEND_DATA.read() +1;
}
}
else
{
c=0;
TIMEIN_CONTROL_FLAG_TX_SEND_DATA = 0;
}
}
}
}
SC_CTOR(SPW_TX_SEND_DATA)
{
SC_METHOD(SEND_DATA);
sensitive << CLOCK_SEND_DATA;
SC_METHOD(INCREMMENT_DATA);
sensitive << READY_TX_SEND_DATA.pos();
SC_METHOD(SEND_TIME_CODE);
sensitive << CLOCK_SEND_DATA.pos();
}
};
#endif
/systemC/spw_fsm.h
0,0 → 1,268
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
#ifndef SPW_FSM_T_H
#define SPW_FSM_T_H
 
#include <systemc.h>
 
#define ERROR_RESET 0
#define ERROR_WAIT 1
#define READY 2
#define STARTED 3
#define CONNECTING 4
#define RUN 5
 
class SPW_FSM_SC;
 
SC_MODULE(SPW_FSM_SC)
{
 
/*FSM signal*/
sc_in<bool> CLOCK;
sc_in<bool> RESET;
sc_in<bool> LINK_START;
sc_in<bool> LINK_DISABLE;
sc_in<bool> AUTO_START;
sc_out<sc_uint<4> > FSM_SPW_OUT;
 
/*Signal come from RX Receiver*/
sc_in<bool> GOT_FCT_RX;
sc_in<bool> GOT_TIMECODE_RX;
sc_in<bool> GOTNCHAR_RX;
sc_in<bool> GOTNULL_RX;
sc_in<bool> GOTBIT_RX;
sc_in<bool> CREDITERROR_RX;
sc_in<bool> RXERROR_RX;
sc_out<bool> ENABLE_RX;
 
/*Signal come from TX Transmit*/
sc_out<bool> ENABLE_TX;
sc_out<bool> SEND_NULL_TX;
sc_out<bool> SEND_FCT_TX;
sc_out<bool> SEND_NCHAR_TX;
sc_out<bool> SEND_TIMECODE_TX;
/*RESET TX / RX*/
sc_out<bool> RESET_TX;
sc_out<bool> RESET_RX;
 
bool After128;
 
bool After64;
 
sc_uint<4> state_fsm_spw;
 
void FSM()
{
 
//cout << "STARTING FSM SPW SC" << endl;
while(1)
{
 
if(!RESET)
{
FSM_SPW_OUT = state_fsm_spw = ERROR_RESET;
ENABLE_TX = false;
SEND_NULL_TX = false;
SEND_FCT_TX = false;
SEND_NCHAR_TX = false;
SEND_TIMECODE_TX= false;
RESET_TX = true;
RESET_RX = true;
}else
{
FSM_SPW_OUT = state_fsm_spw;
 
switch(state_fsm_spw)
{
case ERROR_RESET:
RESET_TX = true;
RESET_RX = true;
ENABLE_TX = false;
ENABLE_RX = false;
if(After64 == true)
{
state_fsm_spw = ERROR_WAIT;
}
//cout << "ERROR RESET" << endl;
break;
case ERROR_WAIT:
RESET_TX = true;
ENABLE_TX = false;
RESET_RX = false;
ENABLE_RX = true;
 
if(After128 == true)
{
state_fsm_spw = READY;
}else if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
{
state_fsm_spw = ERROR_RESET;
}
 
//cout << "ERROR WAIT" << endl;
break;
case READY:
RESET_TX = true;
RESET_RX = false;
ENABLE_RX = true;
if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
{
state_fsm_spw = ERROR_RESET;
}
else if((!LINK_DISABLE) && (LINK_START ||(AUTO_START && GOTNULL_RX)))
{
state_fsm_spw = STARTED;
}
//cout << "READY" << endl;
break;
case STARTED:
RESET_TX = false;
RESET_RX = false;
SEND_NULL_TX = true;
ENABLE_TX = true;
ENABLE_RX = true;
 
if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
{
state_fsm_spw = ERROR_RESET;
}
else if(GOTNULL_RX && GOTBIT_RX)
{
state_fsm_spw = CONNECTING;
}
//cout << "STARTED" << endl;
break;
case CONNECTING:
 
RESET_TX = false;
RESET_RX = false;
ENABLE_TX = true;
ENABLE_RX = true;
 
SEND_NULL_TX = true;
SEND_FCT_TX = true;
 
 
if(RXERROR_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
{
state_fsm_spw = ERROR_RESET;
}else if(GOT_FCT_RX)
{
state_fsm_spw = RUN;
}
//cout << "CONNECTING" << endl;
break;
case RUN:
 
SEND_NULL_TX = true;
ENABLE_TX = true;
SEND_FCT_TX = true;
SEND_NCHAR_TX = true;
SEND_TIMECODE_TX = true;
ENABLE_RX = true;
 
if(RXERROR_RX || CREDITERROR_RX || LINK_DISABLE)
{
state_fsm_spw = ERROR_RESET;
//cout << "RX ERROR DETECTED" << endl;
}
else
{
state_fsm_spw = RUN;
}
 
//cout << "RUN" << endl;
break;
}
}
wait(1);
}
}
 
 
void TIMER_ADTER128()
{
while(1)
{
if(!RESET)
{
After128 = false;
}
else
{
if(state_fsm_spw == ERROR_WAIT || state_fsm_spw == STARTED || state_fsm_spw == CONNECTING)
{
After128 = false;
wait(639);
After128 = true;
}
}
wait(1);
}
}
 
void TIMER_ADTER64()
{
while(1)
{
if(!RESET)
{
After64 = false;
}
else
{
if(state_fsm_spw == ERROR_RESET)
{
After64 = false;
wait(319);
After64 = true;
}
}
wait(1);
}
}
 
 
SC_CTOR(SPW_FSM_SC)
{
SC_CTHREAD(FSM,CLOCK.pos());
SC_CTHREAD(TIMER_ADTER64,CLOCK.pos());
SC_CTHREAD(TIMER_ADTER128,CLOCK.pos());
}
 
};
 
#endif
/systemC/top_spw.h
0,0 → 1,222
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
#ifndef TX_RX_SC_TOP_H
#define TX_RX_SC_TOP_H
 
#include "spw_fsm.h"
 
#include "tx_spw.h"
#include "tx_clock.h"
#include "link_sc.h"
 
#include "rx_spw.h"
#include "rx_spw_clock_recovery.h"
 
#include "send_module_sc.h"
 
class sc_TOP;
 
SC_MODULE(sc_TOP)
{
 
/*FSM signal*/
sc_in<bool> CLOCK;
sc_in<bool> RESET;
sc_in<bool> LINK_START;
sc_in<bool> LINK_DISABLE;
sc_in<bool> AUTO_START;
sc_out<sc_uint<4> > FSM_SPW_OUT;
 
/*Signal come from RX Receiver*/
sc_signal<bool> GOT_FCT_RX;
sc_signal<bool> GOT_TIMECODE_RX;
sc_signal<bool> GOTNCHAR_RX;
sc_signal<bool> GOTNULL_RX;
sc_signal<bool> GOTBIT_RX;
sc_signal<bool> CREDITERROR_RX;
sc_signal<bool> RXERROR;
 
/*Signal come from TX Transmit*/
sc_signal<bool> ENABLE_TX;
sc_signal<bool> SEND_NULL_TX;
sc_signal<bool> SEND_FCT_TX;
sc_signal<bool> SEND_NCHAR_TX;
sc_signal<bool> SEND_TIME_CODE_TX;
/*RESET TX / RX*/
sc_signal<bool> RESET_TX;
 
//sc_signal<bool> GOT_FCT_TX;
//TX ONLY
sc_signal<bool> TICKIN_TX;
sc_signal<sc_uint<8> > TIMEIN_CONTROL_FLAG_TX;
 
sc_signal<bool> SEND_FCT_NOW_TOP;
sc_signal<bool> TXWRITE_TX_S;
sc_signal<sc_uint<9> > TXDATA_FLAGCTRL_TX;
 
sc_signal<bool> READY_TX;
sc_signal<bool> READY_TICK;
 
sc_signal<bool> CLOCK_TX_OUT;
 
sc_out<uint> DOUT; //TROCAR PARA UINT QUANDO FOR PARA O VPI
sc_out<uint> SOUT; //TROCAR PARA UINT QUANDO FOR PARA O VPI
 
sc_out<sc_uint<4> > FSM_TX;
 
//MODULE RX
sc_in<uint> DIN;
sc_in<uint> SIN;
 
sc_signal<bool> ENABLE_RX;
sc_signal<bool> RESET_RX;
 
sc_signal<bool> RX_CLOCK_IN;
sc_in<bool> BUFFER_READY;
sc_out<sc_uint<9> > DATARX_FLAG;
sc_out<bool> BUFFER_WRITE;
 
sc_out<sc_uint<8> > TIME_OUT;
sc_out<bool> TICK_OUT;
sc_out<bool> CONTROL_FLAG_OUT;
 
sc_in<sc_uint<10> > CLOCK_GEN;
sc_in<bool> E_SEND_DATA;
 
SPW_TX_SC DUT;
SPW_TX_CLOCK_SC DUT1;
 
SPW_RX_SC DUT2;
SPW_RX_CLOCK_RECOVERY_SC DUT3;
 
SPW_FSM_SC DUT4;
 
SPW_TX_SEND_DATA DUT5;
 
SC_CTOR(sc_TOP) : DUT("DUT"),DUT1("DUT1"),DUT2("DUT2"),DUT3("DUT3"),DUT4("DUT4"),DUT5("DUT5")
{
DUT1.CLOCK_GEN(CLOCK_GEN);
DUT1.RESET(RESET);
DUT1.CLOCK_TX_OUT(CLOCK_TX_OUT);
 
DUT.CLOCK_TX(CLOCK_TX_OUT);
DUT.CLOCK_SYS(CLOCK);
DUT.RESET_TX(RESET_TX);
DUT.TICKIN_TX(TICKIN_TX);
DUT.TIMEIN_CONTROL_FLAG_TX(TIMEIN_CONTROL_FLAG_TX);
DUT.TXWRITE_TX(TXWRITE_TX_S);
DUT.TXDATA_FLAGCTRL_TX(TXDATA_FLAGCTRL_TX);
 
DUT.SEND_FCT_NOW(SEND_FCT_NOW_TOP);
DUT.ENABLE_TX(ENABLE_TX);
DUT.SEND_NULL_TX(SEND_NULL_TX);
DUT.SEND_FCT_TX(SEND_FCT_TX);
DUT.SEND_NCHAR_TX(SEND_NCHAR_TX);
DUT.SEND_TIME_CODE_TX(SEND_TIME_CODE_TX);
DUT.GOTFCT_TX(GOT_FCT_RX);
DUT.READY_TX(READY_TX);
 
DUT.READY_TICK(READY_TICK);
DUT.DOUT(DOUT);
DUT.SOUT(SOUT);
DUT.FSM_TX(FSM_TX);
 
DUT3.DIN_REC(DIN);
DUT3.SIN_REC(SIN);
DUT3.RX_CLOCK_OUT(RX_CLOCK_IN);
 
DUT2.RX_CLOCK(RX_CLOCK_IN);
DUT2.DIN(DIN);
DUT2.SIN(SIN);
DUT2.CLOCK_SYS(CLOCK);
DUT2.ENABLE_RX(ENABLE_RX);
DUT2.RESET_RX(RESET_RX);
DUT2.RX_ERROR(RXERROR);
DUT2.RX_CREDIT_ERROR(CREDITERROR_RX);
DUT2.GOT_BIT(GOTBIT_RX);
DUT2.GOT_NULL(GOTNULL_RX);
DUT2.GOT_NCHAR(GOTNCHAR_RX);
DUT2.GOT_TIME_CODE(GOT_TIMECODE_RX);
DUT2.GOT_FCT(GOT_FCT_RX);
DUT2.SEND_FCT_NOW_RX(SEND_FCT_NOW_TOP);
 
DUT2.BUFFER_READY(BUFFER_READY);
DUT2.DATARX_FLAG(DATARX_FLAG);
DUT2.BUFFER_WRITE(BUFFER_WRITE);
DUT2.TIME_OUT(TIME_OUT);
DUT2.TICK_OUT(TICK_OUT);
DUT2.CONTROL_FLAG_OUT(CONTROL_FLAG_OUT);
 
DUT4.CLOCK(CLOCK);
DUT4.RESET(RESET);
DUT4.LINK_START(LINK_START);
DUT4.LINK_DISABLE(LINK_DISABLE);
DUT4.AUTO_START(AUTO_START);
DUT4.FSM_SPW_OUT(FSM_SPW_OUT);
 
DUT4.GOT_FCT_RX(GOT_FCT_RX);
DUT4.GOT_TIMECODE_RX(GOT_TIMECODE_RX);
DUT4.GOTNCHAR_RX(GOTNCHAR_RX);
DUT4.GOTNULL_RX(GOTNULL_RX);
DUT4.GOTBIT_RX(GOTBIT_RX);
DUT4.CREDITERROR_RX(CREDITERROR_RX);
DUT4.RXERROR_RX(RXERROR);
DUT4.ENABLE_RX(ENABLE_RX);
 
DUT4.ENABLE_TX(ENABLE_TX);
DUT4.SEND_NULL_TX(SEND_NULL_TX);
DUT4.SEND_FCT_TX(SEND_FCT_TX);
DUT4.SEND_NCHAR_TX(SEND_NCHAR_TX);
DUT4.SEND_TIMECODE_TX(SEND_TIME_CODE_TX);
DUT4.RESET_TX(RESET_TX);
DUT4.RESET_RX(RESET_RX);
 
DUT5.CLOCK_SEND_DATA(CLOCK);
DUT5.RESET_SEND_DATA(RESET);
DUT5.E_SEND_DATA(E_SEND_DATA);
DUT5.TICKIN_TX_SEND_DATA(TICKIN_TX);
DUT5.TIMEIN_CONTROL_FLAG_TX_SEND_DATA(TIMEIN_CONTROL_FLAG_TX);
DUT5.TXWRITE_TX_SEND_DATA(TXWRITE_TX_S);
DUT5.TXDATA_FLAGCTRL_TX_SEND_DATA(TXDATA_FLAGCTRL_TX);
DUT5.READY_TX_SEND_DATA(READY_TX);
DUT5.READY_TICK_DATA(READY_TICK);
 
cout << "SC_CTOR(sc_TOP)" << endl;
}
 
 
 
};
 
#endif
/systemC/tx_clock.h
0,0 → 1,369
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
 
#ifndef SPW_TX_CLOCK_H
#define SPW_TX_CLOCK_H
 
class CLOCK_WIRE_SC;
 
SC_MODULE(CLOCK_WIRE_SC)
{
sc_in<bool> CLOCK_TX;
sc_in<bool> ENABLE;
sc_out<bool> CLOCK_TX_OUT;
 
void TX_CLOCK_M()
{
if(ENABLE)
CLOCK_TX_OUT = CLOCK_TX;
}
SC_CTOR(CLOCK_WIRE_SC)
{
SC_METHOD(TX_CLOCK_M);
sensitive << CLOCK_TX << ENABLE.pos();
}
};
 
class SPW_TX_CLOCK_SC;
 
SC_MODULE(SPW_TX_CLOCK_SC)
{
 
sc_clock CLOCK_2MHZ;
sc_clock CLOCK_10MHZ;
sc_clock CLOCK_20MHZ;
sc_clock CLOCK_50MHZ;
sc_clock CLOCK_100MHZ;
sc_clock CLOCK_150MHZ;
sc_clock CLOCK_200MHZ;
sc_clock CLOCK_201MHZ;
sc_clock CLOCK_250MHZ;
sc_clock CLOCK_280MHZ;
sc_clock CLOCK_500MHZ;
 
sc_in<sc_uint<10> > CLOCK_GEN;
sc_in<bool> RESET;
sc_out<bool> CLOCK_TX_OUT;
 
CLOCK_WIRE_SC DUT_2MHZ;
sc_signal<bool> CLOCK_TX_OUT_2MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_2MHZ;
 
CLOCK_WIRE_SC DUT_10MHZ;
sc_signal<bool> CLOCK_TX_OUT_10MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_10MHZ;
 
CLOCK_WIRE_SC DUT_20MHZ;
sc_signal<bool> CLOCK_TX_OUT_20MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_20MHZ;
 
CLOCK_WIRE_SC DUT_50MHZ;
sc_signal<bool> CLOCK_TX_OUT_50MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_50MHZ;
 
CLOCK_WIRE_SC DUT_100MHZ;
sc_signal<bool> CLOCK_TX_OUT_100MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_100MHZ;
 
CLOCK_WIRE_SC DUT_150MHZ;
sc_signal<bool> CLOCK_TX_OUT_150MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_150MHZ;
 
CLOCK_WIRE_SC DUT_200MHZ;
sc_signal<bool> CLOCK_TX_OUT_200MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_200MHZ;
 
CLOCK_WIRE_SC DUT_201MHZ;
sc_signal<bool> CLOCK_TX_OUT_201MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_201MHZ;
 
CLOCK_WIRE_SC DUT_250MHZ;
sc_signal<bool> CLOCK_TX_OUT_250MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_250MHZ;
 
CLOCK_WIRE_SC DUT_280MHZ;
sc_signal<bool> CLOCK_TX_OUT_280MHZ_ENABLE;
sc_signal<bool> CLOCK_TX_OUT_280MHZ;
 
void ENABLE()
{
//cout << CLOCK_GEN.read() << endl;
switch(CLOCK_GEN.read())
{
case 1:
CLOCK_TX_OUT_2MHZ_ENABLE = true;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 2:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = true;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 4:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = true;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 8:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = true;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 16:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = true;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 32:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = true;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 64:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = true;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 128:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = true;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 256:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = true;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
case 512:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = false;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = true;
break;
default:
CLOCK_TX_OUT_2MHZ_ENABLE = false;
CLOCK_TX_OUT_10MHZ_ENABLE = true;
CLOCK_TX_OUT_20MHZ_ENABLE = false;
CLOCK_TX_OUT_50MHZ_ENABLE = false;
CLOCK_TX_OUT_100MHZ_ENABLE = false;
CLOCK_TX_OUT_150MHZ_ENABLE = false;
CLOCK_TX_OUT_200MHZ_ENABLE = false;
CLOCK_TX_OUT_201MHZ_ENABLE = false;
CLOCK_TX_OUT_250MHZ_ENABLE = false;
CLOCK_TX_OUT_280MHZ_ENABLE = false;
break;
}
}
 
void CLK_GEN()
{
if(!RESET)
{
CLOCK_TX_OUT = CLOCK_TX_OUT_2MHZ;
}
else
{
if(CLOCK_TX_OUT_2MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_2MHZ;
else if(CLOCK_TX_OUT_10MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_10MHZ;
else if(CLOCK_TX_OUT_20MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_20MHZ;
else if(CLOCK_TX_OUT_50MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_50MHZ;
else if(CLOCK_TX_OUT_100MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_100MHZ;
else if(CLOCK_TX_OUT_150MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_150MHZ;
else if(CLOCK_TX_OUT_200MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_200MHZ;
else if(CLOCK_TX_OUT_201MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_201MHZ;
else if(CLOCK_TX_OUT_250MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_250MHZ;
else if(CLOCK_TX_OUT_280MHZ_ENABLE)
CLOCK_TX_OUT = CLOCK_TX_OUT_280MHZ;
}
#ifdef TESTE
cout << "2MHZ" << " " << CLOCK_TX_OUT_2MHZ_ENABLE <<endl;
cout << "10MHZ" << " " << CLOCK_TX_OUT_10MHZ_ENABLE <<endl;
cout << "20MHZ" << " " << CLOCK_TX_OUT_20MHZ_ENABLE <<endl;
cout << "50MHZ" << " " << CLOCK_TX_OUT_50MHZ_ENABLE <<endl;
cout << "100MHZ" << " " << CLOCK_TX_OUT_100MHZ_ENABLE <<endl;
cout << "150MHZ" << " " << CLOCK_TX_OUT_150MHZ_ENABLE <<endl;
cout << "200MHZ" << " " << CLOCK_TX_OUT_200MHZ_ENABLE <<endl;
cout << "201MHZ" << " " << CLOCK_TX_OUT_201MHZ_ENABLE <<endl;
cout << "250MHZ" << " " << CLOCK_TX_OUT_250MHZ_ENABLE <<endl;
cout << "280MHZ" << " " << CLOCK_TX_OUT_280MHZ_ENABLE <<endl;
#endif
}
 
SC_CTOR(SPW_TX_CLOCK_SC):CLOCK_2MHZ("CLOCK_2MHZ",500,SC_NS),
CLOCK_10MHZ("CLOCK_10MHZ",100,SC_NS),
CLOCK_20MHZ("CLOCK_20MHZ",50,SC_NS),
CLOCK_50MHZ("CLOCK_50MHZ",20,SC_NS),
CLOCK_100MHZ("CLOCK_100MHZ",10,SC_NS),
CLOCK_150MHZ("CLOCK_150MHZ",6.667,SC_NS),
CLOCK_200MHZ("CLOCK_200MHZ",5,SC_NS),
CLOCK_201MHZ("CLOCK_201MHZ",4.975,SC_NS),
CLOCK_250MHZ("CLOCK_250MHZ",4,SC_NS),
CLOCK_280MHZ("CLOCK_280MHZ",3.571,SC_NS),
DUT_2MHZ("DUT_2MHZ"),
DUT_10MHZ("DUT_10MHZ"),
DUT_20MHZ("DUT_20MHZ"),
DUT_50MHZ("DUT_50MHZ"),
DUT_100MHZ("DUT_100MHZ"),
DUT_150MHZ("DUT_150MHZ"),
DUT_200MHZ("DUT_200MHZ"),
DUT_201MHZ("DUT_201MHZ"),
DUT_250MHZ("DUT_250MHZ"),
DUT_280MHZ("DUT_280MHZ")
{
SC_METHOD(ENABLE);
sensitive << CLOCK_GEN << RESET;
 
SC_METHOD(CLK_GEN);
sensitive << CLOCK_500MHZ;
 
DUT_2MHZ.CLOCK_TX(CLOCK_2MHZ);
DUT_2MHZ.ENABLE(CLOCK_TX_OUT_2MHZ_ENABLE);
DUT_2MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_2MHZ);
 
DUT_10MHZ.CLOCK_TX(CLOCK_10MHZ);
DUT_10MHZ.ENABLE(CLOCK_TX_OUT_10MHZ_ENABLE);
DUT_10MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_10MHZ);
 
DUT_20MHZ.CLOCK_TX(CLOCK_20MHZ);
DUT_20MHZ.ENABLE(CLOCK_TX_OUT_20MHZ_ENABLE);
DUT_20MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_20MHZ);
 
DUT_50MHZ.CLOCK_TX(CLOCK_50MHZ);
DUT_50MHZ.ENABLE(CLOCK_TX_OUT_50MHZ_ENABLE);
DUT_50MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_50MHZ);
 
DUT_100MHZ.CLOCK_TX(CLOCK_100MHZ);
DUT_100MHZ.ENABLE(CLOCK_TX_OUT_100MHZ_ENABLE);
DUT_100MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_100MHZ);
 
DUT_150MHZ.CLOCK_TX(CLOCK_150MHZ);
DUT_150MHZ.ENABLE(CLOCK_TX_OUT_150MHZ_ENABLE);
DUT_150MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_150MHZ);
 
DUT_200MHZ.CLOCK_TX(CLOCK_200MHZ);
DUT_200MHZ.ENABLE(CLOCK_TX_OUT_200MHZ_ENABLE);
DUT_200MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_200MHZ);
 
DUT_201MHZ.CLOCK_TX(CLOCK_201MHZ);
DUT_201MHZ.ENABLE(CLOCK_TX_OUT_201MHZ_ENABLE);
DUT_201MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_201MHZ);
 
DUT_250MHZ.CLOCK_TX(CLOCK_250MHZ);
DUT_250MHZ.ENABLE(CLOCK_TX_OUT_250MHZ_ENABLE);
DUT_250MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_250MHZ);
 
DUT_280MHZ.CLOCK_TX(CLOCK_280MHZ);
DUT_280MHZ.ENABLE(CLOCK_TX_OUT_280MHZ_ENABLE);
DUT_280MHZ.CLOCK_TX_OUT(CLOCK_TX_OUT_280MHZ);
}
};
#endif
/systemC/tx_spw.h
0,0 → 1,1322
//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME :
//DEPARTMENT : IC Design / Verification
//AUTHOR : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy :
//Clock Domains :
//Critical Timing :
//Test Features :
//Asynchronous I/F :
//Scan Methodology :
//Instantiations :
//Synthesizable (y/n) :
//Other :
//-FHDR------------------------------------------------------------------------
 
#ifndef SPW_TX_T_H
#define SPW_TX_T_H
 
#define START 0
#define SEND_NULL 1
#define SEND_FCT_NULL 2
#define SEND_TIME_CODE_FCT_NCHAR_NULL 3
 
#define TYPE_TIMECODE 4
#define TYPE_FCT 5
#define TYPE_NCHAR_EOP_EEP 6
#define TYPE_NULL 7
 
class SPW_TX_SC;
 
SC_MODULE(SPW_TX_SC)
{
//SIGNALS
sc_in<bool> CLOCK_TX;
sc_in<bool> RESET_TX;
 
sc_in<bool> CLOCK_SYS;
 
sc_in<bool> TICKIN_TX;
sc_in<sc_uint<8> > TIMEIN_CONTROL_FLAG_TX;
 
sc_in<bool> TXWRITE_TX;
sc_in<sc_uint<9> > TXDATA_FLAGCTRL_TX;
 
sc_in<bool> SEND_FCT_NOW;
 
sc_in<bool> ENABLE_TX;
sc_in<bool> SEND_NULL_TX;
sc_in<bool> SEND_FCT_TX;
sc_in<bool> SEND_NCHAR_TX;
sc_in<bool> SEND_TIME_CODE_TX;
sc_in<bool> GOTFCT_TX;
 
sc_out<bool> READY_TX;
sc_out<bool> READY_TICK;
sc_out<uint> DOUT;
sc_out<uint> SOUT;
sc_out<sc_uint<4> > FSM_TX;
 
//INTERNAL
sc_uint<9> TXDATA_FLAGCTRL_TX_AUX;
sc_uint<9> TXDATA_FLAGCTRL_TX_LAST;
 
sc_uint<8> LAST_TIMEIN_CONTROL_FLAG_TX;
 
sc_uint<4> state_tx;
bool first_time;
bool working;
unsigned int last_type;
unsigned int COUNTER;
unsigned int counter_first_time;
 
uint FCT_COUNTER;
 
uint FCT_SEND = 0;
 
sc_uint<4> ESC;
sc_uint<4> EOP;
sc_uint<4> EEP;
sc_uint<4> FCT;
 
sc_uint<8> NULL_S;
sc_uint<14> TIME_CODE;
 
uint DOUT_LAST;
uint SOUT_LAST;
 
//STATE MACHINE CONTROL
void TYPE_DATA_STATE()
{
//cout << "TYPE_DATA_STATE" << endl;
if(RESET_TX)
{
//cout << "RESETED" << " " << RESET_TX << endl;
state_tx = START;
DOUT_LAST = 0;
COUNTER = 0;
FCT_COUNTER = 0;
counter_first_time = 0;
//FCT_SEND = 0;
 
last_type = TYPE_NULL;
NULL_S[7] = 0;
NULL_S[6] = 1;
NULL_S[5] = 1;
NULL_S[4] = 1;
NULL_S[3] = 0;
NULL_S[2] = 1;
NULL_S[1] = 0;
NULL_S[0] = 0;
 
FCT[3] = 0;
FCT[2] = 1;
FCT[1] = 0;
FCT[0] = 0;
 
TIME_CODE[13] = 0;
TIME_CODE[12] = 1;
TIME_CODE[11] = 1;
TIME_CODE[10] = 1;
TIME_CODE[9] = 1;
TIME_CODE[8] = 0;
TIME_CODE[7] = 0;
TIME_CODE[6] = 0;
TIME_CODE[5] = 0;
TIME_CODE[4] = 0;
TIME_CODE[3] = 0;
TIME_CODE[2] = 0;
TIME_CODE[1] = 0;
TIME_CODE[0] = 0;
 
EOP[3] = 0;
EOP[2] = 1;
EOP[1] = 0;
EOP[0] = 1;
 
EEP[3] = 0;
EEP[2] = 1;
EEP[1] = 1;
EEP[0] = 0;
 
first_time = true;
enable_null = false;
enable_fct = false;
enable_time_code = false;
enable_n_char = false;
}
else
{
FSM_TX = state_tx;
//cout << "STATE TX: " << state_tx << endl;
switch(state_tx)
{
case START:
 
if(SEND_NULL_TX && ENABLE_TX)
{
state_tx = SEND_NULL;
}
break;
case SEND_NULL:
enable_null = true;
enable_fct = false;
state_tx = SEND_NULL;
last_type = TYPE_NULL;
if(SEND_NULL_TX && SEND_FCT_TX && ENABLE_TX && counter_first_time > 0)
{
state_tx = SEND_FCT_NULL;
//cout << enable_fct << endl;
}
break;
case SEND_FCT_NULL:
state_tx = SEND_FCT_NULL;
 
if(SEND_FCT_TX && FCT_COUNTER -1 > 0)
{
state_tx = SEND_TIME_CODE_FCT_NCHAR_NULL;
}else if(SEND_FCT_TX && FCT_SEND > 0 && enable_null == false)
{
enable_fct = true;
}else if(SEND_FCT_TX && enable_fct == false && FCT_SEND == 0)
{
enable_null = true;
}
//cout << enable_null << " " << enable_fct << endl;
break;
case SEND_TIME_CODE_FCT_NCHAR_NULL:
if(TICKIN_TX && enable_n_char == false && enable_fct == false && enable_null == false)
{
enable_time_code = true;
}else if(FCT_SEND > 0 && enable_n_char == false && enable_time_code == false && enable_null == false)
{
enable_fct = true;
}else if(TXWRITE_TX && FCT_COUNTER-1 > 0 && enable_fct == false && enable_time_code == false && enable_null == false)
{
enable_n_char = true;
}else if(enable_fct == false && enable_time_code == false && enable_n_char == false)
{
enable_null = true;
}
break;
}
}
}
 
/*SLOTS OPEN IN OTHER SIDE*/
void FCT_COUNTER_M()
{
if(RESET_TX)
{
FCT_COUNTER = 0;
}
else
{
if(SEND_FCT_TX && GOTFCT_TX)
{
FCT_COUNTER = FCT_COUNTER +8;
//cout << "DATA TO SEND" << " " << FCT_COUNTER <<endl;
}
}
}
 
/*TAKE FCT SEND FASE */
void FCT_COUNTER_SEND()
{
if(RESET_TX)
FCT_SEND=7;
else
{
if(SEND_FCT_NOW)
{
FCT_SEND = FCT_SEND + 1;
//cout << "DATA RECEIVED" <<endl;
}
}
}
 
void ALL_HERE()
{
if(RESET_TX)
{
DOUT = 0;
SOUT = 0;
}
else
{
READY_TX = false;
READY_TICK = false;
EEP_EOP = false;
if(enable_null)//
{
if(COUNTER == 0)
{
if(first_time)
{
DOUT_LAST=DOUT = NULL_S[7];
SOUT=!SOUT;
}else if(last_type == TYPE_NULL)
{
if(DOUT == !(NULL_S[6]^NULL_S[0]^NULL_S[1]))
{
DOUT = !(NULL_S[6]^NULL_S[0]^NULL_S[1]);
SOUT=!SOUT;
}else
{
DOUT = !(NULL_S[6]^NULL_S[0]^NULL_S[1]);
SOUT=SOUT;
}
 
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(NULL_S[6]^FCT[0]^FCT[1]))
{
DOUT = !(NULL_S[6]^FCT[0]^FCT[1]);
SOUT=!SOUT;
}else
{
DOUT = !(NULL_S[6]^FCT[0]^FCT[1]);
SOUT=SOUT;
}
 
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(NULL_S[6]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(NULL_S[6]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(NULL_S[6]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(NULL_S[6]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(NULL_S[6]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
DOUT = !(NULL_S[6]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
SOUT=!SOUT;
}else
{
DOUT = !(NULL_S[6]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
SOUT=SOUT;
}
}
}else if(last_type == TYPE_TIMECODE)
{
if(DOUT == !(NULL_S[6]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
SOUT=!SOUT;
else
SOUT=SOUT;
 
DOUT = !(NULL_S[6]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}
else if(COUNTER == 1)
{
if(DOUT == NULL_S[6])
{
SOUT=!SOUT;
DOUT = NULL_S[6];
}else
{
SOUT=SOUT;
DOUT = NULL_S[6];
}
}
else if(COUNTER == 2)
{
if(DOUT == NULL_S[5])
{
SOUT=!SOUT;
DOUT = NULL_S[5];
}else
{
SOUT=SOUT;
DOUT = NULL_S[5];
}
}
else if(COUNTER == 3)
{
if(DOUT == NULL_S[4])
{
SOUT=!SOUT;
DOUT = NULL_S[4];
}else
{
SOUT=SOUT;
DOUT = NULL_S[4];
}
}
else if(COUNTER == 4)
{
if(DOUT == NULL_S[3])
{
SOUT=!SOUT;
DOUT = NULL_S[3];
}else
{
SOUT=SOUT;
DOUT = NULL_S[3];
}
}
else if(COUNTER == 5)
{
if(DOUT == NULL_S[2])
{
SOUT=!SOUT;
DOUT = NULL_S[2];
}else
{
SOUT=SOUT;
DOUT = NULL_S[2];
}
}
else if(COUNTER == 6)
{
if(DOUT == NULL_S[1])
{
SOUT=!SOUT;
DOUT = NULL_S[1];
}else
{
SOUT=SOUT;
DOUT = NULL_S[1];
}
}
else if(COUNTER == 7)
{
if(DOUT == NULL_S[0])
{
SOUT=!SOUT;
DOUT = NULL_S[0];
}else
{
SOUT=SOUT;
DOUT = NULL_S[0];
}
}
 
first_time = false;
COUNTER++;
 
if(COUNTER == 8)
{
COUNTER = 0;
enable_null = false;
last_type = TYPE_NULL;
if(state_tx == SEND_NULL)
counter_first_time = counter_first_time + 1;
}
 
}else if(enable_fct)//
{
 
if(COUNTER == 0)
{
if(last_type == TYPE_NULL)
{
if(DOUT == !(FCT[2]^NULL_S[0]^NULL_S[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^NULL_S[0]^NULL_S[1]);
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(FCT[2]^FCT[0]^FCT[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^FCT[0]^FCT[1]);
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(FCT[2]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(FCT[2]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(FCT[2]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
}
}else if(last_type == TYPE_TIMECODE)
{
if(DOUT == !(FCT[2]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
{
SOUT=!SOUT;
}else
{
SOUT=SOUT;
}
DOUT = !(FCT[2]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}
else if(COUNTER == 1)
{
if(DOUT == FCT[2])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = FCT[2];
}
else if(COUNTER == 2)
{
if(DOUT == FCT[1])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = FCT[1];
}
else if(COUNTER == 3)
{
if(DOUT == FCT[0])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = FCT[0];
}
 
COUNTER++;
 
if(COUNTER == 4)
{
COUNTER = 0;
FCT_SEND = FCT_SEND - 1;
enable_fct = false;
last_type = TYPE_FCT;
}
}else if(enable_time_code)//
{
 
TIME_CODE(7,0) = TIMEIN_CONTROL_FLAG_TX;
 
if(COUNTER == 0)
{
if(last_type == TYPE_NULL)
{
if(DOUT == !(TIME_CODE[12]^NULL_S[0]^NULL_S[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^NULL_S[0]^NULL_S[1]);
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(TIME_CODE[12]^FCT[0]^FCT[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^FCT[0]^FCT[1]);
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(TIME_CODE[12]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(TIME_CODE[12]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(TIME_CODE[12]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
}
}else if(last_type == TYPE_TIMECODE)
{
if( DOUT == !(TIME_CODE[12]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TIME_CODE[12]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}else if(COUNTER == 1)
{
if(DOUT == TIME_CODE[12])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[12];
}
else if(COUNTER == 2)
{
if(DOUT == TIME_CODE[11])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[11];
}
else if(COUNTER == 3)
{
if(DOUT == TIME_CODE[10])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[10];
}
else if(COUNTER == 4)
{
if(DOUT == TIME_CODE[9])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[9];
}
else if(COUNTER == 5)
{
if(DOUT == TIME_CODE[8])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[8];
}
else if(COUNTER == 6)
{
if(DOUT == TIME_CODE[0])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[0];
}
else if(COUNTER == 7)
{
if(DOUT == TIME_CODE[1])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[1];
}
else if(COUNTER == 8)
{
if(DOUT == TIME_CODE[2])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[2];
}
else if(COUNTER == 9)
{
if(DOUT == TIME_CODE[3])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[3];
}
else if(COUNTER == 10)
{
if(DOUT == TIME_CODE[4])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[4];
}
else if(COUNTER == 11)
{
if(DOUT == TIME_CODE[5])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[5];
}
else if(COUNTER == 12)
{
if(DOUT == TIME_CODE[6])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[6];
}
else if(COUNTER == 13)
{
if(DOUT == TIME_CODE[7])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TIME_CODE[7];
}
 
 
COUNTER++;
 
if(COUNTER == 14)
{
COUNTER = 0;
READY_TICK = true;
enable_time_code = false;
last_type = TYPE_TIMECODE;
LAST_TIMEIN_CONTROL_FLAG_TX = TIMEIN_CONTROL_FLAG_TX;
}
 
}else if(enable_n_char)//
{
 
TXDATA_FLAGCTRL_TX_AUX = TXDATA_FLAGCTRL_TX;
 
if(TXDATA_FLAGCTRL_TX_AUX[8])//EOP-EEP
{
 
if(TXDATA_FLAGCTRL_TX_AUX(1,0) == 0) //EOP
{
if(COUNTER == 0)
{
if(last_type == TYPE_NULL)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]);
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]);
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
}
}else if(last_type == TYPE_TIMECODE)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}
else if(COUNTER == 1)
{
if(DOUT == EOP[2])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EOP[2];
}
else if(COUNTER == 2)
{
if(DOUT == EOP[1])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EOP[1];
}
else if(COUNTER == 3)
{
if(DOUT == EOP[0])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EOP[0];
}
 
COUNTER++;
 
if(COUNTER == 4)
{
COUNTER = 0;
READY_TX = true;
TXDATA_FLAGCTRL_TX_LAST = TXDATA_FLAGCTRL_TX_AUX;
FCT_COUNTER = FCT_COUNTER - 1;
enable_n_char = false;
last_type = TYPE_NCHAR_EOP_EEP;
}
}
else if(TXDATA_FLAGCTRL_TX_AUX(1,0) == 1)//EEP
{
if(COUNTER == 0)
{
if(last_type == TYPE_NULL)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]);
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]);
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
}
}else if(last_type == TYPE_TIMECODE)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}
else if(COUNTER == 1)
{
if(DOUT == EEP[2])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EEP[2];
}
else if(COUNTER == 2)
{
if(DOUT == EEP[1])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EEP[1];
}
else if(COUNTER == 3)
{
if(DOUT == EOP[0])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = EOP[0];
}
 
COUNTER++;
 
if(COUNTER == 4)
{
COUNTER = 0;
READY_TX = true;
TXDATA_FLAGCTRL_TX_LAST = TXDATA_FLAGCTRL_TX_AUX;
FCT_COUNTER = FCT_COUNTER - 1;
enable_n_char = false;
last_type = TYPE_NCHAR_EOP_EEP;
}
}
 
}
else //DATA
{
if(COUNTER == 0)
{
if(last_type == TYPE_NULL)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^NULL_S[0]^NULL_S[1]);
}else if(last_type == TYPE_FCT)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^FCT[0]^FCT[1]);
}else if(last_type == TYPE_NCHAR_EOP_EEP)
{
if(TXDATA_FLAGCTRL_TX_LAST[8] == 1)
{
EEP_EOP = true;
if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 0)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EOP[0]^EOP[1]);
}else if(TXDATA_FLAGCTRL_TX_LAST(1,0) == 1)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^EEP[0]^EEP[1]);
}
}
else
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^TXDATA_FLAGCTRL_TX_LAST[0]^TXDATA_FLAGCTRL_TX_LAST[1]^TXDATA_FLAGCTRL_TX_LAST[2]^TXDATA_FLAGCTRL_TX_LAST[3]^ TXDATA_FLAGCTRL_TX_LAST[4]^TXDATA_FLAGCTRL_TX_LAST[5]^TXDATA_FLAGCTRL_TX_LAST[6]^TXDATA_FLAGCTRL_TX_LAST[7]);
}
}else if(last_type == TYPE_TIMECODE)
{
if(DOUT == !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]))
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = !(TXDATA_FLAGCTRL_TX_AUX[8]^LAST_TIMEIN_CONTROL_FLAG_TX[7]^LAST_TIMEIN_CONTROL_FLAG_TX[6]^LAST_TIMEIN_CONTROL_FLAG_TX[5]^LAST_TIMEIN_CONTROL_FLAG_TX[4]^LAST_TIMEIN_CONTROL_FLAG_TX[3]^LAST_TIMEIN_CONTROL_FLAG_TX[2]^LAST_TIMEIN_CONTROL_FLAG_TX[1]^LAST_TIMEIN_CONTROL_FLAG_TX[0]);
}
}
else if(COUNTER == 1)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[8])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[8];
}
else if(COUNTER == 2)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[0])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[0];
}
else if(COUNTER == 3)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[1])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[1];
}
else if(COUNTER == 4)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[2])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[2];
}
else if(COUNTER == 5)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[3])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[3];
}
else if(COUNTER == 6)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[4])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[4];
}
else if(COUNTER == 7)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[5])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[5];
}
else if(COUNTER == 8)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[6])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[6];
}
else if(COUNTER == 9)
{
if(DOUT == TXDATA_FLAGCTRL_TX_AUX[7])
{
SOUT=!SOUT;
}
else
{
SOUT=SOUT;
}
DOUT = TXDATA_FLAGCTRL_TX_AUX[7];
}
 
COUNTER++;
 
if(COUNTER == 10)
{
COUNTER = 0;
READY_TX = true;
TXDATA_FLAGCTRL_TX_LAST = TXDATA_FLAGCTRL_TX_AUX;
FCT_COUNTER = FCT_COUNTER - 1;
enable_n_char = false;
last_type = TYPE_NCHAR_EOP_EEP;
}
}
 
}
 
}
}//END METHOD
 
 
SC_CTOR(SPW_TX_SC)
{
SC_METHOD(FCT_COUNTER_SEND);
sensitive << CLOCK_SYS.pos();
 
SC_METHOD(FCT_COUNTER_M);
sensitive << CLOCK_SYS.pos();
 
SC_METHOD(ALL_HERE);
sensitive << CLOCK_TX.pos();
 
SC_METHOD(TYPE_DATA_STATE);
sensitive << CLOCK_TX.pos();
}
};
#endif

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