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URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

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  • This comparison shows the changes necessary to convert path
    /spacewiresystemc/trunk
    from Rev 37 to Rev 38
    Reverse comparison

Rev 37 → Rev 38

/rtl/RTL_VB/fifo_rx.v
229,11 → 229,21
case(state_data_write)
2'd0:
begin
if(credit_counter > 6'd55)
begin
overflow_credit_error <= 1'b1;
end
else
overflow_credit_error <= 1'b0;
 
mem[wr_ptr]<=data_in;
end
2'd1:
begin
mem[wr_ptr]<=mem[wr_ptr];
if(wr_en)
mem[wr_ptr]<=data_in;
else
mem[wr_ptr]<=mem[wr_ptr];
end
2'd2:
begin
245,13 → 255,7
wr_ptr <= wr_ptr;
end
endcase
if(wr_en && credit_counter > 6'd55)
begin
overflow_credit_error <= 1'b1;
end
else
overflow_credit_error <= overflow_credit_error;
end
end
 
366,7 → 370,15
open_slot_fct<= 1'b0;
end
 
data_out <= mem[rd_ptr];
if(rd_en)
begin
data_out <= mem[rd_ptr];
end
else
begin
data_out <= data_out;
end
end
2'd2:
begin
/rtl/RTL_VB/rx_spw.v
89,10 → 89,6
reg last_is_data;
reg last_is_timec;
 
//reg last_was_control;
//reg last_was_data;
//reg last_was_timec;
 
reg [3:0] control;
reg [3:0] control_r;
reg [3:0] control_p_r;
100,20 → 96,10
reg [9:0] timecode;
 
reg [3:0] control_l_r;
//reg [9:0] data_l_r;
 
reg [9:0] dta_timec;
reg [9:0] dta_timec_p;
 
reg rx_data_take;
reg rx_data_take_0;
 
reg rx_got_fct_take;
reg rx_got_fct_take_0;
reg rx_got_fct_take_1;
reg rx_got_fct_take_2;
reg rx_got_fct_take_3;
 
reg ready_control;
reg ready_data;
 
276,31 → 262,16
if(!rx_resetn)
begin
rx_got_fct <= 1'b0;
rx_got_fct_take <= 1'b0;
rx_got_fct_take_0 <= 1'b0;
rx_got_fct_take_1 <= 1'b0;
rx_got_fct_take_2 <= 1'b0;
rx_got_fct_take_3 <= 1'b0;
end
else
begin
if(control_l_r[2:0] != 3'd7 && control[2:0] == 3'd4 && (ready_control_p_r))
begin
rx_got_fct_take <= 1'b1;
rx_got_fct_take_0 <= rx_got_fct_take;
rx_got_fct_take_1 <= rx_got_fct_take_0;
rx_got_fct_take_2 <= rx_got_fct_take_1;
rx_got_fct_take_3 <= rx_got_fct_take_2;
rx_got_fct <= rx_got_fct_take | rx_got_fct_take_0 | rx_got_fct_take_1 | rx_got_fct_take_2 | rx_got_fct_take_3;
rx_got_fct <= 1'b1;
end
else
begin
rx_got_fct_take <= 1'b0;
rx_got_fct_take_0 <= rx_got_fct_take;
rx_got_fct_take_1 <= rx_got_fct_take_0;
rx_got_fct_take_2 <= rx_got_fct_take_1;
rx_got_fct_take_3 <= rx_got_fct_take_2;
rx_got_fct <= rx_got_fct_take | rx_got_fct_take_0 | rx_got_fct_take_1 | rx_got_fct_take_2 | rx_got_fct_take_3;
rx_got_fct <= 1'b0;
end
end
end
342,8 → 313,6
if(!rx_resetn)
begin
rx_got_fct_fsm <= 1'b0;
rx_buffer_write <= 1'b0;
rx_data_take_0 <= 1'b0;
ready_control_p_r <= 1'b0;
ready_data_p_r <= 1'b0;
 
350,10 → 319,7
end
else
begin
rx_data_take_0 <= rx_data_take;
rx_buffer_write <= rx_data_take_0;
 
 
if(ready_control || ready_control_p)
begin
if(is_control)
464,7 → 430,6
 
always@(*)
begin
 
rx_error_c = 1'b0;
 
if(last_is_control && ready_control_p)
485,7 → 450,49
 
always@(posedge negedge_clk or negedge rx_resetn)
begin
if(!rx_resetn)
begin
rx_buffer_write <= 1'b0;
rx_tick_out <= 1'b0;
end
else
begin
 
if(!ready_control_p_r && !ready_data_p_r && !ready_control && !ready_data)
begin
if(last_is_timec == 1'b1)
begin
rx_tick_out <= 1'b1;
end
else if(last_is_data == 1'b1)
begin
rx_buffer_write <= 1'b1;
end
else if(last_is_control == 1'b1)
begin
if(control[2:0] == 3'd6)
begin
rx_buffer_write <= 1'b1;
end
else if(control[2:0] == 3'd5)
begin
rx_buffer_write <= 1'b1;
end
end
end
else
begin
rx_buffer_write <= 1'b0;
rx_tick_out <= 1'b0;
end
end
end
 
 
always@(posedge negedge_clk or negedge rx_resetn)
begin
 
if(!rx_resetn)
begin
is_control <= 1'b0;
587,21 → 594,13
control_l_r <= 4'd0;
control <= 4'd0;
data <= 10'd0;
//data_l_r <= 10'd0;
 
last_is_control <= 1'b0;
last_is_data <= 1'b0;
last_is_timec <= 1'b0;
 
//last_was_control <= 1'b0;
//last_was_data <= 1'b0;
//last_was_timec <= 1'b0;
 
rx_data_flag <= 9'd0;
rx_data_take <= 1'b0;
 
timecode <= 10'd0;
rx_tick_out <= 1'b0;
 
state_data_process <= 2'd0;
end
619,16 → 618,23
control <= control_p_r;
control_l_r <= control;
 
if(control_p_r[2:0] == 3'd6)
begin
rx_data_flag <= 9'd257;
end
else if(control_p_r[2:0] == 3'd5)
begin
rx_data_flag <= 9'd256;
end
else
begin
rx_data_flag <= rx_data_flag;
end
 
last_is_control <= 1'b1;
last_is_data <= 1'b0;
last_is_timec <= 1'b0;
//last_was_control <= last_is_control;
//last_was_data <= last_is_data ;
//last_was_timec <= last_is_timec;
 
rx_data_take <= 1'b0;
rx_tick_out <= 1'b0;
 
end
else if(ready_data_p_r)
begin
635,26 → 641,18
if(control[2:0] != 3'd7)
begin
data <= {dta_timec_p[9],dta_timec_p[8],dta_timec_p[7],dta_timec_p[6],dta_timec_p[5],dta_timec_p[4],dta_timec_p[3],dta_timec_p[2],dta_timec_p[1],dta_timec_p[0]};
//data_l_r <= data;
rx_data_flag <= {dta_timec_p[8],dta_timec_p[7],dta_timec_p[6],dta_timec_p[5],dta_timec_p[4],dta_timec_p[3],dta_timec_p[2],dta_timec_p[1],dta_timec_p[0]};
last_is_control <=1'b0;
last_is_data <=1'b1;
last_is_timec <=1'b0;
//last_was_control <= last_is_control;
//last_was_data <= last_is_data ;
//last_was_timec <= last_is_timec;
end
else if(control[2:0] == 3'd7)
begin
timecode <= {dta_timec_p[9],dta_timec_p[8],dta_timec_p[7],dta_timec_p[6],dta_timec_p[5],dta_timec_p[4],dta_timec_p[3],dta_timec_p[2],dta_timec_p[1],dta_timec_p[0]};
last_is_control <= 1'b0;
last_is_data <= 1'b0;
last_is_timec <= 1'b1;
//last_was_control <= last_is_control;
//last_was_data <= last_is_data ;
//last_was_timec <= last_is_timec;
end
 
rx_data_take <= 1'b0;
rx_tick_out <= 1'b0;
end
else
begin
664,54 → 662,14
end
2'd1:
begin
 
if(last_is_timec == 1'b1)
begin
timecode <= dta_timec;
rx_tick_out <= 1'b1;
end
else if(last_is_data == 1'b1)
begin
rx_data_flag <= {data[8],data[7],data[6],data[5],data[4],data[3],data[2],data[1],data[0]};
rx_data_take <= 1'b1;
end
else if(last_is_control == 1'b1)
begin
if(control[2:0] == 3'd6)
begin
rx_data_flag <= 9'd257;
rx_data_take <= 1'b1;
end
else if(control[2:0] == 3'd5)
begin
rx_data_flag <= 9'd256;
rx_data_take <= 1'b1;
end
else
begin
rx_data_take <= rx_data_take;
rx_tick_out <= rx_tick_out;
end
end
else
begin
 
rx_data_flag <= rx_data_flag;
rx_data_take <= rx_data_take;
 
timecode <= timecode;
rx_tick_out <= rx_tick_out;
end
 
end
default:
begin
rx_data_flag <= rx_data_flag;
rx_data_take <= rx_data_take;
 
timecode <= timecode;
rx_tick_out <= rx_tick_out;
end
endcase
end
/rtl/RTL_VB/tx_spw.v
91,12 → 91,17
reg [2:0] state_fct_receive;
reg [2:0] next_state_fct_receive;
 
reg [2:0] state_data_fifo;
reg [2:0] next_state_data_fifo;
 
reg [13:0] timecode_s;
 
reg [5:0] last_type;
reg [8:0] txdata_flagctrl_tx_last;
reg [8:0] tx_data_in;
reg data_rdy_trnsp;
reg [8:0] tx_data_took;
 
 
reg [7:0] last_timein_control_flag_tx;
reg [7:0] tx_tcode_in;
reg tcode_rdy_trnsp;
106,12 → 111,10
 
reg [5:0] fct_counter_receive;
 
//reg block_increment;
reg data_ready_took;
reg block_decrement;
reg char_sent;
 
//reg block_increment_fct_send;
//reg block_decrement_fct_send;
reg fct_sent;
 
reg last_tx_dout;
487,7 → 490,7
end
3'd1:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
next_state_fct_send = 3'd2;
end
509,7 → 512,7
end
3'd3:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
next_state_fct_send = 3'd4;
end
554,7 → 557,7
end
3'd1:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
fct_flag <= fct_flag + 3'd1;
else
fct_flag <= fct_flag;
565,7 → 568,7
end
3'd3:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
fct_flag <= fct_flag - 3'd1;
else
fct_flag <= fct_flag;
603,7 → 606,7
end
3'd1:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
next_state_fct_receive = 3'd2;
end
625,7 → 628,7
end
3'd3:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
next_state_fct_receive = 3'd4;
end
672,7 → 675,7
end
3'd1:
begin
if(global_counter_transfer == 4'd2)
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
if(fct_counter_receive < 6'd48)
begin
692,8 → 695,13
end
3'd3:
begin
if(global_counter_transfer == 4'd2)
fct_counter_receive <= fct_counter_receive - 6'd1;
if(global_counter_transfer > 4'd0 && global_counter_transfer < 4'd12)
begin
if(fct_counter_receive == 6'd0)
fct_counter_receive <= fct_counter_receive;
else
fct_counter_receive <= fct_counter_receive - 6'd1;
end
else
fct_counter_receive <= fct_counter_receive;
end
709,8 → 717,106
end
end
 
 
always@(*)
begin
next_state_data_fifo = state_data_fifo;
 
case(state_data_fifo)
3'd0:
begin
if(!ready_tx_data && txwrite_tx)
begin
next_state_data_fifo = 3'd1;
end
else
next_state_data_fifo = 3'd0;
end
3'd1:
begin
next_state_data_fifo = 3'd2;
end
3'd2:
begin
 
if(state_tx == tx_spw_null_c && global_counter_transfer > 4'd1 && global_counter_transfer < 4'd7)
next_state_data_fifo = 3'd3;
else if(state_tx == tx_spw_data_c && global_counter_transfer > 4'd1 && global_counter_transfer < 4'd9)
next_state_data_fifo = 3'd3;
else
next_state_data_fifo = 3'd2;
end
3'd3:
begin
if(!ready_tx_data && txwrite_tx)
begin
next_state_data_fifo = 3'd3;
end
else
begin
next_state_data_fifo = 3'd0;
end
end
default:
begin
next_state_data_fifo = 3'd0;
end
endcase
end
 
always@(posedge pclk_tx or negedge enable_tx)
begin
if(!enable_tx)
begin
data_ready_took <= 1'b0;
state_data_fifo <= 3'd0;
tx_data_took <= 9'd0;
end
else
begin
 
state_data_fifo <= next_state_data_fifo;
 
case(state_data_fifo)
3'd0:
begin
//tx_data_took <= tx_data_took;
end
3'd1:
begin
tx_data_took <= data_tx_i;
end
3'd2:
begin
tx_data_took <= data_tx_i;
 
if(state_tx == tx_spw_null_c && global_counter_transfer > 4'd0 && global_counter_transfer < 4'd7)
data_ready_took <= 1'b1;
else if(state_tx == tx_spw_data_c && global_counter_transfer > 4'd0 && global_counter_transfer < 4'd9)
data_ready_took <= 1'b1;
else
data_ready_took <= 1'b0;
end
3'd3:
begin
if(!ready_tx_data && txwrite_tx)
begin
data_ready_took <= 1'b1;
end
else
begin
data_ready_took <= 1'b0;
end
end
default:
begin
end
endcase
end
end
 
always@(*)
begin
next_state_tx = state_tx;
 
case(state_tx)
731,6 → 837,8
begin
if(global_counter_transfer == 4'd7)
next_state_tx = tx_spw_fct;
else
next_state_tx = tx_spw_null;
end
else
next_state_tx = tx_spw_null;
737,35 → 845,23
end
tx_spw_fct:
begin
if(send_fct_tx && fct_flag > 3'd0)
if(send_fct_tx && global_counter_transfer == 4'd3)
begin
next_state_tx = tx_spw_fct;
end
else
begin
if(send_fct_tx && fct_counter_receive > 6'd0)
if(tickin_tx && !ready_tx_timecode && tcode_rdy_trnsp)
begin
if(global_counter_transfer == 4'd7 || global_counter_transfer == 4'd3)
begin
if(tickin_tx && !ready_tx_timecode && tcode_rdy_trnsp)
begin
next_state_tx = tx_spw_time_code_c;
end
else if(fct_flag > 3'd0 && !send_fct_now)
begin
next_state_tx = tx_spw_fct_c;
end
else if(txwrite_tx && !gotfct_tx && !gotfct_tx && !ready_tx_data && data_rdy_trnsp && fct_counter_receive > 6'd0)
begin
next_state_tx = tx_spw_data_c;
end
else
begin
next_state_tx = tx_spw_null_c;
end
end
next_state_tx = tx_spw_time_code_c;
end
else if(fct_flag > 3'd0 && !send_fct_now)
begin
next_state_tx = tx_spw_fct;
end
else
begin
next_state_tx = tx_spw_null_c;
end
end
else
next_state_tx = tx_spw_fct;
end
tx_spw_null_c:
begin
779,7 → 875,7
begin
next_state_tx = tx_spw_fct_c;
end
else if(txwrite_tx && !gotfct_tx && !ready_tx_data && data_rdy_trnsp && fct_counter_receive > 6'd0)
else if(data_ready_took && !gotfct_tx && fct_counter_receive > 6'd0)
begin
next_state_tx = tx_spw_data_c;
end
826,6 → 922,10
begin
next_state_tx = tx_spw_fct_c;
end
else if(data_ready_took && !gotfct_tx && fct_counter_receive > 6'd0)
begin
next_state_tx = tx_spw_data_c;
end
else
begin
next_state_tx = tx_spw_null_c;
865,7 → 965,7
begin
next_state_tx = tx_spw_fct_c;
end
else if(txwrite_tx && !gotfct_tx && !ready_tx_data && data_rdy_trnsp && fct_counter_receive > 6'd0 )
else if(data_ready_took && !gotfct_tx && fct_counter_receive > 6'd0 )
begin
next_state_tx = tx_spw_data_c;
end
900,8 → 1000,8
last_type <= NULL;
 
global_counter_transfer <= 4'd0;
txdata_flagctrl_tx_last <= 9'd0;
tx_data_in <= 9'd0;
txdata_flagctrl_tx_last <= 9'd0;
tx_data_in <= 9'd0;
last_timein_control_flag_tx <= 8'd0;
 
char_sent<= 1'b0;
915,8 → 1015,6
tx_dout_e <= 1'b0;
tx_sout_e <= 1'b0;
 
data_rdy_trnsp <= 1'b0;
 
tx_tcode_in <= 8'd0;
tcode_rdy_trnsp <= 1'b0;
 
928,6 → 1026,7
case(state_tx)
tx_spw_start:
begin
global_counter_transfer <= 4'd0;
end
tx_spw_null:
begin
939,16 → 1038,8
tx_sout_e <= last_tx_sout;
 
 
if(txwrite_tx && global_counter_transfer == 4'd5)
if(tickin_tx && global_counter_transfer == 4'd5)
begin
tx_data_in <= data_tx_i;
data_rdy_trnsp <= 1'b1;
end
else
tx_data_in <= tx_data_in;
 
if(tickin_tx && global_counter_transfer == 4'd5)
begin
tx_tcode_in <= timecode_tx_i;
tcode_rdy_trnsp <= 1'b1;
end
955,16 → 1046,6
else
tx_tcode_in <= tx_tcode_in;
 
if(global_counter_transfer == 4'd3)
begin
ready_tx_timecode <= 1'b0;
ready_tx_data <= 1'b0;
end
else
begin
ready_tx_timecode <= ready_tx_timecode;
ready_tx_data <= ready_tx_data;
end
 
if(global_counter_transfer == 4'd7)
begin
971,7 → 1052,7
last_type <= NULL;
global_counter_transfer <= 4'd0;
end
else
else
begin
last_type <= last_type;
global_counter_transfer <= global_counter_transfer + 4'd1;
985,8 → 1066,6
 
tx_dout_e <= last_tx_dout;
tx_sout_e <= last_tx_sout;
ready_tx_data <= ready_tx_data;
 
if(global_counter_transfer == 4'd3)
begin
1000,6 → 1079,7
fct_sent <= 1'b1;
else
fct_sent <= fct_sent;
 
global_counter_transfer <= global_counter_transfer + 4'd1;
end
end
1012,44 → 1092,21
tx_dout_e <= last_tx_dout;
tx_sout_e <= last_tx_sout;
 
 
if(txwrite_tx && global_counter_transfer == 4'd5)
if(global_counter_transfer == 4'd7)
begin
tx_data_in <= data_tx_i;
data_rdy_trnsp <= 1'b1;
end
else
tx_data_in <= tx_data_in;
last_type <= NULL;
global_counter_transfer <= 4'd0;
 
if(tickin_tx && global_counter_transfer == 4'd5)
begin
tx_tcode_in <= timecode_tx_i;
tcode_rdy_trnsp <= 1'b1;
if(data_ready_took)
tx_data_in <= tx_data_took;
else
tx_data_in <= tx_data_in;
end
else
tx_tcode_in <= tx_tcode_in;
 
 
if(global_counter_transfer == 4'd3)
begin
char_sent <= 1'b0;
fct_sent <= 1'b0;
ready_tx_timecode <= 1'b0;
ready_tx_data <= 1'b0;
end
else
begin
ready_tx_timecode <= ready_tx_timecode;
ready_tx_data <= ready_tx_data;
end
 
if(global_counter_transfer == 4'd7)
begin
last_type <= NULL;
global_counter_transfer <= 4'd0;
end
else
begin
last_type <= last_type;
global_counter_transfer <= global_counter_transfer + 4'd1;
end
1063,8 → 1120,6
tx_dout_e <= last_tx_dout;
tx_sout_e <= last_tx_sout;
 
ready_tx_data <= ready_tx_data;
 
if(global_counter_transfer == 4'd3)
begin
char_sent <= 1'b0;
1099,23 → 1154,38
if(global_counter_transfer == 4'd9)
begin
char_sent <= 1'b1;
 
last_type <= DATA;
ready_tx_data <= 1'b1;
data_rdy_trnsp <= 1'b0;
global_counter_transfer <= 4'd0;
 
if(data_ready_took)
tx_data_in <= tx_data_took;
else
tx_data_in <= tx_data_in;
end
else
begin
ready_tx_data <= 1'b0;
 
if(global_counter_transfer == 4'd1)
begin
txdata_flagctrl_tx_last <= tx_data_in;
end
else
txdata_flagctrl_tx_last <= txdata_flagctrl_tx_last;
 
 
if(global_counter_transfer >= 4'd2 && global_counter_transfer < 4'd5)
begin
ready_tx_data <= 1'b1;
end
else
ready_tx_data <= 1'b0;
 
char_sent <= 1'b0;
ready_tx_timecode <= 1'b0;
global_counter_transfer <= global_counter_transfer + 4'd1;
end
 
if(global_counter_transfer == 4'd4)
txdata_flagctrl_tx_last <= tx_data_in;
end
 
 
end
else if(tx_data_in[8])
begin
1133,20 → 1203,16
last_type <=EEP;
end
 
ready_tx_data <= 1'b0;
global_counter_transfer <= 4'd0;
data_rdy_trnsp <= 1'b0;
ready_tx_data <= 1'b1;
end
else
begin
txdata_flagctrl_tx_last <= txdata_flagctrl_tx_last;
 
ready_tx_data <= 1'b0;
ready_tx_data <= 1'b1;
ready_tx_timecode <= 1'b0;
global_counter_transfer <= global_counter_transfer + 4'd1;
end
 
 
end
 
end
1153,15 → 1219,6
tx_spw_time_code_c:
begin
 
if(txwrite_tx && global_counter_transfer == 4'd6)
begin
data_rdy_trnsp <= 1'b1;
tx_data_in <= data_tx_i;
end
else
tx_data_in <= tx_data_in;
 
 
fct_sent <= 1'b0;
last_tx_dout <= tx_dout;
1189,7 → 1246,6
end
else
begin
ready_tx_data <= 1'b0;
last_timein_control_flag_tx <= tx_tcode_in;
last_type <= TIMEC;
end

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