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/syn/spi_master_envsettings.html
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/syn/spi_master_atlys_top_bit.zip
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Index: syn/spi_master_atlys_top.vhd
===================================================================
--- syn/spi_master_atlys_top.vhd (revision 5)
+++ syn/spi_master_atlys_top.vhd (nonexistent)
@@ -1,377 +0,0 @@
-----------------------------------------------------------------------------------
--- Engineer: Jonny Doin
---
--- Create Date: 01:21:32 06/30/2011
--- Design Name:
--- Module Name: spi_master_atlys_top
--- Project Name: spi_master_slave
--- Target Devices: Spartan-6 LX45
--- Tool versions: ISE 13.1
--- Description:
--- This is a test project for the Atlys board, to test the spi_master and grp_debounce cores.
--- It uses the board's 100MHz clock input, and clocks all sequential logic at this clock.
---
--- See the "spi_master_atlys.ucf" file for pin assignments.
--- The test circuit uses the VHDCI connector on the Atlys to implement a 16-pin debug port to be used
--- with a Tektronix MSO2014. The 16 debug pins are brought to 2 8x2 headers that form a umbilical
--- digital pod port.
---
------------------------------- REVISION HISTORY -----------------------------------------------------------------------
---
--- 2011/07/02 v0.01.0010 [JD] implemented a wire-through from switches to LEDs, just to test the toolchain. It worked!
--- 2011/07/03 v0.01.0020 [JD] added clock input, and a simple LED blinker for each LED.
--- 2011/07/03 v0.01.0030 [JD] added clear input, and instantiated a SPI_MASTER from my OpenCores project.
--- 2011/07/04 v0.01.0040 [JD] changed all clocks to clock enables, and use the 100MHz board gclk_i to clock all registers.
--- this change made the design go up to 288MHz, after synthesis.
--- 2011/07/07 v0.03.0050 [JD] implemented a 16pin umbilical port for the MSO2014 in the Atlys VmodBB board, and moved all
--- external monitoring pins to the VHDCI ports.
--- 2011/07/10 v1.10.0075 [JD] verified spi_master_slave at 50MHz, 25MHz, 16.666MHz, 12.5MHz, 10MHz, 8.333MHz, 7.1428MHz,
--- 6.25MHz, 1MHz and 500kHz
---
---
-----------------------------------------------------------------------------------
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_arith.all;
-
-entity spi_master_atlys_top is
- Port (
- gclk_i : in std_logic := 'X'; -- board clock input 100MHz
- clear_i : in std_logic := '0'; -- btn used as clear signal
- --- SPI interface ---
- spi_ssel_o : out std_logic; -- spi port SSEL
- spi_sck_o : out std_logic; -- spi port SCK
- spi_mosi_o : out std_logic; -- spi port MOSI
- --- input slide switches ---
- sw_i : in std_logic_vector (7 downto 0); -- 8 input slide switches
- --- input buttons ---
- btn_i : in std_logic_vector (5 downto 0); -- 6 input push buttons
- --- output LEDs ----
- led_o : out std_logic_vector (7 downto 0); -- output leds
- --- debug outputs ---
- dbg_o : out std_logic_vector (9 downto 0); -- 10 generic debug pins
- --- spi debug pins ---
- spi_di_req_o : out std_logic; -- spi data request
- spi_wren_o : out std_logic; -- spi write enable
- spi_wren_ack_o : out std_logic -- spi write enable ack
- );
-end spi_master_atlys_top;
-
-architecture behavioral of spi_master_atlys_top is
-
- --=============================================================================================
- -- Constants
- --=============================================================================================
- -- clock divider count values from gclk_i (100MHz board clock)
- -- these constants shall not be zero
- constant FSM_CE_DIV : integer := 1;
- constant SPI_2X_CLK_DIV : integer := 1; -- 50MHz SPI clock
- constant SAMP_CE_DIV : integer := 1;
- -- spi port generics
- constant N : integer := 8; -- 8 bits
-
- -- button definitions
- constant btRESET : integer := 0; -- these are constants to use as btn_i(x)
- constant btUP : integer := 1;
- constant btLEFT : integer := 2;
- constant btDOWN : integer := 3;
- constant btRIGHT : integer := 4;
- constant btCENTER : integer := 5;
-
- --=============================================================================================
- -- Type definitions
- --=============================================================================================
- type fsm_state_type is (st_reset, st_wait_spi_idle, st_wait_new_switch,
- st_send_spi_data, st_wait_spi_ack, st_wait_spi_finish );
-
- --=============================================================================================
- -- Signals for state machine control
- --=============================================================================================
- signal state_reg : fsm_state_type := st_reset;
- signal state_next : fsm_state_type := st_reset;
-
- --=============================================================================================
- -- Signals for internal operation
- --=============================================================================================
- -- clock signals
- signal core_clk : std_logic := '0'; -- core clock, direct copy of board clock
- signal spi_2x_clk : std_logic := '0'; -- spi_2x clock, 50% clock divided-down from board clock
- -- clock enable signals
- signal samp_ce : std_logic := '1'; -- clock enable for sample inputs
- signal fsm_ce : std_logic := '1'; -- clock enable for fsm logic
- -- switch debouncer signals
- signal sw_data : std_logic_vector (7 downto 0) := (others => '0'); -- debounced switch data
- signal sw_reg : std_logic_vector (7 downto 0) := (others => '0'); -- registered switch data
- signal sw_next : std_logic_vector (7 downto 0) := (others => '0'); -- combinatorial switch data
- signal new_switch : std_logic := '0'; -- detector for new switch data
- -- pushbutton debouncer signals
- signal btn_data : std_logic_vector (5 downto 0) := (others => '0'); -- debounced state of pushbuttons
- signal btn_reg : std_logic_vector (5 downto 0) := (others => '0'); -- registered button data
- signal btn_next : std_logic_vector (5 downto 0) := (others => '0'); -- combinatorial button data
- signal new_button : std_logic := '0'; -- detector for new button data
- -- spi port signals
- signal spi_ssel : std_logic;
- signal spi_sck : std_logic;
- signal spi_mosi : std_logic;
- signal spi_di_req : std_logic;
- signal spi_ssel_reg : std_logic;
- signal spi_wr_ack : std_logic;
- signal spi_rst_reg : std_logic := '1';
- signal spi_rst_next : std_logic := '1';
- signal spi_di_reg : std_logic_vector (N-1 downto 0) := (others => '0');
- signal spi_di_next : std_logic_vector (N-1 downto 0) := (others => '0');
- signal spi_wren_reg : std_logic := '0';
- signal spi_wren_next : std_logic := '0';
- -- other signals
- signal clear : std_logic := '0';
- -- output signals
- signal leds_reg : std_logic_vector (7 downto 0) := (others => '0'); -- registered led outputs
- signal dbg : std_logic_vector (9 downto 0) := (others => '0'); -- we have 10 debug pins available
-begin
-
- --=============================================================================================
- -- Component instantiation for the SPI port
- --=============================================================================================
- -- spi_port is the spi output port
- Inst_spi_port: entity work.spi_master(rtl)
- generic map (N => N, CPOL => '0', CPHA => '0', PREFETCH => 3, SPI_2X_CLK_DIV => SPI_2X_CLK_DIV)
- port map(
- sclk_i => core_clk, -- system clock is used for serial and parallel ports
- pclk_i => core_clk,
- rst_i => spi_rst_reg,
- spi_ssel_o => spi_ssel,
- spi_sck_o => spi_sck,
- spi_mosi_o => spi_mosi,
- di_req_o => spi_di_req,
- di_i => spi_di_reg,
- wren_i => spi_wren_reg,
- wren_o => spi_wren_o,
- wren_ack_o => spi_wr_ack, -- monitor wren ack from inside spi port
- core_ce_o => dbg(8), -- monitor the internal core clock enable lines
- core_n_ce_o => dbg(9)
- );
-
- spi_di_req_o <= spi_di_req; -- monitor data request
- spi_wren_ack_o <= spi_wr_ack;
-
- -- debounce for the input switches, with new data strobe output
- Inst_sw_debouncer: entity work.grp_debouncer(rtl)
- generic map (N => 8, CNT_VAL => 10000) -- debounce 8 inputs with 100 us settling time
- port map(
- clk_i => core_clk, -- system clock
- data_i => sw_i, -- noisy input data
- data_o => sw_data, -- registered stable output data
- strb_o => dbg(0) -- monitor the debounced data strobe
- );
-
- -- debounce for the input pushbuttons, with new data strobe output
- Inst_btn_debouncer: entity work.grp_debouncer(rtl)
- generic map (N => 6, CNT_VAL => 50000) -- debounce 6 inputs with 500 us settling time
- port map(
- clk_i => core_clk, -- system clock
- data_i => btn_i, -- noisy input data
- data_o => btn_data, -- registered stable output data
- strb_o => dbg(3) -- monitor the debounced data strobe
- );
-
- dbg1_proc: dbg(1) <= new_switch; -- monitor new_switch signal
- dbg2_proc: dbg(2) <= sw_i(0); -- monitor raw input (rightmost switch)
- dbg4_proc: dbg(4) <= new_button; -- monitor new_button signal
- dbg5_proc: dbg(5) <= btn_i(5); -- monitor raw input (center btn)
-
- --=============================================================================================
- -- CONSTANTS CONSTRAINTS CHECKING
- --=============================================================================================
- -- clock dividers shall not be zero
- assert FSM_CE_DIV > 0
- report "Constant 'FSM_CE_DIV' should not be zero"
- severity FAILURE;
- -- minimum prefetch lookahead check
- assert SPI_2X_CLK_DIV > 0
- report "Constant 'SPI_2X_CLK_DIV' should not be zero"
- severity FAILURE;
- -- maximum prefetch lookahead check
- assert SAMP_CE_DIV > 0
- report "Constant 'SAMP_CE_DIV' should not be zero"
- severity FAILURE;
-
- --=============================================================================================
- -- CLOCK GENERATION
- --=============================================================================================
- -- The clock generation block derives 3 internal clocks, divided down from the 100MHz input clock
- -- core clock,
- -- spi 2x base clock,
- -- fsm clock,
- -----------------------------------------------------------------------------------------------
- -- generate the core clock from the 100MHz board input clock
- core_clock_gen_proc: core_clk <= gclk_i;
- -- generate the sampling clock enable from the 100MHz board input clock
- samp_ce_gen_proc: process (gclk_i) is
- variable clk_cnt : integer range SAMP_CE_DIV-1 downto 0 := 0;
- begin
- if gclk_i'event and gclk_i = '1' then
- if clk_cnt = SAMP_CE_DIV-1 then
- samp_ce <= '1';
- clk_cnt := 0;
- else
- samp_ce <= '0';
- clk_cnt := clk_cnt + 1;
- end if;
- end if;
- end process samp_ce_gen_proc;
- -- generate the fsm clock enable from the 100MHz board input clock
- fsm_ce_gen_proc: process (gclk_i) is
- variable clk_cnt : integer range FSM_CE_DIV-1 downto 0 := 0;
- begin
- if gclk_i'event and gclk_i = '1' then
- if clk_cnt = FSM_CE_DIV-1 then
- fsm_ce <= '1';
- clk_cnt := 0;
- else
- fsm_ce <= '0';
- clk_cnt := clk_cnt + 1;
- end if;
- end if;
- end process fsm_ce_gen_proc;
- -- generate the spi base clock from the 100MHz board input clock
--- spi_2x_clk_div_proc: spi_2x_clk <= gclk_i; -- generate 50MHz SPI SCK
-
- spi_2x_clk_div_proc: process (gclk_i) is
- variable clk_cnt : integer range SPI_2X_CLK_DIV-1 downto 0:= 0;
- begin
- if gclk_i'event and gclk_i = '1' then
- if clk_cnt = SPI_2X_CLK_DIV-1 then
- spi_2x_clk <= not spi_2x_clk;
- clk_cnt := 0;
- else
- clk_cnt := clk_cnt + 1;
- end if;
- end if;
- end process spi_2x_clk_div_proc;
-
- --=============================================================================================
- -- INPUTS LOGIC
- --=============================================================================================
- -- registered inputs
- samp_inputs_proc: process (core_clk) is
- begin
- if core_clk'event and core_clk = '1' then
- if samp_ce = '1' then
--- clear <= btn_data(btRESET); -- sample reset input
- leds_reg <= sw_data; -- update LEDs with debounced switches
- end if;
- end if;
- end process samp_inputs_proc;
-
- --=============================================================================================
- -- FSM REGISTER PROCESSES
- --=============================================================================================
- -- fsm state and data registers: synchronous to the spi base reference clock
- fsm_reg_proc : process (core_clk) is
- begin
- -- FFD registers clocked on rising edge and cleared on sync 'clear'
- if core_clk'event and core_clk = '1' then
- if clear = '1' then -- sync reset
- state_reg <= st_reset; -- only provide local reset for the state register
- else
- if fsm_ce = '1' then
- state_reg <= state_next; -- state register
- end if;
- end if;
- end if;
- -- FFD registers clocked on rising edge, with no reset
- if core_clk'event and core_clk = '1' then
- if fsm_ce = '1' then
- spi_wren_reg <= spi_wren_next;
- spi_di_reg <= spi_di_next;
- spi_rst_reg <= spi_rst_next;
- spi_ssel_reg <= spi_ssel;
- sw_reg <= sw_next;
- btn_reg <= btn_next;
- end if;
- end if;
- end process fsm_reg_proc;
-
- --=============================================================================================
- -- FSM COMBINATORIAL NEXT-STATE LOGIC PROCESSES
- --=============================================================================================
- -- edge detector for new switch data
- new_switch_proc: new_switch <= '1' when sw_data /= sw_reg else '0'; -- '1' for difference
- -- edge detector for new button data
- new_button_proc: new_button <= '1' when btn_data /= btn_reg else '0'; -- '1' for difference
- -- fsm state and combinatorial logic
- -- the sequencer will wait for a new switch combination, and send the switch data to the spi port
- fsm_combi_proc: process ( state_reg, spi_wren_reg, spi_di_reg, spi_di_req, spi_wr_ack,
- spi_ssel_reg, spi_rst_reg, sw_data, sw_reg, new_switch,
- btn_data, btn_reg, new_button) is
- begin
- spi_di_next <= spi_di_reg;
- spi_rst_next <= spi_rst_reg;
- spi_wren_next <= spi_wren_reg;
- sw_next <= sw_reg;
- btn_next <= btn_reg;
- state_next <= state_reg;
- case state_reg is
- when st_reset =>
- spi_rst_next <= '1'; -- place spi interface on reset
- spi_di_next <= (others => '0'); -- clear spi data port
- spi_wren_next <= '0'; -- deassert write enable
- state_next <= st_wait_spi_idle;
-
- when st_wait_spi_idle =>
- if spi_ssel_reg = '1' then
- spi_rst_next <= '0'; -- remove reset when interface is idle
- state_next <= st_wait_new_switch;
- end if;
-
- when st_wait_new_switch =>
- if new_switch = '1' then -- wait for new stable switch data
- sw_next <= sw_data; -- load new switch data (end the mismatch condition)
- state_next <= st_send_spi_data;
- elsif new_button = '1' then
- btn_next <= btn_data; -- load new button data (end the mismatch condition)
- if btn_data /= (5 downto 0 => '0') then
- state_next <= st_send_spi_data;
- end if;
- end if;
-
- when st_send_spi_data =>
- spi_di_next <= sw_reg; -- load switch register to the spi port
- spi_wren_next <= '1'; -- write data on next clock
- state_next <= st_wait_spi_ack;
-
- when st_wait_spi_ack => -- the actual write happens on this state
- spi_di_next <= sw_reg; -- load switch register to the spi port
- if spi_wr_ack = '1' then -- wait acknowledge
- spi_wren_next <= '0'; -- remove write strobe on next clock
- state_next <= st_wait_spi_finish;
- end if;
-
- when st_wait_spi_finish =>
- if spi_ssel_reg = '1' then
- state_next <= st_wait_new_switch;
- end if;
-
- when others =>
- state_next <= st_reset; -- state st_reset is safe state
- end case;
- end process fsm_combi_proc;
-
- --=============================================================================================
- -- OUTPUT LOGIC PROCESSES
- --=============================================================================================
- -- connect the spi output wires
- spi_ssel_o_proc: spi_ssel_o <= spi_ssel;
- spi_sck_o_proc: spi_sck_o <= spi_sck;
- spi_mosi_o_proc: spi_mosi_o <= spi_mosi;
- -- connect leds_reg signal to LED outputs
- leds_out_proc: led_o <= leds_reg;
-
- --=============================================================================================
- -- DEBUG LOGIC PROCESSES
- --=============================================================================================
- -- connect the debug vector outputs
- dbg_o_proc: dbg_o <= dbg;
-
-end behavioral;
-
Index: syn/ATLYS_01.SET
===================================================================
--- syn/ATLYS_01.SET (revision 5)
+++ syn/ATLYS_01.SET (nonexistent)
@@ -1,767 +0,0 @@
-:SELECT:DALL 0
-:ACQUIRE:STOPAFTER RUNSTOP
-:ACQUIRE:STATE 1
-:ACQUIRE:MODE SAMPLE
-:ACQUIRE:NUMENV INFINITE
-:ACQUIRE:NUMAVG 128
-:ACQUIRE:MAGNIVU 0
-:HEADER 0
-:LOCK NONE
-:VERBOSE 1
-:MESSAGE:SHOW ""
-:MESSAGE:BOX 92,39,92,49
-:MESSAGE:STATE 0
-:ALIAS:STATE 0
-:DISPLAY:COLOR:PALETTE NORMAL
-:DISPLAY:STYLE:DOTSONLY 0
-:DISPLAY:PERSISTENCE 0.0E+0
-:DISPLAY:CLOCK TIMEONLY
-:DISPLAY:FORMAT YT
-:DISPLAY:GRATICULE FULL
-:DISPLAY:INTENSITY:WAVEFORM 40
-:DISPLAY:INTENSITY:GRATICULE 20
-:DISPLAY:INTENSITY:BACKLIGHT HIGH
-:DISPLAY:INTENSITY:GLITCH 0
-:DISPLAY:GLITCH 0
-:DISPLAY:DIGITAL:HEIGHT LARGE
-:FILTERVU:FREQUENCY 100000000
-:HARDCOPY:INKSAVER 1
-:HARDCOPY:LAYOUT LANDSCAPE
-:HARDCOPY:PREVIEW 0
-:PICTBRIDGE:PAPERSIZE DEFLT
-:PICTBRIDGE:IMAGESIZE DEFLT
-:PICTBRIDGE:PAPERTYPE DEFLT
-:PICTBRIDGE:PRINTQUAL DEFLT
-:PICTBRIDGE:DATEPRINT DEFLT
-:PICTBRIDGE:IDPRINT OFF
-:SAVE:IMAGE:LAYOUT LANDSCAPE
-:SAVE:IMAGE:FILEFORMAT BMP
-:SAVE:IMAGE:INKSAVER 0
-:SAVE:WAVEFORM:FILEFORMAT SPREADSHEET
-:SAVE:WAVEFORM:GATING NONE
-:SAVE:WAVEFORM:SPREADSHEET:RESOLUTION FULL
-:SAVE:ASSIGN:TYPE IMAGE
-:D0:THRESHOLD 1.2600
-:D1:THRESHOLD 1.2600
-:D2:THRESHOLD 1.2600
-:D3:THRESHOLD 1.2600
-:D4:THRESHOLD 1.2600
-:D5:THRESHOLD 1.2600
-:D6:THRESHOLD 1.2600
-:D7:THRESHOLD 1.2600
-:D8:THRESHOLD 1.2600
-:D9:THRESHOLD 1.2600
-:D10:THRESHOLD 1.2600
-:D11:THRESHOLD 1.2600
-:D12:THRESHOLD 1.2600
-:D13:THRESHOLD 1.2600
-:D14:THRESHOLD 1.2600
-:D15:THRESHOLD 1.2600
-:D0:POSITION -3.9200
-:D1:POSITION -3.4200
-:D2:POSITION -2.9200
-:D3:POSITION -2.4200
-:D4:POSITION -1.9200
-:D5:POSITION -1.4200
-:D6:POSITION -920.0000E-3
-:D7:POSITION -420.0000E-3
-:D8:POSITION 60.0000E-3
-:D9:POSITION 560.0000E-3
-:D10:POSITION -2.9200
-:D11:POSITION -1.9200
-:D12:POSITION -920.0000E-3
-:D13:POSITION 80.0000E-3
-:D14:POSITION 1.0800
-:D15:POSITION 2.0800
-:D0:LABEL ""
-:D1:LABEL ""
-:D2:LABEL ""
-:D3:LABEL ""
-:D4:LABEL ""
-:D5:LABEL ""
-:D6:LABEL ""
-:D7:LABEL ""
-:D8:LABEL ""
-:D9:LABEL ""
-:D10:LABEL "WR_ACK"
-:D11:LABEL "WREN"
-:D12:LABEL "DI_REQ"
-:D13:LABEL "MOSI"
-:D14:LABEL "SCK"
-:D15:LABEL "SSEL"
-:HORIZONTAL:POSITION 50.0000
-:HORIZONTAL:SCALE 10.0000E-6
-:HORIZONTAL:RECORDLENGTH 100000
-:HORIZONTAL:DELAY:MODE 1
-:HORIZONTAL:DELAY:TIME 0.0E+0
-:SELECT:CH1 0
-:SELECT:CH2 0
-:SELECT:CH3 0
-:SELECT:CH4 0
-:SELECT:MATH 0
-:SELECT:REF1 0
-:SELECT:REF2 0
-:SELECT:D0 0
-:SELECT:D1 0
-:SELECT:D2 0
-:SELECT:D3 0
-:SELECT:D4 0
-:SELECT:D5 0
-:SELECT:D6 0
-:SELECT:D7 0
-:SELECT:D8 0
-:SELECT:D9 0
-:SELECT:D10 1
-:SELECT:D11 1
-:SELECT:D12 1
-:SELECT:D13 1
-:SELECT:D14 1
-:SELECT:D15 1
-:SELECT:BUS1 1
-:SELECT:BUS2 0
-:SELECT:CONTROL D15
-:CH1:AMPSVIAVOLTS:ENABLE 0
-:CH2:AMPSVIAVOLTS:ENABLE 0
-:CH3:AMPSVIAVOLTS:ENABLE 0
-:CH4:AMPSVIAVOLTS:ENABLE 0
-:CH1:AMPSVIAVOLTS:FACTOR 10.0000
-:CH2:AMPSVIAVOLTS:FACTOR 10.0000
-:CH3:AMPSVIAVOLTS:FACTOR 10.0000
-:CH4:AMPSVIAVOLTS:FACTOR 10.0000
-:CH1:PROBE:GAIN 100.0000E-3
-:CH2:PROBE:GAIN 100.0000E-3
-:CH3:PROBE:GAIN 100.0000E-3
-:CH4:PROBE:GAIN 100.0000E-3
-:CH1:PROBE:FORCEDRANGE 0.0E+0
-:CH2:PROBE:FORCEDRANGE 0.0E+0
-:CH3:PROBE:FORCEDRANGE 0.0E+0
-:CH4:PROBE:FORCEDRANGE 0.0E+0
-:CH1:BANDWIDTH 20.0000E+6
-:CH2:BANDWIDTH 100.0000E+6
-:CH3:BANDWIDTH 100.0000E+6
-:CH4:BANDWIDTH 100.0000E+6
-:CH1:COUPLING DC
-:CH2:COUPLING DC
-:CH3:COUPLING DC
-:CH4:COUPLING DC
-:CH1:DESKEW 0.0E+0
-:CH2:DESKEW 0.0E+0
-:CH3:DESKEW 0.0E+0
-:CH4:DESKEW 0.0E+0
-:CH1:OFFSET 143.2000E-3
-:CH2:OFFSET 0.0E+0
-:CH3:OFFSET 0.0E+0
-:CH4:OFFSET 0.0E+0
-:CH1:INVERT 0
-:CH2:INVERT 0
-:CH3:INVERT 0
-:CH4:INVERT 0
-:CH1:POSITION 0.0E+0
-:CH2:POSITION 0.0E+0
-:CH3:POSITION 0.0E+0
-:CH4:POSITION 0.0E+0
-:CH1:SCALE 50.0000E-3
-:CH2:SCALE 1.0000
-:CH3:SCALE 1.0000
-:CH4:SCALE 1.0000
-:CH1:YUNITS "V"
-:CH2:YUNITS "V"
-:CH3:YUNITS "V"
-:CH4:YUNITS "V"
-:CH1:TERMINATION 1.0000E+6
-:CH2:TERMINATION 1.0000E+6
-:CH3:TERMINATION 1.0000E+6
-:CH4:TERMINATION 1.0000E+6
-:CH1:LABEL "\x0eACK"
-:CH2:LABEL ""
-:CH3:LABEL ""
-:CH4:LABEL ""
-:AUXIN:PROBE:GAIN 100.0000E-3
-:AUXIN:PROBE:FORCEDRANGE 0.0E+0
-:REF1:VERTICAL:POSITION 0.0E+0
-:REF2:VERTICAL:POSITION 0.0E+0
-:REF1:VERTICAL:SCALE 100.0000E-3
-:REF2:VERTICAL:SCALE 100.0000E-3
-:REF1:HORIZONTAL:DELAY:TIME -20.0000E-6
-:REF2:HORIZONTAL:DELAY:TIME -20.0000E-6
-:REF1:HORIZONTAL:SCALE 4.0000E-6
-:REF2:HORIZONTAL:SCALE 4.0000E-6
-:MATH:TYPE DUAL
-:MATH:DEFINE "CH1+CH2"
-:MATH:VERTICAL:SCALE 100.0000E-3
-:MATH:VERTICAL:POSITION 0.0E+0
-:MATH:VERTICAL:UNITS "V"
-:MATH:HORIZONTAL:SCALE 10.0000E-6
-:MATH:HORIZONTAL:POSITION 50.0200
-:MATH:HORIZONTAL:UNITS "s"
-:MATH:SPECTRAL:MAG DB
-:MATH:SPECTRAL:WINDOW HANNING
-:MATH:SPECTRAL:GATING:INDICATORS 0
-:MATH:LABEL ""
-:TRIGGER:A:MODE NORMAL
-:TRIGGER:A:TYPE EDGE
-:TRIGGER:A:LEVEL 1.2600
-:TRIGGER:A:LEVEL:CH1 172.0000E-3
-:TRIGGER:A:LEVEL:CH2 0.0E+0
-:TRIGGER:A:LEVEL:CH3 0.0E+0
-:TRIGGER:A:LEVEL:CH4 0.0E+0
-:TRIGGER:A:LEVEL:AUXIN 0.0E+0
-:TRIGGER:A:LEVEL:D0 1.2600
-:TRIGGER:A:LEVEL:D1 1.2600
-:TRIGGER:A:LEVEL:D2 1.2600
-:TRIGGER:A:LEVEL:D3 1.2600
-:TRIGGER:A:LEVEL:D4 1.2600
-:TRIGGER:A:LEVEL:D5 1.2600
-:TRIGGER:A:LEVEL:D6 1.2600
-:TRIGGER:A:LEVEL:D7 1.2600
-:TRIGGER:A:LEVEL:D8 1.2600
-:TRIGGER:A:LEVEL:D9 1.2600
-:TRIGGER:A:LEVEL:D10 1.2600
-:TRIGGER:A:LEVEL:D11 1.2600
-:TRIGGER:A:LEVEL:D12 1.2600
-:TRIGGER:A:LEVEL:D13 1.2600
-:TRIGGER:A:LEVEL:D14 1.2600
-:TRIGGER:A:LEVEL:D15 1.2600
-:TRIGGER:A:UPPERTHRESHOLD:CH1 256.0000E-3
-:TRIGGER:A:UPPERTHRESHOLD:CH2 1.4000
-:TRIGGER:A:UPPERTHRESHOLD:CH3 1.4000
-:TRIGGER:A:UPPERTHRESHOLD:CH4 1.4000
-:TRIGGER:A:LOWERTHRESHOLD:CH1 172.0000E-3
-:TRIGGER:A:LOWERTHRESHOLD:CH2 0.0E+0
-:TRIGGER:A:LOWERTHRESHOLD:CH3 0.0E+0
-:TRIGGER:A:LOWERTHRESHOLD:CH4 0.0E+0
-:TRIGGER:A:LOWERTHRESHOLD:EXT 0.0E+0
-:TRIGGER:A:LOWERTHRESHOLD:D0 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D1 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D2 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D3 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D4 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D5 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D6 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D7 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D8 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D9 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D10 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D11 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D12 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D13 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D14 1.2600
-:TRIGGER:A:LOWERTHRESHOLD:D15 1.2600
-:TRIGGER:A:HOLDOFF:TIME 337.4240E-6
-:TRIGGER:A:EDGE:SOURCE D15
-:TRIGGER:A:EDGE:COUPLING DC
-:TRIGGER:A:EDGE:SLOPE FALL
-:TRIGGER:A:LOGIC:CLASS LOGIC
-:TRIGGER:A:LOGIC:FUNCTION AND
-:TRIGGER:A:LOGIC:THRESHOLD:CH1 172.0000E-3
-:TRIGGER:A:LOGIC:THRESHOLD:CH2 0.0E+0
-:TRIGGER:A:LOGIC:THRESHOLD:CH3 0.0E+0
-:TRIGGER:A:LOGIC:THRESHOLD:CH4 0.0E+0
-:TRIGGER:A:LOGIC:THRESHOLD:D0 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D1 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D2 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D3 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D4 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D5 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D6 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D7 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D8 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D9 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D10 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D11 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D12 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D13 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D14 1.2600
-:TRIGGER:A:LOGIC:THRESHOLD:D15 1.2600
-:TRIGGER:A:LOGIC:INPUT:CH1 X
-:TRIGGER:A:LOGIC:INPUT:CH2 X
-:TRIGGER:A:LOGIC:INPUT:CH3 X
-:TRIGGER:A:LOGIC:INPUT:CH4 X
-:TRIGGER:A:LOGIC:INPUT:CLOCK:SOURCE NONE
-:TRIGGER:A:LOGIC:INPUT:CLOCK:EDGE RISE
-:TRIGGER:A:LOGIC:INPUT:D0 X
-:TRIGGER:A:LOGIC:INPUT:D1 X
-:TRIGGER:A:LOGIC:INPUT:D2 X
-:TRIGGER:A:LOGIC:INPUT:D3 X
-:TRIGGER:A:LOGIC:INPUT:D4 X
-:TRIGGER:A:LOGIC:INPUT:D5 X
-:TRIGGER:A:LOGIC:INPUT:D6 X
-:TRIGGER:A:LOGIC:INPUT:D7 X
-:TRIGGER:A:LOGIC:INPUT:D8 X
-:TRIGGER:A:LOGIC:INPUT:D9 X
-:TRIGGER:A:LOGIC:INPUT:D10 X
-:TRIGGER:A:LOGIC:INPUT:D11 X
-:TRIGGER:A:LOGIC:INPUT:D12 X
-:TRIGGER:A:LOGIC:INPUT:D13 X
-:TRIGGER:A:LOGIC:INPUT:D14 X
-:TRIGGER:A:LOGIC:INPUT:D15 X
-:TRIGGER:A:LOGIC:PATTERN:WHEN TRUE
-:TRIGGER:A:LOGIC:PATTERN:WHEN:LESSLIMIT 8.0000E-9
-:TRIGGER:A:LOGIC:PATTERN:WHEN:MORELIMIT 8.0000E-9
-:TRIGGER:A:LOGIC:PATTERN:DELTATIME 8.0000E-9
-:TRIGGER:A:SETHOLD:CLOCK:SOURCE CH1
-:TRIGGER:A:SETHOLD:CLOCK:EDGE RISE
-:TRIGGER:A:SETHOLD:CLOCK:THRESHOLD 172.0000E-3
-:TRIGGER:A:SETHOLD:DATA:SOURCE NONE
-:TRIGGER:A:SETHOLD:DATA:THRESHOLD 9.9100E+37
-:TRIGGER:A:SETHOLD:HOLDTIME 2.0000E-9
-:TRIGGER:A:SETHOLD:SETTIME 2.0000E-9
-:TRIGGER:A:SETHOLD:THRESHOLD:CH1 172.0000E-3
-:TRIGGER:A:SETHOLD:THRESHOLD:CH2 0.0E+0
-:TRIGGER:A:SETHOLD:THRESHOLD:CH3 0.0E+0
-:TRIGGER:A:SETHOLD:THRESHOLD:CH4 0.0E+0
-:TRIGGER:A:SETHOLD:THRESHOLD:D0 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D1 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D2 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D3 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D4 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D5 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D6 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D7 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D8 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D9 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D10 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D11 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D12 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D13 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D14 1.2600
-:TRIGGER:A:SETHOLD:THRESHOLD:D15 1.2600
-:TRIGGER:A:PULSE:CLASS WIDTH
-:TRIGGER:A:PULSEWIDTH:POLARITY POSITIVE
-:TRIGGER:A:PULSEWIDTH:WHEN MORETHAN
-:TRIGGER:A:PULSEWIDTH:WIDTH 95.0340E-6
-:TRIGGER:A:RUNT:POLARITY POSITIVE
-:TRIGGER:A:RUNT:WHEN OCCURS
-:TRIGGER:A:RUNT:WIDTH 95.0340E-6
-:TRIGGER:A:TRANSITION:POLARITY POSITIVE
-:TRIGGER:A:TRANSITION:WHEN SLOWER
-:TRIGGER:A:TRANSITION:DELTATIME 95.0340E-6
-:TRIGGER:A:VIDEO:STANDARD NTSC
-:TRIGGER:A:VIDEO:SYNC ALLLINES
-:TRIGGER:A:VIDEO:LINE 1
-:TRIGGER:A:VIDEO:HOLDOFF:FIELD 0.0E+0
-:TRIGGER:A:VIDEO:POLARITY POSITIVE
-:TRIGGER:A:BUS:SOURCE B1
-:TRIGGER:A:BUS:B1:I2C:CONDITION START
-:TRIGGER:A:BUS:B2:I2C:CONDITION START
-:TRIGGER:A:BUS:B1:I2C:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:I2C:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:I2C:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:I2C:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:I2C:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B2:I2C:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B1:I2C:DATA:DIRECTION NOCARE
-:TRIGGER:A:BUS:B2:I2C:DATA:DIRECTION NOCARE
-:TRIGGER:A:BUS:B1:I2C:ADDRESS:MODE ADDR7
-:TRIGGER:A:BUS:B2:I2C:ADDRESS:MODE ADDR7
-:TRIGGER:A:BUS:B1:I2C:ADDRESS:TYPE USER
-:TRIGGER:A:BUS:B2:I2C:ADDRESS:TYPE USER
-:TRIGGER:A:BUS:B1:I2C:ADDRESS:VALUE "XXXXXXX"
-:TRIGGER:A:BUS:B2:I2C:ADDRESS:VALUE "XXXXXXX"
-:TRIGGER:A:BUS:B1:SPI:CONDITION SS
-:TRIGGER:A:BUS:B2:SPI:CONDITION SS
-:TRIGGER:A:BUS:B1:SPI:DATA:OUT:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:SPI:DATA:OUT:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:SPI:DATA:IN:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:SPI:DATA:IN:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:SPI:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:SPI:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:SPI:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B2:SPI:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B1:CAN:CONDITION SOF
-:TRIGGER:A:BUS:B2:CAN:CONDITION SOF
-:TRIGGER:A:BUS:B1:CAN:FRAMETYPE DATA
-:TRIGGER:A:BUS:B2:CAN:FRAMETYPE DATA
-:TRIGGER:A:BUS:B1:CAN:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:CAN:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:CAN:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:CAN:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:CAN:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B2:CAN:DATA:START 0.0E+0
-:TRIGGER:A:BUS:B1:CAN:DATA:DIRECTION NOCARE
-:TRIGGER:A:BUS:B2:CAN:DATA:DIRECTION NOCARE
-:TRIGGER:A:BUS:B1:CAN:DATA:QUALIFIER EQUAL
-:TRIGGER:A:BUS:B2:CAN:DATA:QUALIFIER EQUAL
-:TRIGGER:A:BUS:B1:CAN:IDENTIFIER:MODE STANDARD
-:TRIGGER:A:BUS:B2:CAN:IDENTIFIER:MODE STANDARD
-:TRIGGER:A:BUS:B1:CAN:IDENTIFIER:VALUE "XXXXXXXXXXX"
-:TRIGGER:A:BUS:B2:CAN:IDENTIFIER:VALUE "XXXXXXXXXXX"
-:TRIGGER:A:BUS:B1:LIN:CONDITION SYNCFIELD
-:TRIGGER:A:BUS:B2:LIN:CONDITION SYNCFIELD
-:TRIGGER:A:BUS:B1:LIN:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:LIN:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:LIN:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:LIN:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:LIN:DATA:HIVALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:LIN:DATA:HIVALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:LIN:DATA:QUALIFIER EQUAL
-:TRIGGER:A:BUS:B2:LIN:DATA:QUALIFIER EQUAL
-:TRIGGER:A:BUS:B1:LIN:IDENTIFIER:VALUE "XXXXXX"
-:TRIGGER:A:BUS:B2:LIN:IDENTIFIER:VALUE "XXXXXX"
-:TRIGGER:A:BUS:B1:LIN:ERRTYPE SYNC
-:TRIGGER:A:BUS:B2:LIN:ERRTYPE SYNC
-:TRIGGER:A:BUS:B1:RS232C:CONDITION TXSTART
-:TRIGGER:A:BUS:B2:RS232C:CONDITION TXSTART
-:TRIGGER:A:BUS:B1:RS232C:RX:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:RS232C:RX:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:RS232C:RX:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:RS232C:RX:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:RS232C:TX:DATA:SIZE 1
-:TRIGGER:A:BUS:B2:RS232C:TX:DATA:SIZE 1
-:TRIGGER:A:BUS:B1:RS232C:TX:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B2:RS232C:TX:DATA:VALUE "XXXXXXXX"
-:TRIGGER:A:BUS:B1:PARALLEL:VALUE "XXXXXXXXX0XXXXXX"
-:TRIGGER:A:BUS:B2:PARALLEL:VALUE "XXXX"
-:TRIGGER:EXTERNAL:PROBE 10.0000
-:BUS:B1:I2C:DATA:SOURCE D15
-:BUS:B2:I2C:DATA:SOURCE CH2
-:BUS:B1:I2C:CLOCK:SOURCE D14
-:BUS:B2:I2C:CLOCK:SOURCE CH1
-:BUS:B1:I2C:ADDRESS:RWINCLUDE 0
-:BUS:B2:I2C:ADDRESS:RWINCLUDE 0
-:BUS:B1:SPI:DATA:IN:SOURCE OFF
-:BUS:B2:SPI:DATA:IN:SOURCE OFF
-:BUS:B1:SPI:DATA:IN:POLARITY HIGH
-:BUS:B2:SPI:DATA:IN:POLARITY HIGH
-:BUS:B1:SPI:DATA:OUT:SOURCE D13
-:BUS:B2:SPI:DATA:OUT:SOURCE CH3
-:BUS:B1:SPI:DATA:OUT:POLARITY HIGH
-:BUS:B2:SPI:DATA:OUT:POLARITY HIGH
-:BUS:B1:SPI:DATA:SIZE 8
-:BUS:B2:SPI:DATA:SIZE 8
-:BUS:B1:SPI:CLOCK:SOURCE D14
-:BUS:B2:SPI:CLOCK:SOURCE CH1
-:BUS:B1:SPI:CLOCK:POLARITY RISE
-:BUS:B2:SPI:CLOCK:POLARITY RISE
-:BUS:B1:SPI:SELECT:SOURCE D15
-:BUS:B2:SPI:SELECT:SOURCE CH2
-:BUS:B1:SPI:SELECT:POLARITY LOW
-:BUS:B2:SPI:SELECT:POLARITY LOW
-:BUS:B1:SPI:FRAMING SS
-:BUS:B2:SPI:FRAMING SS
-:BUS:B1:SPI:BITORDER MSB
-:BUS:B2:SPI:BITORDER MSB
-:BUS:B1:SPI:IDLETIME 5.0000E-6
-:BUS:B2:SPI:IDLETIME 5.0000E-6
-:BUS:B1:CAN:SOURCE D14
-:BUS:B2:CAN:SOURCE CH1
-:BUS:B1:CAN:BITRATE 500000
-:BUS:B2:CAN:BITRATE 500000
-:BUS:B1:CAN:PROBE CANH
-:BUS:B2:CAN:PROBE CANH
-:BUS:B1:CAN:SAMPLEPOINT 50
-:BUS:B2:CAN:SAMPLEPOINT 50
-:BUS:B1:LIN:SOURCE D14
-:BUS:B2:LIN:SOURCE CH1
-:BUS:B1:LIN:POLARITY NORMAL
-:BUS:B2:LIN:POLARITY NORMAL
-:BUS:B1:LIN:BITRATE 19200
-:BUS:B2:LIN:BITRATE 19200
-:BUS:B1:LIN:SAMPLEPOINT 50
-:BUS:B2:LIN:SAMPLEPOINT 50
-:BUS:B1:LIN:STANDARD V2X
-:BUS:B2:LIN:STANDARD V2X
-:BUS:B1:LIN:IDFORMAT NOPARITY
-:BUS:B2:LIN:IDFORMAT NOPARITY
-:BUS:B1:RS232C:PARITY NONE
-:BUS:B2:RS232C:PARITY NONE
-:BUS:B1:RS232C:BITRATE 9600
-:BUS:B2:RS232C:BITRATE 9600
-:BUS:B1:RS232C:POLARITY NORMAL
-:BUS:B2:RS232C:POLARITY NORMAL
-:BUS:B1:RS232C:DATABITS 8
-:BUS:B2:RS232C:DATABITS 8
-:BUS:B1:RS232C:TX:SOURCE CH1
-:BUS:B2:RS232C:TX:SOURCE CH1
-:BUS:B1:RS232C:RX:SOURCE OFF
-:BUS:B2:RS232C:RX:SOURCE OFF
-:BUS:B1:RS232C:DISPLAYMODE FRAME
-:BUS:B2:RS232C:DISPLAYMODE FRAME
-:BUS:B1:RS232C:DELIMITER LF
-:BUS:B2:RS232C:DELIMITER LF
-:BUS:B1:STATE 1
-:BUS:B2:STATE 0
-:BUS:B1:TYPE SPI
-:BUS:B2:TYPE PARALLEL
-:BUS:B1:POSITION 3.8600
-:BUS:B2:POSITION -2.4800
-:BUS:B1:DISPLAY:TYPE BUS
-:BUS:B2:DISPLAY:TYPE BUS
-:BUS:B1:DISPLAY:FORMAT HEXADECIMAL
-:BUS:B2:DISPLAY:FORMAT HEXADECIMAL
-:BUS:B1:LABEL "SPI"
-:BUS:B2:LABEL "Parallel"
-:BUS:B1:PARALLEL:WIDTH 16
-:BUS:B2:PARALLEL:WIDTH 4
-:BUS:B1:PARALLEL:CLOCK:ISCLOCKED NO
-:BUS:B2:PARALLEL:CLOCK:ISCLOCKED NO
-:BUS:B1:PARALLEL:CLOCK:SOURCE CH1
-:BUS:B2:PARALLEL:CLOCK:SOURCE CH1
-:BUS:B1:PARALLEL:CLOCK:EDGE RISING
-:BUS:B2:PARALLEL:CLOCK:EDGE RISING
-:BUS:B1:PARALLEL:BIT0:SOURCE D0
-:BUS:B1:PARALLEL:BIT1:SOURCE D1
-:BUS:B1:PARALLEL:BIT2:SOURCE D2
-:BUS:B1:PARALLEL:BIT3:SOURCE D3
-:BUS:B1:PARALLEL:BIT4:SOURCE D4
-:BUS:B1:PARALLEL:BIT5:SOURCE D5
-:BUS:B1:PARALLEL:BIT6:SOURCE D6
-:BUS:B1:PARALLEL:BIT7:SOURCE D7
-:BUS:B1:PARALLEL:BIT8:SOURCE D8
-:BUS:B1:PARALLEL:BIT9:SOURCE D9
-:BUS:B1:PARALLEL:BIT10:SOURCE D10
-:BUS:B1:PARALLEL:BIT11:SOURCE D11
-:BUS:B1:PARALLEL:BIT12:SOURCE D12
-:BUS:B1:PARALLEL:BIT13:SOURCE D13
-:BUS:B1:PARALLEL:BIT14:SOURCE D14
-:BUS:B1:PARALLEL:BIT15:SOURCE D15
-:BUS:B1:PARALLEL:BIT16:SOURCE CH1
-:BUS:B1:PARALLEL:BIT17:SOURCE CH2
-:BUS:B1:PARALLEL:BIT18:SOURCE CH3
-:BUS:B1:PARALLEL:BIT19:SOURCE CH4
-:BUS:B2:PARALLEL:BIT0:SOURCE D12
-:BUS:B2:PARALLEL:BIT1:SOURCE D13
-:BUS:B2:PARALLEL:BIT2:SOURCE D14
-:BUS:B2:PARALLEL:BIT3:SOURCE D15
-:BUS:B2:PARALLEL:BIT4:SOURCE D4
-:BUS:B2:PARALLEL:BIT5:SOURCE D5
-:BUS:B2:PARALLEL:BIT6:SOURCE D6
-:BUS:B2:PARALLEL:BIT7:SOURCE D7
-:BUS:B2:PARALLEL:BIT8:SOURCE D8
-:BUS:B2:PARALLEL:BIT9:SOURCE D9
-:BUS:B2:PARALLEL:BIT10:SOURCE D10
-:BUS:B2:PARALLEL:BIT11:SOURCE D11
-:BUS:B2:PARALLEL:BIT12:SOURCE D12
-:BUS:B2:PARALLEL:BIT13:SOURCE D13
-:BUS:B2:PARALLEL:BIT14:SOURCE D14
-:BUS:B2:PARALLEL:BIT15:SOURCE D15
-:BUS:B2:PARALLEL:BIT16:SOURCE CH1
-:BUS:B2:PARALLEL:BIT17:SOURCE CH2
-:BUS:B2:PARALLEL:BIT18:SOURCE CH3
-:BUS:B2:PARALLEL:BIT19:SOURCE CH4
-:BUS:LOWERTHRESHOLD:CH1 172.0000E-3
-:BUS:LOWERTHRESHOLD:CH2 0.0E+0
-:BUS:LOWERTHRESHOLD:CH3 0.0E+0
-:BUS:LOWERTHRESHOLD:CH4 0.0E+0
-:BUS:UPPERTHRESHOLD:CH1 256.0000E-3
-:BUS:UPPERTHRESHOLD:CH2 1.4000
-:BUS:UPPERTHRESHOLD:CH3 1.4000
-:BUS:UPPERTHRESHOLD:CH4 1.4000
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:SPI:CONDITION SS
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:SPI:CONDITION SS
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:SPI:DATA:MOSI:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:SPI:DATA:MOSI:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:SPI:DATA:MISO:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:SPI:DATA:MISO:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:SPI:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:SPI:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:RS232C:CONDITION TXSTART
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:RS232C:CONDITION TXSTART
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:RS232C:RX:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:RS232C:RX:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:RS232C:RX:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:RS232C:RX:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:RS232C:TX:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:RS232C:TX:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:RS232C:TX:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:RS232C:TX:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:CONDITION START
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:CONDITION START
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:DATA:DIRECTION NOCARE
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:DATA:DIRECTION NOCARE
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:ADDRESS:MODE ADDR7
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:ADDRESS:MODE ADDR7
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:ADDRESS:TYPE USER
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:ADDRESS:TYPE USER
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:I2C:ADDRESS:VALUE "XXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:I2C:ADDRESS:VALUE "XXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:CONDITION SOF
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:CONDITION SOF
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:FRAMETYPE DATA
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:FRAMETYPE DATA
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:DATA:DIRECTION NOCARE
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:DATA:DIRECTION NOCARE
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:DATA:QUALIFIER EQUAL
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:DATA:QUALIFIER EQUAL
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:IDENTIFIER:MODE STANDARD
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:IDENTIFIER:MODE STANDARD
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:CAN:IDENTIFIER:VALUE "XXXXXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:CAN:IDENTIFIER:VALUE "XXXXXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:CONDITION SYNCFIELD
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:CONDITION SYNCFIELD
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:DATA:SIZE 1
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:DATA:VALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:DATA:HIVALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:DATA:HIVALUE "XXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:DATA:QUALIFIER EQUAL
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:DATA:QUALIFIER EQUAL
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:IDENTIFIER:VALUE "XXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:IDENTIFIER:VALUE "XXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:LIN:ERRTYPE SYNC
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:LIN:ERRTYPE SYNC
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B1:PARALLEL:VALUE "XXXXXXXXXXXXXXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:B2:PARALLEL:VALUE "XXXX"
-:SEARCH:SEARCH1:TRIGGER:A:BUS:SOURCE B1
-:SEARCH:SEARCH1:TRIGGER:A:TYPE EDGE
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:CH1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:CH2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:CH3 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:CH4 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:MATH 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:REF1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LEVEL:REF2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:CH1 389.2000E-3
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:CH2 1.4000
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:CH3 1.4000
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:CH4 1.4000
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:MATH 492.0000E-3
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:REF1 492.0000E-3
-:SEARCH:SEARCH1:TRIGGER:A:UPPERTHRESHOLD:REF2 492.0000E-3
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:CH1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:CH2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:CH3 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:CH4 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:MATH 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:REF1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOWERTHRESHOLD:REF2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:EDGE:SOURCE D8
-:SEARCH:SEARCH1:TRIGGER:A:EDGE:SLOPE FALL
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:FUNCTION AND
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:CH1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:CH2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:CH3 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:CH4 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:MATH 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:REF1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:THRESHOLD:REF2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CH1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CH2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CH3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CH4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:MATH X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:REF1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:REF2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:REF3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:REF4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CLOCK:SOURCE NONE
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:CLOCK:EDGE RISE
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D0 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D5 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D6 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D7 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D8 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D9 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D10 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D11 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D12 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D13 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D14 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:INPUT:D15 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:CH1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:CH2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:CH3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:CH4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:MATH X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:REF1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:REF2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:REF3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:REF4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D0 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D1 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D2 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D3 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D4 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D5 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D6 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D7 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D8 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D9 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D10 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D11 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D12 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D13 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D14 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:INPUT:D15 X
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:WHEN TRUE
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:WHEN:LESSLIMIT 8.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:LOGIC:PATTERN:WHEN:MORELIMIT 8.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:PULSEWIDTH:POLARITY POSITIVE
-:SEARCH:SEARCH1:TRIGGER:A:PULSEWIDTH:WHEN LESSTHAN
-:SEARCH:SEARCH1:TRIGGER:A:PULSEWIDTH:WIDTH 8.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:RUNT:POLARITY POSITIVE
-:SEARCH:SEARCH1:TRIGGER:A:RUNT:WHEN OCCURS
-:SEARCH:SEARCH1:TRIGGER:A:RUNT:WIDTH 8.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:TRANSITION:POLARITY POSITIVE
-:SEARCH:SEARCH1:TRIGGER:A:TRANSITION:WHEN SLOWER
-:SEARCH:SEARCH1:TRIGGER:A:TRANSITION:DELTATIME 8.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:CLOCK:SOURCE CH1
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:CLOCK:EDGE RISE
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:CLOCK:THRESHOLD 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:DATA:SOURCE NONE
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:DATA:THRESHOLD 9.9100E+37
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:HOLDTIME 2.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:SETTIME 2.0000E-9
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:CH1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:CH2 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:CH3 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:CH4 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:MATH 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:REF1 0.0E+0
-:SEARCH:SEARCH1:TRIGGER:A:SETHOLD:THRESHOLD:REF2 0.0E+0
-:SEARCH:SEARCH1:STATE 0
-:ZOOM:MODE 1
-:ZOOM:ZOOM1:STATE 1
-:ZOOM:ZOOM1:SCALE 4.0000E-6
-:ZOOM:ZOOM1:POSITION 57.4800
-:ZOOM:ZOOM1:HORIZONTAL:POSITION 57.4800
-:ZOOM:ZOOM1:HORIZONTAL:SCALE 4.0000E-6
-:CURSOR:FUNCTION OFF
-:CURSOR:MODE INDEPENDENT
-:CURSOR:VBARS:POSITION1 10.2057200E-6
-:CURSOR:VBARS:POSITION2 10.2217600E-6
-:CURSOR:VBARS:UNITS SECONDS
-:CURSOR:HBARS:POSITION1 0.0E+0
-:CURSOR:HBARS:POSITION2 0.0E+0
-:CURSOR:HBARS:UNITS BASE
-:CURSOR:XY:READOUT RECTANGULAR
-:CURSOR:XY:RECTANGULAR:X:POSITION1 0.0E+0
-:CURSOR:XY:RECTANGULAR:X:POSITION2 0.0E+0
-:CURSOR:XY:RECTANGULAR:Y:POSITION1 0.0E+0
-:CURSOR:XY:RECTANGULAR:Y:POSITION2 0.0E+0
-:MEASUREMENT:IMMED:DELAY:DIRECTION FORWARDS
-:MEASUREMENT:IMMED:DELAY:EDGE1 RISE
-:MEASUREMENT:IMMED:DELAY:EDGE2 RISE
-:MEASUREMENT:IMMED:TYPE PERIOD
-:MEASUREMENT:IMMED:SOURCE1 CH1
-:MEASUREMENT:IMMED:SOURCE2 CH2
-:MEASUREMENT:MEAS1:DELAY:DIRECTION FORWARDS
-:MEASUREMENT:MEAS2:DELAY:DIRECTION FORWARDS
-:MEASUREMENT:MEAS3:DELAY:DIRECTION FORWARDS
-:MEASUREMENT:MEAS4:DELAY:DIRECTION FORWARDS
-:MEASUREMENT:MEAS1:DELAYfq=C<dDžf
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