OpenCores

systemcaes/trunk Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: systemcaes/web_uploads =================================================================== --- systemcaes/web_uploads (nonexistent) +++ systemcaes/web_uploads (revision 28)

systemcaes/web_uploads Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: systemcaes/branches =================================================================== --- systemcaes/branches (nonexistent) +++ systemcaes/branches (revision 28)

systemcaes/branches Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: systemcaes/tags/V10/bench/systemc/adapt.h =================================================================== --- systemcaes/tags/V10/bench/systemc/adapt.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/adapt.h (revision 28) @@ -0,0 +1,67 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// sc_fifo to sc_signal adapter //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" + +SC_MODULE(adapter){ + + sc_in clk; + sc_in rt_ready_i; + sc_in > rt_aes_data_i; + + sc_fifo_out > rt_aes_data_o; + + void adapt(){ + + while(1){ + wait(clk->posedge_event()); + if(rt_ready_i.read()) + rt_aes_data_o.write(rt_aes_data_i.read()); + } + + } + + SC_CTOR(adapter){ + SC_THREAD(adapt); + } + }; Index: systemcaes/tags/V10/bench/systemc/aesmodel.h =================================================================== --- systemcaes/tags/V10/bench/systemc/aesmodel.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/aesmodel.h (revision 28) @@ -0,0 +1,108 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES C behavioral model //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// C behavioral model used as golden model //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +void decrypt_aes(unsigned char *block, unsigned char *key); +void encrypt_aes(unsigned char *block, unsigned char *key); + +SC_MODULE(aesmodel){ + + sc_fifo_in decrypt; + sc_fifo_in > aes_key_i; + sc_fifo_in > aes_data_i; + + sc_fifo_out > aes_data_o; + + void aes_thread(){ + unsigned char aes_key[16],aes_data[16],aes_out[16]; + sc_biguint<128> aes_key_i_var,aes_data_i_var,aes_data_o_var; + + while(1){ + + aes_data_i_var=aes_data_i.read(); + aes_key_i_var=aes_key_i.read(); + + //Convert a sc_biguint<128> to an array of 8 char + aes_key[0]=(sc_uint<8>)aes_key_i_var.range(127,120);aes_key[1]=(sc_uint<8>)aes_key_i_var.range(119,112);aes_key[2]=(sc_uint<8>)aes_key_i_var.range(111,104);aes_key[3]=(sc_uint<8>)aes_key_i_var.range(103,96); + aes_key[4]=(sc_uint<8>)aes_key_i_var.range(95,88);aes_key[5]=(sc_uint<8>)aes_key_i_var.range(87,80);aes_key[6]=(sc_uint<8>)aes_key_i_var.range(79,72);aes_key[7]=(sc_uint<8>)aes_key_i_var.range(71,64); + aes_key[8]=(sc_uint<8>)aes_key_i_var.range(63,56);aes_key[9]=(sc_uint<8>)aes_key_i_var.range(55,48);aes_key[10]=(sc_uint<8>)aes_key_i_var.range(47,40);aes_key[11]=(sc_uint<8>)aes_key_i_var.range(39,32); + aes_key[12]=(sc_uint<8>)aes_key_i_var.range(31,24);aes_key[13]=(sc_uint<8>)aes_key_i_var.range(23,16);aes_key[14]=(sc_uint<8>)aes_key_i_var.range(15,8);aes_key[15]=(sc_uint<8>)aes_key_i_var.range(7,0); + + + aes_data[0]=(sc_uint<8>)aes_data_i_var.range(127,120);aes_data[1]=(sc_uint<8>)aes_data_i_var.range(119,112);aes_data[2]=(sc_uint<8>)aes_data_i_var.range(111,104);aes_data[3]=(sc_uint<8>)aes_data_i_var.range(103,96); + aes_data[4]=(sc_uint<8>)aes_data_i_var.range(95,88);aes_data[5]=(sc_uint<8>)aes_data_i_var.range(87,80);aes_data[6]=(sc_uint<8>)aes_data_i_var.range(79,72);aes_data[7]=(sc_uint<8>)aes_data_i_var.range(71,64); + aes_data[8]=(sc_uint<8>)aes_data_i_var.range(63,56);aes_data[9]=(sc_uint<8>)aes_data_i_var.range(55,48);aes_data[10]=(sc_uint<8>)aes_data_i_var.range(47,40);aes_data[11]=(sc_uint<8>)aes_data_i_var.range(39,32); + aes_data[12]=(sc_uint<8>)aes_data_i_var.range(31,24);aes_data[13]=(sc_uint<8>)aes_data_i_var.range(23,16);aes_data[14]=(sc_uint<8>)aes_data_i_var.range(15,8);aes_data[15]=(sc_uint<8>)aes_data_i_var.range(7,0); + + + + if(!decrypt.read()) + encrypt_aes(aes_data,aes_key); + else + decrypt_aes(aes_data,aes_key); + + for(int i=0;i<16;i++) + aes_out[i]=aes_data[i]; + + aes_data_o_var.range(127,120)=aes_out[0];aes_data_o_var.range(119,112)=aes_out[1];aes_data_o_var.range(111,104)=aes_out[2];aes_data_o_var.range(103,96)=aes_out[3]; + aes_data_o_var.range(95,88)=aes_out[4];aes_data_o_var.range(87,80)=aes_out[5];aes_data_o_var.range(79,72)=aes_out[6];aes_data_o_var.range(71,64)=aes_out[7]; + aes_data_o_var.range(63,56)=aes_out[8];aes_data_o_var.range(55,48)=aes_out[9];aes_data_o_var.range(47,40)=aes_out[10];aes_data_o_var.range(39,32)=aes_out[11]; + aes_data_o_var.range(31,24)=aes_out[12];aes_data_o_var.range(23,16)=aes_out[13];aes_data_o_var.range(15,8)=aes_out[14];aes_data_o_var.range(7,0)=aes_out[15]; + + aes_data_o.write(aes_data_o_var); + } + } + + + + SC_CTOR(aesmodel){ + + SC_THREAD(aes_thread); + + } +}; Index: systemcaes/tags/V10/bench/systemc/main.cpp =================================================================== --- systemcaes/tags/V10/bench/systemc/main.cpp (nonexistent) +++ systemcaes/tags/V10/bench/systemc/main.cpp (revision 28) @@ -0,0 +1,132 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Main simulation file //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Connect all the modules and begin the simulation //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" +#include "iostream.h" +#include "aes.h" +#include "aesfunctions.h" +#include "aesmodel.h" +#include "stimulus.h" +#include "adapt.h" +#include "checker.h" + +int sc_main(int argc, char* argv[]){ + + sc_clock clk("clk",20); + + test *t; + aes_transactor *tr; + aes *ae1; + aesmodel *am1; + adapter *ad1; + checker *ch1; + + t=new test("testbench"); + tr=new aes_transactor("aes_transactor"); + am1=new aesmodel("aes_C_model"); + ae1=new aes("aes"); + ad1=new adapter("adapter"); + ch1=new checker("checker"); + + t->transactor(*tr); + + sc_signal reset; + sc_signal rt_load; + sc_signal rt_decrypt; + sc_signal > rt_data_i; + sc_signal > rt_key; + + sc_signal > rt_data_o; + sc_signal rt_ready; + + sc_fifo > rt_aes_data_ck; + sc_fifo > c_aes_data_ck; + + sc_fifo c_decrypt; + sc_fifo > c_key; + sc_fifo > c_data; + + ch1->reset(reset); + ch1->rt_aes_data_i(rt_aes_data_ck); + ch1->c_aes_data_i(c_aes_data_ck); + + ad1->clk(clk); + ad1->rt_ready_i(rt_ready); + ad1->rt_aes_data_i(rt_data_o); + ad1->rt_aes_data_o(rt_aes_data_ck); + + am1->decrypt(c_decrypt); + am1->aes_key_i(c_key); + am1->aes_data_i(c_data); + am1->aes_data_o(c_aes_data_ck); + + ae1->clk(clk); + ae1->reset(reset); + ae1->load_i(rt_load); + ae1->decrypt_i(rt_decrypt); + ae1->data_i(rt_data_i); + ae1->key_i(rt_key); + ae1->data_o(rt_data_o); + ae1->ready_o(rt_ready); + + tr->clk(clk); + tr->reset(reset); + //Ports to RT model + tr->rt_load_o(rt_load); + tr->rt_decrypt_o(rt_decrypt); + tr->rt_aes_data_o(rt_data_i); + tr->rt_aes_key_o(rt_key); + tr->rt_aes_ready_i(rt_ready); + //Ports to C model + tr->c_decrypt_o(c_decrypt); + tr->c_aes_key_o(c_key); + tr->c_aes_data_o(c_data); + + sc_start(-1); + + return 0; + + } Index: systemcaes/tags/V10/bench/systemc/stimulus.cpp =================================================================== --- systemcaes/tags/V10/bench/systemc/stimulus.cpp (nonexistent) +++ systemcaes/tags/V10/bench/systemc/stimulus.cpp (revision 28) @@ -0,0 +1,80 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Random testbench stimulus generation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Generate random stimulus to the core //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "stimulus.h" + +void test::tb(){ + + sc_biguint<128> aes_key_var,aes_data_var; + bool decrypt_var; + + scv_random::set_global_seed(53246); + + random_generator rg("random_generator"); + + transactor->resetea(); + + while(1){ + + rg.aes_key->next(); + rg.aes_data->next(); + rg.decrypt->next(); + + + aes_data_var=*(rg.aes_data); + aes_key_var=*(rg.aes_key); + decrypt_var=*(rg.decrypt); + + if(!decrypt_var){ + //cout << "Encrypt: 0x" << (int)des_data_var.range(63,32) << (int)des_data_var.range(31,0) << " 0x" << (int)des_key_var.range(63,32) << (int)des_key_var.range(31,0) << " " << sc_time_stamp() << endl; + transactor->encrypt(aes_data_var,aes_key_var); + }else{ + //cout << "Decrypt: 0x" << (int)des_data_var.range(63,32) << (int)des_data_var.range(31,0) << " 0x" << (int)des_key_var.range(63,32) << (int)des_key_var.range(31,0) << " " << sc_time_stamp() << endl; + transactor->decrypt(aes_data_var,aes_key_var); + } + } + +} Index: systemcaes/tags/V10/bench/systemc/transactor.h =================================================================== --- systemcaes/tags/V10/bench/systemc/transactor.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/transactor.h (revision 28) @@ -0,0 +1,151 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Transactor for AES ramdom verification //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Transactor acording to TLM for SystemC AES project //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +class transactor_ports:public sc_module{ + public: + + // Ports + sc_in clk; + sc_out reset; + + //Ports to RT model + sc_out rt_load_o; + sc_out rt_decrypt_o; + sc_out > rt_aes_data_o; + sc_out > rt_aes_key_o; + sc_in rt_aes_ready_i; + + //Ports to C model + sc_fifo_out c_decrypt_o; + sc_fifo_out > c_aes_key_o; + sc_fifo_out > c_aes_data_o; + +}; + + +class rw_task_if : virtual public sc_interface { + + public: + //Funciones para el transactor + virtual void resetea(void)=0; + virtual void encrypt(sc_biguint<128> data, sc_biguint<128> key)=0; + virtual void decrypt(sc_biguint<128> data, sc_biguint<128> key)=0; + virtual void wait_cycles(int cycles)=0; + +}; + + +//Transactor +class aes_transactor:public rw_task_if,public transactor_ports { + + public: + + SC_CTOR(aes_transactor){ + + cout.unsetf(ios::dec); + cout.setf(ios::hex); + + } + + + void resetea(void){ + reset.write(0); + wait(clk->posedge_event()); + reset.write(1); + cout << "Reseted" << endl; + } + + void encrypt(sc_biguint<128> data, sc_biguint<128> key){ + + wait(clk->posedge_event()); + + //To RT model + rt_load_o.write(1); + rt_aes_data_o.write(data); + rt_aes_key_o.write(key); + rt_decrypt_o.write(0); + + //To C model through fifos + c_aes_data_o.write(data); + c_aes_key_o.write(key); + c_decrypt_o.write(0); + + wait(clk->posedge_event()); + rt_load_o.write(0); + wait(rt_aes_ready_i->posedge_event()); + } + + void decrypt(sc_biguint<128> data, sc_biguint<128> key){ + + wait(clk->posedge_event()); + + //To RT model + rt_load_o.write(1); + rt_aes_data_o.write(data); + rt_aes_key_o.write(key); + rt_decrypt_o.write(1); + + //To C model through fifos + c_aes_data_o.write(data); + c_aes_key_o.write(key); + c_decrypt_o.write(1); + + wait(clk->posedge_event()); + rt_load_o.write(0); + wait(rt_aes_ready_i->posedge_event()); + + } + + void wait_cycles(int cycles){ + for(int i=0;iposedge_event()); + } + } + +}; Index: systemcaes/tags/V10/bench/systemc/aesfunctions.h =================================================================== --- systemcaes/tags/V10/bench/systemc/aesfunctions.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/aesfunctions.h (revision 28) @@ -0,0 +1,448 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES C encrypt and decrypt functions for C golden model //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// AES C encrypt and decrypt functions for C golden model //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +static const unsigned char Alogtable[] = { +1, 3, 5, 15, 17, 51, 85, 255, 26, 46, 114, 150, 161, 248, 19, 53, +95, 225, 56, 72, 216, 115, 149, 164, 247, 2, 6, 10, 30, 34, 102, 170, +229, 52, 92, 228, 55, 89, 235, 38, 106, 190, 217, 112, 144, 171, 230, 49, +83, 245, 4, 12, 20, 60, 68, 204, 79, 209, 104, 184, 211, 110, 178, 205, +76, 212, 103, 169, 224, 59, 77, 215, 98, 166, 241, 8, 24, 40, 120, 136, +131, 158, 185, 208, 107, 189, 220, 127, 129, 152, 179, 206, 73, 219, 118, 154, +181, 196, 87, 249, 16, 48, 80, 240, 11, 29, 39, 105, 187, 214, 97, 163, +254, 25, 43, 125, 135, 146, 173, 236, 47, 113, 147, 174, 233, 32, 96, 160, +251, 22, 58, 78, 210, 109, 183, 194, 93, 231, 50, 86, 250, 21, 63, 65, +195, 94, 226, 61, 71, 201, 64, 192, 91, 237, 44, 116, 156, 191, 218, 117, +159, 186, 213, 100, 172, 239, 42, 126, 130, 157, 188, 223, 122, 142, 137, 128, +155, 182, 193, 88, 232, 35, 101, 175, 234, 37, 111, 177, 200, 67, 197, 84, +252, 31, 33, 99, 165, 244, 7, 9, 27, 45, 119, 153, 176, 203, 70, 202, +69, 207, 74, 222, 121, 139, 134, 145, 168, 227, 62, 66, 198, 81, 243, 14, +18, 54, 90, 238, 41, 123, 141, 140, 143, 138, 133, 148, 167, 242, 13, 23, +57, 75, 221, 124, 132, 151, 162, 253, 28, 36, 108, 180, 199, 82, 246, 1, +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Logtable[] = { +0, 0, 25, 1, 50, 2, 26, 198, 75, 199, 27, 104, 51, 238, 223, 3, +100, 4, 224, 14, 52, 141, 129, 239, 76, 113, 8, 200, 248, 105, 28, 193, +125, 194, 29, 181, 249, 185, 39, 106, 77, 228, 166, 114, 154, 201, 9, 120, +101, 47, 138, 5, 33, 15, 225, 36, 18, 240, 130, 69, 53, 147, 218, 142, +150, 143, 219, 189, 54, 208, 206, 148, 19, 92, 210, 241, 64, 70, 131, 56, +102, 221, 253, 48, 191, 6, 139, 98, 179, 37, 226, 152, 34, 136, 145, 16, +126, 110, 72, 195, 163, 182, 30, 66, 58, 107, 40, 84, 250, 133, 61, 186, +43, 121, 10, 21, 155, 159, 94, 202, 78, 212, 172, 229, 243, 115, 167, 87, +175, 88, 168, 80, 244, 234, 214, 116, 79, 174, 233, 213, 231, 230, 173, 232, +44, 215, 117, 122, 235, 22, 11, 245, 89, 203, 95, 176, 156, 169, 81, 160, +127, 12, 246, 111, 23, 196, 73, 236, 216, 67, 31, 45, 164, 118, 123, 183, +204, 187, 62, 90, 251, 96, 177, 134, 59, 82, 161, 108, 170, 85, 41, 157, +151, 178, 135, 144, 97, 190, 220, 252, 188, 149, 207, 205, 55, 63, 91, 209, +83, 57, 132, 60, 65, 162, 109, 71, 20, 42, 158, 93, 86, 242, 211, 171, +68, 17, 146, 217, 35, 32, 46, 137, 180, 124, 184, 38, 119, 153, 227, 165, +103, 74, 237, 222, 197, 49, 254, 24, 13, 99, 140, 128, 192, 247, 112, 7, +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Sen[] = { + 99, 124, 119, 123, 242, 107, 111, 197, + 48, 1, 103, 43, 254, 215, 171, 118, + 202, 130, 201, 125, 250, 89, 71, 240, + 173, 212, 162, 175, 156, 164, 114, 192, + 183, 253, 147, 38, 54, 63, 247, 204, + 52, 165, 229, 241, 113, 216, 49, 21, + 4, 199, 35, 195, 24, 150, 5, 154, + 7, 18, 128, 226, 235, 39, 178, 117, + 9, 131, 44, 26, 27, 110, 90, 160, + 82, 59, 214, 179, 41, 227, 47, 132, + 83, 209, 0, 237, 32, 252, 177, 91, + 106, 203, 190, 57, 74, 76, 88, 207, + 208, 239, 170, 251, 67, 77, 51, 133, + 69, 249, 2, 127, 80, 60, 159, 168, + 81, 163, 64, 143, 146, 157, 56, 245, + 188, 182, 218, 33, 16, 255, 243, 210, + 205, 12, 19, 236, 95, 151, 68, 23, + 196, 167, 126, 61, 100, 93, 25, 115, + 96, 129, 79, 220, 34, 42, 144, 136, + 70, 238, 184, 20, 222, 94, 11, 219, + 224, 50, 58, 10, 73, 6, 36, 92, + 194, 211, 172, 98, 145, 149, 228, 121, + 231, 200, 55, 109, 141, 213, 78, 169, + 108, 86, 244, 234, 101, 122, 174, 8, + 186, 120, 37, 46, 28, 166, 180, 198, + 232, 221, 116, 31, 75, 189, 139, 138, + 112, 62, 181, 102, 72, 3, 246, 14, + 97, 53, 87, 185, 134, 193, 29, 158, + 225, 248, 152, 17, 105, 217, 142, 148, + 155, 30, 135, 233, 206, 85, 40, 223, + 140, 161, 137, 13, 191, 230, 66, 104, + 65, 153, 45, 15, 176, 84, 187, 22 +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Sde[] = { +82, 9, 106, 213, 48, 54, 165, 56, 191, 64, 163, 158, 129, 243, 215, 251, +124, 227, 57, 130, 155, 47, 255, 135, 52, 142, 67, 68, 196, 222, 233, 203, +84, 123, 148, 50, 166, 194, 35, 61, 238, 76, 149, 11, 66, 250, 195, 78, +8, 46, 161, 102, 40, 217, 36, 178, 118, 91, 162, 73, 109, 139, 209, 37, +114, 248, 246, 100, 134, 104, 152, 22, 212, 164, 92, 204, 93, 101, 182, 146, +108, 112, 72, 80, 253, 237, 185, 218, 94, 21, 70, 87, 167, 141, 157, 132, +144, 216, 171, 0, 140, 188, 211, 10, 247, 228, 88, 5, 184, 179, 69, 6, +208, 44, 30, 143, 202, 63, 15, 2, 193, 175, 189, 3, 1, 19, 138, 107, +58, 145, 17, 65, 79, 103, 220, 234, 151, 242, 207, 206, 240, 180, 230, 115, +150, 172, 116, 34, 231, 173, 53, 133, 226, 249, 55, 232, 28, 117, 223, 110, +71, 241, 26, 113, 29, 41, 197, 137, 111, 183, 98, 14, 170, 24, 190, 27, +252, 86, 62, 75, 198, 210, 121, 32, 154, 219, 192, 254, 120, 205, 90, 244, +31, 221, 168, 51, 136, 7, 199, 49, 177, 18, 16, 89, 39, 128, 236, 95, +96, 81, 127, 169, 25, 181, 74, 13, 45, 229, 122, 159, 147, 201, 156, 239, +160, 224, 59, 77, 174, 42, 245, 176, 200, 235, 187, 60, 131, 83, 153, 97, +23, 43, 4, 126, 186, 119, 214, 38, 225, 105, 20, 99, 85, 33, 12, 125, +}; + +void +switchblock(unsigned char *block) +{ + int i; + unsigned char *aux; + aux = (unsigned char *)malloc(16*sizeof(char)); + + *(aux) = *(block); + *(aux + 1) = *(block + 4); + *(aux + 2) = *(block + 8); + *(aux + 3) = *(block + 12); + *(aux + 4) = *(block + 1); + *(aux + 5) = *(block + 5); + *(aux + 6) = *(block + 9); + *(aux + 7) = *(block + 13); + *(aux + 8) = *(block + 2); + *(aux + 9) = *(block + 6); + *(aux + 10) = *(block + 10); + *(aux + 11) = *(block + 14); + *(aux + 12) = *(block + 3); + *(aux + 13) = *(block + 7); + *(aux + 14) = *(block + 11); + *(aux + 15) = *(block + 15); + + for(i = 0; i < 16; i++) + *(block + i) = *(aux + i); + +} + +void +RotWord(unsigned char *a) +{ +unsigned char aux; +aux = *(a + 0); +*(a + 0) = *(a + 1); +*(a + 1) = *(a + 2); +*(a + 2) = *(a + 3); +*(a + 3) = aux; +} +/*----------------------------------------------------------------------------*/ +void +KeySchedule(unsigned char *key, unsigned char *rcon) +{ +unsigned char aux1[4]; +unsigned char aux2[4]; +unsigned char aux3[4]; +int i = 0; +for(i = 0; i < 4; i++) + { + aux1[i] = *(key + i*4 + 3); + aux2[i] = *(key + i*4); + } +RotWord((unsigned char *)aux1); + +//SubBytes +for(i = 0; i < 4; i++) + { + aux1[i] = Sen[aux1[i]]; + } +for(i = 0; i < 4; i++) + { + aux3[i] = aux2[i] ^ aux1[i] ^ *(rcon + i); + *(key + i*4) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 1) ^ aux3[i]; + *(key + i*4 + 1) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 2) ^ aux3[i]; + *(key + i*4 + 2) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 3) ^ aux3[i]; + *(key + i*4 + 3) = aux3[i]; + } + +} +/*----------------------------------------------------------------------------*/ +unsigned char +mul(unsigned char a, unsigned char b) +{ +if (a && b) + return Alogtable[(Logtable[a] + Logtable[b])%255]; +else + return 0; +} +/*----------------------------------------------------------------------------*/ +void +MixColum(unsigned char *state) +{ +int j = 0; +unsigned char aux = 0; +unsigned char aux_vector[16]; + +for(j = 0; j < 4; j++) + { + aux = mul(0x2, *(state + j)) ^ mul(0x3, *(state + j + 4)) ^ *(state + j + 8) ^ *(state + j + 12); + aux_vector[j] = aux; + aux = *(state + j) ^ mul(0x2, *(state + j + 4)) ^ mul(0x3, *(state + j + 8)) ^ *(state + j + 12); + aux_vector[j + 4] = aux; + aux = *(state + j) ^ *(state + j + 4) ^ mul(0x2, *(state + j + 8)) ^ mul(0x3, *(state + j + 12)); + aux_vector[j + 8] = aux; + aux = mul(0x3, *(state + j)) ^ *(state + j + 4) ^ *(state + j + 8) ^ mul(0x2, *(state + j + 12)); + aux_vector[j + 12] = aux; + } +for(j = 0; j < 16; j++) + *(state + j) = aux_vector[j]; +} +/*----------------------------------------------------------------------------*/ +void +InvMixColum(unsigned char *state) +{ +int j = 0; +unsigned char aux = 0; +unsigned char aux_vector[16]; + +for(j = 0; j < 4; j++) + { + aux = mul(0x0e, *(state + j)) ^ mul(0x0b, *(state + j + 4)) ^ mul(0x0d, *(state + j + 8)) ^ mul(0x09, *(state + j + 12)); + aux_vector[j] = aux; + aux = mul(0x09, *(state + j)) ^ mul(0x0e, *(state + j + 4)) ^ mul(0x0b, *(state + j + 8)) ^ mul(0x0d, *(state + j + 12)); + aux_vector[j + 4] = aux; + aux = mul(0x0d, *(state + j)) ^ mul(0x09, *(state + j + 4)) ^ mul(0x0e, *(state + j + 8)) ^ mul(0x0b, *(state + j + 12)); + aux_vector[j + 8] = aux; + aux = mul(0x0b, *(state + j)) ^ mul(0x0d, *(state + j + 4)) ^ mul(0x09, *(state + j + 8)) ^ mul(0x0e, *(state + j + 12)); + aux_vector[j + 12] = aux; + } +for(j = 0; j < 16; j++) + *(state + j) = aux_vector[j]; +} + +/*----------------------------------------------------------------------------*/ +void +AddRoundKey(unsigned char *state, unsigned char *key) +{ +int i = 0; +for(i = 0; i < 16; i++) + *(state + i) ^= *(key + i); +} +/*----------------------------------------------------------------------------*/ +/*void +PrintState(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + diag_printf("%x ", *(state + i)); + if((i+1) % 4 == 0) + diag_printf("\n"); + + } +}*/ +/*----------------------------------------------------------------------------*/ +void +SubBytes(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + *(state + i) = Sen[*(state + i)]; + } +} +/*----------------------------------------------------------------------------*/ +void +InvSubBytes(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + *(state + i) = Sde[*(state + i)]; + } +} +/*----------------------------------------------------------------------------*/ + +void +ShiftRows(unsigned char *state) +{ +unsigned char AUX[16]; +int i = 0; +for(i = 0; i < 16; i++) + { + AUX[i] = *(state + i); + } +*(state + 4) = AUX[5]; +*(state + 5) = AUX[6]; +*(state + 6) = AUX[7]; +*(state + 7) = AUX[4]; + +*(state + 8) = AUX[10]; +*(state + 9) = AUX[11]; +*(state + 10) = AUX[8]; +*(state + 11) = AUX[9]; + +*(state + 12) = AUX[15]; +*(state + 13) = AUX[12]; +*(state + 14) = AUX[13]; +*(state + 15) = AUX[14]; +} +/*----------------------------------------------------------------------------*/ + +void +InvShiftRows(unsigned char *state) +{ +unsigned char AUX[16]; +int i = 0; +for(i = 0; i < 16; i++) + { + AUX[i] = *(state + i); + } +*(state + 4) = AUX[7]; +*(state + 5) = AUX[4]; +*(state + 6) = AUX[5]; +*(state + 7) = AUX[6]; + +*(state + 8) = AUX[10]; +*(state + 9) = AUX[11]; +*(state + 10) = AUX[8]; +*(state + 11) = AUX[9]; + +*(state + 12) = AUX[13]; +*(state + 13) = AUX[14]; +*(state + 14) = AUX[15]; +*(state + 15) = AUX[12]; +} +/*----------------------------------------------------------------------------*/ + +unsigned char* +KeyExpand(unsigned char *key) +{ +int i = 0; +int j = 0; + +unsigned char aux[10] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36}; +unsigned char rcon[4] = {0x00, 0x00, 0x00, 0x00}; + +unsigned char auxmalloc[1000]; +unsigned char *expandedkey; +expandedkey = (unsigned char *)auxmalloc; + +for(i = 0; i < 16; i++) + *(expandedkey + i) = *(key + i); + +for(i = 0; i < 10; i++) + { + rcon[0] = aux[i]; + KeySchedule((unsigned char *)(key), (unsigned char *)rcon); + for(j = 0; j < 16; j++) + *(expandedkey + 16*(i + 1) + j) = *(key + j); + } +return expandedkey; +} +/*----------------------------------------------------------------------------*/ +void +encrypt_aes(unsigned char *block, unsigned char *key) +{ +int i = 0; + +switchblock(block); +switchblock(key); + + +unsigned char *expandedkey; +expandedkey = KeyExpand((unsigned char *)key); + +AddRoundKey((unsigned char *)block, (unsigned char *)expandedkey); + + + +for(i = 0; i < 10; i++) + { + SubBytes((unsigned char *)block); + ShiftRows((unsigned char *)block); + if(i!=9) + MixColum((unsigned char *)block); + AddRoundKey((unsigned char *)block, (unsigned char *)(expandedkey + 16*(i + 1))); + } +switchblock(block); +} +/*----------------------------------------------------------------------------*/ +void +decrypt_aes(unsigned char *block, unsigned char *key) +{ +int i = 0; + +switchblock(block); +switchblock(key); + +unsigned char *expandedkey; +expandedkey = KeyExpand((unsigned char *)key); + +for(i = 10; i > 0; i--) + { + AddRoundKey((unsigned char *)block, (unsigned char *)(expandedkey + 16*i)); + if(i!=10) + InvMixColum((unsigned char *)block); + InvShiftRows((unsigned char *)block); + InvSubBytes((unsigned char *)block); + } +AddRoundKey((unsigned char *)block, (unsigned char *)expandedkey); +switchblock(block); +} +/*----------------------------------------------------------------------------*/ Index: systemcaes/tags/V10/bench/systemc/checker.h =================================================================== --- systemcaes/tags/V10/bench/systemc/checker.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/checker.h (revision 28) @@ -0,0 +1,81 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Checker //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Check that the outputs from the RTL model and the C model //// +//// used as golden model are the same //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +SC_MODULE(checker){ + + sc_in reset; + + sc_fifo_in > rt_aes_data_i; + sc_fifo_in > c_aes_data_i; + + void check(){ + sc_biguint<128> rt_data_var,c_data_var; + + wait(reset->posedge_event()); + + while(1){ + if(reset.read()){ + rt_data_var=rt_aes_data_i.read(); + c_data_var=c_aes_data_i.read(); + if(rt_data_var!=c_data_var){ + cout << "Simulation mismatch: 0x" << (int)(sc_uint<32>)rt_data_var.range(127,96) << (int)(sc_uint<32>)rt_data_var.range(95,64) << (int)(sc_uint<32>)rt_data_var.range(31,0) << " 0x" << (int)(sc_uint<32>)c_data_var.range(127,96) << (int)(sc_uint<32>)c_data_var.range(95,64) << (int)(sc_uint<32>)c_data_var.range(63,32) << (int)(sc_uint<32>)c_data_var.range(31,0) << " " << sc_time_stamp() << endl; + exit(0); + }else{ + cout << "OK: 0x" << (int)(sc_uint<32>)rt_data_var.range(127,96) << (int)(sc_uint<32>)rt_data_var.range(95,64) << (int)(sc_uint<32>)rt_data_var.range(31,0) << " 0x" << (int)(sc_uint<32>)c_data_var.range(127,96) << (int)(sc_uint<32>)c_data_var.range(95,64) << (int)(sc_uint<32>)c_data_var.range(63,32) << (int)(sc_uint<32>)c_data_var.range(31,0) << " " << sc_time_stamp() << endl; + } + }else + wait(reset->posedge_event()); + } + } + + SC_CTOR(checker){ + SC_THREAD(check); + } + }; Index: systemcaes/tags/V10/bench/systemc/stimulus.h =================================================================== --- systemcaes/tags/V10/bench/systemc/stimulus.h (nonexistent) +++ systemcaes/tags/V10/bench/systemc/stimulus.h (revision 28) @@ -0,0 +1,73 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Random testbench declation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Declare ramdom testbench class and data //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "transactor.h" +#include "scv.h" + +//Random number generator + +class random_generator:virtual public scv_constraint_base{ +public: + + scv_smart_ptr > aes_key; + scv_smart_ptr > aes_data; + + scv_smart_ptr decrypt; + + SCV_CONSTRAINT_CTOR(random_generator){ } +}; + +class test : public sc_module{ + public: + + sc_port transactor; + + void tb(); + + SC_CTOR(test){ + SC_THREAD(tb); + } +}; Index: systemcaes/tags/V10/bench/systemc/README =================================================================== --- systemcaes/tags/V10/bench/systemc/README (nonexistent) +++ systemcaes/tags/V10/bench/systemc/README (revision 28) @@ -0,0 +1,4 @@ +This filea are replicated in /rtl/systemc + + +jcastillo@opencores.org Index: systemcaes/tags/V10/bench/verilog/test_bench_top.v =================================================================== --- systemcaes/tags/V10/bench/verilog/test_bench_top.v (nonexistent) +++ systemcaes/tags/V10/bench/verilog/test_bench_top.v (revision 28) @@ -0,0 +1,455 @@ +///////////////////////////////////////////////////////////////////// +//// //// +//// AES Test Bench //// +//// //// +//// //// +//// Author: Rudolf Usselmann //// +//// rudi@asics.ws //// +//// //// +//// Adapted to SystemC //// +//// AES project by: jcastillo@opensocdesign.com //// +//// //// +//// //// +//// Downloaded from: http://www.opencores.org/cores/aes_core/ //// +//// //// +///////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000-2002 Rudolf Usselmann //// +//// www.asics.ws //// +//// rudi@asics.ws //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer.//// +//// //// +//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// +//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// +//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// +//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// +//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// +//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// +//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// +//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// +//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// +//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// +//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// +//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// +//// POSSIBILITY OF SUCH DAMAGE. //// +//// //// +///////////////////////////////////////////////////////////////////// +// +// CVS Log +// +// $Log: not supported by cvs2svn $ +// + +`include "timescale.v" + +module test; + +reg clk; +reg rst; + +reg [383:0] tv[512:0]; // Test vectors +reg [383:0] tmp; +reg kld; +reg [127:0] plain, ciph; +reg [127:0] key,text_in; +wire [127:0] text_out; +wire [127:0] text_out2; +reg [127:0] text_exp; +wire done, done2; +integer n, error_cnt; + +initial + begin + $display("\n\n"); + $display("*****************************************************"); + $display("* AES Test bench ..."); + $display("*****************************************************"); + $display("\n"); +`ifdef WAVES + $shm_open("waves"); + $shm_probe("AS",test,"AS"); + $display("INFO: Signal dump enabled ...\n\n"); +`endif + + kld = 0; + clk = 0; + rst = 0; + error_cnt = 0; + repeat(4) @(posedge clk); + rst = 1; + repeat(20) @(posedge clk); + + $display(""); + $display(""); + $display("Started random test ..."); + +tv[0]= 384'h00000000000000000000000000000000f34481ec3cc627bacd5dc3fb08f273e60336763e966d92595a567cc9ce537f5e; +tv[1]= 384'h000000000000000000000000000000009798c4640bad75c7c3227db910174e72a9a1631bf4996954ebc093957b234589; +tv[2]= 384'h0000000000000000000000000000000096ab5c2ff612d9dfaae8c31f30c42168ff4f8391a6a40ca5b25d23bedd44a597; +tv[3]= 384'h000000000000000000000000000000006a118a874519e64e9963798a503f1d35dc43be40be0e53712f7e2bf5ca707209; +tv[4]= 384'h00000000000000000000000000000000cb9fceec81286ca3e989bd979b0cb28492beedab1895a94faa69b632e5cc47ce; +tv[5]= 384'h00000000000000000000000000000000b26aeb1874e47ca8358ff22378f09144459264f4798f6a78bacb89c15ed3d601; +tv[6]= 384'h0000000000000000000000000000000058c8e00b2631686d54eab84b91f0aca108a4e2efec8a8e3312ca7460b9040bbf; +tv[7]= 384'h10a58869d74be5a374cf867cfb473859000000000000000000000000000000006d251e6944b051e04eaa6fb4dbf78465; +tv[8]= 384'hcaea65cdbb75e9169ecd22ebe6e54675000000000000000000000000000000006e29201190152df4ee058139def610bb; +tv[9]= 384'ha2e2fa9baf7d20822ca9f0542f764a4100000000000000000000000000000000c3b44b95d9d2f25670eee9a0de099fa3; +tv[10]= 384'hb6364ac4e1de1e285eaf144a2415f7a0000000000000000000000000000000005d9b05578fc944b3cf1ccf0e746cd581; +tv[11]= 384'h64cf9c7abc50b888af65f49d521944b200000000000000000000000000000000f7efc89d5dba578104016ce5ad659c05; +tv[12]= 384'h47d6742eefcc0465dc96355e851b64d9000000000000000000000000000000000306194f666d183624aa230a8b264ae7; +tv[13]= 384'h3eb39790678c56bee34bbcdeccf6cdb500000000000000000000000000000000858075d536d79ccee571f7d7204b1f67; +tv[14]= 384'h64110a924f0743d500ccadae72c134270000000000000000000000000000000035870c6a57e9e92314bcb8087cde72ce; +tv[15]= 384'h18d8126516f8a12ab1a36d9f04d68e51000000000000000000000000000000006c68e9be5ec41e22c825b7c7affb4363; +tv[16]= 384'hf530357968578480b398a3c251cd109300000000000000000000000000000000f5df39990fc688f1b07224cc03e86cea; +tv[17]= 384'hda84367f325d42d601b4326964802e8e00000000000000000000000000000000bba071bcb470f8f6586e5d3add18bc66; +tv[18]= 384'he37b1c6aa2846f6fdb413f238b089f230000000000000000000000000000000043c9f7e62f5d288bb27aa40ef8fe1ea8; +tv[19]= 384'h6c002b682483e0cabcc731c253be5674000000000000000000000000000000003580d19cff44f1014a7c966a69059de5; +tv[20]= 384'h143ae8ed6555aba96110ab58893a8ae100000000000000000000000000000000806da864dd29d48deafbe764f8202aef; +tv[21]= 384'hb69418a85332240dc82492353956ae0c00000000000000000000000000000000a303d940ded8f0baff6f75414cac5243; +tv[22]= 384'h71b5c08a1993e1362e4d0ce9b22b78d500000000000000000000000000000000c2dabd117f8a3ecabfbb11d12194d9d0; +tv[23]= 384'he234cdca2606b81f29408d5f6da2120600000000000000000000000000000000fff60a4740086b3b9c56195b98d91a7b; +tv[24]= 384'h13237c49074a3da078dc1d828bb78c6f000000000000000000000000000000008146a08e2357f0caa30ca8c94d1a0544; +tv[25]= 384'h3071a2a48fe6cbd04f1a129098e308f8000000000000000000000000000000004b98e06d356deb07ebb824e5713f7be3; +tv[26]= 384'h90f42ec0f68385f2ffc5dfc03a654dce000000000000000000000000000000007a20a53d460fc9ce0423a7a0764c6cf2; +tv[27]= 384'hfebd9a24d8b65c1c787d50a4ed3619a900000000000000000000000000000000f4a70d8af877f9b02b4c40df57d45b17; +tv[28]= 384'h80000000000000000000000000000000000000000000000000000000000000000edd33d3c621e546455bd8ba1418bec8; +tv[29]= 384'hc0000000000000000000000000000000000000000000000000000000000000004bc3f883450c113c64ca42e1112a9e87; +tv[30]= 384'he00000000000000000000000000000000000000000000000000000000000000072a1da770f5d7ac4c9ef94d822affd97; +tv[31]= 384'hf000000000000000000000000000000000000000000000000000000000000000970014d634e2b7650777e8e84d03ccd8; +tv[32]= 384'hf800000000000000000000000000000000000000000000000000000000000000f17e79aed0db7e279e955b5f493875a7; +tv[33]= 384'hfc000000000000000000000000000000000000000000000000000000000000009ed5a75136a940d0963da379db4af26a; +tv[34]= 384'hfe00000000000000000000000000000000000000000000000000000000000000c4295f83465c7755e8fa364bac6a7ea5; +tv[35]= 384'hff00000000000000000000000000000000000000000000000000000000000000b1d758256b28fd850ad4944208cf1155; +tv[36]= 384'hff8000000000000000000000000000000000000000000000000000000000000042ffb34c743de4d88ca38011c990890b; +tv[37]= 384'hffc00000000000000000000000000000000000000000000000000000000000009958f0ecea8b2172c0c1995f9182c0f3; +tv[38]= 384'hffe0000000000000000000000000000000000000000000000000000000000000956d7798fac20f82a8823f984d06f7f5; +tv[39]= 384'hfff0000000000000000000000000000000000000000000000000000000000000a01bf44f2d16be928ca44aaf7b9b106b; +tv[40]= 384'hfff8000000000000000000000000000000000000000000000000000000000000b5f1a33e50d40d103764c76bd4c6b6f8; +tv[41]= 384'hfffc0000000000000000000000000000000000000000000000000000000000002637050c9fc0d4817e2d69de878aee8d; +tv[42]= 384'hfffe000000000000000000000000000000000000000000000000000000000000113ecbe4a453269a0dd26069467fb5b5; +tv[43]= 384'hffff00000000000000000000000000000000000000000000000000000000000097d0754fe68f11b9e375d070a608c884; +tv[44]= 384'hffff800000000000000000000000000000000000000000000000000000000000c6a0b3e998d05068a5399778405200b4; +tv[45]= 384'hffffc00000000000000000000000000000000000000000000000000000000000df556a33438db87bc41b1752c55e5e49; +tv[46]= 384'hffffe0000000000000000000000000000000000000000000000000000000000090fb128d3a1af6e548521bb962bf1f05; +tv[47]= 384'hfffff0000000000000000000000000000000000000000000000000000000000026298e9c1db517c215fadfb7d2a8d691; +tv[48]= 384'hfffff80000000000000000000000000000000000000000000000000000000000a6cb761d61f8292d0df393a279ad0380; +tv[49]= 384'hfffffc000000000000000000000000000000000000000000000000000000000012acd89b13cd5f8726e34d44fd486108; +tv[50]= 384'hfffffe000000000000000000000000000000000000000000000000000000000095b1703fc57ba09fe0c3580febdd7ed4; +tv[51]= 384'hffffff0000000000000000000000000000000000000000000000000000000000de11722d893e9f9121c381becc1da59a; +tv[52]= 384'hffffff80000000000000000000000000000000000000000000000000000000006d114ccb27bf391012e8974c546d9bf2; +tv[53]= 384'hffffffc0000000000000000000000000000000000000000000000000000000005ce37e17eb4646ecfac29b9cc38d9340; +tv[54]= 384'hffffffe00000000000000000000000000000000000000000000000000000000018c1b6e2157122056d0243d8a165cddb; +tv[55]= 384'hfffffff00000000000000000000000000000000000000000000000000000000099693e6a59d1366c74d823562d7e1431; +tv[56]= 384'hfffffff8000000000000000000000000000000000000000000000000000000006c7c64dc84a8bba758ed17eb025a57e3; +tv[57]= 384'hfffffffc00000000000000000000000000000000000000000000000000000000e17bc79f30eaab2fac2cbbe3458d687a; +tv[58]= 384'hfffffffe000000000000000000000000000000000000000000000000000000001114bc2028009b923f0b01915ce5e7c4; +tv[59]= 384'hffffffff000000000000000000000000000000000000000000000000000000009c28524a16a1e1c1452971caa8d13476; +tv[60]= 384'hffffffff80000000000000000000000000000000000000000000000000000000ed62e16363638360fdd6ad62112794f0; +tv[61]= 384'hffffffffc00000000000000000000000000000000000000000000000000000005a8688f0b2a2c16224c161658ffd4044; +tv[62]= 384'hffffffffe000000000000000000000000000000000000000000000000000000023f710842b9bb9c32f26648c786807ca; +tv[63]= 384'hfffffffff000000000000000000000000000000000000000000000000000000044a98bf11e163f632c47ec6a49683a89; +tv[64]= 384'hfffffffff80000000000000000000000000000000000000000000000000000000f18aff94274696d9b61848bd50ac5e5; +tv[65]= 384'hfffffffffc00000000000000000000000000000000000000000000000000000082408571c3e2424540207f833b6dda69; +tv[66]= 384'hfffffffffe000000000000000000000000000000000000000000000000000000303ff996947f0c7d1f43c8f3027b9b75; +tv[67]= 384'hffffffffff0000000000000000000000000000000000000000000000000000007df4daf4ad29a3615a9b6ece5c99518a; +tv[68]= 384'hffffffffff800000000000000000000000000000000000000000000000000000c72954a48d0774db0b4971c526260415; +tv[69]= 384'hffffffffffc000000000000000000000000000000000000000000000000000001df9b76112dc6531e07d2cfda04411f0; +tv[70]= 384'hffffffffffe000000000000000000000000000000000000000000000000000008e4d8e699119e1fc87545a647fb1d34f; +tv[71]= 384'hfffffffffff00000000000000000000000000000000000000000000000000000e6c4807ae11f36f091c57d9fb68548d1; +tv[72]= 384'hfffffffffff800000000000000000000000000000000000000000000000000008ebf73aad49c82007f77a5c1ccec6ab4; +tv[73]= 384'hfffffffffffc00000000000000000000000000000000000000000000000000004fb288cc2040049001d2c7585ad123fc; +tv[74]= 384'hfffffffffffe000000000000000000000000000000000000000000000000000004497110efb9dceb13e2b13fb4465564; +tv[75]= 384'hffffffffffff000000000000000000000000000000000000000000000000000075550e6cb5a88e49634c9ab69eda0430; +tv[76]= 384'hffffffffffff8000000000000000000000000000000000000000000000000000b6768473ce9843ea66a81405dd50b345; +tv[77]= 384'hffffffffffffc000000000000000000000000000000000000000000000000000cb2f430383f9084e03a653571e065de6; +tv[78]= 384'hffffffffffffe000000000000000000000000000000000000000000000000000ff4e66c07bae3e79fb7d210847a3b0ba; +tv[79]= 384'hfffffffffffff0000000000000000000000000000000000000000000000000007b90785125505fad59b13c186dd66ce3; +tv[80]= 384'hfffffffffffff8000000000000000000000000000000000000000000000000008b527a6aebdaec9eaef8eda2cb7783e5; +tv[81]= 384'hfffffffffffffc0000000000000000000000000000000000000000000000000043fdaf53ebbc9880c228617d6a9b548b; +tv[82]= 384'hfffffffffffffe0000000000000000000000000000000000000000000000000053786104b9744b98f052c46f1c850d0b; +tv[83]= 384'hffffffffffffff00000000000000000000000000000000000000000000000000b5ab3013dd1e61df06cbaf34ca2aee78; +tv[84]= 384'hffffffffffffff800000000000000000000000000000000000000000000000007470469be9723030fdcc73a8cd4fbb10; +tv[85]= 384'hffffffffffffffc0000000000000000000000000000000000000000000000000a35a63f5343ebe9ef8167bcb48ad122e; +tv[86]= 384'hffffffffffffffe0000000000000000000000000000000000000000000000000fd8687f0757a210e9fdf181204c30863; +tv[87]= 384'hfffffffffffffff00000000000000000000000000000000000000000000000007a181e84bd5457d26a88fbae96018fb0; +tv[88]= 384'hfffffffffffffff8000000000000000000000000000000000000000000000000653317b9362b6f9b9e1a580e68d494b5; +tv[89]= 384'hfffffffffffffffc000000000000000000000000000000000000000000000000995c9dc0b689f03c45867b5faa5c18d1; +tv[90]= 384'hfffffffffffffffe00000000000000000000000000000000000000000000000077a4d96d56dda398b9aabecfc75729fd; +tv[91]= 384'hffffffffffffffff00000000000000000000000000000000000000000000000084be19e053635f09f2665e7bae85b42d; +tv[92]= 384'hffffffffffffffff80000000000000000000000000000000000000000000000032cd652842926aea4aa6137bb2be2b5e; +tv[93]= 384'hffffffffffffffffc00000000000000000000000000000000000000000000000493d4a4f38ebb337d10aa84e9171a554; +tv[94]= 384'hffffffffffffffffe00000000000000000000000000000000000000000000000d9bff7ff454b0ec5a4a2a69566e2cb84; +tv[95]= 384'hfffffffffffffffff000000000000000000000000000000000000000000000003535d565ace3f31eb249ba2cc6765d7a; +tv[96]= 384'hfffffffffffffffff80000000000000000000000000000000000000000000000f60e91fc3269eecf3231c6e9945697c6; +tv[97]= 384'hfffffffffffffffffc0000000000000000000000000000000000000000000000ab69cfadf51f8e604d9cc37182f6635a; +tv[98]= 384'hfffffffffffffffffe00000000000000000000000000000000000000000000007866373f24a0b6ed56e0d96fcdafb877; +tv[99]= 384'hffffffffffffffffff00000000000000000000000000000000000000000000001ea448c2aac954f5d812e9d78494446a; +tv[100]= 384'hffffffffffffffffff8000000000000000000000000000000000000000000000acc5599dd8ac02239a0fef4a36dd1668; +tv[101]= 384'hffffffffffffffffffc000000000000000000000000000000000000000000000d8764468bb103828cf7e1473ce895073; +tv[102]= 384'hffffffffffffffffffe0000000000000000000000000000000000000000000001b0d02893683b9f180458e4aa6b73982; +tv[103]= 384'hfffffffffffffffffff00000000000000000000000000000000000000000000096d9b017d302df410a937dcdb8bb6e43; +tv[104]= 384'hfffffffffffffffffff800000000000000000000000000000000000000000000ef1623cc44313cff440b1594a7e21cc6; +tv[105]= 384'hfffffffffffffffffffc00000000000000000000000000000000000000000000284ca2fa35807b8b0ae4d19e11d7dbd7; +tv[106]= 384'hfffffffffffffffffffe00000000000000000000000000000000000000000000f2e976875755f9401d54f36e2a23a594; +tv[107]= 384'hffffffffffffffffffff00000000000000000000000000000000000000000000ec198a18e10e532403b7e20887c8dd80; +tv[108]= 384'hffffffffffffffffffff80000000000000000000000000000000000000000000545d50ebd919e4a6949d96ad47e46a80; +tv[109]= 384'hffffffffffffffffffffc0000000000000000000000000000000000000000000dbdfb527060e0a71009c7bb0c68f1d44; +tv[110]= 384'hffffffffffffffffffffe00000000000000000000000000000000000000000009cfa1322ea33da2173a024f2ff0d896d; +tv[111]= 384'hfffffffffffffffffffff00000000000000000000000000000000000000000008785b1a75b0f3bd958dcd0e29318c521; +tv[112]= 384'hfffffffffffffffffffff800000000000000000000000000000000000000000038f67b9e98e4a97b6df030a9fcdd0104; +tv[113]= 384'hfffffffffffffffffffffc000000000000000000000000000000000000000000192afffb2c880e82b05926d0fc6c448b; +tv[114]= 384'hfffffffffffffffffffffe0000000000000000000000000000000000000000006a7980ce7b105cf530952d74daaf798c; +tv[115]= 384'hffffffffffffffffffffff000000000000000000000000000000000000000000ea3695e1351b9d6858bd958cf513ef6c; +tv[116]= 384'hffffffffffffffffffffff8000000000000000000000000000000000000000006da0490ba0ba0343b935681d2cce5ba1; +tv[117]= 384'hffffffffffffffffffffffc00000000000000000000000000000000000000000f0ea23af08534011c60009ab29ada2f1; +tv[118]= 384'hffffffffffffffffffffffe00000000000000000000000000000000000000000ff13806cf19cc38721554d7c0fcdcd4b; +tv[119]= 384'hfffffffffffffffffffffff000000000000000000000000000000000000000006838af1f4f69bae9d85dd188dcdf0688; +tv[120]= 384'hfffffffffffffffffffffff8000000000000000000000000000000000000000036cf44c92d550bfb1ed28ef583ddf5d7; +tv[121]= 384'hfffffffffffffffffffffffc0000000000000000000000000000000000000000d06e3195b5376f109d5c4ec6c5d62ced; +tv[122]= 384'hfffffffffffffffffffffffe0000000000000000000000000000000000000000c440de014d3d610707279b13242a5c36; +tv[123]= 384'hffffffffffffffffffffffff0000000000000000000000000000000000000000f0c5c6ffa5e0bd3a94c88f6b6f7c16b9; +tv[124]= 384'hffffffffffffffffffffffff80000000000000000000000000000000000000003e40c3901cd7effc22bffc35dee0b4d9; +tv[125]= 384'hffffffffffffffffffffffffc000000000000000000000000000000000000000b63305c72bedfab97382c406d0c49bc6; +tv[126]= 384'hffffffffffffffffffffffffe00000000000000000000000000000000000000036bbaab22a6bd4925a99a2b408d2dbae; +tv[127]= 384'hfffffffffffffffffffffffff000000000000000000000000000000000000000307c5b8fcd0533ab98bc51e27a6ce461; +tv[128]= 384'hfffffffffffffffffffffffff800000000000000000000000000000000000000829c04ff4c07513c0b3ef05c03e337b5; +tv[129]= 384'hfffffffffffffffffffffffffc00000000000000000000000000000000000000f17af0e895dda5eb98efc68066e84c54; +tv[130]= 384'hfffffffffffffffffffffffffe00000000000000000000000000000000000000277167f3812afff1ffacb4a934379fc3; +tv[131]= 384'hffffffffffffffffffffffffff000000000000000000000000000000000000002cb1dc3a9c72972e425ae2ef3eb597cd; +tv[132]= 384'hffffffffffffffffffffffffff8000000000000000000000000000000000000036aeaa3a213e968d4b5b679d3a2c97fe; +tv[133]= 384'hffffffffffffffffffffffffffc00000000000000000000000000000000000009241daca4fdd034a82372db50e1a0f3f; +tv[134]= 384'hffffffffffffffffffffffffffe0000000000000000000000000000000000000c14574d9cd00cf2b5a7f77e53cd57885; +tv[135]= 384'hfffffffffffffffffffffffffff0000000000000000000000000000000000000793de39236570aba83ab9b737cb521c9; +tv[136]= 384'hfffffffffffffffffffffffffff800000000000000000000000000000000000016591c0f27d60e29b85a96c33861a7ef; +tv[137]= 384'hfffffffffffffffffffffffffffc00000000000000000000000000000000000044fb5c4d4f5cb79be5c174a3b1c97348; +tv[138]= 384'hfffffffffffffffffffffffffffe000000000000000000000000000000000000674d2b61633d162be59dde04222f4740; +tv[139]= 384'hffffffffffffffffffffffffffff000000000000000000000000000000000000b4750ff263a65e1f9e924ccfd98f3e37; +tv[140]= 384'hffffffffffffffffffffffffffff80000000000000000000000000000000000062d0662d6eaeddedebae7f7ea3a4f6b6; +tv[141]= 384'hffffffffffffffffffffffffffffc0000000000000000000000000000000000070c46bb30692be657f7eaa93ebad9897; +tv[142]= 384'hffffffffffffffffffffffffffffe00000000000000000000000000000000000323994cfb9da285a5d9642e1759b224a; +tv[143]= 384'hfffffffffffffffffffffffffffff000000000000000000000000000000000001dbf57877b7b17385c85d0b54851e371; +tv[144]= 384'hfffffffffffffffffffffffffffff80000000000000000000000000000000000dfa5c097cdc1532ac071d57b1d28d1bd; +tv[145]= 384'hfffffffffffffffffffffffffffffc00000000000000000000000000000000003a0c53fa37311fc10bd2a9981f513174; +tv[146]= 384'hfffffffffffffffffffffffffffffe0000000000000000000000000000000000ba4f970c0a25c41814bdae2e506be3b4; +tv[147]= 384'hffffffffffffffffffffffffffffff00000000000000000000000000000000002dce3acb727cd13ccd76d425ea56e4f6; +tv[148]= 384'hffffffffffffffffffffffffffffff80000000000000000000000000000000005160474d504b9b3eefb68d35f245f4b3; +tv[149]= 384'hffffffffffffffffffffffffffffffc00000000000000000000000000000000041a8a947766635dec37553d9a6c0cbb7; +tv[150]= 384'hffffffffffffffffffffffffffffffe00000000000000000000000000000000025d6cfe6881f2bf497dd14cd4ddf445b; +tv[151]= 384'hfffffffffffffffffffffffffffffff00000000000000000000000000000000041c78c135ed9e98c096640647265da1e; +tv[152]= 384'hfffffffffffffffffffffffffffffff8000000000000000000000000000000005a4d404d8917e353e92a21072c3b2305; +tv[153]= 384'hfffffffffffffffffffffffffffffffc0000000000000000000000000000000002bc96846b3fdc71643f384cd3cc3eaf; +tv[154]= 384'hfffffffffffffffffffffffffffffffe000000000000000000000000000000009ba4a9143f4e5d4048521c4f8877d88e; +tv[155]= 384'hffffffffffffffffffffffffffffffff00000000000000000000000000000000a1f6258c877d5fcd8964484538bfc92c; +tv[156]= 384'h00000000000000000000000000000000800000000000000000000000000000003ad78e726c1ec02b7ebfe92b23d9ec34; +tv[157]= 384'h00000000000000000000000000000000c0000000000000000000000000000000aae5939c8efdf2f04e60b9fe7117b2c2; +tv[158]= 384'h00000000000000000000000000000000e0000000000000000000000000000000f031d4d74f5dcbf39daaf8ca3af6e527; +tv[159]= 384'h00000000000000000000000000000000f000000000000000000000000000000096d9fd5cc4f07441727df0f33e401a36; +tv[160]= 384'h00000000000000000000000000000000f800000000000000000000000000000030ccdb044646d7e1f3ccea3dca08b8c0; +tv[161]= 384'h00000000000000000000000000000000fc00000000000000000000000000000016ae4ce5042a67ee8e177b7c587ecc82; +tv[162]= 384'h00000000000000000000000000000000fe000000000000000000000000000000b6da0bb11a23855d9c5cb1b4c6412e0a; +tv[163]= 384'h00000000000000000000000000000000ff000000000000000000000000000000db4f1aa530967d6732ce4715eb0ee24b; +tv[164]= 384'h00000000000000000000000000000000ff800000000000000000000000000000a81738252621dd180a34f3455b4baa2f; +tv[165]= 384'h00000000000000000000000000000000ffc0000000000000000000000000000077e2b508db7fd89234caf7939ee5621a; +tv[166]= 384'h00000000000000000000000000000000ffe00000000000000000000000000000b8499c251f8442ee13f0933b688fcd19; +tv[167]= 384'h00000000000000000000000000000000fff00000000000000000000000000000965135f8a81f25c9d630b17502f68e53; +tv[168]= 384'h00000000000000000000000000000000fff800000000000000000000000000008b87145a01ad1c6cede995ea3670454f; +tv[169]= 384'h00000000000000000000000000000000fffc00000000000000000000000000008eae3b10a0c8ca6d1d3b0fa61e56b0b2; +tv[170]= 384'h00000000000000000000000000000000fffe000000000000000000000000000064b4d629810fda6bafdf08f3b0d8d2c5; +tv[171]= 384'h00000000000000000000000000000000ffff0000000000000000000000000000d7e5dbd3324595f8fdc7d7c571da6c2a; +tv[172]= 384'h00000000000000000000000000000000ffff8000000000000000000000000000f3f72375264e167fca9de2c1527d9606; +tv[173]= 384'h00000000000000000000000000000000ffffc0000000000000000000000000008ee79dd4f401ff9b7ea945d86666c13b; +tv[174]= 384'h00000000000000000000000000000000ffffe000000000000000000000000000dd35cea2799940b40db3f819cb94c08b; +tv[175]= 384'h00000000000000000000000000000000fffff0000000000000000000000000006941cb6b3e08c2b7afa581ebdd607b87; +tv[176]= 384'h00000000000000000000000000000000fffff8000000000000000000000000002c20f439f6bb097b29b8bd6d99aad799; +tv[177]= 384'h00000000000000000000000000000000fffffc00000000000000000000000000625d01f058e565f77ae86378bd2c49b3; +tv[178]= 384'h00000000000000000000000000000000fffffe00000000000000000000000000c0b5fd98190ef45fbb4301438d095950; +tv[179]= 384'h00000000000000000000000000000000ffffff0000000000000000000000000013001ff5d99806efd25da34f56be854b; +tv[180]= 384'h00000000000000000000000000000000ffffff800000000000000000000000003b594c60f5c8277a5113677f94208d82; +tv[181]= 384'h00000000000000000000000000000000ffffffc0000000000000000000000000e9c0fc1818e4aa46bd2e39d638f89e05; +tv[182]= 384'h00000000000000000000000000000000ffffffe0000000000000000000000000f8023ee9c3fdc45a019b4e985c7e1a54; +tv[183]= 384'h00000000000000000000000000000000fffffff000000000000000000000000035f40182ab4662f3023baec1ee796b57; +tv[184]= 384'h00000000000000000000000000000000fffffff80000000000000000000000003aebbad7303649b4194a6945c6cc3694; +tv[185]= 384'h00000000000000000000000000000000fffffffc000000000000000000000000a2124bea53ec2834279bed7f7eb0f938; +tv[186]= 384'h00000000000000000000000000000000fffffffe000000000000000000000000b9fb4399fa4facc7309e14ec98360b0a; +tv[187]= 384'h00000000000000000000000000000000ffffffff000000000000000000000000c26277437420c5d634f715aea81a9132; +tv[188]= 384'h00000000000000000000000000000000ffffffff800000000000000000000000171a0e1b2dd424f0e089af2c4c10f32f; +tv[189]= 384'h00000000000000000000000000000000ffffffffc000000000000000000000007cadbe402d1b208fe735edce00aee7ce; +tv[190]= 384'h00000000000000000000000000000000ffffffffe0000000000000000000000043b02ff929a1485af6f5c6d6558baa0f; +tv[191]= 384'h00000000000000000000000000000000fffffffff00000000000000000000000092faacc9bf43508bf8fa8613ca75dea; +tv[192]= 384'h00000000000000000000000000000000fffffffff80000000000000000000000cb2bf8280f3f9742c7ed513fe802629c; +tv[193]= 384'h00000000000000000000000000000000fffffffffc0000000000000000000000215a41ee442fa992a6e323986ded3f68; +tv[194]= 384'h00000000000000000000000000000000fffffffffe0000000000000000000000f21e99cf4f0f77cea836e11a2fe75fb1; +tv[195]= 384'h00000000000000000000000000000000ffffffffff000000000000000000000095e3a0ca9079e646331df8b4e70d2cd6; +tv[196]= 384'h00000000000000000000000000000000ffffffffff80000000000000000000004afe7f120ce7613f74fc12a01a828073; +tv[197]= 384'h00000000000000000000000000000000ffffffffffc000000000000000000000827f000e75e2c8b9d479beed913fe678; +tv[198]= 384'h00000000000000000000000000000000ffffffffffe00000000000000000000035830c8e7aaefe2d30310ef381cbf691; +tv[199]= 384'h00000000000000000000000000000000fffffffffff000000000000000000000191aa0f2c8570144f38657ea4085ebe5; +tv[200]= 384'h00000000000000000000000000000000fffffffffff80000000000000000000085062c2c909f15d9269b6c18ce99c4f0; +tv[201]= 384'h00000000000000000000000000000000fffffffffffc00000000000000000000678034dc9e41b5a560ed239eeab1bc78; +tv[202]= 384'h00000000000000000000000000000000fffffffffffe00000000000000000000c2f93a4ce5ab6d5d56f1b93cf19911c1; +tv[203]= 384'h00000000000000000000000000000000ffffffffffff000000000000000000001c3112bcb0c1dcc749d799743691bf82; +tv[204]= 384'h00000000000000000000000000000000ffffffffffff8000000000000000000000c55bd75c7f9c881989d3ec1911c0d4; +tv[205]= 384'h00000000000000000000000000000000ffffffffffffc0000000000000000000ea2e6b5ef182b7dff3629abd6a12045f; +tv[206]= 384'h00000000000000000000000000000000ffffffffffffe000000000000000000022322327e01780b17397f24087f8cc6f; +tv[207]= 384'h00000000000000000000000000000000fffffffffffff0000000000000000000c9cacb5cd11692c373b2411768149ee7; +tv[208]= 384'h00000000000000000000000000000000fffffffffffff8000000000000000000a18e3dbbca577860dab6b80da3139256; +tv[209]= 384'h00000000000000000000000000000000fffffffffffffc00000000000000000079b61c37bf328ecca8d743265a3d425c; +tv[210]= 384'h00000000000000000000000000000000fffffffffffffe000000000000000000d2d99c6bcc1f06fda8e27e8ae3f1ccc7; +tv[211]= 384'h00000000000000000000000000000000ffffffffffffff0000000000000000001bfd4b91c701fd6b61b7f997829d663b; +tv[212]= 384'h00000000000000000000000000000000ffffffffffffff80000000000000000011005d52f25f16bdc9545a876a63490a; +tv[213]= 384'h00000000000000000000000000000000ffffffffffffffc000000000000000003a4d354f02bb5a5e47d39666867f246a; +tv[214]= 384'h00000000000000000000000000000000ffffffffffffffe00000000000000000d451b8d6e1e1a0ebb155fbbf6e7b7dc3; +tv[215]= 384'h00000000000000000000000000000000fffffffffffffff000000000000000006898d4f42fa7ba6a10ac05e87b9f2080; +tv[216]= 384'h00000000000000000000000000000000fffffffffffffff80000000000000000b611295e739ca7d9b50f8e4c0e754a3f; +tv[217]= 384'h00000000000000000000000000000000fffffffffffffffc00000000000000007d33fc7d8abe3ca1936759f8f5deaf20; +tv[218]= 384'h00000000000000000000000000000000fffffffffffffffe00000000000000003b5e0f566dc96c298f0c12637539b25c; +tv[219]= 384'h00000000000000000000000000000000ffffffffffffffff0000000000000000f807c3e7985fe0f5a50e2cdb25c5109e; +tv[220]= 384'h00000000000000000000000000000000ffffffffffffffff800000000000000041f992a856fb278b389a62f5d274d7e9; +tv[221]= 384'h00000000000000000000000000000000ffffffffffffffffc00000000000000010d3ed7a6fe15ab4d91acbc7d0767ab1; +tv[222]= 384'h00000000000000000000000000000000ffffffffffffffffe00000000000000021feecd45b2e675973ac33bf0c5424fc; +tv[223]= 384'h00000000000000000000000000000000fffffffffffffffff0000000000000001480cb3955ba62d09eea668f7c708817; +tv[224]= 384'h00000000000000000000000000000000fffffffffffffffff80000000000000066404033d6b72b609354d5496e7eb511; +tv[225]= 384'h00000000000000000000000000000000fffffffffffffffffc000000000000001c317a220a7d700da2b1e075b00266e1; +tv[226]= 384'h00000000000000000000000000000000fffffffffffffffffe00000000000000ab3b89542233f1271bf8fd0c0f403545; +tv[227]= 384'h00000000000000000000000000000000ffffffffffffffffff00000000000000d93eae966fac46dca927d6b114fa3f9e; +tv[228]= 384'h00000000000000000000000000000000ffffffffffffffffff800000000000001bdec521316503d9d5ee65df3ea94ddf; +tv[229]= 384'h00000000000000000000000000000000ffffffffffffffffffc0000000000000eef456431dea8b4acf83bdae3717f75f; +tv[230]= 384'h00000000000000000000000000000000ffffffffffffffffffe000000000000006f2519a2fafaa596bfef5cfa15c21b9; +tv[231]= 384'h00000000000000000000000000000000fffffffffffffffffff0000000000000251a7eac7e2fe809e4aa8d0d7012531a; +tv[232]= 384'h00000000000000000000000000000000fffffffffffffffffff80000000000003bffc16e4c49b268a20f8d96a60b4058; +tv[233]= 384'h00000000000000000000000000000000fffffffffffffffffffc000000000000e886f9281999c5bb3b3e8862e2f7c988; +tv[234]= 384'h00000000000000000000000000000000fffffffffffffffffffe000000000000563bf90d61beef39f48dd625fcef1361; +tv[235]= 384'h00000000000000000000000000000000ffffffffffffffffffff0000000000004d37c850644563c69fd0acd9a049325b; +tv[236]= 384'h00000000000000000000000000000000ffffffffffffffffffff800000000000b87c921b91829ef3b13ca541ee1130a6; +tv[237]= 384'h00000000000000000000000000000000ffffffffffffffffffffc000000000002e65eb6b6ea383e109accce8326b0393; +tv[238]= 384'h00000000000000000000000000000000ffffffffffffffffffffe000000000009ca547f7439edc3e255c0f4d49aa8990; +tv[239]= 384'h00000000000000000000000000000000fffffffffffffffffffff00000000000a5e652614c9300f37816b1f9fd0c87f9; +tv[240]= 384'h00000000000000000000000000000000fffffffffffffffffffff8000000000014954f0b4697776f44494fe458d814ed; +tv[241]= 384'h00000000000000000000000000000000fffffffffffffffffffffc00000000007c8d9ab6c2761723fe42f8bb506cbcf7; +tv[242]= 384'h00000000000000000000000000000000fffffffffffffffffffffe0000000000db7e1932679fdd99742aab04aa0d5a80; +tv[243]= 384'h00000000000000000000000000000000ffffffffffffffffffffff00000000004c6a1c83e568cd10f27c2d73ded19c28; +tv[244]= 384'h00000000000000000000000000000000ffffffffffffffffffffff800000000090ecbe6177e674c98de412413f7ac915; +tv[245]= 384'h00000000000000000000000000000000ffffffffffffffffffffffc00000000090684a2ac55fe1ec2b8ebd5622520b73; +tv[246]= 384'h00000000000000000000000000000000ffffffffffffffffffffffe0000000007472f9a7988607ca79707795991035e6; +tv[247]= 384'h00000000000000000000000000000000fffffffffffffffffffffff00000000056aff089878bf3352f8df172a3ae47d8; +tv[248]= 384'h00000000000000000000000000000000fffffffffffffffffffffff80000000065c0526cbe40161b8019a2a3171abd23; +tv[249]= 384'h00000000000000000000000000000000fffffffffffffffffffffffc00000000377be0be33b4e3e310b4aabda173f84f; +tv[250]= 384'h00000000000000000000000000000000fffffffffffffffffffffffe000000009402e9aa6f69de6504da8d20c4fcaa2f; +tv[251]= 384'h00000000000000000000000000000000ffffffffffffffffffffffff00000000123c1f4af313ad8c2ce648b2e71fb6e1; +tv[252]= 384'h00000000000000000000000000000000ffffffffffffffffffffffff800000001ffc626d30203dcdb0019fb80f726cf4; +tv[253]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffc000000076da1fbe3a50728c50fd2e621b5ad885; +tv[254]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffe0000000082eb8be35f442fb52668e16a591d1d6; +tv[255]= 384'h00000000000000000000000000000000fffffffffffffffffffffffff0000000e656f9ecf5fe27ec3e4a73d00c282fb3; +tv[256]= 384'h00000000000000000000000000000000fffffffffffffffffffffffff80000002ca8209d63274cd9a29bb74bcd77683a; +tv[257]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffc00000079bf5dce14bb7dd73a8e3611de7ce026; +tv[258]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffe0000003c849939a5d29399f344c4a0eca8a576; +tv[259]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffff000000ed3c0a94d59bece98835da7aa4f07ca2; +tv[260]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffff80000063919ed4ce10196438b6ad09d99cd795; +tv[261]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffc000007678f3a833f19fea95f3c6029e2bc610; +tv[262]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffe000003aa426831067d36b92be7c5f81c13c56; +tv[263]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffff000009272e2d2cdd11050998c845077a30ea0; +tv[264]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffff80000088c4b53f5ec0ff814c19adae7f6246c; +tv[265]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffc00004010a5e401fdf0a0354ddbcc0d012b17; +tv[266]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffe0000a87a385736c0a6189bd6589bd8445a93; +tv[267]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffff0000545f2b83d9616dccf60fa9830e9cd287; +tv[268]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffff80004b706f7f92406352394037a6d4f4688d; +tv[269]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffc000b7972b3941c44b90afa7b264bfba7387; +tv[270]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffe0006f45732cf10881546f0fd23896d2bb60; +tv[271]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffff0002e3579ca15af27f64b3c955a5bfc30ba; +tv[272]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffff80034a2c5a91ae2aec99b7d1b5fa6780447; +tv[273]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffc00a4d6616bd04f87335b0e53351227a9ee; +tv[274]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffe007f692b03945867d16179a8cefc83ea3f; +tv[275]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffff003bd141ee84a0e6414a26e7a4f281f8a2; +tv[276]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffff80d1788f572d98b2b16ec5d5f3922b99bc; +tv[277]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffffc00833ff6f61d98a57b288e8c3586b85a6; +tv[278]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffffe08568261797de176bf0b43becc6285afb; +tv[279]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffff0f9b0fda0c4a898f5b9e6f661c4ce4d07; +tv[280]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffff88ade895913685c67c5269f8aae42983e; +tv[281]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffffc39bde67d5c8ed8a8b1c37eb8fa9f5ac0; +tv[282]= 384'h00000000000000000000000000000000fffffffffffffffffffffffffffffffe5c005e72c1418c44f569f2ea33ba54f3; +tv[283]= 384'h00000000000000000000000000000000ffffffffffffffffffffffffffffffff3f5b8cc9ea855a0afa7347d23e8d664e; + + +for(n=0;n<284;n=n+1) + begin + + tmp = tv[n]; + key = tmp[383:256]; + text_in = tmp[255:128]; + plain = tmp[255:128]; + ciph = tmp[127:0]; + + @(posedge clk); + #1; + kld = 1; + @(posedge clk); + #1; + kld = 0; + @(posedge clk); + + while(!done) @(posedge clk); + + //$display("INFO: (a) Vector %0d: xpected %x, Got %x %t", n, ciph, text_out, $time); + + if(text_out != ciph | (|text_out)==1'bx) + begin + $display("ERROR: (a) Vector %0d mismatch. Expected %x, Got %x", + n, ciph, text_out); + error_cnt = error_cnt + 1; + end + + + while(!done2) @(posedge clk); + + //$display("INFO: (b) Vector %0d: xpected %x, Got %x", n, plain, text_out2); + + if(text_out2 != plain | (|text_out2)==1'bx) + begin + $display("ERROR: (b) Vector %0d mismatch. Expected %x, Got %x", + n, plain, text_out2); + error_cnt = error_cnt + 1; + end + + @(posedge clk); + #1; + end + + + $display(""); + $display(""); + $display("Test Done. Found %0d Errors.", error_cnt); + $display(""); + $display(""); + repeat(10) @(posedge clk); + $finish; +end + +always #5 clk = ~clk; + +aes u0 ( + .clk(clk), + .reset(rst), + .load_i(kld), + .decrypt_i(1'b0), + .data_i(text_in), + .key_i(key), + .ready_o(done), + .data_o(text_out) + ); + +aes u1 ( + .clk(clk), + .reset(rst), + .load_i(done), + .decrypt_i(1'b1), + .data_i(text_out), + .key_i(key), + .ready_o(done2), + .data_o(text_out2) + ); + + +endmodule Index: systemcaes/tags/V10/rtl/systemc/adapt.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/adapt.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/adapt.h (revision 28) @@ -0,0 +1,67 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// sc_fifo to sc_signal adapter //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" + +SC_MODULE(adapter){ + + sc_in clk; + sc_in rt_ready_i; + sc_in > rt_aes_data_i; + + sc_fifo_out > rt_aes_data_o; + + void adapt(){ + + while(1){ + wait(clk->posedge_event()); + if(rt_ready_i.read()) + rt_aes_data_o.write(rt_aes_data_i.read()); + } + + } + + SC_CTOR(adapter){ + SC_THREAD(adapt); + } + }; Index: systemcaes/tags/V10/rtl/systemc/aesmodel.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/aesmodel.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/aesmodel.h (revision 28) @@ -0,0 +1,108 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES C behavioral model //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// C behavioral model used as golden model //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +void decrypt_aes(unsigned char *block, unsigned char *key); +void encrypt_aes(unsigned char *block, unsigned char *key); + +SC_MODULE(aesmodel){ + + sc_fifo_in decrypt; + sc_fifo_in > aes_key_i; + sc_fifo_in > aes_data_i; + + sc_fifo_out > aes_data_o; + + void aes_thread(){ + unsigned char aes_key[16],aes_data[16],aes_out[16]; + sc_biguint<128> aes_key_i_var,aes_data_i_var,aes_data_o_var; + + while(1){ + + aes_data_i_var=aes_data_i.read(); + aes_key_i_var=aes_key_i.read(); + + //Convert a sc_biguint<128> to an array of 8 char + aes_key[0]=(sc_uint<8>)aes_key_i_var.range(127,120);aes_key[1]=(sc_uint<8>)aes_key_i_var.range(119,112);aes_key[2]=(sc_uint<8>)aes_key_i_var.range(111,104);aes_key[3]=(sc_uint<8>)aes_key_i_var.range(103,96); + aes_key[4]=(sc_uint<8>)aes_key_i_var.range(95,88);aes_key[5]=(sc_uint<8>)aes_key_i_var.range(87,80);aes_key[6]=(sc_uint<8>)aes_key_i_var.range(79,72);aes_key[7]=(sc_uint<8>)aes_key_i_var.range(71,64); + aes_key[8]=(sc_uint<8>)aes_key_i_var.range(63,56);aes_key[9]=(sc_uint<8>)aes_key_i_var.range(55,48);aes_key[10]=(sc_uint<8>)aes_key_i_var.range(47,40);aes_key[11]=(sc_uint<8>)aes_key_i_var.range(39,32); + aes_key[12]=(sc_uint<8>)aes_key_i_var.range(31,24);aes_key[13]=(sc_uint<8>)aes_key_i_var.range(23,16);aes_key[14]=(sc_uint<8>)aes_key_i_var.range(15,8);aes_key[15]=(sc_uint<8>)aes_key_i_var.range(7,0); + + + aes_data[0]=(sc_uint<8>)aes_data_i_var.range(127,120);aes_data[1]=(sc_uint<8>)aes_data_i_var.range(119,112);aes_data[2]=(sc_uint<8>)aes_data_i_var.range(111,104);aes_data[3]=(sc_uint<8>)aes_data_i_var.range(103,96); + aes_data[4]=(sc_uint<8>)aes_data_i_var.range(95,88);aes_data[5]=(sc_uint<8>)aes_data_i_var.range(87,80);aes_data[6]=(sc_uint<8>)aes_data_i_var.range(79,72);aes_data[7]=(sc_uint<8>)aes_data_i_var.range(71,64); + aes_data[8]=(sc_uint<8>)aes_data_i_var.range(63,56);aes_data[9]=(sc_uint<8>)aes_data_i_var.range(55,48);aes_data[10]=(sc_uint<8>)aes_data_i_var.range(47,40);aes_data[11]=(sc_uint<8>)aes_data_i_var.range(39,32); + aes_data[12]=(sc_uint<8>)aes_data_i_var.range(31,24);aes_data[13]=(sc_uint<8>)aes_data_i_var.range(23,16);aes_data[14]=(sc_uint<8>)aes_data_i_var.range(15,8);aes_data[15]=(sc_uint<8>)aes_data_i_var.range(7,0); + + + + if(!decrypt.read()) + encrypt_aes(aes_data,aes_key); + else + decrypt_aes(aes_data,aes_key); + + for(int i=0;i<16;i++) + aes_out[i]=aes_data[i]; + + aes_data_o_var.range(127,120)=aes_out[0];aes_data_o_var.range(119,112)=aes_out[1];aes_data_o_var.range(111,104)=aes_out[2];aes_data_o_var.range(103,96)=aes_out[3]; + aes_data_o_var.range(95,88)=aes_out[4];aes_data_o_var.range(87,80)=aes_out[5];aes_data_o_var.range(79,72)=aes_out[6];aes_data_o_var.range(71,64)=aes_out[7]; + aes_data_o_var.range(63,56)=aes_out[8];aes_data_o_var.range(55,48)=aes_out[9];aes_data_o_var.range(47,40)=aes_out[10];aes_data_o_var.range(39,32)=aes_out[11]; + aes_data_o_var.range(31,24)=aes_out[12];aes_data_o_var.range(23,16)=aes_out[13];aes_data_o_var.range(15,8)=aes_out[14];aes_data_o_var.range(7,0)=aes_out[15]; + + aes_data_o.write(aes_data_o_var); + } + } + + + + SC_CTOR(aesmodel){ + + SC_THREAD(aes_thread); + + } +}; Index: systemcaes/tags/V10/rtl/systemc/keysched.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/keysched.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/keysched.cpp (revision 28) @@ -0,0 +1,175 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES key schedule implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Generate the next round key from the previous one //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "keysched.h" + +//Rcon ROM +void keysched::rcon(){ + + switch(round_i.read()){ + case 1: + rcon_o.write(1); + break; + case 2: + rcon_o.write(2); + break; + case 3: + rcon_o.write(4); + break; + case 4: + rcon_o.write(8); + break; + case 5: + rcon_o.write(0x10); + break; + case 6: + rcon_o.write(0x20); + break; + case 7: + rcon_o.write(0x40); + break; + case 8: + rcon_o.write(0x80); + break; + case 9: + rcon_o.write(0x1B); + break; + case 10: + rcon_o.write(0x36); + break; + default: + rcon_o.write(0); + break; + } +} + +void keysched::generate_key(){ + sc_biguint<128> K_var,W_var; + sc_uint<32> col_t; + sc_uint<24> zero; + + zero=0; + + col_t=col.read(); + W_var=0; + + next_state.write(state.read()); + next_col.write(col.read()); + + next_ready_o.write(0); + next_key_reg.write(key_reg.read()); + new_key_o.write(key_reg.read()); + + sbox_decrypt_o.write(0); + sbox_access_o.write(0); + sbox_data_o.write(0); + K_var=last_key_i.read(); + + switch(state.read()){ + //Substitute the bytes while rotating them + //Four accesses to SBox are needed + case 0: + if(start_i.read()){ + col_t=0; + sbox_access_o.write(1); + sbox_data_o.write((sc_uint<8>)K_var.range(31,24)); + next_state.write(1); + } + break; + case 1: + sbox_access_o.write(1); + sbox_data_o.write((sc_uint<8>)K_var.range(23,16)); + col_t.range(7,0)=sbox_data_i.read(); + next_col.write(col_t); + next_state.write(2); + break; + case 2: + sbox_access_o.write(1); + sbox_data_o.write((sc_uint<8>)K_var.range(15,8)); + col_t.range(31,24)=sbox_data_i.read(); + next_col.write(col_t); + next_state.write(3); + break; + case 3: + sbox_access_o.write(1); + sbox_data_o.write((sc_uint<8>)K_var.range(7,0)); + col_t.range(23,16)=sbox_data_i.read(); + next_col.write(col_t); + next_state.write(4); + break; + case 4: + sbox_access_o.write(1); + col_t.range(15,8)=sbox_data_i.read(); + next_col.write(col_t); + W_var.range(127,96)=col_t^K_var.range(127,96)^(rcon_o.read(),zero); + W_var.range(95,64)=W_var.range(127,96)^K_var.range(95,64); + W_var.range(63,32)=W_var.range(95,64)^K_var.range(63,32); + W_var.range(31,0)=W_var.range(63,32)^K_var.range(31,0); + next_ready_o.write(1); + next_key_reg.write(W_var); + next_state.write(0); + break; + + default: + next_state.write(0); + break; + } +} + +void keysched::registers(){ + if(!reset.read()){ + state.write(0); + col.write(0); + key_reg.write(0); + ready_o.write(0); + }else{ + state.write(next_state.read()); + col.write(next_col.read()); + key_reg.write(next_key_reg.read()); + ready_o.write(next_ready_o.read()); + } +} Index: systemcaes/tags/V10/rtl/systemc/subbytes.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/subbytes.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/subbytes.cpp (revision 28) @@ -0,0 +1,202 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES subbytes module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Subbytes stage implementation for AES algorithm //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "subbytes.h" + +#define assign_array_to_128() \ +{ \ + data_reg_128.range(127,120)=data_reg_var[0]; \ + data_reg_128.range(119,112)=data_reg_var[1]; \ + data_reg_128.range(111,104)=data_reg_var[2]; \ + data_reg_128.range(103,96)=data_reg_var[3]; \ + data_reg_128.range(95,88)=data_reg_var[4]; \ + data_reg_128.range(87,80)=data_reg_var[5]; \ + data_reg_128.range(79,72)=data_reg_var[6]; \ + data_reg_128.range(71,64)=data_reg_var[7]; \ + data_reg_128.range(63,56)=data_reg_var[8]; \ + data_reg_128.range(55,48)=data_reg_var[9]; \ + data_reg_128.range(47,40)=data_reg_var[10]; \ + data_reg_128.range(39,32)=data_reg_var[11]; \ + data_reg_128.range(31,24)=data_reg_var[12]; \ + data_reg_128.range(23,16)=data_reg_var[13]; \ + data_reg_128.range(15,8)=data_reg_var[14]; \ + data_reg_128.range(7,0)=data_reg_var[15]; \ +} + +#define shift_array_to_128() \ +{ \ + data_reg_128.range(127,120)=data_reg_var[0]; \ + data_reg_128.range(119,112)=data_reg_var[5]; \ + data_reg_128.range(111,104)=data_reg_var[10]; \ + data_reg_128.range(103,96)=data_reg_var[15]; \ + data_reg_128.range(95,88)=data_reg_var[4]; \ + data_reg_128.range(87,80)=data_reg_var[9]; \ + data_reg_128.range(79,72)=data_reg_var[14]; \ + data_reg_128.range(71,64)=data_reg_var[3]; \ + data_reg_128.range(63,56)=data_reg_var[8]; \ + data_reg_128.range(55,48)=data_reg_var[13]; \ + data_reg_128.range(47,40)=data_reg_var[2]; \ + data_reg_128.range(39,32)=data_reg_var[7]; \ + data_reg_128.range(31,24)=data_reg_var[12]; \ + data_reg_128.range(23,16)=data_reg_var[1]; \ + data_reg_128.range(15,8)=data_reg_var[6]; \ + data_reg_128.range(7,0)=data_reg_var[11]; \ +} + +#define invert_shift_array_to_128() \ +{ \ + data_reg_128.range(127,120)=data_reg_var[0]; \ + data_reg_128.range(119,112)=data_reg_var[13]; \ + data_reg_128.range(111,104)=data_reg_var[10]; \ + data_reg_128.range(103,96)=data_reg_var[7]; \ + data_reg_128.range(95,88)=data_reg_var[4]; \ + data_reg_128.range(87,80)=data_reg_var[1]; \ + data_reg_128.range(79,72)=data_reg_var[14]; \ + data_reg_128.range(71,64)=data_reg_var[11]; \ + data_reg_128.range(63,56)=data_reg_var[8]; \ + data_reg_128.range(55,48)=data_reg_var[5]; \ + data_reg_128.range(47,40)=data_reg_var[2]; \ + data_reg_128.range(39,32)=data_reg_var[15]; \ + data_reg_128.range(31,24)=data_reg_var[12]; \ + data_reg_128.range(23,16)=data_reg_var[9]; \ + data_reg_128.range(15,8)=data_reg_var[6]; \ + data_reg_128.range(7,0)=data_reg_var[3]; \ +} + + +void subbytes::sub(){ + sc_biguint<128> data_i_var,data_reg_128; + sc_uint<8> data_array[16],data_reg_var[16]; + + data_i_var=data_i.read(); + + data_array[0]=data_i_var.range(127,120); + data_array[1]=data_i_var.range(119,112); + data_array[2]=data_i_var.range(111,104); + data_array[3]=data_i_var.range(103,96); + data_array[4]=data_i_var.range(95,88); + data_array[5]=data_i_var.range(87,80); + data_array[6]=data_i_var.range(79,72); + data_array[7]=data_i_var.range(71,64); + data_array[8]=data_i_var.range(63,56); + data_array[9]=data_i_var.range(55,48); + data_array[10]=data_i_var.range(47,40); + data_array[11]=data_i_var.range(39,32); + data_array[12]=data_i_var.range(31,24); + data_array[13]=data_i_var.range(23,16); + data_array[14]=data_i_var.range(15,8); + data_array[15]=data_i_var.range(7,0); + + data_reg_var[0]=data_reg.read().range(127,120); + data_reg_var[1]=data_reg.read().range(119,112); + data_reg_var[2]=data_reg.read().range(111,104); + data_reg_var[3]=data_reg.read().range(103,96); + data_reg_var[4]=data_reg.read().range(95,88); + data_reg_var[5]=data_reg.read().range(87,80); + data_reg_var[6]=data_reg.read().range(79,72); + data_reg_var[7]=data_reg.read().range(71,64); + data_reg_var[8]=data_reg.read().range(63,56); + data_reg_var[9]=data_reg.read().range(55,48); + data_reg_var[10]=data_reg.read().range(47,40); + data_reg_var[11]=data_reg.read().range(39,32); + data_reg_var[12]=data_reg.read().range(31,24); + data_reg_var[13]=data_reg.read().range(23,16); + data_reg_var[14]=data_reg.read().range(15,8); + data_reg_var[15]=data_reg.read().range(7,0); + + + sbox_decrypt_o.write(decrypt_i.read()); + sbox_data_o.write(0); + next_state.write(state.read()); + next_data_reg.write(data_reg.read()); + + next_ready_o.write(0); + data_o.write(data_reg.read()); + + switch(state.read()){ + + case 0: + if(start_i.read()){ + sbox_data_o.write(data_array[0]); + next_state.write(1); + } + break; + case 16: + data_reg_var[15]=sbox_data_i.read(); + //Make shift rows stage + switch(decrypt_i.read()){ + case 0: + shift_array_to_128(); + break; + case 1: + invert_shift_array_to_128(); + break; + } + next_data_reg.write(data_reg_128); + next_ready_o.write(1); + next_state.write(0); + break; + default: + sbox_data_o.write(data_array[(int)state.read()]); + data_reg_var[(int)state.read()-1]=sbox_data_i.read(); + assign_array_to_128(); + next_data_reg.write(data_reg_128); + next_state.write(state.read()+1); + break; + } +} + +void subbytes::registers(){ + if(!reset.read()){ + data_reg.write(0); + state.write(0); + ready_o.write(0); + }else{ + data_reg.write(next_data_reg.read()); + state.write(next_state.read()); + ready_o.write(next_ready_o.read()); + } +} Index: systemcaes/tags/V10/rtl/systemc/mixcolum.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/mixcolum.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/mixcolum.h (revision 28) @@ -0,0 +1,102 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES moxcolum module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum stage implementation for AES algorithm //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + + +#include "systemc.h" +#include "word_mixcolum.h" + +SC_MODULE(mixcolum){ + + sc_in clk; + sc_in reset; + + sc_in decrypt_i; + sc_in start_i; + sc_in > data_i; + + sc_out ready_o; + sc_out > data_o; + + sc_signal > data_reg,next_data_reg,data_o_reg,next_data_o; + sc_signal next_ready_o; + + void mixcol(); + void registers(); + void mux(); + void assign_data_o(); + + sc_signal > state,next_state; + + sc_signal > outx,outy,mix_word,outmux; + + word_mixcolum *w1; + + SC_CTOR(mixcolum){ + + w1=new word_mixcolum("w1"); + + w1->in(mix_word); + w1->outx(outx); + w1->outy(outy); + + SC_METHOD(assign_data_o); + sensitive << data_o_reg; + + SC_METHOD(mux); + sensitive << outx << outy; + + SC_METHOD(registers); + sensitive_pos << clk; + sensitive_neg << reset; + + SC_METHOD(mixcol); + sensitive << decrypt_i << start_i << state << data_reg << outmux << data_o_reg; + + + + } +}; Index: systemcaes/tags/V10/rtl/systemc/keysched.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/keysched.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/keysched.h (revision 28) @@ -0,0 +1,91 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES key schedule header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Generate the next round key from the previous one //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" + +SC_MODULE(keysched){ + + sc_in clk; + sc_in reset; + + sc_in start_i; + sc_in > round_i; + sc_in > last_key_i; + sc_out > new_key_o; + sc_out ready_o; + + //To Sbox + //Indicates an access to sbox to arbitrate with the subbytes stage + sc_out sbox_access_o; + sc_out > sbox_data_o; + sc_in > sbox_data_i; + sc_out sbox_decrypt_o; //Always 0 + + void rcon(); + void generate_key(); + void registers(); + void muxes(); + + sc_signal > next_state,state; + sc_signal > rcon_o; + sc_signal > next_col,col; + sc_signal > key_reg,next_key_reg; + sc_signal next_ready_o; + + SC_CTOR(keysched){ + + SC_METHOD(rcon); + sensitive << round_i; + + SC_METHOD(registers); + sensitive_pos << clk; + sensitive_neg << reset; + + SC_METHOD(generate_key); + sensitive << start_i << last_key_i << sbox_data_i << state << rcon_o << col << key_reg; + + } +}; Index: systemcaes/tags/V10/rtl/systemc/subbytes.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/subbytes.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/subbytes.h (revision 28) @@ -0,0 +1,84 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES subbytes module header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Subbytes stage header for AES algorithm //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +SC_MODULE(subbytes){ + + sc_in clk; + sc_in reset; + + sc_in start_i; + sc_in decrypt_i; + sc_in > data_i; + + sc_out ready_o; + sc_out > data_o; + + //To sbox + sc_out > sbox_data_o; + sc_in > sbox_data_i; + sc_out sbox_decrypt_o; + + void sub(); + void registers(); + + sc_signal > state,next_state; + sc_signal > data_reg,next_data_reg; + sc_signal next_ready_o; + + SC_CTOR(subbytes){ + + SC_METHOD(registers); + sensitive_pos << clk; + sensitive_neg << reset; + + SC_METHOD(sub); + sensitive << decrypt_i << start_i << state << data_i << sbox_data_i << data_reg; + + } +}; Index: systemcaes/tags/V10/rtl/systemc/aesfunctions.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/aesfunctions.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/aesfunctions.h (revision 28) @@ -0,0 +1,448 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES C encrypt and decrypt functions for C golden model //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// AES C encrypt and decrypt functions for C golden model //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +static const unsigned char Alogtable[] = { +1, 3, 5, 15, 17, 51, 85, 255, 26, 46, 114, 150, 161, 248, 19, 53, +95, 225, 56, 72, 216, 115, 149, 164, 247, 2, 6, 10, 30, 34, 102, 170, +229, 52, 92, 228, 55, 89, 235, 38, 106, 190, 217, 112, 144, 171, 230, 49, +83, 245, 4, 12, 20, 60, 68, 204, 79, 209, 104, 184, 211, 110, 178, 205, +76, 212, 103, 169, 224, 59, 77, 215, 98, 166, 241, 8, 24, 40, 120, 136, +131, 158, 185, 208, 107, 189, 220, 127, 129, 152, 179, 206, 73, 219, 118, 154, +181, 196, 87, 249, 16, 48, 80, 240, 11, 29, 39, 105, 187, 214, 97, 163, +254, 25, 43, 125, 135, 146, 173, 236, 47, 113, 147, 174, 233, 32, 96, 160, +251, 22, 58, 78, 210, 109, 183, 194, 93, 231, 50, 86, 250, 21, 63, 65, +195, 94, 226, 61, 71, 201, 64, 192, 91, 237, 44, 116, 156, 191, 218, 117, +159, 186, 213, 100, 172, 239, 42, 126, 130, 157, 188, 223, 122, 142, 137, 128, +155, 182, 193, 88, 232, 35, 101, 175, 234, 37, 111, 177, 200, 67, 197, 84, +252, 31, 33, 99, 165, 244, 7, 9, 27, 45, 119, 153, 176, 203, 70, 202, +69, 207, 74, 222, 121, 139, 134, 145, 168, 227, 62, 66, 198, 81, 243, 14, +18, 54, 90, 238, 41, 123, 141, 140, 143, 138, 133, 148, 167, 242, 13, 23, +57, 75, 221, 124, 132, 151, 162, 253, 28, 36, 108, 180, 199, 82, 246, 1, +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Logtable[] = { +0, 0, 25, 1, 50, 2, 26, 198, 75, 199, 27, 104, 51, 238, 223, 3, +100, 4, 224, 14, 52, 141, 129, 239, 76, 113, 8, 200, 248, 105, 28, 193, +125, 194, 29, 181, 249, 185, 39, 106, 77, 228, 166, 114, 154, 201, 9, 120, +101, 47, 138, 5, 33, 15, 225, 36, 18, 240, 130, 69, 53, 147, 218, 142, +150, 143, 219, 189, 54, 208, 206, 148, 19, 92, 210, 241, 64, 70, 131, 56, +102, 221, 253, 48, 191, 6, 139, 98, 179, 37, 226, 152, 34, 136, 145, 16, +126, 110, 72, 195, 163, 182, 30, 66, 58, 107, 40, 84, 250, 133, 61, 186, +43, 121, 10, 21, 155, 159, 94, 202, 78, 212, 172, 229, 243, 115, 167, 87, +175, 88, 168, 80, 244, 234, 214, 116, 79, 174, 233, 213, 231, 230, 173, 232, +44, 215, 117, 122, 235, 22, 11, 245, 89, 203, 95, 176, 156, 169, 81, 160, +127, 12, 246, 111, 23, 196, 73, 236, 216, 67, 31, 45, 164, 118, 123, 183, +204, 187, 62, 90, 251, 96, 177, 134, 59, 82, 161, 108, 170, 85, 41, 157, +151, 178, 135, 144, 97, 190, 220, 252, 188, 149, 207, 205, 55, 63, 91, 209, +83, 57, 132, 60, 65, 162, 109, 71, 20, 42, 158, 93, 86, 242, 211, 171, +68, 17, 146, 217, 35, 32, 46, 137, 180, 124, 184, 38, 119, 153, 227, 165, +103, 74, 237, 222, 197, 49, 254, 24, 13, 99, 140, 128, 192, 247, 112, 7, +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Sen[] = { + 99, 124, 119, 123, 242, 107, 111, 197, + 48, 1, 103, 43, 254, 215, 171, 118, + 202, 130, 201, 125, 250, 89, 71, 240, + 173, 212, 162, 175, 156, 164, 114, 192, + 183, 253, 147, 38, 54, 63, 247, 204, + 52, 165, 229, 241, 113, 216, 49, 21, + 4, 199, 35, 195, 24, 150, 5, 154, + 7, 18, 128, 226, 235, 39, 178, 117, + 9, 131, 44, 26, 27, 110, 90, 160, + 82, 59, 214, 179, 41, 227, 47, 132, + 83, 209, 0, 237, 32, 252, 177, 91, + 106, 203, 190, 57, 74, 76, 88, 207, + 208, 239, 170, 251, 67, 77, 51, 133, + 69, 249, 2, 127, 80, 60, 159, 168, + 81, 163, 64, 143, 146, 157, 56, 245, + 188, 182, 218, 33, 16, 255, 243, 210, + 205, 12, 19, 236, 95, 151, 68, 23, + 196, 167, 126, 61, 100, 93, 25, 115, + 96, 129, 79, 220, 34, 42, 144, 136, + 70, 238, 184, 20, 222, 94, 11, 219, + 224, 50, 58, 10, 73, 6, 36, 92, + 194, 211, 172, 98, 145, 149, 228, 121, + 231, 200, 55, 109, 141, 213, 78, 169, + 108, 86, 244, 234, 101, 122, 174, 8, + 186, 120, 37, 46, 28, 166, 180, 198, + 232, 221, 116, 31, 75, 189, 139, 138, + 112, 62, 181, 102, 72, 3, 246, 14, + 97, 53, 87, 185, 134, 193, 29, 158, + 225, 248, 152, 17, 105, 217, 142, 148, + 155, 30, 135, 233, 206, 85, 40, 223, + 140, 161, 137, 13, 191, 230, 66, 104, + 65, 153, 45, 15, 176, 84, 187, 22 +}; +/*----------------------------------------------------------------------------*/ +static const unsigned char Sde[] = { +82, 9, 106, 213, 48, 54, 165, 56, 191, 64, 163, 158, 129, 243, 215, 251, +124, 227, 57, 130, 155, 47, 255, 135, 52, 142, 67, 68, 196, 222, 233, 203, +84, 123, 148, 50, 166, 194, 35, 61, 238, 76, 149, 11, 66, 250, 195, 78, +8, 46, 161, 102, 40, 217, 36, 178, 118, 91, 162, 73, 109, 139, 209, 37, +114, 248, 246, 100, 134, 104, 152, 22, 212, 164, 92, 204, 93, 101, 182, 146, +108, 112, 72, 80, 253, 237, 185, 218, 94, 21, 70, 87, 167, 141, 157, 132, +144, 216, 171, 0, 140, 188, 211, 10, 247, 228, 88, 5, 184, 179, 69, 6, +208, 44, 30, 143, 202, 63, 15, 2, 193, 175, 189, 3, 1, 19, 138, 107, +58, 145, 17, 65, 79, 103, 220, 234, 151, 242, 207, 206, 240, 180, 230, 115, +150, 172, 116, 34, 231, 173, 53, 133, 226, 249, 55, 232, 28, 117, 223, 110, +71, 241, 26, 113, 29, 41, 197, 137, 111, 183, 98, 14, 170, 24, 190, 27, +252, 86, 62, 75, 198, 210, 121, 32, 154, 219, 192, 254, 120, 205, 90, 244, +31, 221, 168, 51, 136, 7, 199, 49, 177, 18, 16, 89, 39, 128, 236, 95, +96, 81, 127, 169, 25, 181, 74, 13, 45, 229, 122, 159, 147, 201, 156, 239, +160, 224, 59, 77, 174, 42, 245, 176, 200, 235, 187, 60, 131, 83, 153, 97, +23, 43, 4, 126, 186, 119, 214, 38, 225, 105, 20, 99, 85, 33, 12, 125, +}; + +void +switchblock(unsigned char *block) +{ + int i; + unsigned char *aux; + aux = (unsigned char *)malloc(16*sizeof(char)); + + *(aux) = *(block); + *(aux + 1) = *(block + 4); + *(aux + 2) = *(block + 8); + *(aux + 3) = *(block + 12); + *(aux + 4) = *(block + 1); + *(aux + 5) = *(block + 5); + *(aux + 6) = *(block + 9); + *(aux + 7) = *(block + 13); + *(aux + 8) = *(block + 2); + *(aux + 9) = *(block + 6); + *(aux + 10) = *(block + 10); + *(aux + 11) = *(block + 14); + *(aux + 12) = *(block + 3); + *(aux + 13) = *(block + 7); + *(aux + 14) = *(block + 11); + *(aux + 15) = *(block + 15); + + for(i = 0; i < 16; i++) + *(block + i) = *(aux + i); + +} + +void +RotWord(unsigned char *a) +{ +unsigned char aux; +aux = *(a + 0); +*(a + 0) = *(a + 1); +*(a + 1) = *(a + 2); +*(a + 2) = *(a + 3); +*(a + 3) = aux; +} +/*----------------------------------------------------------------------------*/ +void +KeySchedule(unsigned char *key, unsigned char *rcon) +{ +unsigned char aux1[4]; +unsigned char aux2[4]; +unsigned char aux3[4]; +int i = 0; +for(i = 0; i < 4; i++) + { + aux1[i] = *(key + i*4 + 3); + aux2[i] = *(key + i*4); + } +RotWord((unsigned char *)aux1); + +//SubBytes +for(i = 0; i < 4; i++) + { + aux1[i] = Sen[aux1[i]]; + } +for(i = 0; i < 4; i++) + { + aux3[i] = aux2[i] ^ aux1[i] ^ *(rcon + i); + *(key + i*4) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 1) ^ aux3[i]; + *(key + i*4 + 1) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 2) ^ aux3[i]; + *(key + i*4 + 2) = aux3[i]; + } + +for(i = 0; i < 4; i++) + { + aux3[i] = *(key + i*4 + 3) ^ aux3[i]; + *(key + i*4 + 3) = aux3[i]; + } + +} +/*----------------------------------------------------------------------------*/ +unsigned char +mul(unsigned char a, unsigned char b) +{ +if (a && b) + return Alogtable[(Logtable[a] + Logtable[b])%255]; +else + return 0; +} +/*----------------------------------------------------------------------------*/ +void +MixColum(unsigned char *state) +{ +int j = 0; +unsigned char aux = 0; +unsigned char aux_vector[16]; + +for(j = 0; j < 4; j++) + { + aux = mul(0x2, *(state + j)) ^ mul(0x3, *(state + j + 4)) ^ *(state + j + 8) ^ *(state + j + 12); + aux_vector[j] = aux; + aux = *(state + j) ^ mul(0x2, *(state + j + 4)) ^ mul(0x3, *(state + j + 8)) ^ *(state + j + 12); + aux_vector[j + 4] = aux; + aux = *(state + j) ^ *(state + j + 4) ^ mul(0x2, *(state + j + 8)) ^ mul(0x3, *(state + j + 12)); + aux_vector[j + 8] = aux; + aux = mul(0x3, *(state + j)) ^ *(state + j + 4) ^ *(state + j + 8) ^ mul(0x2, *(state + j + 12)); + aux_vector[j + 12] = aux; + } +for(j = 0; j < 16; j++) + *(state + j) = aux_vector[j]; +} +/*----------------------------------------------------------------------------*/ +void +InvMixColum(unsigned char *state) +{ +int j = 0; +unsigned char aux = 0; +unsigned char aux_vector[16]; + +for(j = 0; j < 4; j++) + { + aux = mul(0x0e, *(state + j)) ^ mul(0x0b, *(state + j + 4)) ^ mul(0x0d, *(state + j + 8)) ^ mul(0x09, *(state + j + 12)); + aux_vector[j] = aux; + aux = mul(0x09, *(state + j)) ^ mul(0x0e, *(state + j + 4)) ^ mul(0x0b, *(state + j + 8)) ^ mul(0x0d, *(state + j + 12)); + aux_vector[j + 4] = aux; + aux = mul(0x0d, *(state + j)) ^ mul(0x09, *(state + j + 4)) ^ mul(0x0e, *(state + j + 8)) ^ mul(0x0b, *(state + j + 12)); + aux_vector[j + 8] = aux; + aux = mul(0x0b, *(state + j)) ^ mul(0x0d, *(state + j + 4)) ^ mul(0x09, *(state + j + 8)) ^ mul(0x0e, *(state + j + 12)); + aux_vector[j + 12] = aux; + } +for(j = 0; j < 16; j++) + *(state + j) = aux_vector[j]; +} + +/*----------------------------------------------------------------------------*/ +void +AddRoundKey(unsigned char *state, unsigned char *key) +{ +int i = 0; +for(i = 0; i < 16; i++) + *(state + i) ^= *(key + i); +} +/*----------------------------------------------------------------------------*/ +/*void +PrintState(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + diag_printf("%x ", *(state + i)); + if((i+1) % 4 == 0) + diag_printf("\n"); + + } +}*/ +/*----------------------------------------------------------------------------*/ +void +SubBytes(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + *(state + i) = Sen[*(state + i)]; + } +} +/*----------------------------------------------------------------------------*/ +void +InvSubBytes(unsigned char *state) +{ +int i = 0; +for(i = 0; i < 16; i++) + { + *(state + i) = Sde[*(state + i)]; + } +} +/*----------------------------------------------------------------------------*/ + +void +ShiftRows(unsigned char *state) +{ +unsigned char AUX[16]; +int i = 0; +for(i = 0; i < 16; i++) + { + AUX[i] = *(state + i); + } +*(state + 4) = AUX[5]; +*(state + 5) = AUX[6]; +*(state + 6) = AUX[7]; +*(state + 7) = AUX[4]; + +*(state + 8) = AUX[10]; +*(state + 9) = AUX[11]; +*(state + 10) = AUX[8]; +*(state + 11) = AUX[9]; + +*(state + 12) = AUX[15]; +*(state + 13) = AUX[12]; +*(state + 14) = AUX[13]; +*(state + 15) = AUX[14]; +} +/*----------------------------------------------------------------------------*/ + +void +InvShiftRows(unsigned char *state) +{ +unsigned char AUX[16]; +int i = 0; +for(i = 0; i < 16; i++) + { + AUX[i] = *(state + i); + } +*(state + 4) = AUX[7]; +*(state + 5) = AUX[4]; +*(state + 6) = AUX[5]; +*(state + 7) = AUX[6]; + +*(state + 8) = AUX[10]; +*(state + 9) = AUX[11]; +*(state + 10) = AUX[8]; +*(state + 11) = AUX[9]; + +*(state + 12) = AUX[13]; +*(state + 13) = AUX[14]; +*(state + 14) = AUX[15]; +*(state + 15) = AUX[12]; +} +/*----------------------------------------------------------------------------*/ + +unsigned char* +KeyExpand(unsigned char *key) +{ +int i = 0; +int j = 0; + +unsigned char aux[10] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36}; +unsigned char rcon[4] = {0x00, 0x00, 0x00, 0x00}; + +unsigned char auxmalloc[1000]; +unsigned char *expandedkey; +expandedkey = (unsigned char *)auxmalloc; + +for(i = 0; i < 16; i++) + *(expandedkey + i) = *(key + i); + +for(i = 0; i < 10; i++) + { + rcon[0] = aux[i]; + KeySchedule((unsigned char *)(key), (unsigned char *)rcon); + for(j = 0; j < 16; j++) + *(expandedkey + 16*(i + 1) + j) = *(key + j); + } +return expandedkey; +} +/*----------------------------------------------------------------------------*/ +void +encrypt_aes(unsigned char *block, unsigned char *key) +{ +int i = 0; + +switchblock(block); +switchblock(key); + + +unsigned char *expandedkey; +expandedkey = KeyExpand((unsigned char *)key); + +AddRoundKey((unsigned char *)block, (unsigned char *)expandedkey); + + + +for(i = 0; i < 10; i++) + { + SubBytes((unsigned char *)block); + ShiftRows((unsigned char *)block); + if(i!=9) + MixColum((unsigned char *)block); + AddRoundKey((unsigned char *)block, (unsigned char *)(expandedkey + 16*(i + 1))); + } +switchblock(block); +} +/*----------------------------------------------------------------------------*/ +void +decrypt_aes(unsigned char *block, unsigned char *key) +{ +int i = 0; + +switchblock(block); +switchblock(key); + +unsigned char *expandedkey; +expandedkey = KeyExpand((unsigned char *)key); + +for(i = 10; i > 0; i--) + { + AddRoundKey((unsigned char *)block, (unsigned char *)(expandedkey + 16*i)); + if(i!=10) + InvMixColum((unsigned char *)block); + InvShiftRows((unsigned char *)block); + InvSubBytes((unsigned char *)block); + } +AddRoundKey((unsigned char *)block, (unsigned char *)expandedkey); +switchblock(block); +} +/*----------------------------------------------------------------------------*/ Index: systemcaes/tags/V10/rtl/systemc/aes.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/aes.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/aes.cpp (revision 28) @@ -0,0 +1,212 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES Top module //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// TOP module //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "aes.h" + +void aes::registers(){ + if(!reset.read()){ + state.write(IDLE); + ready_o.write(0); + round.write(0); + addroundkey_round.write(0); + addroundkey_data_reg.write(0); + addroundkey_ready_o.write(0); + addroundkey_start_i.write(0); + first_round_reg.write(0); + }else{ + state.write(next_state.read()); + ready_o.write(next_ready_o.read()); + round.write(next_round.read()); + addroundkey_round.write(next_addroundkey_round.read()); + addroundkey_data_reg.write(next_addroundkey_data_reg.read()); + addroundkey_ready_o.write(next_addroundkey_ready_o); + first_round_reg.write(next_first_round_reg.read()); + addroundkey_start_i.write(next_addroundkey_start_i.read()); + } +} + + +void aes::addroundkey(){ + sc_biguint<128> data_var,round_data_var,round_key_var; + + round_data_var=addroundkey_data_reg.read(); + next_addroundkey_data_reg.write(addroundkey_data_reg.read()); + next_addroundkey_ready_o.write(0); + next_addroundkey_round.write(addroundkey_round.read()); + addroundkey_data_o.write(addroundkey_data_reg.read()); + + if(addroundkey_round.read()==1 || addroundkey_round.read()==0) + keysched_last_key_i.write(key_i.read()); + else + keysched_last_key_i.write(keysched_new_key_o.read()); + + keysched_start_i.write(0); + + keysched_round_i.write(addroundkey_round.read()); + + if(round.read()==0 && addroundkey_start_i.read()){ + //Take the input and xor them with data if round==0; + data_var=addroundkey_data_i.read(); + round_key_var=key_i.read(); + round_data_var=round_key_var^data_var; + next_addroundkey_data_reg.write(round_data_var); + next_addroundkey_ready_o.write(1); + }else if(addroundkey_start_i.read() && round.read()!=0){ + keysched_last_key_i.write(key_i.read()); + keysched_start_i.write(1); + keysched_round_i.write(1); + next_addroundkey_round.write(1); + }else if(addroundkey_round.read()!=round.read() && keysched_ready_o.read()){ + next_addroundkey_round.write(addroundkey_round.read()+1); + keysched_last_key_i.write(keysched_new_key_o.read()); + keysched_start_i.write(1); + keysched_round_i.write(addroundkey_round.read()+1); + }else if(addroundkey_round.read()==round.read() && keysched_ready_o.read()){ + data_var=addroundkey_data_i.read(); + round_key_var=keysched_new_key_o.read(); + round_data_var=round_key_var^data_var; + next_addroundkey_data_reg.write(round_data_var); + next_addroundkey_ready_o.write(1); + next_addroundkey_round.write(0); + } +} + +void aes::sbox_muxes(){ + + if(keysched_sbox_access_o.read()){ + sbox_decrypt_i.write(keysched_sbox_decrypt_o.read()); + sbox_data_i.write(keysched_sbox_data_o.read()); + }else{ + sbox_decrypt_i.write(subbytes_sbox_decrypt_o.read()); + sbox_data_i.write(subbytes_sbox_data_o.read()); + } +} + + +void aes::control(){ + + next_state.write(state.read()); + next_round.write(round.read()); + data_o.write(addroundkey_data_o.read()); + next_ready_o.write(0); + + //To key schedule module + + next_first_round_reg.write(0); + + subbytes_data_i.write(0); + mixcol_data_i.write(0); + addroundkey_data_i.write(0); + + next_addroundkey_start_i.write(first_round_reg.read()); + mixcol_start_i.write((addroundkey_ready_o.read() & decrypt_i.read() & round.read()!=10) | (subbytes_ready_o.read() & !decrypt_i.read())); + subbytes_start_i.write((addroundkey_ready_o.read() & !decrypt_i.read()) | (mixcol_ready_o.read() & decrypt_i.read()) | (addroundkey_ready_o.read() & decrypt_i.read() & round.read()==10)); + + if(decrypt_i.read() && round.read()!=10){ + addroundkey_data_i.write(subbytes_data_o.read()); + subbytes_data_i.write(mixcol_data_o.read()); + mixcol_data_i.write(addroundkey_data_o.read()); + }else if(!decrypt_i.read() && round.read()!=0){ + addroundkey_data_i.write(mixcol_data_o.read()); + subbytes_data_i.write(addroundkey_data_o.read()); + mixcol_data_i.write(subbytes_data_o.read()); + }else{ + mixcol_data_i.write(subbytes_data_o.read()); + subbytes_data_i.write(addroundkey_data_o.read()); + addroundkey_data_i.write(data_i.read()); + } + + switch(state.read()){ + + case IDLE: + if(load_i.read()){ + next_state.write(ROUNDS); + decrypt_i.read()?next_round.write(10):next_round.write(0); + next_first_round_reg.write(1); + } + break; + + case ROUNDS: + + //Counter + if(!decrypt_i.read() && mixcol_ready_o.read()){ + next_addroundkey_start_i.write(1); + addroundkey_data_i.write(mixcol_data_o.read()); + next_round.write(round.read()+1); + }else if(decrypt_i.read() && subbytes_ready_o.read()){ + next_addroundkey_start_i.write(1); + addroundkey_data_i.write(subbytes_data_o.read()); + next_round.write(round.read()-1); + } + + //Output + if((round.read()==9 && !decrypt_i.read()) || (round.read()==0 && decrypt_i.read())){ + next_addroundkey_start_i.write(0); + mixcol_start_i.write(0); + if(subbytes_ready_o.read()){ + addroundkey_data_i.write(subbytes_data_o.read()); + next_addroundkey_start_i.write(1); + next_round.write(round.read()+1); + } + } + if((round.read()==10 && !decrypt_i.read()) || (round.read()==0 && decrypt_i.read())){ + addroundkey_data_i.write(subbytes_data_o.read()); + subbytes_start_i.write(0); + if(addroundkey_ready_o.read()){ + next_ready_o.write(1); + next_state.write(IDLE); + next_addroundkey_start_i.write(0); + next_round.write(0); + } + } + + break; + + default: + next_state.write(IDLE); + break; + } +} Index: systemcaes/tags/V10/rtl/systemc/checker.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/checker.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/checker.h (revision 28) @@ -0,0 +1,81 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Checker //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Check that the outputs from the RTL model and the C model //// +//// used as golden model are the same //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +SC_MODULE(checker){ + + sc_in reset; + + sc_fifo_in > rt_aes_data_i; + sc_fifo_in > c_aes_data_i; + + void check(){ + sc_biguint<128> rt_data_var,c_data_var; + + wait(reset->posedge_event()); + + while(1){ + if(reset.read()){ + rt_data_var=rt_aes_data_i.read(); + c_data_var=c_aes_data_i.read(); + if(rt_data_var!=c_data_var){ + cout << "Simulation mismatch: 0x" << (int)(sc_uint<32>)rt_data_var.range(127,96) << (int)(sc_uint<32>)rt_data_var.range(95,64) << (int)(sc_uint<32>)rt_data_var.range(31,0) << " 0x" << (int)(sc_uint<32>)c_data_var.range(127,96) << (int)(sc_uint<32>)c_data_var.range(95,64) << (int)(sc_uint<32>)c_data_var.range(63,32) << (int)(sc_uint<32>)c_data_var.range(31,0) << " " << sc_time_stamp() << endl; + exit(0); + }else{ + cout << "OK: 0x" << (int)(sc_uint<32>)rt_data_var.range(127,96) << (int)(sc_uint<32>)rt_data_var.range(95,64) << (int)(sc_uint<32>)rt_data_var.range(31,0) << " 0x" << (int)(sc_uint<32>)c_data_var.range(127,96) << (int)(sc_uint<32>)c_data_var.range(95,64) << (int)(sc_uint<32>)c_data_var.range(63,32) << (int)(sc_uint<32>)c_data_var.range(31,0) << " " << sc_time_stamp() << endl; + } + }else + wait(reset->posedge_event()); + } + } + + SC_CTOR(checker){ + SC_THREAD(check); + } + }; Index: systemcaes/tags/V10/rtl/systemc/sbox.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/sbox.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/sbox.cpp (revision 28) @@ -0,0 +1,292 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES sboc module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// S-box calculation calculating inverse on gallois field //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "sbox.h" + +void sbox::registers(){ + if(!reset.read()){ + to_invert.write(0); + ah_reg.write(0); + alph.write(0); + }else{ + to_invert.write(next_to_invert.read()); + ah_reg.write(next_ah_reg.read()); + alph.write(next_alph.read()); + } +} + +void sbox::first_mux(){ + sc_uint<8> data_var; + sc_uint<8> InvInput; + sc_uint<4> ah_t,al_t; + bool aA,aB,aC,aD; + + data_var=data_i.read(); + InvInput=data_var; + + switch(decrypt_i.read()){ + case 1: + //Apply inverse affine trasformation + aA=data_var[0]^data_var[5]; aB=data_var[1]^data_var[4]; + aC=data_var[2]^data_var[7]; aD=data_var[3]^data_var[6]; + InvInput[0]=(!data_var[5])^aC; + InvInput[1]=data_var[0]^aD; + InvInput[2]=(!data_var[7])^aB; + InvInput[3]=data_var[2]^aA; + InvInput[4]=data_var[1]^aD; + InvInput[5]=data_var[4]^aC; + InvInput[6]=data_var[3]^aA; + InvInput[7]=data_var[6]^aB; + break; + default: + InvInput=data_var; + break; + } + + //Convert elements from GF(2^8) into two elements of GF(2^4^2) + + aA=InvInput[1]^InvInput[7]; + aB=InvInput[5]^InvInput[7]; + aC=InvInput[4]^InvInput[6]; + + + al_t[0]=aC^InvInput[0]^InvInput[5]; + al_t[1]=InvInput[1]^InvInput[2]; + al_t[2]=aA; + al_t[3]=InvInput[2]^InvInput[4]; + + ah_t[0]=aC^InvInput[5]; + ah_t[1]=aA^aC; + ah_t[2]=aB^InvInput[2]^InvInput[3]; + ah_t[3]=aB; + + al.write(al_t); + ah.write(ah_t); + next_ah_reg.write(ah_t); +} + +void sbox::end_mux(){ + sc_uint<8> data_var,data_o_var; + bool aA,aB,aC,aD; + + + //Take the output of the inverter + data_var=inva.read(); + + switch(decrypt_i.read()){ + case 0: + //Apply affine trasformation + aA=data_var[0]^data_var[1]; aB=data_var[2]^data_var[3]; + aC=data_var[4]^data_var[5]; aD=data_var[6]^data_var[7]; + data_o_var[0]=(!data_var[0])^aC^aD; + data_o_var[1]=(!data_var[5])^aA^aD; + data_o_var[2]=data_var[2]^aA^aD; + data_o_var[3]=data_var[7]^aA^aB; + data_o_var[4]=data_var[4]^aA^aB; + data_o_var[5]=(!data_var[1])^aB^aC; + data_o_var[6]=(!data_var[6])^aB^aC; + data_o_var[7]=data_var[3]^aC^aD; + data_o.write(data_o_var); + break; + default: + data_o.write(data_var); + break; + } + +} + +//Four operations in parallel +void sbox::square1(){ + sc_uint<4> ah_t; + + ah_t[0]=ah.read()[0]^ah.read()[2]; + ah_t[1]=ah.read()[2]; + ah_t[2]=ah.read()[1]^ah.read()[3]; + ah_t[3]=ah.read()[3]; + + ah2.write(ah_t); +} + +void sbox::square2(){ + sc_uint<4> al_t; + + al_t[0]=al.read()[0]^al.read()[2]; + al_t[1]=al.read()[2]; + al_t[2]=al.read()[1]^al.read()[3]; + al_t[3]=al.read()[3]; + + al2.write(al_t); +} + +void sbox::mul1(){ + //al x ah + sc_uint<4> alxh_t; + sc_uint<4> aA,aB; + + aA=al.read()[0]^al.read()[3]; + aB=al.read()[2]^al.read()[3]; + + alxh_t[0]=(al.read()[0]&ah.read()[0])^(al.read()[3]&ah.read()[1])^(al.read()[2]&ah.read()[2])^(al.read()[1]&ah.read()[3]); + alxh_t[1]=(al.read()[1]&ah.read()[0])^(aA&ah.read()[1])^(aB&ah.read()[2])^((al.read()[1]^al.read()[2])&ah.read()[3]); + alxh_t[2]=(al.read()[2]&ah.read()[0])^(al.read()[1]&ah.read()[1])^(aA&ah.read()[2])^(aB&ah.read()[3]); + alxh_t[3]=(al.read()[3]&ah.read()[0])^(al.read()[2]&ah.read()[1])^(al.read()[1]&ah.read()[2])^(aA&ah.read()[3]); + + alxh.write(alxh_t); +} + +void sbox::sum1(){ + sc_uint<4> alph_t; + + alph_t[0]=al.read()[0]^ah.read()[0]; + alph_t[1]=al.read()[1]^ah.read()[1]; + alph_t[2]=al.read()[2]^ah.read()[2]; + alph_t[3]=al.read()[3]^ah.read()[3]; + + next_alph.write(alph_t); +} + +//Secuential operations +void sbox::intermediate(){ + sc_uint<4> aA,aB; + sc_uint<4> ah2e,ah2epl2,to_invert_var; + + //ah square is multiplied with e + aA=ah2.read()[0]^ah2.read()[1]; + aB=ah2.read()[2]^ah2.read()[3]; + ah2e[0]=ah2.read()[1]^aB; + ah2e[1]=aA; + ah2e[2]=aA^ah2.read()[2]; + ah2e[3]=aA^aB; + + //Addition of ah2e plus al2 + ah2epl2[0]=ah2e[0]^al2.read()[0]; + ah2epl2[1]=ah2e[1]^al2.read()[1]; + ah2epl2[2]=ah2e[2]^al2.read()[2]; + ah2epl2[3]=ah2e[3]^al2.read()[3]; + + //Addition of last result with the result of (al x ah) + to_invert_var[0]=ah2epl2[0]^alxh.read()[0]; + to_invert_var[1]=ah2epl2[1]^alxh.read()[1]; + to_invert_var[2]=ah2epl2[2]^alxh.read()[2]; + to_invert_var[3]=ah2epl2[3]^alxh.read()[3]; + + //Registers + next_to_invert.write(to_invert_var); +} + + +void sbox::inversion(){ + sc_uint<4> to_invert_var; + sc_uint<4> aA,d_t; + + to_invert_var=to_invert.read(); + + //Invert the result in GF(2^4) + aA=to_invert_var[1]^to_invert_var[2]^to_invert_var[3]^(to_invert_var[1]&to_invert_var[2]&to_invert_var[3]); + d_t[0]=aA^to_invert_var[0]^(to_invert_var[0]&to_invert_var[2])^(to_invert_var[1]&to_invert_var[2])^(to_invert_var[0]&to_invert_var[1]&to_invert_var[2]); + d_t[1]=(to_invert_var[0]&to_invert_var[1])^(to_invert_var[0]&to_invert_var[2])^(to_invert_var[1]&to_invert_var[2])^to_invert_var[3]^(to_invert_var[1]&to_invert_var[3])^(to_invert_var[0]&to_invert_var[1]&to_invert_var[3]); + d_t[2]=(to_invert_var[0]&to_invert_var[1])^to_invert_var[2]^(to_invert_var[0]&to_invert_var[2])^to_invert_var[3]^(to_invert_var[0]&to_invert_var[3])^(to_invert_var[0]&to_invert_var[2]&to_invert_var[3]); + d_t[3]=aA^(to_invert_var[0]&to_invert_var[3])^(to_invert_var[1]&to_invert_var[3])^(to_invert_var[2]&to_invert_var[3]); + + d.write(d_t); + +} + +void sbox::mul2(){ + //ah x d + sc_uint<4> ahp_t; + sc_uint<4> aA,aB; + + aA=ah_reg.read()[0]^ah_reg.read()[3]; + aB=ah_reg.read()[2]^ah_reg.read()[3]; + + ahp_t[0]=(ah_reg.read()[0]&d.read()[0])^(ah_reg.read()[3]&d.read()[1])^(ah_reg.read()[2]&d.read()[2])^(ah_reg.read()[1]&d.read()[3]); + ahp_t[1]=(ah_reg.read()[1]&d.read()[0])^(aA&d.read()[1])^(aB&d.read()[2])^((ah_reg.read()[1]^ah_reg.read()[2])&d.read()[3]); + ahp_t[2]=(ah_reg.read()[2]&d.read()[0])^(ah_reg.read()[1]&d.read()[1])^(aA&d.read()[2])^(aB&d.read()[3]); + ahp_t[3]=(ah_reg.read()[3]&d.read()[0])^(ah_reg.read()[2]&d.read()[1])^(ah_reg.read()[1]&d.read()[2])^(aA&d.read()[3]); + + ahp.write(ahp_t); +} + +void sbox::mul3(){ + //d x al + sc_uint<4> alp_t; + sc_uint<4> aA,aB; + + aA=d.read()[0]^d.read()[3]; + aB=d.read()[2]^d.read()[3]; + + alp_t[0]=(d.read()[0]&alph.read()[0])^(d.read()[3]&alph.read()[1])^(d.read()[2]&alph.read()[2])^(d.read()[1]&alph.read()[3]); + alp_t[1]=(d.read()[1]&alph.read()[0])^(aA&alph.read()[1])^(aB&alph.read()[2])^((d.read()[1]^d.read()[2])&alph.read()[3]); + alp_t[2]=(d.read()[2]&alph.read()[0])^(d.read()[1]&alph.read()[1])^(aA&alph.read()[2])^(aB&alph.read()[3]); + alp_t[3]=(d.read()[3]&alph.read()[0])^(d.read()[2]&alph.read()[1])^(d.read()[1]&alph.read()[2])^(aA&alph.read()[3]); + + alp.write(alp_t); +} + +//Convert again to GF(2^8); +void sbox::inversemap(){ + sc_uint<4> aA,aB; + sc_uint<4> alp_t,ahp_t; + sc_uint<8> inva_t; + + alp_t=alp.read(); + ahp_t=ahp.read(); + + aA=alp_t[1]^ahp_t[3]; + aB=ahp_t[0]^ahp_t[1]; + + inva_t[0]=alp_t[0]^ahp_t[0]; + inva_t[1]=aB^ahp_t[3]; + inva_t[2]=aA^aB; + inva_t[3]=aB^alp_t[1]^ahp_t[2]; + inva_t[4]=aA^aB^alp_t[3]; + inva_t[5]=aB^alp_t[2]; + inva_t[6]=aA^alp_t[2]^alp_t[3]^ahp_t[0]; + inva_t[7]=aB^alp_t[2]^ahp_t[3]; + + inva.write(inva_t); +} Index: systemcaes/tags/V10/rtl/systemc/Makefile.defs =================================================================== --- systemcaes/tags/V10/rtl/systemc/Makefile.defs (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/Makefile.defs (revision 28) @@ -0,0 +1,35 @@ +## Variable that points to SystemC installation path +SYSTEMC = $(SYSTEMC_HOME) +SCV = $(SCV_HOME) + +INCDIR = -I. -I.. -I../../bench -I$(SYSTEMC)/include -I$(SCV)/include +LIBDIR = -L. -L.. -L$(SYSTEMC)/lib-$(TARGET_ARCH) -L$(SCV)/lib-$(TARGET_ARCH) + +# Build with maximum gcc warning level +CFLAGS = $(PLATFORM_SPECIFIC_FLAGS) $(EXTRA_CFLAGS) + +LIBS = -lm -lsystemc -lscv $(EXTRA_LIBS) + +EXE = $(MODULE).x + +.SUFFIXES: .cpp .cc .o .x + +$(EXE): $(OBJS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a $(SCV)/lib-$(TARGET_ARCH)/libscv.a + $(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(LIBS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a $(SCV)/lib-$(TARGET_ARCH)/libscv.a 2>&1 | c++filt + +.cpp.o: + $(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS) + +.cc.o: + $(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS) + +clean:: + rm -f $(OBJS) *~ $(EXE) + +ultraclean: clean + rm -f Makefile.deps + +Makefile.deps: + $(CC) $(CFLAGS) $(INCDIR) -M $(SRCS) >> Makefile.deps + +#include Makefile.deps Index: systemcaes/tags/V10/rtl/systemc/aes.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/aes.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/aes.h (revision 28) @@ -0,0 +1,189 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES top file header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// AES top file header //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + + +#include "systemc.h" +//Include modules +#include "subbytes.h" +#include "mixcolum.h" +#include "sbox.h" +#include "keysched.h" + + + +SC_MODULE(aes){ + + sc_in clk; + sc_in reset; + + sc_in load_i; + sc_in decrypt_i; + sc_in > data_i; + sc_in > key_i; + + sc_out ready_o; + sc_out > data_o; + + //Output registers + sc_signal next_ready_o; + + //To key schedule module + sc_signal keysched_start_i; + sc_signal > keysched_round_i; + sc_signal > keysched_last_key_i; + sc_signal > keysched_new_key_o; + sc_signal keysched_ready_o; + sc_signal keysched_sbox_access_o; + sc_signal > keysched_sbox_data_o; + sc_signal keysched_sbox_decrypt_o; + + //From mixcolums + sc_signal mixcol_start_i; + sc_signal > mixcol_data_i; + sc_signal mixcol_ready_o; + sc_signal > mixcol_data_o; + + //From subbytes + sc_signal subbytes_start_i; + sc_signal > subbytes_data_i; + sc_signal subbytes_ready_o; + sc_signal > subbytes_data_o; + sc_signal > subbytes_sbox_data_o; + sc_signal subbytes_sbox_decrypt_o; + + //To SBOX + sc_signal > sbox_data_o; + sc_signal > sbox_data_i; + sc_signal sbox_decrypt_i; + + enum state_t{IDLE,ROUNDS}; + + sc_signal state,next_state; + sc_signal > round,next_round; + + sc_signal > addroundkey_data_o,next_addroundkey_data_reg,addroundkey_data_reg; + sc_signal > addroundkey_data_i; + sc_signal addroundkey_ready_o,next_addroundkey_ready_o; + sc_signal addroundkey_start_i,next_addroundkey_start_i; + sc_signal > addroundkey_round,next_addroundkey_round; + + sc_signal first_round_reg, next_first_round_reg; + int state_var; + + void registers(); + void control(); + void addroundkey(); + void sbox_muxes(); + + sbox *sbox1; + subbytes *sub1; + mixcolum *mix1; + keysched *ks1; + + + SC_CTOR(aes){ + + sbox1=new sbox("sbox"); + sub1= new subbytes("subbytes"); + mix1= new mixcolum("mixcolum"); + ks1= new keysched("keysched"); + + sbox1->clk(clk); + sbox1->reset(reset); + sbox1->data_i(sbox_data_i); + sbox1->decrypt_i(sbox_decrypt_i); + sbox1->data_o(sbox_data_o); + + sub1->clk(clk); + sub1->reset(reset); + sub1->start_i(subbytes_start_i); + sub1->decrypt_i(decrypt_i); + sub1->data_i(subbytes_data_i); + sub1->ready_o(subbytes_ready_o); + sub1->data_o(subbytes_data_o); + sub1->sbox_data_o(subbytes_sbox_data_o); + sub1->sbox_data_i(sbox_data_o); + sub1->sbox_decrypt_o(subbytes_sbox_decrypt_o); + + mix1->clk(clk); + mix1->reset(reset); + mix1->decrypt_i(decrypt_i); + mix1->start_i(mixcol_start_i); + mix1->data_i(mixcol_data_i); + mix1->ready_o(mixcol_ready_o); + mix1->data_o(mixcol_data_o); + + ks1->clk(clk); + ks1->reset(reset); + ks1->start_i(keysched_start_i); + ks1->round_i(keysched_round_i); + ks1->last_key_i(keysched_last_key_i); + ks1->new_key_o(keysched_new_key_o); + ks1->ready_o(keysched_ready_o); + ks1->sbox_access_o(keysched_sbox_access_o); + ks1->sbox_data_o(keysched_sbox_data_o); + ks1->sbox_data_i(sbox_data_o); + ks1->sbox_decrypt_o(keysched_sbox_decrypt_o); //Always 0 + + SC_METHOD(registers); + sensitive_pos << clk; + sensitive_neg << reset; + + SC_METHOD(control); + sensitive << state << round << addroundkey_data_o << data_i << load_i; + sensitive << decrypt_i << addroundkey_ready_o << mixcol_ready_o << subbytes_ready_o; + sensitive << subbytes_data_o << mixcol_data_o << first_round_reg; + + SC_METHOD(addroundkey); + sensitive << addroundkey_data_i << addroundkey_start_i << addroundkey_data_reg << addroundkey_round << keysched_new_key_o << keysched_ready_o; + sensitive << key_i << round; + + SC_METHOD(sbox_muxes); + sensitive << keysched_sbox_access_o << keysched_sbox_decrypt_o << keysched_sbox_data_o << subbytes_sbox_decrypt_o << subbytes_sbox_data_o; + + } +}; Index: systemcaes/tags/V10/rtl/systemc/sbox.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/sbox.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/sbox.h (revision 28) @@ -0,0 +1,131 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES sboc module header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// S-box calculation calculating inverse on gallois field //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" + + +SC_MODULE(sbox){ + + sc_in clk; + sc_in reset; + sc_in > data_i; + sc_in decrypt_i; + sc_out > data_o; + + void registers(); + void first_mux(); + void end_mux(); + void inversemap(); + void mul1(); + void mul2(); + void mul3(); + void intermediate(); + void inversion(); + void sum1(); + void square1(); + void square2(); + + //Output from inverter to mux + sc_signal > inva; + + //Elements in GF(2^4^2) + sc_signal > ah,al; + //Squares of ah and al; + sc_signal > ah2,al2; + //al multiplied by ah + sc_signal > alxh; + //al plus ah + sc_signal > alph; + //output from inverter in GF(2^4) + sc_signal > d; + //output from final multipliers + sc_signal > ahp,alp; + + + //Registers + sc_signal > to_invert,next_to_invert; + sc_signal > ah_reg,next_ah_reg,next_alph; + + SC_CTOR(sbox){ + + SC_METHOD(registers); + sensitive_pos << clk; + sensitive_neg << reset; + + SC_METHOD(first_mux); + sensitive << data_i << decrypt_i; + + SC_METHOD(end_mux); + sensitive << decrypt_i << inva; + + SC_METHOD(inversemap); + sensitive << alp << ahp; + + SC_METHOD(mul1); + sensitive << ah << al; + + SC_METHOD(mul2); + sensitive << d << ah_reg; + + SC_METHOD(mul3); + sensitive << d << alph; + + SC_METHOD(intermediate); + sensitive << ah2 << al2 << alxh; + + SC_METHOD(inversion); + sensitive << to_invert; + + SC_METHOD(sum1); + sensitive << ah << al; + + SC_METHOD(square1); + sensitive << ah; + + SC_METHOD(square2); + sensitive << al; + } +}; Index: systemcaes/tags/V10/rtl/systemc/byte_mixcolum.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/byte_mixcolum.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/byte_mixcolum.cpp (revision 28) @@ -0,0 +1,81 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES mixcolums 8 bit module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Submodule of mixcolums stage implementation for //// +/// AES algorithm //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "byte_mixcolum.h" + +sc_uint<8> xtime(sc_uint<8> in){ + sc_uint<4> xtime_t; + sc_uint<8> out; + + out.range(7,5)=in.range(6,4); + xtime_t[3]=in[7];xtime_t[2]=in[7];xtime_t[1]=0;xtime_t[0]=in[7]; + out.range(4,1)=xtime_t^in.range(3,0); + out[0]=in[7]; + return out; +} + +void byte_mixcolum::dataflow(){ + + sc_uint<8> w1,w2,w3,w4,w5,w6,w7,w8,outx_var; + + w1=a.read()^b.read(); + w2=a.read()^c.read(); + w3=c.read()^d.read(); + + w4=xtime(w1); + w5=xtime(w3); + + w6=w2^w4^w5; + + w7=xtime(w6); + w8=xtime(w7); + + outx_var=b.read()^w3^w4; + outx.write(outx_var); + outy.write(w8^outx_var); + +} Index: systemcaes/tags/V10/rtl/systemc/main.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/main.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/main.cpp (revision 28) @@ -0,0 +1,132 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Main simulation file //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Connect all the modules and begin the simulation //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" +#include "iostream.h" +#include "aes.h" +#include "aesfunctions.h" +#include "aesmodel.h" +#include "stimulus.h" +#include "adapt.h" +#include "checker.h" + +int sc_main(int argc, char* argv[]){ + + sc_clock clk("clk",20); + + test *t; + aes_transactor *tr; + aes *ae1; + aesmodel *am1; + adapter *ad1; + checker *ch1; + + t=new test("testbench"); + tr=new aes_transactor("aes_transactor"); + am1=new aesmodel("aes_C_model"); + ae1=new aes("aes"); + ad1=new adapter("adapter"); + ch1=new checker("checker"); + + t->transactor(*tr); + + sc_signal reset; + sc_signal rt_load; + sc_signal rt_decrypt; + sc_signal > rt_data_i; + sc_signal > rt_key; + + sc_signal > rt_data_o; + sc_signal rt_ready; + + sc_fifo > rt_aes_data_ck; + sc_fifo > c_aes_data_ck; + + sc_fifo c_decrypt; + sc_fifo > c_key; + sc_fifo > c_data; + + ch1->reset(reset); + ch1->rt_aes_data_i(rt_aes_data_ck); + ch1->c_aes_data_i(c_aes_data_ck); + + ad1->clk(clk); + ad1->rt_ready_i(rt_ready); + ad1->rt_aes_data_i(rt_data_o); + ad1->rt_aes_data_o(rt_aes_data_ck); + + am1->decrypt(c_decrypt); + am1->aes_key_i(c_key); + am1->aes_data_i(c_data); + am1->aes_data_o(c_aes_data_ck); + + ae1->clk(clk); + ae1->reset(reset); + ae1->load_i(rt_load); + ae1->decrypt_i(rt_decrypt); + ae1->data_i(rt_data_i); + ae1->key_i(rt_key); + ae1->data_o(rt_data_o); + ae1->ready_o(rt_ready); + + tr->clk(clk); + tr->reset(reset); + //Ports to RT model + tr->rt_load_o(rt_load); + tr->rt_decrypt_o(rt_decrypt); + tr->rt_aes_data_o(rt_data_i); + tr->rt_aes_key_o(rt_key); + tr->rt_aes_ready_i(rt_ready); + //Ports to C model + tr->c_decrypt_o(c_decrypt); + tr->c_aes_key_o(c_key); + tr->c_aes_data_o(c_data); + + sc_start(-1); + + return 0; + + } Index: systemcaes/tags/V10/rtl/systemc/byte_mixcolum.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/byte_mixcolum.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/byte_mixcolum.h (revision 28) @@ -0,0 +1,61 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Byte mixcolum header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Header file for 8-bit mixcolum submodule //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" + +SC_MODULE(byte_mixcolum){ + + sc_in > a,b,c,d; + sc_out > outx,outy; + + void dataflow(); + + SC_CTOR(byte_mixcolum){ + + SC_METHOD(dataflow); + sensitive << a << b << c << d; + } +}; Index: systemcaes/tags/V10/rtl/systemc/stimulus.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/stimulus.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/stimulus.cpp (revision 28) @@ -0,0 +1,80 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Random testbench stimulus generation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Generate random stimulus to the core //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "stimulus.h" + +void test::tb(){ + + sc_biguint<128> aes_key_var,aes_data_var; + bool decrypt_var; + + scv_random::set_global_seed(53246); + + random_generator rg("random_generator"); + + transactor->resetea(); + + while(1){ + + rg.aes_key->next(); + rg.aes_data->next(); + rg.decrypt->next(); + + + aes_data_var=*(rg.aes_data); + aes_key_var=*(rg.aes_key); + decrypt_var=*(rg.decrypt); + + if(!decrypt_var){ + //cout << "Encrypt: 0x" << (int)des_data_var.range(63,32) << (int)des_data_var.range(31,0) << " 0x" << (int)des_key_var.range(63,32) << (int)des_key_var.range(31,0) << " " << sc_time_stamp() << endl; + transactor->encrypt(aes_data_var,aes_key_var); + }else{ + //cout << "Decrypt: 0x" << (int)des_data_var.range(63,32) << (int)des_data_var.range(31,0) << " 0x" << (int)des_key_var.range(63,32) << (int)des_key_var.range(31,0) << " " << sc_time_stamp() << endl; + transactor->decrypt(aes_data_var,aes_key_var); + } + } + +} Index: systemcaes/tags/V10/rtl/systemc/transactor.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/transactor.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/transactor.h (revision 28) @@ -0,0 +1,151 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Transactor for AES ramdom verification //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Transactor acording to TLM for SystemC AES project //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +#include "systemc.h" + +class transactor_ports:public sc_module{ + public: + + // Ports + sc_in clk; + sc_out reset; + + //Ports to RT model + sc_out rt_load_o; + sc_out rt_decrypt_o; + sc_out > rt_aes_data_o; + sc_out > rt_aes_key_o; + sc_in rt_aes_ready_i; + + //Ports to C model + sc_fifo_out c_decrypt_o; + sc_fifo_out > c_aes_key_o; + sc_fifo_out > c_aes_data_o; + +}; + + +class rw_task_if : virtual public sc_interface { + + public: + //Funciones para el transactor + virtual void resetea(void)=0; + virtual void encrypt(sc_biguint<128> data, sc_biguint<128> key)=0; + virtual void decrypt(sc_biguint<128> data, sc_biguint<128> key)=0; + virtual void wait_cycles(int cycles)=0; + +}; + + +//Transactor +class aes_transactor:public rw_task_if,public transactor_ports { + + public: + + SC_CTOR(aes_transactor){ + + cout.unsetf(ios::dec); + cout.setf(ios::hex); + + } + + + void resetea(void){ + reset.write(0); + wait(clk->posedge_event()); + reset.write(1); + cout << "Reseted" << endl; + } + + void encrypt(sc_biguint<128> data, sc_biguint<128> key){ + + wait(clk->posedge_event()); + + //To RT model + rt_load_o.write(1); + rt_aes_data_o.write(data); + rt_aes_key_o.write(key); + rt_decrypt_o.write(0); + + //To C model through fifos + c_aes_data_o.write(data); + c_aes_key_o.write(key); + c_decrypt_o.write(0); + + wait(clk->posedge_event()); + rt_load_o.write(0); + wait(rt_aes_ready_i->posedge_event()); + } + + void decrypt(sc_biguint<128> data, sc_biguint<128> key){ + + wait(clk->posedge_event()); + + //To RT model + rt_load_o.write(1); + rt_aes_data_o.write(data); + rt_aes_key_o.write(key); + rt_decrypt_o.write(1); + + //To C model through fifos + c_aes_data_o.write(data); + c_aes_key_o.write(key); + c_decrypt_o.write(1); + + wait(clk->posedge_event()); + rt_load_o.write(0); + wait(rt_aes_ready_i->posedge_event()); + + } + + void wait_cycles(int cycles){ + for(int i=0;iposedge_event()); + } + } + +}; Index: systemcaes/tags/V10/rtl/systemc/word_mixcolum.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/word_mixcolum.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/word_mixcolum.cpp (revision 28) @@ -0,0 +1,47 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Mixcolumns for a 16 bit word module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum for a 16 bit word //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "word_mixcolum.h" Index: systemcaes/tags/V10/rtl/systemc/stimulus.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/stimulus.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/stimulus.h (revision 28) @@ -0,0 +1,73 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Random testbench declation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Declare ramdom testbench class and data //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "transactor.h" +#include "scv.h" + +//Random number generator + +class random_generator:virtual public scv_constraint_base{ +public: + + scv_smart_ptr > aes_key; + scv_smart_ptr > aes_data; + + scv_smart_ptr decrypt; + + SCV_CONSTRAINT_CTOR(random_generator){ } +}; + +class test : public sc_module{ + public: + + sc_port transactor; + + void tb(); + + SC_CTOR(test){ + SC_THREAD(tb); + } +}; Index: systemcaes/tags/V10/rtl/systemc/Makefile =================================================================== --- systemcaes/tags/V10/rtl/systemc/Makefile (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/Makefile (revision 28) @@ -0,0 +1,14 @@ +TARGET_ARCH = linux + +CC = g++ +OPT = -O3 +DEBUG = -g +OTHER = -Wall -Wno-deprecated +EXTRA_CFLAGS = $(OPT) $(OTHER) +# EXTRA_CFLAGS = $(DEBUG) $(OTHER) + +MODULE = aes +SRCS = byte_mixcolum.cpp word_mixcolum.cpp keysched.cpp sbox.cpp mixcolum.cpp subbytes.cpp aes.cpp stimulus.cpp main.cpp +OBJS = $(SRCS:.cpp=.o) + +include Makefile.defs Index: systemcaes/tags/V10/rtl/systemc/mixcolum.cpp =================================================================== --- systemcaes/tags/V10/rtl/systemc/mixcolum.cpp (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/mixcolum.cpp (revision 28) @@ -0,0 +1,122 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES mixcolum module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum stage implementation for AES algorithm //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "mixcolum.h" + +void mixcolum::mux(){ + outmux.write(decrypt_i.read() ? outy.read() : outx.read()); +} + +void mixcolum::mixcol(){ + sc_biguint<128> data_i_var; + sc_uint<32> aux; + sc_biguint<128> data_reg_var; + + data_i_var=data_i.read(); + data_reg_var=data_reg.read(); + next_data_reg.write(data_reg.read()); + next_state.write(state.read()); + + mix_word.write(0); + + next_ready_o.write(0); + next_data_o.write(data_o_reg.read()); + + switch(state.read()){ + + case 0: + if(start_i.read()){ + aux=data_i_var.range(127,96); + mix_word.write(aux); + data_reg_var.range(127,96)=outmux.read(); + next_data_reg.write(data_reg_var); + next_state.write(1); + } + break; + case 1: + aux=data_i_var.range(95,64); + mix_word.write(aux); + data_reg_var.range(95,64)=outmux.read(); + next_data_reg.write(data_reg_var); + next_state.write(2); + break; + case 2: + aux=data_i_var.range(63,32); + mix_word.write(aux); + data_reg_var.range(63,32)=outmux.read(); + next_data_reg.write(data_reg_var); + next_state.write(3); + break; + case 3: + aux=data_i_var.range(31,0); + mix_word.write(aux); + data_reg_var.range(31,0)=outmux.read(); + next_data_o.write(data_reg_var); + next_ready_o.write(1); + next_state.write(0); + break; + default: + break; + } + } + + void mixcolum::registers(){ + if(!reset.read()){ + data_reg.write(0); + state.write(0); + ready_o.write(0); + data_o_reg.write(0); + }else{ + data_reg.write(next_data_reg.read()); + state.write(next_state.read()); + ready_o.write(next_ready_o.read()); + data_o_reg.write(next_data_o.read()); + } + } + + void mixcolum::assign_data_o(){ + data_o.write(data_o_reg.read()); + } Index: systemcaes/tags/V10/rtl/systemc/word_mixcolum.h =================================================================== --- systemcaes/tags/V10/rtl/systemc/word_mixcolum.h (nonexistent) +++ systemcaes/tags/V10/rtl/systemc/word_mixcolum.h (revision 28) @@ -0,0 +1,129 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Word mixcolum header //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Header file for 16-bit mixcolum submodule //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +#include "systemc.h" +#include "byte_mixcolum.h" + +SC_MODULE(word_mixcolum){ + + sc_in > in; + sc_out > outx,outy; + + sc_signal > a,b,c,d; + sc_signal > x1,x2,x3,x4,y1,y2,y3,y4; + + void split(){ + sc_uint<32> in_var; + + in_var=in.read(); + a.write(in_var.range(31,24)); + b.write(in_var.range(23,16)); + c.write(in_var.range(15,8)); + d.write(in_var.range(7,0)); + } + + void mix(){ + sc_uint<32> outx_var,outy_var; + + outx_var.range(31,24)=x1.read(); + outx_var.range(23,16)=x2.read(); + outx_var.range(15,8)=x3.read(); + outx_var.range(7,0)=x4.read(); + outy_var.range(31,24)=y1.read(); + outy_var.range(23,16)=y2.read(); + outy_var.range(15,8)=y3.read(); + outy_var.range(7,0)=y4.read(); + + outx.write(outx_var); + outy.write(outy_var); + } + + byte_mixcolum *bm1; + byte_mixcolum *bm2; + byte_mixcolum *bm3; + byte_mixcolum *bm4; + + SC_CTOR(word_mixcolum){ + + SC_METHOD(split); + sensitive << in; + SC_METHOD(mix); + sensitive << x1 << x2 << x3 << x4 << y1 << y2 << y3 << y4; + + bm1=new byte_mixcolum("bm1"); + bm2=new byte_mixcolum("bm2"); + bm3=new byte_mixcolum("bm3"); + bm4=new byte_mixcolum("bm4"); + + bm1->a(a); + bm1->b(b); + bm1->c(c); + bm1->d(d); + bm1->outx(x1); + bm1->outy(y1); + + bm2->a(b); + bm2->b(c); + bm2->c(d); + bm2->d(a); + bm2->outx(x2); + bm2->outy(y2); + + bm3->a(c); + bm3->b(d); + bm3->c(a); + bm3->d(b); + bm3->outx(x3); + bm3->outy(y3); + + bm4->a(d); + bm4->b(a); + bm4->c(b); + bm4->d(c); + bm4->outx(x4); + bm4->outy(y4); + } +}; Index: systemcaes/tags/V10/rtl/verilog/sbox.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/sbox.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/sbox.v (revision 28) @@ -0,0 +1,389 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// S-Box calculation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// S-box calculation calculating inverse on gallois field //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module sbox(clk,reset,data_i,decrypt_i,data_o); +input clk; +input reset; +input [7:0] data_i; +input decrypt_i; +output [7:0] data_o; + +reg [7:0] data_o; + +reg [7:0] inva; +reg [3:0] ah; +reg [3:0] al; +reg [3:0] ah2; +reg [3:0] al2; +reg [3:0] alxh; +reg [3:0] alph; +reg [3:0] d; +reg [3:0] ahp; +reg [3:0] alp; +reg [3:0] to_invert; +reg [3:0] next_to_invert; +reg [3:0] ah_reg; +reg [3:0] next_ah_reg; +reg [3:0] next_alph; + + +//registers: +always @(posedge clk or negedge reset) + +begin + +if(!reset) +begin + +to_invert = (0); + ah_reg = (0); +alph = (0); + +end +else +begin + + to_invert = (next_to_invert); + ah_reg = (next_ah_reg); +alph = (next_alph); + +end + + +end +//first_mux: +reg[7:0] first_mux_data_var; + reg[7:0] first_mux_InvInput; + reg[3:0] first_mux_ah_t,first_mux_al_t; + reg first_mux_aA,first_mux_aB,first_mux_aC,first_mux_aD; + +always @( data_i or decrypt_i) + +begin + + + first_mux_data_var=data_i; + first_mux_InvInput=first_mux_data_var; + + case(decrypt_i) + 1: +begin + //Applyinverseaffinetrasformation +first_mux_aA=first_mux_data_var[0]^first_mux_data_var[5];first_mux_aB=first_mux_data_var[1]^first_mux_data_var[4]; + first_mux_aC=first_mux_data_var[2]^first_mux_data_var[7];first_mux_aD=first_mux_data_var[3]^first_mux_data_var[6]; + first_mux_InvInput[0]=(!first_mux_data_var[5])^first_mux_aC; + first_mux_InvInput[1]=first_mux_data_var[0]^first_mux_aD; + first_mux_InvInput[2]=(!first_mux_data_var[7])^first_mux_aB; + first_mux_InvInput[3]=first_mux_data_var[2]^first_mux_aA; + first_mux_InvInput[4]=first_mux_data_var[1]^first_mux_aD; + first_mux_InvInput[5]=first_mux_data_var[4]^first_mux_aC; + first_mux_InvInput[6]=first_mux_data_var[3]^first_mux_aA; + first_mux_InvInput[7]=first_mux_data_var[6]^first_mux_aB; + end + default: +begin +first_mux_InvInput=first_mux_data_var; + end + endcase + + + //ConvertelementsfromGF(2^8)intotwoelementsofGF(2^4^2) + + first_mux_aA=first_mux_InvInput[1]^first_mux_InvInput[7]; + first_mux_aB=first_mux_InvInput[5]^first_mux_InvInput[7]; + first_mux_aC=first_mux_InvInput[4]^first_mux_InvInput[6]; + + + first_mux_al_t[0]=first_mux_aC^first_mux_InvInput[0]^first_mux_InvInput[5]; + first_mux_al_t[1]=first_mux_InvInput[1]^first_mux_InvInput[2]; + first_mux_al_t[2]=first_mux_aA; + first_mux_al_t[3]=first_mux_InvInput[2]^first_mux_InvInput[4]; + + first_mux_ah_t[0]=first_mux_aC^first_mux_InvInput[5]; + first_mux_ah_t[1]=first_mux_aA^first_mux_aC; + first_mux_ah_t[2]=first_mux_aB^first_mux_InvInput[2]^first_mux_InvInput[3]; + first_mux_ah_t[3]=first_mux_aB; + + al = (first_mux_al_t); + ah = (first_mux_ah_t); + next_ah_reg = (first_mux_ah_t); + +end +//end_mux: +reg[7:0] end_mux_data_var,end_mux_data_o_var; + reg end_mux_aA,end_mux_aB,end_mux_aC,end_mux_aD; + +always @( decrypt_i or inva) + +begin + + + + //Taketheoutputoftheinverter + end_mux_data_var=inva; + + case(decrypt_i) + 0: +begin + //Applyaffinetrasformation +end_mux_aA=end_mux_data_var[0]^end_mux_data_var[1];end_mux_aB=end_mux_data_var[2]^end_mux_data_var[3]; + end_mux_aC=end_mux_data_var[4]^end_mux_data_var[5];end_mux_aD=end_mux_data_var[6]^end_mux_data_var[7]; + end_mux_data_o_var[0]=(!end_mux_data_var[0])^end_mux_aC^end_mux_aD; + end_mux_data_o_var[1]=(!end_mux_data_var[5])^end_mux_aA^end_mux_aD; + end_mux_data_o_var[2]=end_mux_data_var[2]^end_mux_aA^end_mux_aD; + end_mux_data_o_var[3]=end_mux_data_var[7]^end_mux_aA^end_mux_aB; + end_mux_data_o_var[4]=end_mux_data_var[4]^end_mux_aA^end_mux_aB; + end_mux_data_o_var[5]=(!end_mux_data_var[1])^end_mux_aB^end_mux_aC; + end_mux_data_o_var[6]=(!end_mux_data_var[6])^end_mux_aB^end_mux_aC; + end_mux_data_o_var[7]=end_mux_data_var[3]^end_mux_aC^end_mux_aD; + data_o = (end_mux_data_o_var); + end + default: +begin +data_o = (end_mux_data_var); + end + endcase + + + +end +//inversemap: +reg[3:0] aA,aB; + reg[3:0] inversemap_alp_t,inversemap_ahp_t; + reg[7:0] inversemap_inva_t; + +always @( alp or ahp) +begin + + + inversemap_alp_t=alp; + inversemap_ahp_t=ahp; + + aA=inversemap_alp_t[1]^inversemap_ahp_t[3]; + aB=inversemap_ahp_t[0]^inversemap_ahp_t[1]; + + inversemap_inva_t[0]=inversemap_alp_t[0]^inversemap_ahp_t[0]; + inversemap_inva_t[1]=aB^inversemap_ahp_t[3]; + inversemap_inva_t[2]=aA^aB; + inversemap_inva_t[3]=aB^inversemap_alp_t[1]^inversemap_ahp_t[2]; + inversemap_inva_t[4]=aA^aB^inversemap_alp_t[3]; + inversemap_inva_t[5]=aB^inversemap_alp_t[2]; + inversemap_inva_t[6]=aA^inversemap_alp_t[2]^inversemap_alp_t[3]^inversemap_ahp_t[0]; + inversemap_inva_t[7]=aB^inversemap_alp_t[2]^inversemap_ahp_t[3]; + + inva = (inversemap_inva_t); + +end +//mul1: +reg[3:0] mul1_alxh_t; + reg[3:0] mul1_aA,mul1_a; + +always @( ah or al) + +begin + + //alxah + + mul1_aA=al[0]^al[3]; + mul1_a=al[2]^al[3]; + + mul1_alxh_t[0]=(al[0]&ah[0])^(al[3]&ah[1])^(al[2]&ah[2])^(al[1]&ah[3]); + mul1_alxh_t[1]=(al[1]&ah[0])^(mul1_aA&ah[1])^(mul1_a&ah[2])^((al[1]^al[2])&ah[3]); + mul1_alxh_t[2]=(al[2]&ah[0])^(al[1]&ah[1])^(mul1_aA&ah[2])^(mul1_a&ah[3]); + mul1_alxh_t[3]=(al[3]&ah[0])^(al[2]&ah[1])^(al[1]&ah[2])^(mul1_aA&ah[3]); + + alxh = (mul1_alxh_t); + +end +//mul2: +reg[3:0] mul2_ahp_t; + reg[3:0] mul2_aA,mul2_aB; + +always @( d or ah_reg) + +begin + + //ahxd + + mul2_aA=ah_reg[0]^ah_reg[3]; + mul2_aB=ah_reg[2]^ah_reg[3]; + + mul2_ahp_t[0]=(ah_reg[0]&d[0])^(ah_reg[3]&d[1])^(ah_reg[2]&d[2])^(ah_reg[1]&d[3]); + mul2_ahp_t[1]=(ah_reg[1]&d[0])^(mul2_aA&d[1])^(mul2_aB&d[2])^((ah_reg[1]^ah_reg[2])&d[3]); + mul2_ahp_t[2]=(ah_reg[2]&d[0])^(ah_reg[1]&d[1])^(mul2_aA&d[2])^(mul2_aB&d[3]); + mul2_ahp_t[3]=(ah_reg[3]&d[0])^(ah_reg[2]&d[1])^(ah_reg[1]&d[2])^(mul2_aA&d[3]); + + ahp = (mul2_ahp_t); + +end +//mul3: +reg[3:0] mul3_alp_t; + reg[3:0] mul3_aA,mul3_aB; + +always @( d or alph) + +begin + + //dxal + + mul3_aA=d[0]^d[3]; + mul3_aB=d[2]^d[3]; + + mul3_alp_t[0]=(d[0]&alph[0])^(d[3]&alph[1])^(d[2]&alph[2])^(d[1]&alph[3]); + mul3_alp_t[1]=(d[1]&alph[0])^(mul3_aA&alph[1])^(mul3_aB&alph[2])^((d[1]^d[2])&alph[3]); + mul3_alp_t[2]=(d[2]&alph[0])^(d[1]&alph[1])^(mul3_aA&alph[2])^(mul3_aB&alph[3]); + mul3_alp_t[3]=(d[3]&alph[0])^(d[2]&alph[1])^(d[1]&alph[2])^(mul3_aA&alph[3]); + + alp = (mul3_alp_t); + +end +//intermediate: +reg[3:0] intermediate_aA,intermediate_aB; + reg[3:0] intermediate_ah2e,intermediate_ah2epl2,intermediate_to_invert_var; + +always @( ah2 or al2 or alxh) + +begin + + + //ahsquareismultipliedwithe + intermediate_aA=ah2[0]^ah2[1]; + intermediate_aB=ah2[2]^ah2[3]; + intermediate_ah2e[0]=ah2[1]^intermediate_aB; + intermediate_ah2e[1]=intermediate_aA; + intermediate_ah2e[2]=intermediate_aA^ah2[2]; + intermediate_ah2e[3]=intermediate_aA^intermediate_aB; + + //Additionofintermediate_ah2eplusal2 + intermediate_ah2epl2[0]=intermediate_ah2e[0]^al2[0]; + intermediate_ah2epl2[1]=intermediate_ah2e[1]^al2[1]; + intermediate_ah2epl2[2]=intermediate_ah2e[2]^al2[2]; + intermediate_ah2epl2[3]=intermediate_ah2e[3]^al2[3]; + + //Additionoflastresultwiththeresultof(alxah) + intermediate_to_invert_var[0]=intermediate_ah2epl2[0]^alxh[0]; + intermediate_to_invert_var[1]=intermediate_ah2epl2[1]^alxh[1]; + intermediate_to_invert_var[2]=intermediate_ah2epl2[2]^alxh[2]; + intermediate_to_invert_var[3]=intermediate_ah2epl2[3]^alxh[3]; + +//Registers + next_to_invert = (intermediate_to_invert_var); + +end +//inversion: +reg[3:0] inversion_to_invert_var; + reg[3:0] inversion_aA,inversion_d_t; + +always @( to_invert) + +begin + + + inversion_to_invert_var=to_invert; + + //InverttheresultinGF(2^4) + inversion_aA=inversion_to_invert_var[1]^inversion_to_invert_var[2]^inversion_to_invert_var[3]^(inversion_to_invert_var[1]&inversion_to_invert_var[2]&inversion_to_invert_var[3]); + inversion_d_t[0]=inversion_aA^inversion_to_invert_var[0]^(inversion_to_invert_var[0]&inversion_to_invert_var[2])^(inversion_to_invert_var[1]&inversion_to_invert_var[2])^(inversion_to_invert_var[0]&inversion_to_invert_var[1]&inversion_to_invert_var[2]); + inversion_d_t[1]=(inversion_to_invert_var[0]&inversion_to_invert_var[1])^(inversion_to_invert_var[0]&inversion_to_invert_var[2])^(inversion_to_invert_var[1]&inversion_to_invert_var[2])^inversion_to_invert_var[3]^(inversion_to_invert_var[1]&inversion_to_invert_var[3])^(inversion_to_invert_var[0]&inversion_to_invert_var[1]&inversion_to_invert_var[3]); + inversion_d_t[2]=(inversion_to_invert_var[0]&inversion_to_invert_var[1])^inversion_to_invert_var[2]^(inversion_to_invert_var[0]&inversion_to_invert_var[2])^inversion_to_invert_var[3]^(inversion_to_invert_var[0]&inversion_to_invert_var[3])^(inversion_to_invert_var[0]&inversion_to_invert_var[2]&inversion_to_invert_var[3]); + inversion_d_t[3]=inversion_aA^(inversion_to_invert_var[0]&inversion_to_invert_var[3])^(inversion_to_invert_var[1]&inversion_to_invert_var[3])^(inversion_to_invert_var[2]&inversion_to_invert_var[3]); + + d = (inversion_d_t); + + +end +//sum1: +reg[3:0] sum1_alph_t; + +always @( ah or al) + +begin + + + sum1_alph_t[0]=al[0]^ah[0]; + sum1_alph_t[1]=al[1]^ah[1]; + sum1_alph_t[2]=al[2]^ah[2]; + sum1_alph_t[3]=al[3]^ah[3]; + + next_alph = (sum1_alph_t); + +end +//square1: +reg[3:0] square1_ah_t; + +always @( ah) + +begin + + + square1_ah_t[0]=ah[0]^ah[2]; + square1_ah_t[1]=ah[2]; + square1_ah_t[2]=ah[1]^ah[3]; + square1_ah_t[3]=ah[3]; + + ah2 = (square1_ah_t); + +end +//square2: +reg[3:0] square2_al_t; + +always @( al) + +begin + + + square2_al_t[0]=al[0]^al[2]; + square2_al_t[1]=al[2]; + square2_al_t[2]=al[1]^al[3]; + square2_al_t[3]=al[3]; + + al2 = (square2_al_t); + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/mixcolum.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/mixcolum.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/mixcolum.v (revision 28) @@ -0,0 +1,185 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Mixcolumns module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum module //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + + +module mixcolum(clk,reset,decrypt_i,start_i,data_i,ready_o,data_o); +input clk; +input reset; +input decrypt_i; +input start_i; +input [127:0] data_i; +output ready_o; +output [127:0] data_o; + +reg ready_o; +reg [127:0] data_o; + +reg [127:0] data_reg; +reg [127:0] next_data_reg; +reg [127:0] data_o_reg; +reg [127:0] next_data_o; +reg next_ready_o; +reg [1:0] state; +reg [1:0] next_state; +wire [31:0] outx; + +wire [31:0] outy; + +reg [31:0] mix_word; +reg [31:0] outmux; + +word_mixcolum w1 (.in(mix_word), .outx(outx), .outy(outy)); + +//assign_data_o: +always @( data_o_reg) + +begin + + data_o = (data_o_reg); + +end +//mux: +always @( outx or outy or decrypt_i) + +begin + + outmux = (decrypt_i?outy:outx); + +end +//registers: +always @(posedge clk or negedge reset) + +begin + +if(!reset) + begin + data_reg = (0); + state = (0); + ready_o = (0); + data_o_reg = (0); + end +else + begin + data_reg = (next_data_reg); + state = (next_state); + ready_o = (next_ready_o); + data_o_reg = (next_data_o); + end + + +end +//mixcol: +reg[127:0] data_i_var; + reg[31:0] aux; + reg[127:0] data_reg_var; + +always @( decrypt_i or start_i or state or data_reg or outmux or data_o_reg or data_i) + +begin + + + data_i_var=data_i; + data_reg_var=data_reg; + next_data_reg = (data_reg); + next_state = (state); + + mix_word = (0); + + next_ready_o = (0); + next_data_o = (data_o_reg); + + case(state) + + 0: +begin + if(start_i) +begin + + aux=data_i_var[127:96]; + mix_word = (aux); + data_reg_var[127:96]=outmux; + next_data_reg = (data_reg_var); + next_state = (1); + +end + + end + 1: +begin + aux=data_i_var[95:64]; + mix_word = (aux); + data_reg_var[95:64]=outmux; + next_data_reg = (data_reg_var); + next_state = (2); + end + 2: +begin + aux=data_i_var[63:32]; + mix_word = (aux); + data_reg_var[63:32]=outmux; + next_data_reg = (data_reg_var); + next_state = (3); + end + 3: +begin + aux=data_i_var[31:0]; + mix_word = (aux); + data_reg_var[31:0]=outmux; + next_data_o = (data_reg_var); + next_ready_o = (1); + next_state = (0); + end + default: + begin + end + endcase + + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/keysched.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/keysched.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/keysched.v (revision 28) @@ -0,0 +1,245 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Key schedule //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Generate the next round key from the previous one //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module keysched(clk,reset,start_i,round_i,last_key_i,new_key_o,ready_o,sbox_access_o,sbox_data_o,sbox_data_i,sbox_decrypt_o); +input clk; +input reset; +input start_i; +input [3:0] round_i; +input [127:0] last_key_i; +output [127:0] new_key_o; +output ready_o; +output sbox_access_o; +output [7:0] sbox_data_o; +input [7:0] sbox_data_i; +output sbox_decrypt_o; + +reg [127:0] new_key_o; +reg ready_o; +reg sbox_access_o; +reg [7:0] sbox_data_o; +reg sbox_decrypt_o; + +reg [2:0] next_state; +reg [2:0] state; +reg [7:0] rcon_o; +reg [31:0] next_col; +reg [31:0] col; +reg [127:0] key_reg; +reg [127:0] next_key_reg; +reg next_ready_o; + + +//rcon: +always @( round_i) + +begin + + + case(round_i) + 1: +begin +rcon_o = (1); +end + 2: +begin +rcon_o = (2); +end + 3: +begin +rcon_o = (4); +end + 4: +begin +rcon_o = (8); +end + 5: +begin +rcon_o = ('h10); +end + 6: +begin +rcon_o = ('h20); +end + 7: +begin +rcon_o = ('h40); +end + 8: +begin +rcon_o = ('h80); +end + 9: +begin +rcon_o = ('h1B); +end + 10: +begin +rcon_o = ('h36); +end +default: +begin + rcon_o = (0); +end + endcase + + +end +//registers: +always @(posedge clk or negedge reset) + +begin + + if(!reset) + begin + state = (0); + col = (0); + key_reg = (0); + ready_o = (0); + end +else + begin + state = (next_state); + col = (next_col); + key_reg = (next_key_reg); + ready_o = (next_ready_o); + end + + +end +//generate_key: +reg[127:0] K_var,W_var; + reg[31:0] col_t; + reg[23:0] zero; + +always @( start_i or last_key_i or sbox_data_i or state or rcon_o or col or key_reg) + +begin + + + zero=0; + + col_t=col; + W_var=0; + + next_state = (state); + next_col = (col); + + next_ready_o = (0); + next_key_reg = (key_reg); + new_key_o = (key_reg); + +sbox_decrypt_o = (0); + sbox_access_o = (0); + sbox_data_o = (0); + K_var=last_key_i; + + case(state) + //Substitutethebyteswhilerotatingthem + //FouraccessestoSBoxareneeded + 0: +begin + if(start_i) +begin + + col_t=0; + sbox_access_o = (1); + sbox_data_o = (K_var[31:24]); + next_state = (1); + +end + + end + 1: +begin + sbox_access_o = (1); + sbox_data_o = (K_var[23:16]); + col_t[7:0]=sbox_data_i; + next_col = (col_t); + next_state = (2); + end + 2: +begin + sbox_access_o = (1); + sbox_data_o = (K_var[15:8]); + col_t[31:24]=sbox_data_i; + next_col = (col_t); + next_state = (3); + end + 3: +begin + sbox_access_o = (1); + sbox_data_o = (K_var[7:0]); + col_t[23:16]=sbox_data_i; + next_col = (col_t); + next_state = (4); + end + 4: +begin + sbox_access_o = (1); + col_t[15:8]=sbox_data_i; + next_col = (col_t); + W_var[127:96]=col_t^K_var[127:96]^{rcon_o,zero}; + W_var[95:64]=W_var[127:96]^K_var[95:64]; + W_var[63:32]=W_var[95:64]^K_var[63:32]; + W_var[31:0]=W_var[63:32]^K_var[31:0]; +next_ready_o = (1); +next_key_reg = (W_var); + next_state = (0); + end + +default: +begin + next_state = (0); + end +endcase + + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/byte_mixcolum.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/byte_mixcolum.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/byte_mixcolum.v (revision 28) @@ -0,0 +1,89 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Mixcolumns for 8 bit //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum for a byte //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module byte_mixcolum(a,b,c,d,outx,outy); + +input [7:0] a,b,c,d; +output [7:0] outx, outy; + +reg [7:0] outx, outy; + +function [7:0] xtime; +input [7:0] in; +reg [3:0] xtime_t; + +begin +xtime[7:5] = in[6:4]; +xtime_t[3] = in[7]; +xtime_t[2] = in[7]; +xtime_t[1] = 0; +xtime_t[0] = in[7]; +xtime[4:1] =xtime_t^in[3:0]; +xtime[0] = in[7]; +end +endfunction + +reg [7:0] w1,w2,w3,w4,w5,w6,w7,w8,outx_var; +always @ (a, b, c, d) +begin +w1 = a ^b; +w2 = a ^c; +w3 = c ^d; +w4 = xtime(w1); +w5 = xtime(w3); +w6 = w2 ^w4 ^w5; +w7 = xtime(w6); +w8 = xtime(w7); + +outx_var = b^w3^w4; +outx=outx_var; +outy=w8^outx_var; + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/subbytes.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/subbytes.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/subbytes.v (revision 28) @@ -0,0 +1,251 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Subbytes module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Subbytes module implementation //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module subbytes(clk,reset,start_i,decrypt_i,data_i,ready_o,data_o,sbox_data_o,sbox_data_i,sbox_decrypt_o); +input clk; +input reset; +input start_i; +input decrypt_i; +input [127:0] data_i; +output ready_o; +output [127:0] data_o; +output [7:0] sbox_data_o; +input [7:0] sbox_data_i; +output sbox_decrypt_o; + +reg ready_o; +reg [127:0] data_o; +reg [7:0] sbox_data_o; +reg sbox_decrypt_o; + +reg [4:0] state; +reg [4:0] next_state; +reg [127:0] data_reg; +reg [127:0] next_data_reg; +reg next_ready_o; + +`define assign_array_to_128 \ + data_reg_128[127:120]=data_reg_var[0]; \ + data_reg_128[119:112]=data_reg_var[1]; \ + data_reg_128[111:104]=data_reg_var[2]; \ + data_reg_128[103:96]=data_reg_var[3]; \ + data_reg_128[95:88]=data_reg_var[4]; \ + data_reg_128[87:80]=data_reg_var[5]; \ + data_reg_128[79:72]=data_reg_var[6]; \ + data_reg_128[71:64]=data_reg_var[7]; \ + data_reg_128[63:56]=data_reg_var[8]; \ + data_reg_128[55:48]=data_reg_var[9]; \ + data_reg_128[47:40]=data_reg_var[10]; \ + data_reg_128[39:32]=data_reg_var[11]; \ + data_reg_128[31:24]=data_reg_var[12]; \ + data_reg_128[23:16]=data_reg_var[13]; \ + data_reg_128[15:8]=data_reg_var[14]; \ + data_reg_128[7:0]=data_reg_var[15]; + +`define shift_array_to_128 \ + data_reg_128[127:120]=data_reg_var[0]; \ + data_reg_128[119:112]=data_reg_var[5]; \ + data_reg_128[111:104]=data_reg_var[10]; \ + data_reg_128[103:96]=data_reg_var[15]; \ + data_reg_128[95:88]=data_reg_var[4]; \ + data_reg_128[87:80]=data_reg_var[9]; \ + data_reg_128[79:72]=data_reg_var[14]; \ + data_reg_128[71:64]=data_reg_var[3]; \ + data_reg_128[63:56]=data_reg_var[8]; \ + data_reg_128[55:48]=data_reg_var[13]; \ + data_reg_128[47:40]=data_reg_var[2]; \ + data_reg_128[39:32]=data_reg_var[7]; \ + data_reg_128[31:24]=data_reg_var[12]; \ + data_reg_128[23:16]=data_reg_var[1]; \ + data_reg_128[15:8]=data_reg_var[6]; \ + data_reg_128[7:0]=data_reg_var[11]; + +`define invert_shift_array_to_128 \ + data_reg_128[127:120]=data_reg_var[0]; \ + data_reg_128[119:112]=data_reg_var[13]; \ + data_reg_128[111:104]=data_reg_var[10]; \ + data_reg_128[103:96]=data_reg_var[7]; \ + data_reg_128[95:88]=data_reg_var[4]; \ + data_reg_128[87:80]=data_reg_var[1]; \ + data_reg_128[79:72]=data_reg_var[14]; \ + data_reg_128[71:64]=data_reg_var[11]; \ + data_reg_128[63:56]=data_reg_var[8]; \ + data_reg_128[55:48]=data_reg_var[5]; \ + data_reg_128[47:40]=data_reg_var[2]; \ + data_reg_128[39:32]=data_reg_var[15]; \ + data_reg_128[31:24]=data_reg_var[12]; \ + data_reg_128[23:16]=data_reg_var[9]; \ + data_reg_128[15:8]=data_reg_var[6]; \ + data_reg_128[7:0]=data_reg_var[3]; + + +//registers: +always @(posedge clk or negedge reset) + +begin + +if(!reset) +begin + + data_reg = (0); + state = (0); + ready_o = (0); + +end +else +begin + + data_reg = (next_data_reg); + state = (next_state); + ready_o = (next_ready_o); + +end + + +end +//sub: +reg[127:0] data_i_var,data_reg_128; +reg[7:0] data_array[15:0],data_reg_var[15:0]; + +always @( decrypt_i or start_i or state or data_i or sbox_data_i or data_reg) + +begin + + + data_i_var=data_i; + + data_array[0]=data_i_var[127:120]; + data_array[1]=data_i_var[119:112]; + data_array[2]=data_i_var[111:104]; + data_array[3]=data_i_var[103:96]; + data_array[4]=data_i_var[95:88]; + data_array[5]=data_i_var[87:80]; + data_array[6]=data_i_var[79:72]; + data_array[7]=data_i_var[71:64]; + data_array[8]=data_i_var[63:56]; + data_array[9]=data_i_var[55:48]; + data_array[10]=data_i_var[47:40]; + data_array[11]=data_i_var[39:32]; + data_array[12]=data_i_var[31:24]; + data_array[13]=data_i_var[23:16]; + data_array[14]=data_i_var[15:8]; + data_array[15]=data_i_var[7:0]; + + data_reg_var[0]=data_reg[127:120]; + data_reg_var[1]=data_reg[119:112]; + data_reg_var[2]=data_reg[111:104]; + data_reg_var[3]=data_reg[103:96]; + data_reg_var[4]=data_reg[95:88]; + data_reg_var[5]=data_reg[87:80]; + data_reg_var[6]=data_reg[79:72]; + data_reg_var[7]=data_reg[71:64]; + data_reg_var[8]=data_reg[63:56]; + data_reg_var[9]=data_reg[55:48]; + data_reg_var[10]=data_reg[47:40]; + data_reg_var[11]=data_reg[39:32]; + data_reg_var[12]=data_reg[31:24]; + data_reg_var[13]=data_reg[23:16]; + data_reg_var[14]=data_reg[15:8]; + data_reg_var[15]=data_reg[7:0]; + + + sbox_decrypt_o = (decrypt_i); + sbox_data_o = (0); + next_state = (state); + next_data_reg = (data_reg); + + next_ready_o = (0); + data_o = (data_reg); + + case(state) + + 0: +begin + if(start_i) +begin + +sbox_data_o = (data_array[0]); + next_state = (1); + +end + + end + 16: +begin + data_reg_var[15]=sbox_data_i; + //Makeshiftrowsstage + case(decrypt_i) + 0: + begin + `shift_array_to_128 + end + 1: + begin + `invert_shift_array_to_128 + end + endcase + + next_data_reg = (data_reg_128); + next_ready_o = (1); + next_state = (0); + end + default: + begin + sbox_data_o = (data_array[state]); + data_reg_var[state-1]=sbox_data_i; + `assign_array_to_128 + next_data_reg = (data_reg_128); + next_state = (state+1); + end + +endcase + + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/timescale.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/timescale.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/timescale.v (revision 28) @@ -0,0 +1 @@ +`timescale 1ns / 10ps Index: systemcaes/tags/V10/rtl/verilog/aes.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/aes.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/aes.v (revision 28) @@ -0,0 +1,355 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// AES top file //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// AES top //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module aes(clk,reset,load_i,decrypt_i,data_i,key_i,ready_o,data_o); +input clk; +input reset; +input load_i; +input decrypt_i; +input [127:0] data_i; +input [127:0] key_i; +output ready_o; +output [127:0] data_o; + +reg ready_o; +reg [127:0] data_o; + +reg next_ready_o; +reg keysched_start_i; +reg [3:0] keysched_round_i; +reg [127:0] keysched_last_key_i; +wire [127:0] keysched_new_key_o; + +wire keysched_ready_o; + +wire keysched_sbox_access_o; + +wire [7:0] keysched_sbox_data_o; + +wire keysched_sbox_decrypt_o; + +reg mixcol_start_i; +reg [127:0] mixcol_data_i; +wire mixcol_ready_o; + +wire [127:0] mixcol_data_o; + +reg subbytes_start_i; +reg [127:0] subbytes_data_i; +wire subbytes_ready_o; + +wire [127:0] subbytes_data_o; + +wire [7:0] subbytes_sbox_data_o; + +wire subbytes_sbox_decrypt_o; + +wire [7:0] sbox_data_o; + +reg [7:0] sbox_data_i; +reg sbox_decrypt_i; +reg state; +reg next_state; +reg [3:0] round; +reg [3:0] next_round; +reg [127:0] addroundkey_data_o; +reg [127:0] next_addroundkey_data_reg; +reg [127:0] addroundkey_data_reg; +reg [127:0] addroundkey_data_i; +reg addroundkey_ready_o; +reg next_addroundkey_ready_o; +reg addroundkey_start_i; +reg next_addroundkey_start_i; +reg [3:0] addroundkey_round; +reg [3:0] next_addroundkey_round; +reg first_round_reg; +reg next_first_round_reg; + +sbox sbox1 (.clk(clk), .reset(reset), .data_i(sbox_data_i), .decrypt_i(sbox_decrypt_i), .data_o(sbox_data_o)); +subbytes sub1 (.clk(clk), .reset(reset), .start_i(subbytes_start_i), .decrypt_i(decrypt_i), .data_i(subbytes_data_i), .ready_o(subbytes_ready_o), .data_o(subbytes_data_o), .sbox_data_o(subbytes_sbox_data_o), .sbox_data_i(sbox_data_o), .sbox_decrypt_o(subbytes_sbox_decrypt_o)); +mixcolum mix1 (.clk(clk), .reset(reset), .decrypt_i(decrypt_i), .start_i(mixcol_start_i), .data_i(mixcol_data_i), .ready_o(mixcol_ready_o), .data_o(mixcol_data_o)); +keysched ks1 (.clk(clk), .reset(reset), .start_i(keysched_start_i), .round_i(keysched_round_i), .last_key_i(keysched_last_key_i), .new_key_o(keysched_new_key_o), .ready_o(keysched_ready_o), .sbox_access_o(keysched_sbox_access_o), .sbox_data_o(keysched_sbox_data_o), .sbox_data_i(sbox_data_o), .sbox_decrypt_o(keysched_sbox_decrypt_o)); + +//registers: +always @(posedge clk or negedge reset) + +begin + + if(!reset) +begin + + state = (0); + ready_o = (0); + round = (0); + addroundkey_round = (0); + addroundkey_data_reg = (0); + addroundkey_ready_o = (0); + addroundkey_start_i = (0); + first_round_reg = (0); + +end +else +begin + + state = (next_state); + ready_o = (next_ready_o); + round = (next_round); + addroundkey_round = (next_addroundkey_round); + addroundkey_data_reg = (next_addroundkey_data_reg); + addroundkey_ready_o = (next_addroundkey_ready_o); + first_round_reg = (next_first_round_reg); + addroundkey_start_i = (next_addroundkey_start_i); + +end + + +end +//control: +always @( state or round or addroundkey_data_o or data_i or load_i or decrypt_i or addroundkey_ready_o or mixcol_ready_o or subbytes_ready_o or subbytes_data_o or mixcol_data_o or first_round_reg) + +begin + + + next_state = (state); + next_round = (round); + data_o = (addroundkey_data_o); + next_ready_o = (0); + + //Tokeyschedulemodule + + next_first_round_reg = (0); + + + subbytes_data_i = (0); + mixcol_data_i = (0); + addroundkey_data_i = (0); + next_addroundkey_start_i = (first_round_reg); + mixcol_start_i = ((addroundkey_ready_o&decrypt_i&round!=10)|(subbytes_ready_o&!decrypt_i)); + subbytes_start_i = ((addroundkey_ready_o&!decrypt_i)|(mixcol_ready_o&decrypt_i)|(addroundkey_ready_o&decrypt_i&round==10)); + + if(decrypt_i&&round!=10) + begin + addroundkey_data_i = (subbytes_data_o); + subbytes_data_i = (mixcol_data_o); + mixcol_data_i = (addroundkey_data_o); + end + else if(!decrypt_i&&round!=0) + begin + addroundkey_data_i = (mixcol_data_o); + subbytes_data_i = (addroundkey_data_o); + mixcol_data_i = (subbytes_data_o); + end + else + begin + mixcol_data_i = (subbytes_data_o); + subbytes_data_i = (addroundkey_data_o); + addroundkey_data_i = (data_i); + end + + + case(state) + + 0: + begin + if(load_i) + begin + next_state = (1); + if(decrypt_i) + next_round = (10); + else + next_round = (0); + next_first_round_reg = (1); + end + end + + 1: + begin + + //Counter + if(!decrypt_i&&mixcol_ready_o) + begin + next_addroundkey_start_i = (1); + addroundkey_data_i = (mixcol_data_o); + next_round = (round+1); + end + else if(decrypt_i&&subbytes_ready_o) + begin + next_addroundkey_start_i = (1); + addroundkey_data_i = (subbytes_data_o); + next_round = (round-1); + end + + //Output + if((round==9&&!decrypt_i)||(round==0&&decrypt_i)) + begin + next_addroundkey_start_i = (0); + mixcol_start_i = (0); + if(subbytes_ready_o) + begin + addroundkey_data_i = (subbytes_data_o); + next_addroundkey_start_i = (1); + next_round = (round+1); + end + end + + if((round==10&&!decrypt_i)||(round==0&&decrypt_i)) + begin + addroundkey_data_i = (subbytes_data_o); + subbytes_start_i = (0); + if(addroundkey_ready_o) + begin + next_ready_o = (1); + next_state = (0); + next_addroundkey_start_i = (0); + next_round = (0); + end + + end + + + end + + default: +begin + next_state = (0); + end + endcase + + +end +//addroundkey: +reg[127:0] data_var,round_data_var,round_key_var; +always @( addroundkey_data_i or addroundkey_start_i or addroundkey_data_reg or addroundkey_round or keysched_new_key_o or keysched_ready_o or key_i or round) + +begin + + + + round_data_var=addroundkey_data_reg; + next_addroundkey_data_reg = (addroundkey_data_reg); +next_addroundkey_ready_o = (0); + next_addroundkey_round = (addroundkey_round); + addroundkey_data_o = (addroundkey_data_reg); + + if(addroundkey_round==1||addroundkey_round==0) + keysched_last_key_i = (key_i); +else + keysched_last_key_i = (keysched_new_key_o); + + keysched_start_i = (0); + + keysched_round_i = (addroundkey_round); + + if(round==0&&addroundkey_start_i) +begin + + //Taketheinputandxorthemwithdataifround==0; + data_var=addroundkey_data_i; + round_key_var=key_i; + round_data_var=round_key_var^data_var; + next_addroundkey_data_reg = (round_data_var); +next_addroundkey_ready_o = (1); + +end +else if(addroundkey_start_i&&round!=0) +begin + + keysched_last_key_i = (key_i); + keysched_start_i = (1); + keysched_round_i = (1); + next_addroundkey_round = (1); + +end +else if(addroundkey_round!=round&&keysched_ready_o) +begin + +next_addroundkey_round = (addroundkey_round+1); + keysched_last_key_i = (keysched_new_key_o); + keysched_start_i = (1); + keysched_round_i = (addroundkey_round+1); + +end +else if(addroundkey_round==round&&keysched_ready_o) +begin + + data_var=addroundkey_data_i; + round_key_var=keysched_new_key_o; + round_data_var=round_key_var^data_var; + next_addroundkey_data_reg = (round_data_var); +next_addroundkey_ready_o = (1); + next_addroundkey_round = (0); + +end + + +end +//sbox_muxes: +always @( keysched_sbox_access_o or keysched_sbox_decrypt_o or keysched_sbox_data_o or subbytes_sbox_decrypt_o or subbytes_sbox_data_o) + +begin + + + if(keysched_sbox_access_o) +begin + + sbox_decrypt_i = (keysched_sbox_decrypt_o); + sbox_data_i = (keysched_sbox_data_o); + +end +else +begin + + sbox_decrypt_i = (subbytes_sbox_decrypt_o); +sbox_data_i = (subbytes_sbox_data_o); + +end + + +end + +endmodule Index: systemcaes/tags/V10/rtl/verilog/word_mixcolum.v =================================================================== --- systemcaes/tags/V10/rtl/verilog/word_mixcolum.v (nonexistent) +++ systemcaes/tags/V10/rtl/verilog/word_mixcolum.v (revision 28) @@ -0,0 +1,121 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Mixcolumns for a 16 bit word module implementation //// +//// //// +//// This file is part of the SystemC AES //// +//// //// +//// Description: //// +//// Mixcolum for a 16 bit word //// +//// //// +//// Generated automatically using SystemC to Verilog translator //// +//// //// +//// To Do: //// +//// - done //// +//// //// +//// Author(s): //// +//// - Javier Castillo, jcastilo@opencores.org //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: not supported by cvs2svn $ + +module word_mixcolum(in,outx,outy); +input [31:0] in; +output [31:0] outx; +output [31:0] outy; + +reg [31:0] outx; +reg [31:0] outy; + +reg [7:0] a; +reg [7:0] b; +reg [7:0] c; +reg [7:0] d; +wire [7:0] x1; + +wire [7:0] x2; + +wire [7:0] x3; + +wire [7:0] x4; + +wire [7:0] y1; + +wire [7:0] y2; + +wire [7:0] y3; + +wire [7:0] y4; + + +byte_mixcolum bm1 (.a(a), .b(b), .c(c), .d(d), .outx(x1), .outy(y1)); +byte_mixcolum bm2 (.a(b), .b(c), .c(d), .d(a), .outx(x2), .outy(y2)); +byte_mixcolum bm3 (.a(c), .b(d), .c(a), .d(b), .outx(x3), .outy(y3)); +byte_mixcolum bm4 (.a(d), .b(a), .c(b), .d(c), .outx(x4), .outy(y4)); + + + reg[31:0] in_var; + reg[31:0] outx_var,outy_var; +//split: +always @( in) + +begin + + + + in_var=in; + a = (in_var[31:24]); + b = (in_var[23:16]); + c = (in_var[15:8]); + d = (in_var[7:0]); + +end +//mix: +always @( x1 or x2 or x3 or x4 or y1 or y2 or y3 or y4) + +begin + + + + outx_var[31:24]=x1; + outx_var[23:16]=x2; + outx_var[15:8]=x3; + outx_var[7:0]=x4; + outy_var[31:24]=y1; + outy_var[23:16]=y2; + outy_var[15:8]=y3; + outy_var[7:0]=y4; + + outx = (outx_var); + outy = (outy_var); + +end + +endmodule Index: systemcaes/tags =================================================================== --- systemcaes/tags (nonexistent) +++ systemcaes/tags (revision 28)

systemcaes/tags Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ##

Browse

Tools

Subversion Repositories systemcaes

Compare Revisions

Rev 27 → Rev 28