URL
https://opencores.org/ocsvn/t65/t65/trunk
Subversion Repositories t65
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 7 to Rev 8
- ↔ Reverse comparison
Rev 7 → Rev 8
/trunk/syn/xilinx/run/t65_leo.bat
0,0 → 1,8
cd ..\out |
|
spectrum -file ..\bin\t65.tcl |
move exemplar.log ..\log\t65_leo.srp |
|
cd ..\run |
|
t65 t65_leo.edf xc2s200-pq208-5 |
trunk/syn/xilinx/run/t65_leo.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/syn/xilinx/run/t65.bat
===================================================================
--- trunk/syn/xilinx/run/t65.bat (nonexistent)
+++ trunk/syn/xilinx/run/t65.bat (revision 8)
@@ -0,0 +1,44 @@
+set name=t65
+rem set target=xc2v250-cs144-6
+rem set target=xcv300e-pq240-8
+set target=xc2s200-pq208-5
+
+if "%2" == "" goto default
+set target=%2
+:default
+
+cd ..\out
+
+if "%1" == "" goto xst
+
+set name=t65_leo
+
+copy ..\bin\t65_leo.pin %name%.ucf
+
+ngdbuild -p %target% %1 %name%.ngd
+
+goto builddone
+
+:xst
+
+copy ..\bin\%name%.pin %name%.ucf
+
+xst -ifn ../bin/%name%.scr -ofn ../log/%name%.srp
+ngdbuild -p %target% %name%.ngc
+
+:builddone
+
+move %name%.bld ..\log
+
+map -p %target% -cm speed -c 100 -tx on -o %name%_map %name%
+move %name%_map.mrp ..\log\%name%.mrp
+
+par -ol 3 -t 1 %name%_map -w %name%
+move %name%.par ..\log
+
+trce %name%.ncd -o ../log/%name%.twr %name%_map.pcf
+
+bitgen -w %name%
+move %name%.bgn ..\log
+
+cd ..\run
trunk/syn/xilinx/run/t65.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/syn/xilinx/run/t65debugxr_leo.bat
===================================================================
--- trunk/syn/xilinx/run/t65debugxr_leo.bat (nonexistent)
+++ trunk/syn/xilinx/run/t65debugxr_leo.bat (revision 8)
@@ -0,0 +1,12 @@
+cd ..\out
+
+xrom Mon65XR 10 8 > ..\src\Mon65XR_leo.vhd
+hex2rom -b ..\..\..\sw\Mon65XR.bin Mon65XR 10b8l > Mon65XR_leo.ini
+copy ..\bin\t65debugxr_leo.pin + ..\out\Mon65XR_leo.ini t65debugxr_leo.ucf
+
+spectrum -file ..\bin\t65debugxr.tcl
+move exemplar.log ..\log\t65debugxr_leo.srp
+
+cd ..\run
+
+t65debugxr t65debugxr_leo.edf xc2s200-pq208-5
trunk/syn/xilinx/run/t65debugxr_leo.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/syn/xilinx/run/t65debugxr.bat
===================================================================
--- trunk/syn/xilinx/run/t65debugxr.bat (nonexistent)
+++ trunk/syn/xilinx/run/t65debugxr.bat (revision 8)
@@ -0,0 +1,44 @@
+set name=t65debugxr
+rem set target=xc2v250-cs144-6
+rem set target=xcv300e-pq240-8
+set target=xc2s200-pq208-5
+
+if "%2" == "" goto default
+set target=%2
+:default
+
+cd ..\out
+
+if "%1" == "" goto xst
+
+set name=t65debugxr_leo
+
+ngdbuild -p %target% %1 %name%.ngd
+
+goto builddone
+
+:xst
+
+xrom Mon65XR 10 8 > ..\src\Mon65XR.vhd
+hex2rom -b ..\..\..\sw\Mon65XR.bin mon65xr 10b8u > Mon65XR.ini
+copy ..\bin\%name%.pin + ..\out\Mon65XR.ini %name%.ucf
+
+xst -ifn ../bin/%name%.scr -ofn ../log/%name%.srp
+ngdbuild -p %target% %name%.ngc
+
+:builddone
+
+move %name%.bld ..\log
+
+map -p %target% -cm speed -c 100 -pr b -timing -tx on -o %name%_map %name%
+move %name%_map.mrp ..\log\%name%.mrp
+
+par -ol 3 -t 1 %name%_map -w %name%
+move %name%.par ..\log
+
+trce %name%.ncd -o ../log/%name%.twr %name%_map.pcf
+
+bitgen -w %name%
+move %name%.bgn ..\log
+
+cd ..\run
trunk/syn/xilinx/run/t65debugxr.bat
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/syn/xilinx/bin/t65.tcl
===================================================================
--- trunk/syn/xilinx/bin/t65.tcl (nonexistent)
+++ trunk/syn/xilinx/bin/t65.tcl (revision 8)
@@ -0,0 +1,38 @@
+set process "5"
+set part "2s200pq208"
+set tristate_map "FALSE"
+set opt_auto_mode "TRUE"
+set opt_best_result "29223.458000"
+set dont_lock_lcells "auto"
+set input2output "20.000000"
+set input2register "20.000000"
+set register2output "20.000000"
+set register2register "20.000000"
+set wire_table "xis215-5_avg"
+set encoding "auto"
+set edifin_ground_port_names "GND"
+set edifin_power_port_names "VCC"
+set edif_array_range_extraction_style "%s\[%d:%d\]"
+
+set_xilinx_eqn
+
+load_library xis2
+
+read -technology xis2 {
+../../../rtl/vhdl/T65_Pack.vhd
+../../../rtl/vhdl/T65_MCode.vhd
+../../../rtl/vhdl/T65_ALU.vhd
+../../../rtl/vhdl/T65.vhd
+}
+
+pre_optimize
+
+optimize -area -hierarchy=auto -pass 1 -pass 2 -pass 3 -pass 4
+
+optimize_timing
+
+report_area
+
+report_delay
+
+write t65_leo.edf
Index: trunk/syn/xilinx/bin/t65debugxr.tcl
===================================================================
--- trunk/syn/xilinx/bin/t65debugxr.tcl (nonexistent)
+++ trunk/syn/xilinx/bin/t65debugxr.tcl (revision 8)
@@ -0,0 +1,41 @@
+set process "5"
+set part "2s200pq208"
+set tristate_map "FALSE"
+set opt_auto_mode "TRUE"
+set opt_best_result "29223.458000"
+set dont_lock_lcells "auto"
+set input2output "50.000000"
+set input2register "20.000000"
+set register2output "20.000000"
+set register2register "50.000000"
+set wire_table "xis215-5_avg"
+set encoding "auto"
+set edifin_ground_port_names "GND"
+set edifin_power_port_names "VCC"
+set edif_array_range_extraction_style "%s\[%d:%d\]"
+
+set_xilinx_eqn
+
+load_library xis2
+
+read -technology xis2 {
+../../../rtl/vhdl/T65_Pack.vhd
+../../../rtl/vhdl/T65_MCode.vhd
+../../../rtl/vhdl/T65_ALU.vhd
+../../../rtl/vhdl/T65.vhd
+../../../rtl/vhdl/T16450.vhd
+../src/Mon65XR_leo.vhd
+../../../rtl/vhdl/DebugSystemXR.vhd
+}
+
+pre_optimize
+
+optimize -hierarchy=auto
+
+optimize_timing
+
+report_area
+
+report_delay
+
+write t65debugxr_leo.edf
Index: trunk/syn/xilinx/bin/t65_leo.pin
===================================================================
--- trunk/syn/xilinx/bin/t65_leo.pin (nonexistent)
+++ trunk/syn/xilinx/bin/t65_leo.pin (revision 8)
@@ -0,0 +1,6 @@
+#NET "clk" TNM_NET = "clk";
+#TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50%;
+
+# Leonardo
+NET "Clk" LOC = "P77";
+NET "Res_n" LOC = "P133";
Index: trunk/syn/xilinx/bin/t65.pin
===================================================================
--- trunk/syn/xilinx/bin/t65.pin (nonexistent)
+++ trunk/syn/xilinx/bin/t65.pin (revision 8)
@@ -0,0 +1,6 @@
+#NET "clk" TNM_NET = "clk";
+#TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50%;
+
+# XST
+NET "clk" LOC = "P77";
+NET "res_n" LOC = "P134";
Index: trunk/syn/xilinx/bin/t65debugxr_leo.pin
===================================================================
--- trunk/syn/xilinx/bin/t65debugxr_leo.pin (nonexistent)
+++ trunk/syn/xilinx/bin/t65debugxr_leo.pin (revision 8)
@@ -0,0 +1,41 @@
+#NET "clk" TNM_NET = "clk";
+#TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50%;
+
+NET "Clk" LOC = "P77";
+NET "Reset_n" LOC = "P152";
+NET "NMI_n" LOC = "P135";
+NET "RXD0" LOC = "P89";
+NET "TXD0" LOC = "P94";
+NET "RXD1" LOC = "P98";
+NET "TXD1" LOC = "P96";
+NET "DTR1" LOC = "P82";
+NET "OE_n" LOC = "P31";
+NET "WE_n" LOC = "P17";
+NET "RAMCS_n" LOC = "P36";
+NET "ROMCS_n" LOC = "P14";
+NET "PGM_n" LOC = "P9";
+NET "A(0)" LOC = "P42";
+NET "A(1)" LOC = "P37";
+NET "A(2)" LOC = "P35";
+NET "A(3)" LOC = "P33";
+NET "A(4)" LOC = "P30";
+NET "A(5)" LOC = "P27";
+NET "A(6)" LOC = "P23";
+NET "A(7)" LOC = "P21";
+NET "A(8)" LOC = "P22";
+NET "A(9)" LOC = "P24";
+NET "A(10)" LOC = "P34";
+NET "A(11)" LOC = "P29";
+NET "A(12)" LOC = "P18";
+NET "A(13)" LOC = "P20";
+NET "A(14)" LOC = "P15";
+NET "A(15)" LOC = "P16";
+NET "A(16)" LOC = "P10";
+NET "D(0)" LOC = "P44";
+NET "D(1)" LOC = "P46";
+NET "D(2)" LOC = "P48";
+NET "D(3)" LOC = "P49";
+NET "D(4)" LOC = "P47";
+NET "D(5)" LOC = "P45";
+NET "D(6)" LOC = "P43";
+NET "D(7)" LOC = "P41";
Index: trunk/syn/xilinx/bin/t65.scr
===================================================================
--- trunk/syn/xilinx/bin/t65.scr (nonexistent)
+++ trunk/syn/xilinx/bin/t65.scr (revision 8)
@@ -0,0 +1,7 @@
+run
+-ifn ../bin/t65.prj
+-ifmt VHDL
+-ofn ../out/t65.ngc
+-ofmt NGC -p xc2s200-pq208-5
+-opt_mode Speed
+-opt_level 2
Index: trunk/syn/xilinx/bin/t65debugxr.pin
===================================================================
--- trunk/syn/xilinx/bin/t65debugxr.pin (nonexistent)
+++ trunk/syn/xilinx/bin/t65debugxr.pin (revision 8)
@@ -0,0 +1,41 @@
+#NET "clk" TNM_NET = "clk";
+#TIMESPEC "TS_clk" = PERIOD "clk" 20 ns HIGH 50%;
+
+NET "clk" LOC = "P77";
+NET "reset_n" LOC = "P152";
+NET "nmi_n" LOC = "P135";
+NET "rxd0" LOC = "P89";
+NET "txd0" LOC = "P94";
+NET "rxd1" LOC = "P98";
+NET "txd1" LOC = "P96";
+NET "dtr1" LOC = "P82";
+NET "oe_n" LOC = "P31";
+NET "we_n" LOC = "P17";
+NET "ramcs_n" LOC = "P36";
+NET "romcs_n" LOC = "P14";
+NET "pgm_n" LOC = "P9";
+NET "a<0>" LOC = "P42";
+NET "a<1>" LOC = "P37";
+NET "a<2>" LOC = "P35";
+NET "a<3>" LOC = "P33";
+NET "a<4>" LOC = "P30";
+NET "a<5>" LOC = "P27";
+NET "a<6>" LOC = "P23";
+NET "a<7>" LOC = "P21";
+NET "a<8>" LOC = "P22";
+NET "a<9>" LOC = "P24";
+NET "a<10>" LOC = "P34";
+NET "a<11>" LOC = "P29";
+NET "a<12>" LOC = "P18";
+NET "a<13>" LOC = "P20";
+NET "a<14>" LOC = "P15";
+NET "a<15>" LOC = "P16";
+NET "a<16>" LOC = "P10";
+NET "d<0>" LOC = "P44";
+NET "d<1>" LOC = "P46";
+NET "d<2>" LOC = "P48";
+NET "d<3>" LOC = "P49";
+NET "d<4>" LOC = "P47";
+NET "d<5>" LOC = "P45";
+NET "d<6>" LOC = "P43";
+NET "d<7>" LOC = "P41";
Index: trunk/syn/xilinx/bin/t65debugxr.scr
===================================================================
--- trunk/syn/xilinx/bin/t65debugxr.scr (nonexistent)
+++ trunk/syn/xilinx/bin/t65debugxr.scr (revision 8)
@@ -0,0 +1,7 @@
+run
+-ifn ../bin/t65debugxr.prj
+-ifmt VHDL
+-ofn ../out/t65debugxr.ngc
+-ofmt NGC -p xc2s200-pq208-5
+-opt_mode Speed
+-opt_level 2
Index: trunk/syn/xilinx/bin/t65.prj
===================================================================
--- trunk/syn/xilinx/bin/t65.prj (nonexistent)
+++ trunk/syn/xilinx/bin/t65.prj (revision 8)
@@ -0,0 +1,4 @@
+../../../rtl/vhdl/T65_Pack.vhd
+../../../rtl/vhdl/T65_MCode.vhd
+../../../rtl/vhdl/T65_ALU.vhd
+../../../rtl/vhdl/T65.vhd
Index: trunk/syn/xilinx/bin/t65debugxr.prj
===================================================================
--- trunk/syn/xilinx/bin/t65debugxr.prj (nonexistent)
+++ trunk/syn/xilinx/bin/t65debugxr.prj (revision 8)
@@ -0,0 +1,7 @@
+../../../rtl/vhdl/T65_Pack.vhd
+../../../rtl/vhdl/T65_MCode.vhd
+../../../rtl/vhdl/T65_ALU.vhd
+../../../rtl/vhdl/T65.vhd
+../../../rtl/vhdl/T16450.vhd
+../src/Mon65XR.vhd
+../../../rtl/vhdl/DebugSystemXR.vhd