OpenCores
URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

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    /t6507lp
    from Rev 263 to Rev 264
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Rev 263 → Rev 264

/trunk/syn/cadence/results/t6507lp.vg File deleted
/trunk/syn/cadence/results/t6507lp_io.sdc
0,0 → 1,301
# ####################################################################
 
# Created by Encounter(R) RTL Compiler v07.20-s009_1 on Mon Aug 31 11:31:48 BRT 2009
 
# ####################################################################
 
set sdc_version 1.7
 
set_units -capacitance 1000.0fF
set_units -time 1000.0ps
 
# Set the current design
current_design t6507lp_io
 
create_clock -name "1MHz" -add -period 1000.0 -waveform {0.0 500.0} [get_ports clk]
set_clock_transition -max 0.1 [get_clocks 1MHz]
set_clock_gating_check -setup 0.0
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[0]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[1]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[2]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[3]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[4]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[5]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[6]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[7]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[8]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[9]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[10]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[11]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {address[12]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[0]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[1]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[2]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[3]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[4]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[5]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[6]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_out[7]}]
set_output_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports rw_mem]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[0]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[1]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[2]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[3]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[4]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[5]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[6]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports {data_in[7]}]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports scan_enable]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports reset_n]
set_input_delay -clock [get_clocks 1MHz] -add_delay 0.1 [get_ports clk]
set_max_dynamic_power 3000000.0
set_ideal_network [get_ports reset_n]
set_ideal_network [get_ports scan_enable]
set_ideal_network [get_pins reset_n_pad/Y]
set_ideal_network [get_pins scan_pad/Y]
set_wire_load_selection_group "2_metls_routing" -library "D_CELLSL_3_3V"
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELL10L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELL25L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELL2L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELL50L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELL5L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELLN10L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELLN25L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELLN2L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELLN50L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/ANTENNACELLN5L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/BUCLX16]
set_dont_use [get_lib_cells D_CELLSL_3_3V/BULX16]
set_dont_use [get_lib_cells D_CELLSL_3_3V/EN2LX1]
set_dont_use [get_lib_cells D_CELLSL_3_3V/INCLX16]
set_dont_use [get_lib_cells D_CELLSL_3_3V/INLX16]
set_dont_use [get_lib_cells D_CELLSL_3_3V/SIGNALHOLDL]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED1L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED2L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED5L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED10L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED25L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEED50L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEEDCAP2L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEEDCAP5L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEEDCAP10L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEEDCAP25L]
set_dont_use [get_lib_cells D_CELLSL_3_3V/FEEDCAP50L]
set_dont_use [get_lib_cells IO_CELLS_33/BBC16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBC8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBC8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCA8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCHD8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBCUD8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBL1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBL8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLHD8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBLUD8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBS8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSHD8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD1P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD1SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD2P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD2SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD4P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD4SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD8P_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD8SMP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBSUD8SP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/BBT16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBT8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBT8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTHD8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD16P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD1P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD20P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD2P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD4P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD8P]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BBTUD8SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT16P]
set_dont_use [get_lib_cells IO_CELLS_33/BT16SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BT16SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT1P]
set_dont_use [get_lib_cells IO_CELLS_33/BT1SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT20P]
set_dont_use [get_lib_cells IO_CELLS_33/BT20SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BT20SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT2P]
set_dont_use [get_lib_cells IO_CELLS_33/BT2SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT4P]
set_dont_use [get_lib_cells IO_CELLS_33/BT4SP]
set_dont_use [get_lib_cells IO_CELLS_33/BT8P]
set_dont_use [get_lib_cells IO_CELLS_33/BT8SMP]
set_dont_use [get_lib_cells IO_CELLS_33/BT8SP]
set_dont_use [get_lib_cells IO_CELLS_33/ICAP]
set_dont_use [get_lib_cells IO_CELLS_33/ICHDP]
set_dont_use [get_lib_cells IO_CELLS_33/ICP]
set_dont_use [get_lib_cells IO_CELLS_33/ICUDP]
set_dont_use [get_lib_cells IO_CELLS_33/ILHDP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ILP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ILUDP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ISHDP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ISP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ISUDP_3V]
set_dont_use [get_lib_cells IO_CELLS_33/ITHDP]
set_dont_use [get_lib_cells IO_CELLS_33/ITP]
set_dont_use [get_lib_cells IO_CELLS_33/ITUDP]
set_dont_use [get_lib_cells IO_CELLS_33/APR00P]
set_dont_use [get_lib_cells IO_CELLS_33/APR01P]
set_dont_use [get_lib_cells IO_CELLS_33/APR04P]
set_dont_use [get_lib_cells IO_CELLS_33/APR15P]
set_dont_use [get_lib_cells IO_CELLS_33/CLAMP]
set_dont_use [get_lib_cells IO_CELLS_33/CORNERCLMP]
set_dont_use [get_lib_cells IO_CELLS_33/CORNERP]
set_dont_use [get_lib_cells IO_CELLS_33/FILLCLMP_30]
set_dont_use [get_lib_cells IO_CELLS_33/FILLCLMP_40]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_1]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_2]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_3]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_4]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_5]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_10]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_11]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_20]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_30]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_40]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_50]
set_dont_use [get_lib_cells IO_CELLS_33/FILLERP_110]
set_dont_use [get_lib_cells IO_CELLS_33/PWRC_ORP]
set_dont_use [get_lib_cells IO_CELLS_33/GND5ALLPADP]
set_dont_use [get_lib_cells IO_CELLS_33/GND5IPADP]
set_dont_use [get_lib_cells IO_CELLS_33/GND5OPADP]
set_dont_use [get_lib_cells IO_CELLS_33/GND5RPADP]
set_dont_use [get_lib_cells IO_CELLS_33/VDD5ALLPADP]
set_dont_use [get_lib_cells IO_CELLS_33/VDD5IPADP]
set_dont_use [get_lib_cells IO_CELLS_33/VDD5OPADP]
set_dont_use [get_lib_cells IO_CELLS_33/VDD5RPADP]
## List of unsupported SDC commands ##
/trunk/syn/cadence/results/t6507lp_io.scan.def
0,0 → 1,143
VERSION 5.5 ;
NAMESCASESENSITIVE ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN t6507lp_io ;
 
SCANCHAINS 1 ;
- chain1_seg1_clk_rising
+ PARTITION p_clk_rising
MAXBITS 126
+ START t6507lp/t6507lp_alu/A_reg[0] Q
+ FLOATING
t6507lp/t6507lp_alu/A_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/A_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_result_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_status_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_x_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_alu/alu_y_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[8] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[9] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[10] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[11] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/address_reg[12] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/data_out_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/index_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/ir_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[8] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[9] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[10] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[11] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/pc_reg[12] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/rst_counter_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/rst_counter_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/rst_counter_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/rw_mem_reg ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/sp_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/state_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/state_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/state_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/state_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/state_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[6] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[7] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[8] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[9] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[10] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[11] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_addr_reg[12] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[0] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[1] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[2] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[3] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[4] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[5] ( IN SD ) ( OUT Q )
t6507lp/t6507lp_fsm/temp_data_reg[6] ( IN SD ) ( OUT Q )
+ STOP t6507lp/t6507lp_fsm/temp_data_reg[7] SD
;
 
END SCANCHAINS
END DESIGN
/trunk/syn/cadence/results/t6507lp_io.mode
0,0 → 1,32
#####################################################################
#
# First Encounter mode file
# Created by Encounter(R) RTL Compiler on 08/31/09 11:31:49
#
#####################################################################
 
 
# General Mode Settings
###########################################################
if {[enc_version] >= 7.1} {
setAnalysisMode -asyncChecks noAsync
} else {
setAnalysisMode -noAsync
}
set_global timing_apply_default_primary_input_assertion false
set_global timing_clock_phase_propagation both
if {[enc_version] >= 7.1} {
setAnalysisMode -multipleClockPerRegister true
} else {
setAnalysisMode -multipleClockPerRegister
}
if {[enc_version] >= 7.1} {
setPlaceMode -reorderScan true
} else {
setPlaceMode -reorderScan
}
if {[enc_version] >= 7.1} {
setExtractRCMode -engine default
} else {
setExtractRCMode -default
}
/trunk/syn/cadence/results/floorplan/t6507lp_io.fp.spr
1,6 → 1,6
Version 2.2
Micron 1000
16
13
VIA_C null M2 0 1 0 700 700 0 0 1 1 -350 -350 350 350
1
-750 -750 750 750
21,56 → 21,26
-10000 -4000 10000 4000
1
-10000 -4000 10000 4000
VIAGEN12W_8 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 13 -8750 -8750 8750 8750
VIAGEN12W_9 VIAGEN12W M2 0 1 0 700 700 1400 1400 9 13 -5950 -8750 5950 8750
1
-10000 -10300 10000 10300
-7000 -10000 7000 10000
1
-10000 -10300 10000 10300
VIAGEN12W_9 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 21 -8750 -14350 8750 14350
-7000 -10000 7000 10000
VIAGEN12W_10 VIAGEN12W M2 0 1 0 700 700 1400 1400 8 9 -5250 -5950 5250 5950
1
-10000 -16000 10000 16000
-6500 -7000 6500 7000
1
-10000 -16000 10000 16000
VIAGEN12W_10 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 9 -8750 -5950 8750 5950
-6500 -7000 6500 7000
VIAGEN12W_12 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 9 -8750 -5950 8750 5950
1
-10000 -7000 10000 7000
1
-10000 -7000 10000 7000
VIAGEN12W_11 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 10 -8750 -6650 8750 6650
1
-10000 -8300 10000 8300
1
-10000 -8300 10000 8300
VIAGEN12W_12 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 12 -8750 -8050 8750 8050
1
-10000 -9500 10000 9500
1
-10000 -9500 10000 9500
VIAGEN12W_13 VIAGEN12W M2 0 1 0 700 700 1400 1400 9 13 -5950 -8750 5950 8750
1
-7000 -10000 7000 10000
1
-7000 -10000 7000 10000
VIAGEN12W_14 VIAGEN12W M2 0 1 0 700 700 1400 1400 9 1 -5950 -350 5950 350
1
-7000 -1400 7000 1400
1
-7000 -1400 7000 1400
VIAGEN12W_15 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 1 -8750 -350 8750 350
1
-10000 -2000 10000 2000
1
-10000 -2000 10000 2000
VIAGEN32W_1 VIAGEN32W M3 0 1 0 700 700 1400 1400 13 4 -8750 -2450 8750 2450
1
-10000 -4000 10000 4000
1
-10000 -4000 10000 4000
VIAGEN12W_16 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 10 -8750 -6650 8750 6650
1
-10000 -7700 10000 7700
1
-10000 -7700 10000 7700
VIAGEN12_2 VIAGEN12 M2 0 1 0 700 700 1400 1400 5 5 -3150 -3150 3150 3150
1
-4000 -4000 4000 4000
81,354 → 51,378
-4000 -4000 4000 4000
1
-4000 -4000 4000 4000
VIAGEN12W_15 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 10 -8750 -6650 8750 6650
1
-10000 -7900 10000 7900
1
-10000 -7900 10000 7900
VIAGEN12W_16 VIAGEN12W M2 0 1 0 700 700 1400 1400 9 1 -5950 -350 5950 350
1
-7000 -1400 7000 1400
1
-7000 -1400 7000 1400
VIAGEN12W_17 VIAGEN12W M2 0 1 0 700 700 1400 1400 13 1 -8750 -350 8750 350
1
-10000 -2000 10000 2000
1
-10000 -2000 10000 2000
0 0 1 dummy_gnd
102 67 1 gnd!
458700 533600 22000 8000 M1 100 5 0
458700 495200 22000 8000 M1 100 5 0
458700 610400 22000 8000 M1 100 5 0
458700 572000 22000 8000 M1 100 5 0
458700 687200 22000 8000 M1 100 5 0
458700 648800 22000 8000 M1 100 5 0
458700 725600 22000 8000 M1 100 5 0
458700 764000 22000 8000 M1 100 5 0
458700 802400 22000 8000 M1 100 5 0
458700 840800 22000 8000 M1 100 5 0
428400 891000 50300 14000 M1 100 4 0
458700 879200 22000 8000 M1 100 5 0
428400 909000 50300 14000 M1 100 4 0
428400 927000 50300 14000 M1 100 4 0
428400 945000 50300 14000 M1 100 4 0
458700 956000 22000 8000 M1 100 5 0
458700 917600 22000 8000 M1 100 5 0
458700 458000 1152600 20000 M1 100 1 0
480700 572000 1108600 8000 M1 100 3 0
480700 610400 1108600 8000 M1 100 3 0
480700 648800 1108600 8000 M1 100 3 0
480700 687200 1108600 8000 M1 100 3 0
480700 495200 1108600 8000 M1 100 3 0
480700 533600 1108600 8000 M1 100 3 0
480700 840800 1108600 8000 M1 100 3 0
480700 879200 1108600 8000 M1 100 3 0
480700 917600 1108600 8000 M1 100 3 0
480700 956000 1108600 8000 M1 100 3 0
480700 725600 1108600 8000 M1 100 3 0
480700 764000 1108600 8000 M1 100 3 0
480700 802400 1108600 8000 M1 100 3 0
1589300 495200 22000 8000 M1 100 5 0
1589300 533600 22000 8000 M1 100 5 0
1589300 572000 22000 8000 M1 100 5 0
1589300 610400 22000 8000 M1 100 5 0
1589300 648800 22000 8000 M1 100 5 0
1589300 687200 22000 8000 M1 100 5 0
1589300 725600 22000 8000 M1 100 5 0
1589300 764000 22000 8000 M1 100 5 0
1589300 802400 22000 8000 M1 100 5 0
1589300 840800 22000 8000 M1 100 5 0
1589300 879200 22000 8000 M1 100 5 0
1589300 956000 22000 8000 M1 100 5 0
1589300 917600 22000 8000 M1 100 5 0
458700 458000 20000 1042400 M2 010 1 0
1591300 458000 20000 1042400 M2 010 1 0
458700 1071200 22000 8000 M1 100 5 0
458700 1032800 22000 8000 M1 100 5 0
458700 994400 22000 8000 M1 100 5 0
458700 1109600 22000 8000 M1 100 5 0
458700 1186400 22000 8000 M1 100 5 0
458700 1148000 22000 8000 M1 100 5 0
458700 1224800 22000 8000 M1 100 5 0
458700 1301600 22000 8000 M1 100 5 0
458700 1263200 22000 8000 M1 100 5 0
458700 1340000 22000 8000 M1 100 5 0
458700 1378400 22000 8000 M1 100 5 0
458700 1416800 22000 8000 M1 100 5 0
458700 1455200 22000 8000 M1 100 5 0
1001000 1480400 14000 46000 M2 010 4 0
1019000 1480400 14000 46000 M2 010 4 0
1019000 1526400 14000 5200 M1 010 4 0
1019000 1525000 14000 2800 M1 100 4 0
1001000 1526400 14000 5200 M1 010 4 0
1001000 1525000 14000 2800 M1 100 4 0
480700 1109600 1108600 8000 M1 100 3 0
480700 1148000 1108600 8000 M1 100 3 0
480700 1186400 1108600 8000 M1 100 3 0
480700 1224800 1108600 8000 M1 100 3 0
480700 994400 1108600 8000 M1 100 3 0
480700 1032800 1108600 8000 M1 100 3 0
480700 1071200 1108600 8000 M1 100 3 0
480700 1416800 1108600 8000 M1 100 3 0
480700 1455200 1108600 8000 M1 100 3 0
480700 1378400 1108600 8000 M1 100 3 0
480700 1263200 1108600 8000 M1 100 3 0
480700 1301600 1108600 8000 M1 100 3 0
480700 1340000 1108600 8000 M1 100 3 0
458700 1480400 1152600 20000 M1 100 1 0
1591300 1019000 50300 14000 M1 100 4 0
1591300 1001000 50300 14000 M1 100 4 0
1591300 1037000 50300 14000 M1 100 4 0
1589300 994400 22000 8000 M1 100 5 0
1589300 1032800 22000 8000 M1 100 5 0
1591300 1055000 50300 14000 M1 100 4 0
1589300 1071200 22000 8000 M1 100 5 0
1589300 1109600 22000 8000 M1 100 5 0
1589300 1148000 22000 8000 M1 100 5 0
1589300 1186400 22000 8000 M1 100 5 0
1589300 1224800 22000 8000 M1 100 5 0
1589300 1301600 22000 8000 M1 100 5 0
1589300 1263200 22000 8000 M1 100 5 0
1589300 1340000 22000 8000 M1 100 5 0
1589300 1378400 22000 8000 M1 100 5 0
1589300 1455200 22000 8000 M1 100 5 0
1589300 1416800 22000 8000 M1 100 5 0
1055000 1480400 14000 46000 M2 010 4 0
1037000 1480400 14000 46000 M2 010 4 0
1037000 1526400 14000 5200 M1 010 4 0
1037000 1525000 14000 2800 M1 100 4 0
1055000 1526400 14000 5200 M1 010 4 0
1055000 1525000 14000 2800 M1 100 4 0
458700 458000 2 0 1 0
458700 533600 3 0 5 0
458700 495200 3 0 5 0
458700 610400 3 0 5 0
458700 572000 3 0 5 0
458700 687200 3 0 5 0
458700 648800 3 0 5 0
458700 725600 3 0 5 0
458700 764000 3 0 5 0
458700 802400 3 0 5 0
458700 840800 3 0 5 0
458700 891000 6 0 4 0
458700 879200 3 0 5 0
458700 909000 7 0 4 0
458700 945000 8 0 4 0
458700 927000 6 0 4 0
1591300 458000 2 0 1 0
1591300 533600 3 0 5 0
1591300 495200 3 0 5 0
1591300 572000 3 0 5 0
1591300 610400 3 0 5 0
1591300 687200 3 0 5 0
1591300 648800 3 0 5 0
1591300 725600 3 0 5 0
1591300 764000 3 0 5 0
1591300 802400 3 0 5 0
1591300 840800 3 0 5 0
1591300 879200 3 0 5 0
1591300 956000 3 0 5 0
1591300 917600 3 0 5 0
458700 1071200 3 0 5 0
458700 1032800 3 0 5 0
458700 994400 3 0 5 0
458700 1109600 3 0 5 0
458700 1186400 3 0 5 0
458700 1148000 3 0 5 0
458700 1224800 3 0 5 0
458700 1301600 3 0 5 0
458700 1263200 3 0 5 0
458700 1340000 3 0 5 0
458700 1378400 3 0 5 0
458700 1455200 3 0 5 0
458700 1416800 3 0 5 0
458700 1480400 2 0 1 0
1019000 1480400 9 0 4 0
1001000 1480400 9 0 4 0
1019000 1525000 10 0 4 0
1001000 1525000 10 0 4 0
1591300 1019000 5 0 4 0
1591300 994400 4 0 4 0
1591300 1055000 6 0 4 0
1591300 1071200 3 0 5 0
1591300 1109600 3 0 5 0
1591300 1148000 3 0 5 0
1591300 1186400 3 0 5 0
1591300 1224800 3 0 5 0
1591300 1301600 3 0 5 0
1591300 1263200 3 0 5 0
1591300 1340000 3 0 5 0
1591300 1378400 3 0 5 0
1591300 1455200 3 0 5 0
1591300 1416800 3 0 5 0
1055000 1480400 9 0 4 0
1037000 1480400 9 0 4 0
1037000 1525000 10 0 4 0
1055000 1525000 10 0 4 0
1591300 1480400 2 0 1 0
0 0 1 dummy_clampc
0 0 1 dummy_vdd
107 70 1 vdd!
436700 480000 44000 4000 M1 100 5 0
909000 428400 14000 27600 M1 010 4 0
927000 428400 14000 27600 M1 010 4 0
945000 428400 14000 27600 M1 010 4 0
891000 428400 14000 27600 M1 010 4 0
436700 514400 44000 8000 M1 100 5 0
436700 552800 44000 8000 M1 100 5 0
436700 591200 44000 8000 M1 100 5 0
436700 629600 44000 8000 M1 100 5 0
436700 668000 44000 8000 M1 100 5 0
436700 744800 44000 8000 M1 100 5 0
436700 706400 44000 8000 M1 100 5 0
428400 781000 28300 14000 M1 100 4 0
428400 799000 28300 14000 M1 100 4 0
428400 817000 28300 14000 M1 100 4 0
436700 783200 44000 8000 M1 100 5 0
436700 821600 44000 8000 M1 100 5 0
428400 835000 28300 14000 M1 100 4 0
436700 860000 44000 8000 M1 100 5 0
436700 898400 47450 8000 M3 100 5 0
480150 898400 8000 8000 M2 100 5 0
436700 936800 47450 8000 M3 100 5 0
480150 936800 8000 8000 M2 100 5 0
436700 436000 1196600 20000 M1 100 1 0
480700 480000 1108600 4000 M1 100 3 0
480700 591200 1108600 8000 M1 100 3 0
480700 629600 1108600 8000 M1 100 3 0
480700 668000 1108600 8000 M1 100 3 0
480700 514400 1108600 8000 M1 100 3 0
480700 552800 1108600 8000 M1 100 3 0
480700 860000 1108600 8000 M1 100 3 0
480700 898400 1108600 8000 M1 100 3 0
480700 936800 1108600 8000 M1 100 3 0
480700 706400 1108600 8000 M1 100 3 0
480700 744800 1108600 8000 M1 100 3 0
480700 783200 1108600 8000 M1 100 3 0
480700 821600 1108600 8000 M1 100 3 0
1589300 480000 44000 4000 M1 100 5 0
1589300 552800 44000 8000 M1 100 5 0
1589300 514400 44000 8000 M1 100 5 0
1589300 591200 44000 8000 M1 100 5 0
1589300 668000 44000 8000 M1 100 5 0
1589300 629600 44000 8000 M1 100 5 0
1589300 706400 44000 8000 M1 100 5 0
1589300 744800 44000 8000 M1 100 5 0
1589300 783200 44000 8000 M1 100 5 0
1589300 821600 44000 8000 M1 100 5 0
1589300 860000 44000 8000 M1 100 5 0
1589300 898400 44000 8000 M1 100 5 0
1613300 891000 28300 14000 M1 100 4 0
1613300 909000 28300 14000 M1 100 4 0
1585300 936800 25250 8000 M1 100 5 0
1602550 934400 8000 10400 M1 010 5 0
1602550 934400 30750 8000 M1 100 5 0
1613300 945000 28300 14000 M1 100 4 0
1613300 927000 28300 14000 M1 100 4 0
436700 436000 20000 1086400 M2 010 1 0
436700 975200 44000 8000 M1 100 5 0
480700 975200 1108600 8000 M1 100 3 0
1613300 436000 20000 1086400 M2 010 1 0
1589300 975200 44000 8000 M1 100 5 0
436700 1090400 44000 8000 M1 100 5 0
436700 1052000 44000 8000 M1 100 5 0
436700 1013600 44000 8000 M1 100 5 0
436700 1205600 44000 8000 M1 100 5 0
436700 1128800 44000 8000 M1 100 5 0
436700 1167200 44000 8000 M1 100 5 0
436700 1244000 44000 8000 M1 100 5 0
436700 1282400 44000 8000 M1 100 5 0
436700 1320800 44000 8000 M1 100 5 0
436700 1359200 44000 8000 M1 100 5 0
436700 1436000 44000 8000 M1 100 5 0
436700 1397600 44000 8000 M1 100 5 0
436700 1474400 44000 4000 M1 100 5 0
927000 1502400 14000 29200 M1 010 4 0
909000 1502400 14000 29200 M1 010 4 0
945000 1502400 14000 29200 M1 010 4 0
891000 1502400 14000 29200 M1 010 4 0
480700 1128800 1108600 8000 M1 100 3 0
480700 1167200 1108600 8000 M1 100 3 0
480700 1205600 1108600 8000 M1 100 3 0
480700 1013600 1108600 8000 M1 100 3 0
480700 1052000 1108600 8000 M1 100 3 0
480700 1090400 1108600 8000 M1 100 3 0
480700 1244000 1108600 8000 M1 100 3 0
480700 1397600 1108600 8000 M1 100 3 0
480700 1436000 1108600 8000 M1 100 3 0
480700 1282400 1108600 8000 M1 100 3 0
480700 1320800 1108600 8000 M1 100 3 0
480700 1359200 1108600 8000 M1 100 3 0
480700 1474400 1108600 4000 M1 100 3 0
436700 1502400 1196600 20000 M1 100 1 0
1581850 1013600 8000 8000 M2 100 5 0
1585850 1013600 47450 8000 M3 100 5 0
1581850 1052000 8000 8000 M2 100 5 0
1585850 1052000 47450 8000 M3 100 5 0
1589300 1090400 44000 8000 M1 100 5 0
1589300 1167200 44000 8000 M1 100 5 0
1589300 1128800 44000 8000 M1 100 5 0
1589300 1205600 44000 8000 M1 100 5 0
1589300 1244000 44000 8000 M1 100 5 0
1589300 1282400 44000 8000 M1 100 5 0
1589300 1320800 44000 8000 M1 100 5 0
1589300 1359200 44000 8000 M1 100 5 0
1589300 1397600 44000 8000 M1 100 5 0
1589300 1436000 44000 8000 M1 100 5 0
1589300 1474400 44000 4000 M1 100 5 0
436700 436000 2 0 1 0
436700 480000 11 0 5 0
436700 552800 3 0 5 0
436700 514400 3 0 5 0
436700 591200 3 0 5 0
436700 668000 3 0 5 0
436700 629600 3 0 5 0
436700 744800 3 0 5 0
436700 706400 3 0 5 0
436700 817000 6 0 4 0
436700 799000 6 0 4 0
436700 781000 6 0 4 0
436700 835000 6 0 4 0
436700 860000 3 0 5 0
436700 898400 12 0 5 0
480150 898400 15 0 5 0
480150 898400 14 0 5 0
436700 936800 12 0 5 0
480150 936800 15 0 5 0
480150 936800 14 0 5 0
1613300 436000 2 0 1 0
1613300 480000 11 0 5 0
1613300 552800 3 0 5 0
1613300 514400 3 0 5 0
1613300 591200 3 0 5 0
1613300 668000 3 0 5 0
1613300 629600 3 0 5 0
1613300 706400 3 0 5 0
1613300 744800 3 0 5 0
1613300 821600 3 0 5 0
1613300 783200 3 0 5 0
1613300 860000 3 0 5 0
1613300 891000 13 0 4 0
1613300 909000 6 0 4 0
1613300 945000 6 0 4 0
1613300 927000 13 0 4 0
436700 975200 3 0 5 0
1613300 975200 3 0 5 0
436700 1090400 3 0 5 0
436700 1052000 3 0 5 0
436700 1013600 3 0 5 0
436700 1205600 3 0 5 0
436700 1167200 3 0 5 0
436700 1128800 3 0 5 0
436700 1244000 3 0 5 0
436700 1282400 3 0 5 0
436700 1320800 3 0 5 0
436700 1359200 3 0 5 0
436700 1436000 3 0 5 0
436700 1397600 3 0 5 0
436700 1474400 11 0 5 0
436700 1502400 2 0 1 0
1581850 1013600 15 0 5 0
1581850 1013600 14 0 5 0
1613300 1013600 12 0 5 0
1581850 1052000 15 0 5 0
1581850 1052000 14 0 5 0
1613300 1052000 12 0 5 0
1613300 1090400 3 0 5 0
1613300 1167200 3 0 5 0
1613300 1128800 3 0 5 0
1613300 1205600 3 0 5 0
1613300 1244000 3 0 5 0
1613300 1282400 3 0 5 0
1613300 1320800 3 0 5 0
1613300 1359200 3 0 5 0
1613300 1436000 3 0 5 0
1613300 1397600 3 0 5 0
1613300 1474400 11 0 5 0
1613300 1502400 2 0 1 0
107 74 1 gnd!
1019000 434400 14000 47600 M2 010 4 0
1001000 434400 14000 47600 M2 010 4 0
1019000 428400 14000 6000 M1 010 4 0
1019000 433000 14000 2800 M1 100 4 0
1001000 428400 14000 6000 M1 010 4 0
1001000 433000 14000 2800 M1 100 4 0
462100 507200 30100 8000 M1 100 5 0
462100 545600 30100 8000 M1 100 5 0
462100 584000 30100 8000 M1 100 5 0
462100 622400 30100 8000 M1 100 5 0
462100 660800 30100 8000 M1 100 5 0
462100 699200 30100 8000 M1 100 5 0
462100 737600 30100 8000 M1 100 5 0
462100 776000 30100 8000 M1 100 5 0
462100 814400 30100 8000 M1 100 5 0
462100 852800 30100 8000 M1 100 5 0
462100 891200 30100 8000 M1 100 5 0
462100 929600 30100 8000 M1 100 5 0
462100 968000 30100 8000 M1 100 5 0
462100 462000 1145800 20000 M1 100 1 0
492200 545600 1085600 8000 M1 100 3 0
492200 507200 1085600 8000 M1 100 3 0
492200 660800 1085600 8000 M1 100 3 0
492200 622400 1085600 8000 M1 100 3 0
492200 584000 1085600 8000 M1 100 3 0
492200 699200 1085600 8000 M1 100 3 0
492200 814400 1085600 8000 M1 100 3 0
492200 776000 1085600 8000 M1 100 3 0
492200 737600 1085600 8000 M1 100 3 0
492200 929600 1085600 8000 M1 100 3 0
492200 891200 1085600 8000 M1 100 3 0
492200 852800 1085600 8000 M1 100 3 0
492200 968000 1085600 8000 M1 100 3 0
1055000 434400 14000 47600 M2 010 4 0
1055000 428400 14000 6000 M1 010 4 0
1055000 433000 14000 2800 M1 100 4 0
1037000 434400 14000 47600 M2 010 4 0
1037000 428400 14000 6000 M1 010 4 0
1037000 433000 14000 2800 M1 100 4 0
1577800 507200 30100 8000 M1 100 5 0
1577800 545600 30100 8000 M1 100 5 0
1577800 584000 30100 8000 M1 100 5 0
1577800 622400 30100 8000 M1 100 5 0
1577800 660800 30100 8000 M1 100 5 0
1577800 699200 30100 8000 M1 100 5 0
1577800 737600 30100 8000 M1 100 5 0
1577800 776000 30100 8000 M1 100 5 0
1577800 814400 30100 8000 M1 100 5 0
1577800 852800 30100 8000 M1 100 5 0
1577800 891200 30100 8000 M1 100 5 0
1577800 929600 30100 8000 M1 100 5 0
1577800 968000 30100 8000 M1 100 5 0
462100 462000 20000 1028000 M2 010 1 0
1587900 462000 20000 1028000 M2 010 1 0
428400 1019000 53700 14000 M1 100 4 0
462100 1006400 30100 8000 M1 100 5 0
428400 1001000 53700 14000 M1 100 4 0
428400 1037000 53700 14000 M1 100 4 0
462100 1044800 30100 8000 M1 100 5 0
462100 1083200 30100 8000 M1 100 5 0
428400 1055000 53700 14000 M1 100 4 0
462100 1121600 30100 8000 M1 100 5 0
462100 1198400 30100 8000 M1 100 5 0
462100 1160000 30100 8000 M1 100 5 0
462100 1236800 30100 8000 M1 100 5 0
462100 1275200 30100 8000 M1 100 5 0
462100 1313600 30100 8000 M1 100 5 0
462100 1352000 30100 8000 M1 100 5 0
462100 1390400 30100 8000 M1 100 5 0
462100 1428800 30100 8000 M1 100 5 0
1001000 1470000 14000 54900 M2 010 4 0
1019000 1470000 14000 54900 M2 010 4 0
1001000 1524900 14000 6700 M1 010 4 0
1019000 1524900 14000 6700 M1 010 4 0
492200 1006400 1085600 8000 M1 100 3 0
492200 1083200 1085600 8000 M1 100 3 0
492200 1044800 1085600 8000 M1 100 3 0
492200 1121600 1085600 8000 M1 100 3 0
492200 1198400 1085600 8000 M1 100 3 0
492200 1160000 1085600 8000 M1 100 3 0
492200 1236800 1085600 8000 M1 100 3 0
492200 1428800 1085600 8000 M1 100 3 0
492200 1390400 1085600 8000 M1 100 3 0
492200 1313600 1085600 8000 M1 100 3 0
492200 1275200 1085600 8000 M1 100 3 0
492200 1352000 1085600 8000 M1 100 3 0
462100 1470000 1145800 20000 M1 100 1 0
1587900 1019000 53700 14000 M1 100 4 0
1587900 1001000 53700 14000 M1 100 4 0
1577800 1006400 30100 8000 M1 100 5 0
1587900 1037000 53700 14000 M1 100 4 0
1577800 1044800 30100 8000 M1 100 5 0
1577800 1083200 30100 8000 M1 100 5 0
1587900 1055000 53700 14000 M1 100 4 0
1577800 1121600 30100 8000 M1 100 5 0
1577800 1160000 30100 8000 M1 100 5 0
1577800 1198400 30100 8000 M1 100 5 0
1577800 1236800 30100 8000 M1 100 5 0
1577800 1275200 30100 8000 M1 100 5 0
1577800 1313600 30100 8000 M1 100 5 0
1577800 1352000 30100 8000 M1 100 5 0
1577800 1390400 30100 8000 M1 100 5 0
1577800 1428800 30100 8000 M1 100 5 0
1055000 1470000 14000 54900 M2 010 4 0
1037000 1470000 14000 54900 M2 010 4 0
1055000 1524900 14000 6700 M1 010 4 0
1037000 1524900 14000 6700 M1 010 4 0
462100 462000 2 0 1 0
1001000 462000 4 0 4 0
1019000 462000 4 0 4 0
1001000 433000 11 0 4 0
1019000 433000 11 0 4 0
462100 507200 3 0 5 0
462100 545600 3 0 5 0
462100 584000 3 0 5 0
462100 622400 3 0 5 0
462100 660800 3 0 5 0
462100 699200 3 0 5 0
462100 737600 3 0 5 0
462100 776000 3 0 5 0
462100 814400 3 0 5 0
462100 852800 3 0 5 0
462100 891200 3 0 5 0
462100 929600 3 0 5 0
462100 968000 3 0 5 0
1055000 462000 4 0 4 0
1055000 433000 11 0 4 0
1037000 462000 4 0 4 0
1037000 433000 11 0 4 0
1587900 462000 2 0 1 0
1587900 507200 3 0 5 0
1587900 545600 3 0 5 0
1587900 584000 3 0 5 0
1587900 622400 3 0 5 0
1587900 660800 3 0 5 0
1587900 699200 3 0 5 0
1587900 737600 3 0 5 0
1587900 776000 3 0 5 0
1587900 814400 3 0 5 0
1587900 852800 3 0 5 0
1587900 891200 3 0 5 0
1587900 929600 3 0 5 0
1587900 968000 3 0 5 0
462100 1019000 6 0 4 0
462100 1001000 6 0 4 0
462100 1037000 10 0 4 0
462100 1083200 3 0 5 0
462100 1055000 6 0 4 0
462100 1121600 3 0 5 0
462100 1198400 3 0 5 0
462100 1160000 3 0 5 0
462100 1236800 3 0 5 0
462100 1275200 3 0 5 0
462100 1313600 3 0 5 0
462100 1352000 3 0 5 0
462100 1390400 3 0 5 0
462100 1428800 3 0 5 0
462100 1470000 2 0 1 0
1001000 1470000 4 0 4 0
1019000 1470000 4 0 4 0
1019500 1517900 5 0 4 0
1001500 1517900 5 0 4 0
1587900 1019000 6 0 4 0
1587900 1001000 6 0 4 0
1587900 1037000 10 0 4 0
1587900 1083200 3 0 5 0
1587900 1055000 6 0 4 0
1587900 1121600 3 0 5 0
1587900 1160000 3 0 5 0
1587900 1198400 3 0 5 0
1587900 1236800 3 0 5 0
1587900 1275200 3 0 5 0
1587900 1313600 3 0 5 0
1587900 1352000 3 0 5 0
1587900 1390400 3 0 5 0
1587900 1428800 3 0 5 0
1055000 1470000 4 0 4 0
1037000 1470000 4 0 4 0
1587900 1470000 2 0 1 0
1055500 1517900 5 0 4 0
1037500 1517900 5 0 4 0
106 68 1 vdd!
891000 428400 14000 31600 M1 010 4 0
945000 428400 14000 31600 M1 010 4 0
927000 428400 14000 31600 M1 010 4 0
909000 428400 14000 31600 M1 010 4 0
440100 492000 52100 4000 M1 100 5 0
440100 526400 52100 8000 M1 100 5 0
440100 564800 52100 8000 M1 100 5 0
440100 603200 52100 8000 M1 100 5 0
440100 641600 52100 8000 M1 100 5 0
440100 680000 52100 8000 M1 100 5 0
440100 718400 52100 8000 M1 100 5 0
440100 756800 52100 8000 M1 100 5 0
440100 833600 52100 8000 M1 100 5 0
440100 795200 52100 8000 M1 100 5 0
428400 891000 31700 14000 M1 100 4 0
440100 872000 52100 8000 M1 100 5 0
428400 909000 31700 14000 M1 100 4 0
440100 910400 52100 8000 M1 100 5 0
440100 948800 52100 8000 M1 100 5 0
428400 945000 31700 14000 M1 100 4 0
428400 927000 31700 14000 M1 100 4 0
440100 440000 1189800 20000 M1 100 1 0
492200 564800 1085600 8000 M1 100 3 0
492200 526400 1085600 8000 M1 100 3 0
492200 492000 1085600 4000 M1 100 3 0
492200 680000 1085600 8000 M1 100 3 0
492200 641600 1085600 8000 M1 100 3 0
492200 603200 1085600 8000 M1 100 3 0
492200 718400 1085600 8000 M1 100 3 0
492200 833600 1085600 8000 M1 100 3 0
492200 795200 1085600 8000 M1 100 3 0
492200 756800 1085600 8000 M1 100 3 0
492200 948800 1085600 8000 M1 100 3 0
492200 910400 1085600 8000 M1 100 3 0
492200 872000 1085600 8000 M1 100 3 0
1577800 492000 52100 4000 M1 100 5 0
1577800 526400 52100 8000 M1 100 5 0
1577800 564800 52100 8000 M1 100 5 0
1577800 603200 52100 8000 M1 100 5 0
1577800 641600 52100 8000 M1 100 5 0
1577800 680000 52100 8000 M1 100 5 0
1577800 718400 52100 8000 M1 100 5 0
1577800 756800 52100 8000 M1 100 5 0
1577800 833600 52100 8000 M1 100 5 0
1577800 795200 52100 8000 M1 100 5 0
1609900 891000 31700 14000 M1 100 4 0
1577800 872000 52100 8000 M1 100 5 0
1609900 909000 31700 14000 M1 100 4 0
1577800 910400 52100 8000 M1 100 5 0
1609900 945000 31700 14000 M1 100 4 0
1609900 927000 31700 14000 M1 100 4 0
1577800 948800 52100 8000 M1 100 5 0
440100 440000 20000 1072000 M2 010 1 0
1609900 440000 20000 1072000 M2 010 1 0
484750 1025600 8000 8000 M2 100 5 0
488750 1025600 7450 8000 M1 100 5 0
440100 1025600 48650 8000 M3 100 5 0
440100 987200 52100 8000 M1 100 5 0
484750 1064000 8000 8000 M2 100 5 0
488750 1064000 7450 8000 M1 100 5 0
440100 1064000 48650 8000 M3 100 5 0
440100 1102400 52100 8000 M1 100 5 0
440100 1140800 52100 8000 M1 100 5 0
440100 1179200 52100 8000 M1 100 5 0
440100 1217600 52100 8000 M1 100 5 0
440100 1256000 52100 8000 M1 100 5 0
440100 1294400 52100 8000 M1 100 5 0
440100 1332800 52100 8000 M1 100 5 0
440100 1371200 52100 8000 M1 100 5 0
440100 1409600 52100 8000 M1 100 5 0
440100 1448000 52100 4000 M1 100 5 0
891000 1492000 14000 39600 M1 010 4 0
909000 1492000 14000 39600 M1 010 4 0
945000 1492000 14000 39600 M1 010 4 0
927000 1492000 14000 39600 M1 010 4 0
492200 1025600 1085600 8000 M1 100 3 0
492200 987200 1085600 8000 M1 100 3 0
492200 1102400 1085600 8000 M1 100 3 0
492200 1064000 1085600 8000 M1 100 3 0
492200 1179200 1085600 8000 M1 100 3 0
492200 1140800 1085600 8000 M1 100 3 0
492200 1217600 1085600 8000 M1 100 3 0
492200 1448000 1085600 4000 M1 100 3 0
492200 1409600 1085600 8000 M1 100 3 0
492200 1371200 1085600 8000 M1 100 3 0
492200 1294400 1085600 8000 M1 100 3 0
492200 1332800 1085600 8000 M1 100 3 0
492200 1256000 1085600 8000 M1 100 3 0
440100 1492000 1189800 20000 M1 100 1 0
1581250 1025600 48650 8000 M3 100 5 0
1577800 987200 52100 8000 M1 100 5 0
1577250 1025600 8000 8000 M2 100 5 0
1573800 1025600 7450 8000 M1 100 5 0
1581250 1064000 48650 8000 M3 100 5 0
1577250 1064000 8000 8000 M2 100 5 0
1573800 1064000 7450 8000 M1 100 5 0
1577800 1102400 52100 8000 M1 100 5 0
1577800 1140800 52100 8000 M1 100 5 0
1577800 1179200 52100 8000 M1 100 5 0
1577800 1217600 52100 8000 M1 100 5 0
1577800 1256000 52100 8000 M1 100 5 0
1577800 1294400 52100 8000 M1 100 5 0
1577800 1332800 52100 8000 M1 100 5 0
1577800 1371200 52100 8000 M1 100 5 0
1577800 1448000 52100 4000 M1 100 5 0
1577800 1409600 52100 8000 M1 100 5 0
440100 440000 2 0 1 0
440100 492000 12 0 5 0
440100 526400 3 0 5 0
440100 564800 3 0 5 0
440100 603200 3 0 5 0
440100 641600 3 0 5 0
440100 680000 3 0 5 0
440100 718400 3 0 5 0
440100 756800 3 0 5 0
440100 833600 3 0 5 0
440100 795200 3 0 5 0
440100 891000 6 0 4 0
440100 872000 3 0 5 0
440100 909000 6 0 4 0
440100 927000 6 0 4 0
440100 945000 6 0 4 0
1609900 440000 2 0 1 0
1609900 492000 12 0 5 0
1609900 526400 3 0 5 0
1609900 564800 3 0 5 0
1609900 603200 3 0 5 0
1609900 641600 3 0 5 0
1609900 680000 3 0 5 0
1609900 718400 3 0 5 0
1609900 756800 3 0 5 0
1609900 795200 3 0 5 0
1609900 833600 3 0 5 0
1609900 872000 3 0 5 0
1609900 891000 6 0 4 0
1609900 909000 6 0 4 0
1609900 927000 6 0 4 0
1609900 945000 6 0 4 0
484750 1025600 8 0 5 0
484750 1025600 9 0 5 0
440100 1025600 7 0 5 0
440100 987200 3 0 5 0
484750 1064000 8 0 5 0
484750 1064000 9 0 5 0
440100 1064000 7 0 5 0
440100 1102400 3 0 5 0
440100 1140800 3 0 5 0
440100 1179200 3 0 5 0
440100 1217600 3 0 5 0
440100 1256000 3 0 5 0
440100 1294400 3 0 5 0
440100 1332800 3 0 5 0
440100 1371200 3 0 5 0
440100 1409600 3 0 5 0
440100 1448000 12 0 5 0
440100 1492000 2 0 1 0
1609900 1025600 7 0 5 0
1609900 987200 3 0 5 0
1577250 1025600 8 0 5 0
1577250 1025600 9 0 5 0
1609900 1064000 7 0 5 0
1577250 1064000 8 0 5 0
1577250 1064000 9 0 5 0
1609900 1102400 3 0 5 0
1609900 1140800 3 0 5 0
1609900 1179200 3 0 5 0
1609900 1217600 3 0 5 0
1609900 1256000 3 0 5 0
1609900 1294400 3 0 5 0
1609900 1332800 3 0 5 0
1609900 1371200 3 0 5 0
1609900 1448000 12 0 5 0
1609900 1409600 3 0 5 0
1609900 1492000 2 0 1 0
/trunk/syn/cadence/results/floorplan/t6507lp_io.fp
4,13 → 4,13
# FirstEncounter Floor Plan Information #
# #
######################################################
# Created by First Encounter v07.10-p011_1 on Fri Aug 7 15:47:14 2009
# Created by First Encounter v07.10-p011_1 on Thu Aug 6 06:27:23 2009
 
Version: 8
 
Head Box: 0.0000 0.0000 2070.0000 1960.0000
IO Box: 430.0000 430.0000 1640.0000 1530.0000
Core Box: 480.7000 480.0000 1590.0000 1478.4000
Core Box: 492.2000 492.0000 1580.0000 1452.0000
UseStdUtil: false
 
######################################################
28,58 → 28,56
##############################################################################
# DefRow: <name> <site> <x> <y> <orient> <num_x> <num_y> <step_x> <step_y> #
##############################################################################
DefRow: ROW_0 core_l 480.7000 480.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_1 core_l 480.7000 499.2000 N 482 1 2.3000 0.0000
DefRow: ROW_2 core_l 480.7000 518.4000 FS 482 1 2.3000 0.0000
DefRow: ROW_3 core_l 480.7000 537.6000 N 482 1 2.3000 0.0000
DefRow: ROW_4 core_l 480.7000 556.8000 FS 482 1 2.3000 0.0000
DefRow: ROW_5 core_l 480.7000 576.0000 N 482 1 2.3000 0.0000
DefRow: ROW_6 core_l 480.7000 595.2000 FS 482 1 2.3000 0.0000
DefRow: ROW_7 core_l 480.7000 614.4000 N 482 1 2.3000 0.0000
DefRow: ROW_8 core_l 480.7000 633.6000 FS 482 1 2.3000 0.0000
DefRow: ROW_9 core_l 480.7000 652.8000 N 482 1 2.3000 0.0000
DefRow: ROW_10 core_l 480.7000 672.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_11 core_l 480.7000 691.2000 N 482 1 2.3000 0.0000
DefRow: ROW_12 core_l 480.7000 710.4000 FS 482 1 2.3000 0.0000
DefRow: ROW_13 core_l 480.7000 729.6000 N 482 1 2.3000 0.0000
DefRow: ROW_14 core_l 480.7000 748.8000 FS 482 1 2.3000 0.0000
DefRow: ROW_15 core_l 480.7000 768.0000 N 482 1 2.3000 0.0000
DefRow: ROW_16 core_l 480.7000 787.2000 FS 482 1 2.3000 0.0000
DefRow: ROW_17 core_l 480.7000 806.4000 N 482 1 2.3000 0.0000
DefRow: ROW_18 core_l 480.7000 825.6000 FS 482 1 2.3000 0.0000
DefRow: ROW_19 core_l 480.7000 844.8000 N 482 1 2.3000 0.0000
DefRow: ROW_20 core_l 480.7000 864.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_21 core_l 480.7000 883.2000 N 482 1 2.3000 0.0000
DefRow: ROW_22 core_l 480.7000 902.4000 FS 482 1 2.3000 0.0000
DefRow: ROW_23 core_l 480.7000 921.6000 N 482 1 2.3000 0.0000
DefRow: ROW_24 core_l 480.7000 940.8000 FS 482 1 2.3000 0.0000
DefRow: ROW_25 core_l 480.7000 960.0000 N 482 1 2.3000 0.0000
DefRow: ROW_26 core_l 480.7000 979.2000 FS 482 1 2.3000 0.0000
DefRow: ROW_27 core_l 480.7000 998.4000 N 482 1 2.3000 0.0000
DefRow: ROW_28 core_l 480.7000 1017.6000 FS 482 1 2.3000 0.0000
DefRow: ROW_29 core_l 480.7000 1036.8000 N 482 1 2.3000 0.0000
DefRow: ROW_30 core_l 480.7000 1056.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_31 core_l 480.7000 1075.2000 N 482 1 2.3000 0.0000
DefRow: ROW_32 core_l 480.7000 1094.4000 FS 482 1 2.3000 0.0000
DefRow: ROW_33 core_l 480.7000 1113.6000 N 482 1 2.3000 0.0000
DefRow: ROW_34 core_l 480.7000 1132.8000 FS 482 1 2.3000 0.0000
DefRow: ROW_35 core_l 480.7000 1152.0000 N 482 1 2.3000 0.0000
DefRow: ROW_36 core_l 480.7000 1171.2000 FS 482 1 2.3000 0.0000
DefRow: ROW_37 core_l 480.7000 1190.4000 N 482 1 2.3000 0.0000
DefRow: ROW_38 core_l 480.7000 1209.6000 FS 482 1 2.3000 0.0000
DefRow: ROW_39 core_l 480.7000 1228.8000 N 482 1 2.3000 0.0000
DefRow: ROW_40 core_l 480.7000 1248.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_41 core_l 480.7000 1267.2000 N 482 1 2.3000 0.0000
DefRow: ROW_42 core_l 480.7000 1286.4000 FS 482 1 2.3000 0.0000
DefRow: ROW_43 core_l 480.7000 1305.6000 N 482 1 2.3000 0.0000
DefRow: ROW_44 core_l 480.7000 1324.8000 FS 482 1 2.3000 0.0000
DefRow: ROW_45 core_l 480.7000 1344.0000 N 482 1 2.3000 0.0000
DefRow: ROW_46 core_l 480.7000 1363.2000 FS 482 1 2.3000 0.0000
DefRow: ROW_47 core_l 480.7000 1382.4000 N 482 1 2.3000 0.0000
DefRow: ROW_48 core_l 480.7000 1401.6000 FS 482 1 2.3000 0.0000
DefRow: ROW_49 core_l 480.7000 1420.8000 N 482 1 2.3000 0.0000
DefRow: ROW_50 core_l 480.7000 1440.0000 FS 482 1 2.3000 0.0000
DefRow: ROW_51 core_l 480.7000 1459.2000 N 482 1 2.3000 0.0000
DefRow: ROW_0 core_l 492.2000 492.0000 FS 472 1 2.3000 0.0000
DefRow: ROW_1 core_l 492.2000 511.2000 N 472 1 2.3000 0.0000
DefRow: ROW_2 core_l 492.2000 530.4000 FS 472 1 2.3000 0.0000
DefRow: ROW_3 core_l 492.2000 549.6000 N 472 1 2.3000 0.0000
DefRow: ROW_4 core_l 492.2000 568.8000 FS 472 1 2.3000 0.0000
DefRow: ROW_5 core_l 492.2000 588.0000 N 472 1 2.3000 0.0000
DefRow: ROW_6 core_l 492.2000 607.2000 FS 472 1 2.3000 0.0000
DefRow: ROW_7 core_l 492.2000 626.4000 N 472 1 2.3000 0.0000
DefRow: ROW_8 core_l 492.2000 645.6000 FS 472 1 2.3000 0.0000
DefRow: ROW_9 core_l 492.2000 664.8000 N 472 1 2.3000 0.0000
DefRow: ROW_10 core_l 492.2000 684.0000 FS 472 1 2.3000 0.0000
DefRow: ROW_11 core_l 492.2000 703.2000 N 472 1 2.3000 0.0000
DefRow: ROW_12 core_l 492.2000 722.4000 FS 472 1 2.3000 0.0000
DefRow: ROW_13 core_l 492.2000 741.6000 N 472 1 2.3000 0.0000
DefRow: ROW_14 core_l 492.2000 760.8000 FS 472 1 2.3000 0.0000
DefRow: ROW_15 core_l 492.2000 780.0000 N 472 1 2.3000 0.0000
DefRow: ROW_16 core_l 492.2000 799.2000 FS 472 1 2.3000 0.0000
DefRow: ROW_17 core_l 492.2000 818.4000 N 472 1 2.3000 0.0000
DefRow: ROW_18 core_l 492.2000 837.6000 FS 472 1 2.3000 0.0000
DefRow: ROW_19 core_l 492.2000 856.8000 N 472 1 2.3000 0.0000
DefRow: ROW_20 core_l 492.2000 876.0000 FS 472 1 2.3000 0.0000
DefRow: ROW_21 core_l 492.2000 895.2000 N 472 1 2.3000 0.0000
DefRow: ROW_22 core_l 492.2000 914.4000 FS 472 1 2.3000 0.0000
DefRow: ROW_23 core_l 492.2000 933.6000 N 472 1 2.3000 0.0000
DefRow: ROW_24 core_l 492.2000 952.8000 FS 472 1 2.3000 0.0000
DefRow: ROW_25 core_l 492.2000 972.0000 N 472 1 2.3000 0.0000
DefRow: ROW_26 core_l 492.2000 991.2000 FS 472 1 2.3000 0.0000
DefRow: ROW_27 core_l 492.2000 1010.4000 N 472 1 2.3000 0.0000
DefRow: ROW_28 core_l 492.2000 1029.6000 FS 472 1 2.3000 0.0000
DefRow: ROW_29 core_l 492.2000 1048.8000 N 472 1 2.3000 0.0000
DefRow: ROW_30 core_l 492.2000 1068.0000 FS 472 1 2.3000 0.0000
DefRow: ROW_31 core_l 492.2000 1087.2000 N 472 1 2.3000 0.0000
DefRow: ROW_32 core_l 492.2000 1106.4000 FS 472 1 2.3000 0.0000
DefRow: ROW_33 core_l 492.2000 1125.6000 N 472 1 2.3000 0.0000
DefRow: ROW_34 core_l 492.2000 1144.8000 FS 472 1 2.3000 0.0000
DefRow: ROW_35 core_l 492.2000 1164.0000 N 472 1 2.3000 0.0000
DefRow: ROW_36 core_l 492.2000 1183.2000 FS 472 1 2.3000 0.0000
DefRow: ROW_37 core_l 492.2000 1202.4000 N 472 1 2.3000 0.0000
DefRow: ROW_38 core_l 492.2000 1221.6000 FS 472 1 2.3000 0.0000
DefRow: ROW_39 core_l 492.2000 1240.8000 N 472 1 2.3000 0.0000
DefRow: ROW_40 core_l 492.2000 1260.0000 FS 472 1 2.3000 0.0000
DefRow: ROW_41 core_l 492.2000 1279.2000 N 472 1 2.3000 0.0000
DefRow: ROW_42 core_l 492.2000 1298.4000 FS 472 1 2.3000 0.0000
DefRow: ROW_43 core_l 492.2000 1317.6000 N 472 1 2.3000 0.0000
DefRow: ROW_44 core_l 492.2000 1336.8000 FS 472 1 2.3000 0.0000
DefRow: ROW_45 core_l 492.2000 1356.0000 N 472 1 2.3000 0.0000
DefRow: ROW_46 core_l 492.2000 1375.2000 FS 472 1 2.3000 0.0000
DefRow: ROW_47 core_l 492.2000 1394.4000 N 472 1 2.3000 0.0000
DefRow: ROW_48 core_l 492.2000 1413.6000 FS 472 1 2.3000 0.0000
DefRow: ROW_49 core_l 492.2000 1432.8000 N 472 1 2.3000 0.0000
 
######################################################
# Track: dir start number space layer_num layer1 ...#
251,7 → 249,7
# PinBox: <llx> <lly> <urx> <ury> #
# PinPoly: <nrPt> <x1> <y1> <x2> <y2> ...<xn> <yn> #
#######################################################################################
IO: test_pad ICP 1530.0000 1530.0000 N R180 - 01
IO: filler1 FILLERP_110 1530.0000 1530.0000 N R180 - 01
IO: data_in_pad7 ICP 1420.0000 1530.0000 N R180 - 01
IO: data_in_pad6 ICP 1310.0000 1530.0000 N R180 - 01
IO: data_in_pad5 ICP 1200.0000 1530.0000 N R180 - 01
266,11 → 264,11
IO: left_up_pad CORNERCLMP 0.0000 1530.0000 NW R270 - 01
IO: reset_n_pad ICP 0.0000 1420.0000 W R270 - 01
IO: clk_pad ICP 0.0000 1310.0000 W R270 - 01
IO: scan_pad ICP 0.0000 1200.0000 W R270 - 01
IO: rw_mem_pad BT4P 0.0000 1090.0000 W R270 - 01
IO: address_pad12 BT4P 0.0000 980.0000 W R270 - 01
IO: gnd_pad_left GND5ALLPADP 0.0000 870.0000 W R270 - 01
IO: vdd_pad_left VDD5ALLPADP 0.0000 760.0000 W R270 - 01
IO: rw_mem_pad BT4P 0.0000 1200.0000 W R270 - 01
IO: address_pad12 BT4P 0.0000 1090.0000 W R270 - 01
IO: gnd_pad_left GND5ALLPADP 0.0000 980.0000 W R270 - 01
IO: vdd_pad_left VDD5ALLPADP 0.0000 870.0000 W R270 - 01
IO: filler0 FILLERP_110 0.0000 760.0000 W R270 - 01
IO: address_pad11 BT4P 0.0000 650.0000 W R270 - 01
IO: address_pad10 BT4P 0.0000 540.0000 W R270 - 01
IO: address_pad9 BT4P 0.0000 430.0000 W R270 - 01
/trunk/syn/cadence/results/t6507lp_io.conf
0,0 → 1,31
#####################################################################
#
# First Encounter input configuration file
# Created by Encounter(R) RTL Compiler on 08/31/09 11:31:49
#
#####################################################################
global rda_Input
set cwd lpwd
set rda_Input(ui_netlist) {/home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp_io.v}
set rda_Input(ui_netlisttype) {Verilog}
set rda_Input(ui_settop) {1}
set rda_Input(ui_topcell) {t6507lp_io}
set rda_Input(ui_timelib) {/home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//D_CELLSL_3_3V.lib /home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//IO_CELLS_33.lib}
set rda_Input(ui_timingcon_file) {/home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp_io.sdc}
set rda_Input(ui_buf_footprint) {BULX1}
set rda_Input(ui_inv_footprint) {INLX1}
set rda_Input(ui_leffile) {/home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//xc06_m3_FE.lef /home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//D_CELLSL.lef /home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//IO_CELLS.lef}
set rda_Input(ui_cts_cell_list) {BULX1 BULX2 BUCLX3 BULX3 BUCLX8 INLX1 INLX2 INCLX3 INLX3 INCLX8}
set rda_Input(ui_core_cntl) {aspect}
set rda_Input(ui_aspect_ratio) {1.0000}
set rda_Input(ui_captbl_file) {/home/nscad/samuel/Desktop/svn_atari/trunk//syn/cadence/libs//xc06m3_typ.CapTbl}
set rda_Input(ui_defcap_scale) {1.0}
set rda_Input(ui_res_scale) {1.0}
set rda_Input(ui_shr_scale) {1.0}
set rda_Input(assign_buffer) {1}
set rda_Input(ui_gen_footprint) {1}
 
########## RTL ##########
#set rda_Input(ui_netlisttype) {RTL}
 
 
/trunk/syn/cadence/results/t6507lp_io.v
0,0 → 1,3210
 
// Generated by Cadence Encounter(R) RTL Compiler v07.20-s009_1
 
module RC_CG_MOD(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1434(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1435(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1436(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1437(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module t6507lp_alu(clk, reset_n, alu_enable, alu_result, alu_status,
alu_opcode, alu_a, alu_x, alu_y, RC_CG_TEST_PORT, DFT_sdi);
input clk, reset_n, alu_enable, RC_CG_TEST_PORT, DFT_sdi;
input [7:0] alu_opcode, alu_a;
output [7:0] alu_result, alu_status, alu_x, alu_y;
wire clk, reset_n, alu_enable, RC_CG_TEST_PORT, DFT_sdi;
wire [7:0] alu_opcode, alu_a;
wire [7:0] alu_result, alu_status, alu_x, alu_y;
wire \AH[0] , \AH[4] , \AL[0] , \AL[1] , \AL[1]_801 , \AL[2] ,
\AL[2]_802 , \AL[3] ;
wire \AL[3]_803 , \AL[4] , \A[0] , \A[1] , \A[2] , \A[3] , \A[4] ,
\A[5] ;
wire \A[6] , \A[7] , \bcdh[1]_811 , \bcdh[2]_812 , \bcdh[3] , n_0,
n_1, n_2;
wire n_3, n_4, n_5, n_6, n_7, n_8, n_9, n_10;
wire n_11, n_12, n_13, n_14, n_15, n_16, n_24, n_25;
wire n_27, n_28, n_30, n_31, n_32, n_33, n_34, n_35;
wire n_36, n_37, n_38, n_39, n_40, n_41, n_42, n_43;
wire n_44, n_45, n_46, n_47, n_48, n_49, n_50, n_51;
wire n_52, n_53, n_54, n_55, n_56, n_57, n_58, n_59;
wire n_60, n_61, n_62, n_63, n_64, n_65, n_66, n_67;
wire n_68, n_69, n_70, n_71, n_72, n_73, n_74, n_75;
wire n_76, n_77, n_78, n_79, n_80, n_81, n_82, n_83;
wire n_84, n_85, n_86, n_87, n_88, n_89, n_90, n_91;
wire n_92, n_93, n_94, n_95, n_96, n_97, n_98, n_99;
wire n_100, n_101, n_102, n_103, n_104, n_105, n_106, n_107;
wire n_108, n_109, n_110, n_111, n_112, n_113, n_114, n_115;
wire n_116, n_117, n_118, n_119, n_120, n_121, n_122, n_123;
wire n_124, n_125, n_126, n_127, n_128, n_129, n_130, n_131;
wire n_132, n_133, n_134, n_135, n_136, n_137, n_138, n_139;
wire n_140, n_141, n_142, n_143, n_144, n_145, n_146, n_147;
wire n_148, n_149, n_150, n_151, n_152, n_153, n_154, n_155;
wire n_156, n_157, n_158, n_159, n_160, n_161, n_162, n_163;
wire n_164, n_165, n_166, n_167, n_168, n_169, n_170, n_171;
wire n_172, n_173, n_174, n_175, n_176, n_177, n_178, n_179;
wire n_180, n_181, n_182, n_183, n_184, n_185, n_186, n_187;
wire n_188, n_189, n_190, n_191, n_192, n_193, n_194, n_195;
wire n_196, n_197, n_198, n_199, n_200, n_201, n_202, n_203;
wire n_204, n_205, n_206, n_207, n_208, n_209, n_210, n_211;
wire n_212, n_213, n_214, n_215, n_216, n_217, n_218, n_219;
wire n_220, n_221, n_222, n_223, n_224, n_225, n_226, n_227;
wire n_228, n_229, n_230, n_231, n_232, n_233, n_234, n_235;
wire n_236, n_237, n_238, n_239, n_240, n_241, n_242, n_243;
wire n_244, n_245, n_246, n_247, n_248, n_249, n_250, n_251;
wire n_252, n_253, n_254, n_255, n_256, n_257, n_258, n_259;
wire n_260, n_261, n_262, n_263, n_264, n_265, n_266, n_267;
wire n_268, n_269, n_270, n_271, n_272, n_273, n_274, n_275;
wire n_276, n_277, n_278, n_279, n_280, n_281, n_282, n_283;
wire n_284, n_285, n_286, n_287, n_288, n_289, n_290, n_291;
wire n_292, n_293, n_294, n_295, n_296, n_297, n_298, n_299;
wire n_300, n_301, n_302, n_303, n_304, n_305, n_306, n_307;
wire n_308, n_309, n_310, n_311, n_312, n_313, n_314, n_315;
wire n_316, n_317, n_318, n_319, n_320, n_321, n_322, n_323;
wire n_324, n_325, n_326, n_327, n_328, n_329, n_330, n_331;
wire n_332, n_333, n_334, n_335, n_336, n_337, n_338, n_339;
wire n_340, n_341, n_342, n_343, n_344, n_345, n_346, n_347;
wire n_348, n_349, n_350, n_351, n_352, n_353, n_354, n_355;
wire n_356, n_357, n_358, n_359, n_360, n_361, n_362, n_363;
wire n_364, n_365, n_366, n_367, n_368, n_369, n_370, n_371;
wire n_372, n_373, n_374, n_375, n_376, n_377, n_378, n_379;
wire n_380, n_381, n_382, n_383, n_384, n_385, n_386, n_387;
wire n_388, n_389, n_390, n_391, n_392, n_393, n_394, n_395;
wire n_396, n_397, n_398, n_399, n_400, n_401, n_402, n_403;
wire n_404, n_405, n_406, n_407, n_408, n_409, n_410, n_411;
wire n_412, n_413, n_414, n_415, n_416, n_417, n_418, n_419;
wire n_420, n_421, n_422, n_423, n_424, n_425, n_426, n_427;
wire n_428, n_429, n_430, n_431, n_432, n_433, n_434, n_435;
wire n_436, n_437, n_438, n_439, n_440, n_441, n_442, n_443;
wire n_444, n_445, n_446, n_447, n_448, n_449, n_450, n_451;
wire n_452, n_453, n_454, n_455, n_456, n_457, n_458, n_459;
wire n_460, n_461, n_462, n_463, n_464, n_465, n_466, n_467;
wire n_468, n_469, n_470, n_471, n_472, n_473, n_474, n_475;
wire n_476, n_477, n_478, n_479, n_480, n_481, n_482, n_483;
wire n_484, n_485, n_486, n_487, n_488, n_489, n_490, n_491;
wire n_492, n_493, n_494, n_495, n_496, n_497, n_498, n_499;
wire n_500, n_501, n_502, n_503, n_504, n_505, n_506, n_507;
wire n_508, n_509, n_510, n_511, n_512, n_513, n_514, n_515;
wire n_516, n_517, n_518, n_519, n_520, n_522, n_523, n_524;
wire n_525, n_526, n_527, n_528, n_529, n_530, n_531, n_532;
wire n_533, n_534, n_535, n_536, n_537, n_538, n_539, n_540;
wire n_541, n_542, n_543, n_544, n_545, n_546, n_547, n_548;
wire n_549, n_550, n_551, n_552, n_553, n_554, n_555, n_556;
wire n_557, n_558, n_559, n_560, n_561, n_562, n_563, n_564;
wire n_565, n_566, n_567, n_568, n_569, n_570, n_571, n_572;
wire n_573, n_574, n_575, n_576, n_577, n_578, n_579, n_580;
wire n_581, n_582, n_583, n_584, n_585, n_586, n_587, n_588;
wire n_589, n_590, n_591, n_592, n_593, n_594, n_595, n_596;
wire n_597, n_598, n_599, n_600, n_601, n_602, n_603, n_604;
wire n_605, n_606, n_607, n_608, n_609, n_610, n_611, n_612;
wire n_613, n_614, n_615, n_616, n_617, n_618, n_619, n_620;
wire n_621, n_622, n_623, n_624, n_625, n_626, n_627, n_628;
wire n_629, n_630, n_631, n_632, n_633, n_634, n_635, n_636;
wire n_637, n_638, n_639, n_640, n_641, n_642, n_643, n_644;
wire n_645, n_646, n_647, n_648, n_649, n_650, n_651, n_652;
wire n_653, n_654, n_655, n_656, n_657, n_658, n_659, n_660;
wire n_661, n_662, n_663, n_664, n_665, n_666, n_667, n_668;
wire n_669, n_670, n_671, n_672, n_673, n_674, n_675, n_676;
wire n_677, n_678, n_679, n_680, n_681, n_682, n_683, n_684;
wire n_685, n_686, n_687, n_688, n_689, n_690, n_691, n_692;
wire n_693, n_694, n_695, n_696, n_697, n_698, n_699, n_700;
wire n_701, n_702, n_703, n_704, n_705, n_706, n_707, n_708;
wire n_709, n_710, n_711, n_712, n_713, n_714, n_715, n_716;
wire n_717, n_718, n_719, n_720, n_721, n_722, n_723, n_724;
wire n_725, n_726, n_727, n_728, n_729, n_730, n_731, n_732;
wire n_733, n_734, n_735, n_736, n_737, n_738, n_739, n_740;
wire n_741, n_742, n_743, n_744, n_745, n_746, n_747, n_748;
wire n_749, n_750, n_751, n_752, n_753, n_754, n_755, n_756;
wire n_757, n_758, n_759, n_760, n_761, n_762, n_763, n_764;
wire n_765, n_766, n_767, n_768, n_769, n_770, n_771, n_772;
wire n_773, n_774, n_775, n_776, n_777, n_778, n_779, n_780;
wire n_781, n_782, n_783, n_784, n_785, n_786, n_787, n_788;
wire n_789, n_790, n_791, n_792, n_793, n_794, n_795, n_796;
wire n_797, n_798, n_799, n_800, n_801, n_802, n_803, n_804;
wire n_805, n_806, n_807, n_808, n_809, n_810, n_811, n_812;
wire n_814, n_815, n_816, n_817, n_818, n_819, n_820, n_821;
wire n_822, n_823, n_824, n_825, n_826, n_827, n_828, n_829;
wire n_830, n_831, n_832, n_833, n_834, n_835, n_836, n_837;
wire n_838, n_839, n_840, n_841, n_842, n_843, n_844, n_845;
wire n_846, n_847, n_848, n_850, n_851, n_852, n_853, n_854;
wire n_855, n_857, n_868, n_869, n_871, n_872, n_873, n_875;
wire n_878, n_879, n_880, n_881, n_884, n_885, n_886, n_887;
wire n_888, n_889, n_890, n_891, n_892, n_893, n_894, n_895;
wire n_896, n_897, n_898, n_899, n_900, n_901, n_902, n_903;
wire n_904, n_905, n_906, n_907, n_908, n_909, n_910, n_911;
wire n_912, n_918, n_919, n_920, n_921, n_922, n_923, n_924;
wire n_925, n_926, n_927, n_928, rc_gclk, rc_gclk_10247,
rc_gclk_10251, rc_gclk_10254;
wire rc_gclk_10257, result, \result[0]_751 , \result[1]_674 ,
\result[1]_682 , \result[1]_690 , \result[1]_744 ,
\result[1]_780 ;
wire \result[1]_788 , \result[2]_635 , \result[2]_659 ,
\result[2]_667 , \result[2]_675 , \result[2]_683 ,
\result[2]_691 , \result[2]_699 ;
wire \result[2]_745 , \result[2]_781 , \result[2]_789 ,
\result[3]_636 , \result[3]_660 , \result[3]_668 ,
\result[3]_676 , \result[3]_684 ;
wire \result[3]_692 , \result[3]_700 , \result[3]_746 ,
\result[3]_782 , \result[3]_790 , \result[4]_661 ,
\result[4]_669 , \result[4]_677 ;
wire \result[4]_685 , \result[4]_693 , \result[4]_701 ,
\result[4]_718 , \result[4]_775 , \result[4]_783 ,
\result[4]_791 , \result[5]_662 ;
wire \result[5]_670 , \result[5]_678 , \result[5]_686 ,
\result[5]_694 , \result[5]_702 , \result[5]_719 ,
\result[5]_748 , \result[5]_784 ;
wire \result[5]_792 , \result[6]_639 , \result[6]_663 ,
\result[6]_671 , \result[6]_679 , \result[6]_687 ,
\result[6]_695 , \result[6]_703 ;
wire \result[6]_720 , \result[6]_749 , \result[6]_757 ,
\result[6]_785 , \result[6]_793 , \result[7]_664 ,
\result[7]_672 , \result[7]_680 ;
wire \result[7]_688 , \result[7]_696 , \result[7]_704 ,
\result[7]_721 , \result[7]_742 , \result[7]_786 ,
\result[7]_794 , \result[7]_5789 ;
RC_CG_MOD RC_CG_HIER_INST0(.enable (n_886), .ck_in (clk), .ck_out
(rc_gclk), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1434 RC_CG_HIER_INST1(.enable (n_885), .ck_in (clk),
.ck_out (rc_gclk_10247), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1435 RC_CG_HIER_INST2(.enable (n_922), .ck_in (clk),
.ck_out (rc_gclk_10251), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1436 RC_CG_HIER_INST3(.enable (n_888), .ck_in (clk),
.ck_out (rc_gclk_10254), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1437 RC_CG_HIER_INST4(.enable (n_887), .ck_in (clk),
.ck_out (rc_gclk_10257), .test (RC_CG_TEST_PORT));
ON222LX1 g21781(.A (n_490), .B (n_762), .C (n_323), .D (n_786), .E
(n_315), .F (alu_enable), .Q (n_842));
AN21LX1 g21782(.A (n_784), .B (n_824), .C (n_755), .Q (n_786));
ON21LX1 g21783(.A (n_785), .B (n_323), .C (n_382), .Q (n_843));
MU2LX1 g21784(.S (n_323), .IN0 (n_783), .IN1 (\A[7] ), .Q (n_841));
AND8LX1 g21785(.A (n_782), .B (n_693), .C (n_595), .D (n_560), .E
(n_763), .F (n_573), .G (n_704), .H (n_698), .Q (n_785));
ON21LX1 g21786(.A (n_773), .B (n_766), .C (n_781), .Q (n_784));
AO211LX1 g21787(.A (n_778), .B (n_824), .C (n_752), .D (n_771), .Q
(n_783));
NA2LX1 g21788(.A (n_779), .B (n_776), .Q (n_782));
ON21LX1 g21789(.A (\result[6]_720 ), .B (alu_status[3]), .C (n_780),
.Q (n_781));
NA2LX1 g21790(.A (n_775), .B (alu_status[3]), .Q (n_780));
AND2LX1 g21791(.A (n_777), .B (n_824), .Q (n_779));
NA2I1LX1 g21792(.B (n_774), .AN (n_770), .Q (n_778));
NA2I1LX1 g21793(.B (n_735), .AN (n_773), .Q (n_777));
NA2LX1 g21794(.A (n_773), .B (n_746), .Q (n_776));
NA2LX1 g21795(.A (n_772), .B (n_760), .Q (n_775));
NA3I1LX1 g21796(.B (n_767), .C (n_766), .AN (n_773), .Q (n_774));
NA2LX1 g21797(.A (n_857), .B (alu_status[3]), .Q (n_773));
NA2I1LX1 g21798(.B (n_857), .AN (n_735), .Q (n_772));
NA2LX1 g21799(.A (n_769), .B (n_764), .Q (n_771));
ON32LX1 g21800(.A (n_324), .B (n_767), .C (n_766), .D
(alu_status[3]), .E (n_761), .Q (n_770));
NA2LX1 g21801(.A (n_768), .B (n_834), .Q (n_769));
AO21LX1 g21802(.A (n_766), .B (\bcdh[3] ), .C (n_591), .Q (n_857));
EO2LX1 g21803(.A (result), .B (n_765), .Q (n_768));
INLX1 g21804(.A (\bcdh[3] ), .Q (n_767));
EO2LX1 g21806(.A (n_532), .B (n_759), .Q (\bcdh[3] ));
OR2LX1 g21807(.A (n_760), .B (n_735), .Q (n_766));
AN21LX1 g21808(.A (\bcdh[2]_812 ), .B (\bcdh[1]_811 ), .C (n_731), .Q
(n_765));
AO222LX1 g21809(.A (n_489), .B (\result[4]_775 ), .C (alu_enable), .D
(n_757), .E (\A[4] ), .F (n_323), .Q (n_844));
AO222LX1 g21810(.A (n_489), .B (n_741), .C (alu_enable), .D (n_758),
.E (\A[2] ), .F (n_323), .Q (n_846));
AO222LX1 g21811(.A (n_489), .B (n_722), .C (alu_enable), .D (n_756),
.E (\A[1] ), .F (n_323), .Q (n_847));
AO222LX1 g21812(.A (n_489), .B (n_720), .C (alu_enable), .D (n_754),
.E (\A[3] ), .F (n_323), .Q (n_845));
AN221LX1 g21813(.A (\result[7]_742 ), .B (n_835), .C (\result[7]_794
), .D (n_819), .E (n_753), .Q (n_764));
AN22LX1 g21814(.A (n_751), .B (n_834), .C (\result[5]_784 ), .D
(n_820), .Q (n_763));
EO2LX1 g21815(.A (n_749), .B (n_750), .Q (n_762));
INLX2 g21816(.A (n_761), .Q (\result[7]_721 ));
EO2LX1 g21817(.A (n_747), .B (n_662), .Q (n_761));
EN3LX1 g21818(.A (n_748), .B (n_472), .C (\result[7]_5789 ), .Q
(result));
HAALX1 g21819(.A (n_734), .B (n_494), .S (n_760), .CO (n_759));
NA3LX1 g21820(.A (n_742), .B (n_654), .C (n_557), .Q (n_758));
NA3LX1 g21821(.A (n_743), .B (n_697), .C (n_618), .Q (n_757));
NA3LX1 g21822(.A (n_744), .B (n_558), .C (n_621), .Q (n_756));
NA5LX1 g21823(.A (n_740), .B (n_573), .C (n_594), .D (n_715), .E
(n_694), .Q (n_755));
AO211LX1 g21824(.A (n_729), .B (\AL[3] ), .C (n_703), .D (n_737), .Q
(n_754));
NA3LX1 g21825(.A (n_745), .B (n_573), .C (n_727), .Q (n_753));
AO221LX1 g21826(.A (n_820), .B (\result[7]_786 ), .C (n_836), .D
(\result[7]_688 ), .E (n_728), .Q (n_752));
HAALX1 g21827(.A (\bcdh[1]_811 ), .B (n_732), .S (n_751), .CO
(n_750));
INLX1 g21828(.A (n_749), .Q (\bcdh[2]_812 ));
HAALX1 g21830(.A (n_497), .B (n_724), .S (n_749), .CO (n_748));
HAALX1 g21831(.A (n_723), .B (n_890), .S (\result[6]_720 ), .CO
(n_747));
ON22LX1 g21832(.A (n_735), .B (n_324), .C (\result[5]_719 ), .D
(alu_status[3]), .Q (n_746));
AN211LX1 g21833(.A (n_838), .B (\A[7] ), .C (n_726), .D (n_736), .Q
(n_745));
AN21LX1 g21834(.A (n_719), .B (\AL[1] ), .C (n_739), .Q (n_744));
AN21LX1 g21835(.A (n_719), .B (n_712), .C (n_738), .Q (n_743));
AN221LX1 g21836(.A (n_717), .B (n_649), .C (n_730), .D (\AL[2] ), .E
(n_668), .Q (n_742));
EO2LX1 g21837(.A (\AL[2]_802 ), .B (n_721), .Q (n_741));
AN211LX1 g21838(.A (\result[6]_785 ), .B (n_820), .C (n_716), .D
(n_692), .Q (n_740));
NA4LX1 g21839(.A (n_733), .B (n_573), .C (n_620), .D (n_610), .Q
(n_739));
ON21LX1 g21840(.A (n_718), .B (\AH[0] ), .C (n_699), .Q (n_738));
ON31LX1 g21841(.A (\AL[3] ), .B (n_649), .C (n_718), .D (n_691), .Q
(n_737));
AO221LX1 g21842(.A (alu_y[7]), .B (n_827), .C (alu_status[0]), .D
(n_872), .E (n_713), .Q (n_736));
HAALX1 g21843(.A (n_711), .B (n_461), .S (n_735), .CO (n_734));
EO2LX1 g21844(.A (n_428), .B (n_714), .Q (\result[7]_786 ));
NA2I1LX1 g21845(.B (n_717), .AN (\AL[1] ), .Q (n_733));
INLX1 g21846(.A (n_731), .Q (n_732));
NA2I1LX1 g21847(.B (alu_status[3]), .AN (n_869), .Q (n_731));
AO21LX1 g21848(.A (n_824), .B (\AL[1] ), .C (n_719), .Q (n_730));
AO21LX1 g21849(.A (n_649), .B (n_824), .C (n_719), .Q (n_729));
AO222LX1 g21850(.A (n_821), .B (\result[7]_696 ), .C (\A[6] ), .D
(n_833), .E (\result[7]_680 ), .F (n_822), .Q (n_728));
AN222LX1 g21851(.A (alu_a[7]), .B (n_832), .C (\result[7]_664 ), .D
(n_837), .E (alu_a[6]), .F (n_817), .Q (n_727));
AO222LX1 g21852(.A (n_830), .B (\result[7]_704 ), .C (alu_x[7]), .D
(n_829), .E (n_388), .F (n_828), .Q (n_726));
INLX1 g21854(.A (n_725), .Q (\bcdh[1]_811 ));
HAALX1 g21855(.A (n_706), .B (n_460), .S (n_725), .CO (n_724));
HAALX1 g21856(.A (n_615), .B (n_695), .S (\result[5]_719 ), .CO
(n_723));
HAALX1 g21857(.A (n_705), .B (\AL[1]_801 ), .S (n_722), .CO (n_721));
EO2LX1 g21858(.A (n_665), .B (n_709), .Q (n_720));
AND2LX1 g21859(.A (n_710), .B (n_824), .Q (n_719));
INLX1 g21861(.A (n_718), .Q (n_717));
NA2I1LX1 g21862(.B (n_824), .AN (n_710), .Q (n_718));
NA2LX1 g21863(.A (n_619), .B (n_708), .Q (n_716));
AN211LX1 g21864(.A (n_831), .B (\A[7] ), .C (n_696), .D (n_707), .Q
(n_715));
ON21LX1 g21865(.A (n_700), .B (n_797), .C (n_796), .Q (n_714));
AO321LX1 g21866(.A (n_815), .B (n_457), .C (n_689), .D (n_483), .E
(n_690), .F (n_446), .Q (n_869));
AO222LX1 g21867(.A (\result[7]_5789 ), .B (n_825), .C (\result[7]_672
), .D (n_823), .E (n_340), .F (n_826), .Q (n_713));
MU2LX1 g21868(.S (alu_status[3]), .IN0 (\result[4]_718 ), .IN1
(\AH[0] ), .Q (n_712));
EO2LX1 g21869(.A (n_435), .B (n_701), .Q (\result[7]_794 ));
NO2I1LX1 g21870(.B (n_702), .AN (\AH[0] ), .Q (n_711));
NA2I1LX1 g21871(.B (alu_status[3]), .AN (n_702), .Q (n_710));
ON21LX1 g21872(.A (n_631), .B (n_576), .C (n_705), .Q (n_709));
AN222LX1 g21873(.A (\result[6]_695 ), .B (n_821), .C (n_829), .D
(alu_x[6]), .E (n_836), .F (\result[6]_687 ), .Q (n_708));
AO222LX1 g21874(.A (n_830), .B (\result[6]_703 ), .C (\result[6]_639
), .D (n_828), .E (\result[6]_671 ), .F (n_823), .Q (n_707));
NO2LX1 g21875(.A (\AH[0] ), .B (n_689), .Q (n_706));
NO2LX1 g21876(.A (n_324), .B (n_689), .Q (n_705));
AN211LX1 g21877(.A (n_837), .B (\result[5]_662 ), .C (n_687), .D
(n_580), .Q (n_704));
AO211LX1 g21878(.A (n_817), .B (alu_a[2]), .C (n_617), .D (n_682), .Q
(n_703));
NO2I1LX1 g21879(.B (\AL[4] ), .AN (n_688), .Q (n_702));
ON21LX1 g21880(.A (n_684), .B (n_792), .C (n_791), .Q (n_701));
AN21LX1 g21881(.A (n_683), .B (n_355), .C (n_375), .Q (n_700));
AND5LX1 g21882(.A (n_573), .B (n_652), .C (n_671), .D (n_660), .E
(n_629), .Q (n_699));
AN221LX1 g21883(.A (n_838), .B (\A[5] ), .C (n_829), .D (alu_x[5]),
.E (n_672), .Q (n_698));
AN221LX1 g21884(.A (n_829), .B (alu_x[4]), .C (\result[4]_783 ), .D
(n_820), .E (n_626), .Q (n_697));
AO222LX1 g21885(.A (\result[6]_749 ), .B (n_825), .C (\result[6]_679
), .D (n_822), .E (\result[6]_757 ), .F (n_826), .Q (n_696));
HAALX1 g21886(.A (n_571), .B (n_666), .S (\result[4]_718 ), .CO
(n_695));
AN22LX1 g21887(.A (\result[6]_663 ), .B (n_837), .C (n_833), .D
(\A[5] ), .Q (n_694));
AN22LX1 g21888(.A (\result[5]_792 ), .B (n_819), .C (n_650), .D
(n_835), .Q (n_693));
AO22LX1 g21889(.A (\result[6]_793 ), .B (n_819), .C (n_651), .D
(n_835), .Q (n_692));
EO2LX1 g21890(.A (n_425), .B (n_685), .Q (\result[6]_785 ));
EO2LX1 g21891(.A (n_400), .B (n_683), .Q (\result[5]_784 ));
EO2LX1 g21892(.A (alu_x[7]), .B (n_674), .Q (\result[7]_672 ));
EO2LX1 g21893(.A (alu_y[7]), .B (n_673), .Q (\result[7]_680 ));
EO2LX1 g21894(.A (alu_x[7]), .B (n_676), .Q (\result[7]_696 ));
EO2LX1 g21895(.A (alu_y[7]), .B (n_680), .Q (\result[7]_704 ));
EO2LX1 g21896(.A (alu_a[7]), .B (n_675), .Q (\result[7]_664 ));
EO2LX1 g21897(.A (alu_a[7]), .B (n_678), .Q (\result[7]_688 ));
AN211LX1 g21898(.A (n_832), .B (alu_a[3]), .C (n_657), .D (n_686), .Q
(n_691));
EO2LX1 g21899(.A (n_853), .B (n_666), .Q (\AL[4] ));
INLX1 g21902(.A (n_690), .Q (n_689));
EO2LX1 g21903(.A (n_609), .B (n_664), .Q (n_690));
EO2LX1 g21904(.A (n_664), .B (n_625), .Q (\result[4]_775 ));
NA2I1LX1 g21905(.B (\AL[3] ), .AN (n_649), .Q (n_688));
NA2I1LX1 g21906(.B (n_663), .AN (n_667), .Q (n_687));
NA2LX1 g21907(.A (n_573), .B (n_669), .Q (n_686));
NA2LX1 g21908(.A (n_670), .B (n_803), .Q (n_685));
AN21LX1 g21909(.A (n_661), .B (n_366), .C (n_367), .Q (n_684));
ON21LX1 g21910(.A (n_653), .B (n_389), .C (n_347), .Q (n_683));
AO222LX1 g21911(.A (\result[3]_692 ), .B (n_821), .C (n_820), .D
(\result[3]_782 ), .E (\result[3]_684 ), .F (n_836), .Q (n_682));
INLX3 g21912(.A (n_681), .Q (\result[6]_703 ));
HAALX1 g21913(.A (n_644), .B (n_326), .S (n_681), .CO (n_680));
INLX1 g21914(.A (n_679), .Q (\result[6]_687 ));
INLX1 g21916(.A (n_678), .Q (n_879));
HAALX1 g21917(.A (n_642), .B (n_303), .S (n_679), .CO (n_678));
INLX2 g21918(.A (n_677), .Q (\result[6]_695 ));
HAALX1 g21920(.A (n_640), .B (n_322), .S (n_677), .CO (n_676));
HAALX1 g21921(.A (n_639), .B (alu_a[6]), .S (\result[6]_663 ), .CO
(n_675));
HAALX1 g21922(.A (n_637), .B (alu_x[6]), .S (\result[6]_671 ), .CO
(n_674));
HAALX1 g21923(.A (n_638), .B (alu_y[6]), .S (\result[6]_679 ), .CO
(n_673));
AO222LX1 g21924(.A (\result[5]_694 ), .B (n_821), .C (n_836), .D
(\result[5]_686 ), .E (n_360), .F (n_826), .Q (n_672));
AN22LX1 g21925(.A (\result[4]_791 ), .B (n_819), .C (n_827), .D
(alu_y[4]), .Q (n_671));
MU2LX1 g21926(.S (n_323), .IN0 (n_656), .IN1 (\A[0] ), .Q (n_848));
EO2LX1 g21927(.A (\result[7]_5789 ), .B (n_658), .Q (\result[7]_742
));
EO2LX1 g21928(.A (n_404), .B (n_661), .Q (\result[5]_792 ));
EO2LX1 g21929(.A (n_417), .B (n_653), .Q (\result[4]_783 ));
EO2LX1 g21930(.A (n_405), .B (n_659), .Q (\result[6]_793 ));
NA2LX1 g21931(.A (n_801), .B (n_802), .Q (n_670));
AN21LX1 g21932(.A (n_827), .B (alu_y[3]), .C (n_655), .Q (n_669));
NA3LX1 g21933(.A (n_573), .B (n_646), .C (n_611), .Q (n_668));
AO22LX1 g21934(.A (n_830), .B (\result[5]_702 ), .C (n_825), .D
(\result[5]_748 ), .Q (n_667));
INLX1 g21935(.A (n_666), .Q (n_892));
HAALX1 g21937(.A (n_531), .B (n_632), .S (\AL[3] ), .CO (n_666));
INLX1 g21938(.A (n_665), .Q (\AL[3]_803 ));
HAALX1 g21939(.A (n_592), .B (n_630), .S (n_665), .CO (n_664));
AN22LX1 g21940(.A (n_822), .B (\result[5]_678 ), .C (n_823), .D
(\result[5]_670 ), .Q (n_663));
INLX1 g21941(.A (n_662), .Q (n_889));
EO2LX1 g21942(.A (\result[7]_5789 ), .B (n_647), .Q (n_662));
NA2LX1 g21943(.A (n_648), .B (n_369), .Q (n_661));
AN211LX1 g21944(.A (n_831), .B (\A[5] ), .C (n_633), .D (n_636), .Q
(n_660));
AN21LX1 g21945(.A (n_798), .B (n_799), .C (n_441), .Q (n_659));
AN31LX1 g21946(.A (n_341), .B (n_333), .C (n_634), .D (n_443), .Q
(n_658));
AO211LX1 g21947(.A (n_833), .B (\A[2] ), .C (n_608), .D (n_628), .Q
(n_657));
NA5LX1 g21948(.A (n_573), .B (n_624), .C (n_607), .D (n_616), .E
(n_612), .Q (n_656));
AO222LX1 g21949(.A (\A[4] ), .B (n_831), .C (n_819), .D
(\result[3]_790 ), .E (\result[3]_660 ), .F (n_837), .Q (n_655));
AN221LX1 g21950(.A (n_838), .B (\A[2] ), .C (n_829), .D (alu_x[2]),
.E (n_627), .Q (n_654));
INLX2 g21951(.A (n_801), .Q (n_653));
FAALX1 g21953(.A (n_328), .B (alu_x[3]), .CI (n_574), .S
(\result[3]_782 ), .CO (n_801));
AN22LX1 g21954(.A (n_625), .B (n_835), .C (n_832), .D (alu_a[4]), .Q
(n_652));
EO2LX1 g21955(.A (n_423), .B (n_798), .Q (\result[4]_791 ));
EO2LX1 g21956(.A (n_401), .B (n_635), .Q (n_651));
EO2LX1 g21957(.A (n_419), .B (n_634), .Q (n_650));
NO2LX1 g21958(.A (\AL[1] ), .B (\AL[2] ), .Q (n_649));
NA2LX1 g21959(.A (n_798), .B (n_349), .Q (n_648));
AN21LX1 g21960(.A (n_623), .B (\result[6]_757 ), .C (\result[6]_639
), .Q (n_647));
AN221LX1 g21961(.A (n_833), .B (\A[1] ), .C (n_827), .D (alu_y[2]),
.E (n_622), .Q (n_646));
INLX3 g21962(.A (n_645), .Q (\result[5]_702 ));
HAALX1 g21963(.A (n_596), .B (n_302), .S (n_645), .CO (n_644));
INLX2 g21964(.A (n_643), .Q (\result[5]_686 ));
HAALX1 g21965(.A (n_603), .B (n_306), .S (n_643), .CO (n_642));
INLX3 g21966(.A (n_641), .Q (\result[5]_694 ));
HAALX1 g21967(.A (n_600), .B (n_308), .S (n_641), .CO (n_640));
HAALX1 g21968(.A (n_602), .B (alu_a[5]), .S (\result[5]_662 ), .CO
(n_639));
HAALX1 g21969(.A (n_599), .B (alu_y[5]), .S (\result[5]_678 ), .CO
(n_638));
HAALX1 g21970(.A (n_598), .B (alu_x[5]), .S (\result[5]_670 ), .CO
(n_637));
AO222LX1 g21971(.A (\result[4]_701 ), .B (n_830), .C (n_371), .D
(n_828), .E (\result[4]_677 ), .F (n_822), .Q (n_636));
AND2LX1 g21972(.A (n_615), .B (n_571), .Q (n_903));
ON21LX1 g21973(.A (n_609), .B (n_416), .C (n_442), .Q (n_635));
ON21LX1 g21974(.A (n_609), .B (n_387), .C (n_344), .Q (n_634));
AO222LX1 g21975(.A (\AH[0] ), .B (n_825), .C (\result[4]_669 ), .D
(n_823), .E (n_356), .F (n_826), .Q (n_633));
FAALX1 g21976(.A (n_328), .B (alu_y[3]), .CI (n_546), .S
(\result[3]_790 ), .CO (n_798));
HAALX1 g21977(.A (n_495), .B (n_577), .S (\AL[2] ), .CO (n_632));
INLX1 g21978(.A (n_631), .Q (\AL[2]_802 ));
HAALX1 g21980(.A (n_556), .B (n_575), .S (n_631), .CO (n_630));
AN22LX1 g21981(.A (n_833), .B (\A[3] ), .C (n_837), .D
(\result[4]_661 ), .Q (n_629));
AO222LX1 g21982(.A (\result[3]_700 ), .B (n_830), .C (n_835), .D
(n_593), .E (\result[3]_668 ), .F (n_823), .Q (n_628));
AO222LX1 g21983(.A (\result[2]_691 ), .B (n_821), .C (n_820), .D
(\result[2]_781 ), .E (\result[2]_683 ), .F (n_836), .Q (n_627));
AO22LX1 g21984(.A (n_821), .B (\result[4]_693 ), .C (n_836), .D
(\result[4]_685 ), .Q (n_626));
EO2LX1 g21985(.A (\AH[0] ), .B (n_609), .Q (n_625));
NA2LX1 g21986(.A (n_614), .B (n_583), .Q (n_886));
NA2LX1 g21987(.A (n_614), .B (n_550), .Q (n_887));
NO2LX1 g21988(.A (n_323), .B (n_613), .Q (n_885));
NA2LX1 g21989(.A (n_614), .B (n_590), .Q (n_888));
AN21LX1 g21990(.A (n_827), .B (alu_y[0]), .C (n_605), .Q (n_624));
ON21LX1 g21991(.A (n_589), .B (n_904), .C (n_806), .Q (n_623));
AO221LX1 g21992(.A (\result[2]_789 ), .B (n_819), .C (\result[2]_675
), .D (n_822), .E (n_606), .Q (n_622));
AN221LX1 g21993(.A (n_829), .B (alu_x[1]), .C (n_838), .D (\A[1] ),
.E (n_581), .Q (n_621));
AN221LX1 g21994(.A (n_833), .B (\A[0] ), .C (n_827), .D (alu_y[1]),
.E (n_586), .Q (n_620));
AN222LX1 g21995(.A (\A[6] ), .B (n_838), .C (n_817), .D (alu_a[5]),
.E (alu_a[7]), .F (n_818), .Q (n_619));
AN222LX1 g21996(.A (\A[4] ), .B (n_838), .C (n_817), .D (alu_a[3]),
.E (alu_a[5]), .F (n_818), .Q (n_618));
AO222LX1 g21997(.A (\A[3] ), .B (n_838), .C (alu_x[3]), .D (n_829),
.E (alu_a[4]), .F (n_818), .Q (n_617));
AN222LX1 g21998(.A (\A[0] ), .B (n_838), .C (n_829), .D (alu_x[0]),
.E (alu_status[0]), .F (n_516), .Q (n_616));
EO2LX1 g21999(.A (n_401), .B (n_585), .Q (n_890));
EO2LX1 g22000(.A (n_419), .B (n_589), .Q (n_615));
NA2I1LX1 g22001(.B (alu_enable), .AN (n_582), .Q (n_614));
NA2LX1 g22002(.A (n_572), .B (n_551), .Q (n_922));
OA211LX1 g22003(.A (n_551), .B (n_314), .C (n_584), .D (n_568), .Q
(n_613));
AN211LX1 g22004(.A (n_831), .B (\A[1] ), .C (n_533), .D (n_578), .Q
(n_612));
AN21LX1 g22005(.A (n_832), .B (alu_a[2]), .C (n_588), .Q (n_611));
AN21LX1 g22006(.A (n_832), .B (alu_a[1]), .C (n_587), .Q (n_610));
INLX1 g22007(.A (n_609), .Q (n_906));
AN21LX1 g22010(.A (n_567), .B (n_345), .C (n_380), .Q (n_609));
NA2LX1 g22011(.A (n_579), .B (n_552), .Q (n_608));
AN221LX1 g22012(.A (n_818), .B (alu_a[1]), .C (n_832), .D (alu_a[0]),
.E (n_563), .Q (n_607));
AO22LX1 g22013(.A (n_835), .B (n_555), .C (n_830), .D (\result[2]_699
), .Q (n_606));
AO211LX1 g22014(.A (n_828), .B (n_350), .C (n_564), .D (n_534), .Q
(n_605));
INLX2 g22015(.A (n_604), .Q (\result[4]_685 ));
HAALX1 g22016(.A (n_544), .B (n_307), .S (n_604), .CO (n_603));
HAALX1 g22017(.A (n_543), .B (alu_a[4]), .S (\result[4]_661 ), .CO
(n_602));
INLX2 g22018(.A (n_601), .Q (\result[4]_693 ));
HAALX1 g22019(.A (n_541), .B (n_310), .S (n_601), .CO (n_600));
HAALX1 g22020(.A (n_540), .B (alu_y[4]), .S (\result[4]_677 ), .CO
(n_599));
HAALX1 g22021(.A (n_539), .B (alu_x[4]), .S (\result[4]_669 ), .CO
(n_598));
INLX2 g22022(.A (n_597), .Q (\result[4]_701 ));
HAALX1 g22023(.A (n_537), .B (n_311), .S (n_597), .CO (n_596));
AN22LX1 g22024(.A (n_832), .B (alu_a[5]), .C (n_827), .D (alu_y[5]),
.Q (n_595));
AN22LX1 g22025(.A (n_832), .B (alu_a[6]), .C (n_827), .D (alu_y[6]),
.Q (n_594));
INLX1 g22026(.A (n_592), .Q (n_593));
EO2LX1 g22027(.A (\result[3]_746 ), .B (n_567), .Q (n_592));
EO2LX1 g22028(.A (\AH[4] ), .B (n_570), .Q (n_591));
NA2LX1 g22029(.A (n_871), .B (alu_enable), .Q (n_590));
AND2LX1 g22030(.A (n_559), .B (n_358), .Q (n_838));
AN21LX1 g22031(.A (n_853), .B (n_356), .C (n_371), .Q (n_589));
NA2LX1 g22032(.A (n_569), .B (n_562), .Q (n_588));
NA2LX1 g22033(.A (n_566), .B (n_565), .Q (n_587));
NA2I1LX1 g22034(.B (n_547), .AN (n_561), .Q (n_586));
AN21LX1 g22035(.A (n_853), .B (n_812), .C (n_450), .Q (n_585));
AO21LX1 g22036(.A (n_850), .B (n_454), .C (n_921), .Q (n_584));
ON21LX1 g22037(.A (n_509), .B (n_875), .C (alu_enable), .Q (n_583));
ON22LX1 g22038(.A (n_528), .B (n_504), .C (n_514), .D (n_553), .Q
(n_582));
AO222LX1 g22039(.A (\result[1]_780 ), .B (n_820), .C (\result[1]_690
), .D (n_821), .E (\result[1]_682 ), .F (n_836), .Q (n_581));
AO222LX1 g22040(.A (\A[6] ), .B (n_831), .C (\A[4] ), .D (n_833), .E
(n_334), .F (n_828), .Q (n_580));
AN222LX1 g22041(.A (\result[3]_746 ), .B (n_825), .C (n_826), .D
(n_386), .E (\result[3]_676 ), .F (n_822), .Q (n_579));
AO222LX1 g22042(.A (n_321), .B (n_822), .C (\AL[0] ), .D (n_824), .E
(n_299), .F (n_836), .Q (n_578));
HAALX1 g22043(.A (n_498), .B (n_520), .S (\AL[1] ), .CO (n_577));
INLX1 g22044(.A (n_576), .Q (\AL[1]_801 ));
HAALX1 g22046(.A (n_499), .B (n_485), .S (n_576), .CO (n_575));
FAALX1 g22047(.A (n_319), .B (alu_x[2]), .CI (n_479), .S
(\result[2]_781 ), .CO (n_574));
AN22LX1 g22048(.A (n_535), .B (n_525), .C (n_477), .D (n_394), .Q
(n_573));
NO3LX1 g22049(.A (n_549), .B (n_873), .C (n_875), .Q (n_572));
EO2LX1 g22050(.A (\AH[0] ), .B (n_853), .Q (n_571));
AND2LX1 g22051(.A (n_532), .B (n_494), .Q (n_570));
NA2I1LX1 g22052(.B (n_505), .AN (n_873), .Q (n_871));
AN21LX1 g22053(.A (n_837), .B (\result[2]_659 ), .C (n_548), .Q
(n_569));
AN211LX1 g22054(.A (n_403), .B (alu_opcode[2]), .C (n_891), .D
(n_509), .Q (n_568));
AO21LX1 g22055(.A (n_474), .B (n_850), .C (n_551), .Q (n_921));
AN21LX1 g22056(.A (n_523), .B (n_348), .C (n_368), .Q (n_567));
NO2LX1 g22057(.A (n_513), .B (n_536), .Q (n_566));
AN21LX1 g22058(.A (n_831), .B (\A[2] ), .C (n_554), .Q (n_565));
AO22LX1 g22059(.A (n_834), .B (n_28), .C (n_826), .D (\result[0]_751
), .Q (n_564));
AO221LX1 g22060(.A (n_299), .B (n_837), .C (n_312), .D (n_823), .E
(n_506), .Q (n_563));
AN22LX1 g22061(.A (n_831), .B (\A[3] ), .C (n_828), .D
(\result[2]_635 ), .Q (n_562));
AO22LX1 g22062(.A (n_819), .B (\result[1]_788 ), .C (n_822), .D
(\result[1]_674 ), .Q (n_561));
AN22LX1 g22063(.A (n_817), .B (alu_a[4]), .C (n_818), .D (alu_a[6]),
.Q (n_560));
ON32LX1 g22064(.A (n_320), .B (n_420), .C (n_402), .D (n_919), .E
(n_519), .Q (n_559));
AN22LX1 g22065(.A (n_817), .B (alu_a[0]), .C (n_818), .D (alu_a[2]),
.Q (n_558));
ON22LX1 g22066(.A (n_522), .B (n_373), .C (n_491), .D (n_422), .Q
(n_832));
AN22LX1 g22067(.A (n_817), .B (alu_a[1]), .C (n_818), .D (alu_a[3]),
.Q (n_557));
INLX1 g22068(.A (n_555), .Q (n_556));
EO2LX1 g22069(.A (\result[2]_745 ), .B (n_523), .Q (n_555));
NO2I1LX1 g22070(.B (n_810), .AN (n_828), .Q (n_554));
NO2LX1 g22071(.A (n_880), .B (n_518), .Q (n_827));
NA2LX1 g22072(.A (n_850), .B (n_314), .Q (n_553));
AND2LX1 g22073(.A (n_517), .B (n_787), .Q (n_875));
NA2LX1 g22074(.A (n_828), .B (\result[3]_636 ), .Q (n_552));
ON21LX1 g22075(.A (n_507), .B (n_408), .C (n_524), .Q (n_873));
ON21LX1 g22076(.A (n_510), .B (n_811), .C (n_332), .Q (n_853));
ON21LX1 g22077(.A (n_511), .B (n_808), .C (n_807), .Q (\AH[4] ));
NO2LX1 g22078(.A (n_504), .B (n_528), .Q (n_551));
NA2LX1 g22079(.A (n_526), .B (alu_enable), .Q (n_550));
NA3I1LX1 g22080(.B (n_928), .C (n_374), .AN (n_851), .Q (n_549));
AO222LX1 g22081(.A (\result[2]_745 ), .B (n_825), .C (\result[2]_667
), .D (n_823), .E (n_372), .F (n_826), .Q (n_548));
AN21LX1 g22082(.A (n_830), .B (n_432), .C (n_530), .Q (n_547));
FAALX1 g22083(.A (n_319), .B (alu_y[2]), .CI (n_480), .S
(\result[2]_789 ), .CO (n_546));
INLX2 g22084(.A (n_545), .Q (\result[3]_684 ));
HAALX1 g22085(.A (n_467), .B (n_328), .S (n_545), .CO (n_544));
HAALX1 g22086(.A (n_469), .B (alu_a[3]), .S (\result[3]_660 ), .CO
(n_543));
INLX3 g22087(.A (n_542), .Q (\result[3]_692 ));
HAALX1 g22088(.A (n_465), .B (n_329), .S (n_542), .CO (n_541));
HAALX1 g22089(.A (n_464), .B (alu_y[3]), .S (\result[3]_676 ), .CO
(n_540));
HAALX1 g22090(.A (n_463), .B (alu_x[3]), .S (\result[3]_668 ), .CO
(n_539));
INLX3 g22091(.A (n_538), .Q (\result[3]_700 ));
HAALX1 g22092(.A (n_470), .B (n_297), .S (n_538), .CO (n_537));
AO222LX1 g22093(.A (\result[1]_744 ), .B (n_825), .C (n_412), .D
(n_823), .E (n_365), .F (n_826), .Q (n_536));
ON321LX1 g22094(.A (alu_opcode[2]), .B (alu_opcode[0]), .C (n_881),
.D (n_462), .E (n_496), .F (n_445), .Q (n_535));
AO21LX1 g22095(.A (n_830), .B (n_321), .C (n_529), .Q (n_534));
AO21LX1 g22096(.A (n_821), .B (n_312), .C (n_527), .Q (n_533));
EO2LX1 g22097(.A (n_407), .B (n_511), .Q (n_532));
EO2LX1 g22098(.A (n_410), .B (n_510), .Q (n_531));
NO2I1LX1 g22099(.B (n_499), .AN (n_835), .Q (n_530));
AND2LX1 g22100(.A (n_512), .B (n_378), .Q (n_817));
OR2LX1 g22102(.A (n_840), .B (n_839), .Q (n_831));
NO2I1LX1 g22103(.B (n_793), .AN (n_819), .Q (n_529));
AND2LX1 g22104(.A (n_503), .B (n_501), .Q (n_528));
NO2I1LX1 g22105(.B (n_908), .AN (n_820), .Q (n_527));
OR2LX1 g22106(.A (n_893), .B (n_899), .Q (n_833));
NA2I1LX1 g22107(.B (n_928), .AN (n_900), .Q (n_526));
AND2LX1 g22108(.A (n_512), .B (n_351), .Q (n_818));
NA2LX1 g22109(.A (n_426), .B (n_500), .Q (n_850));
ON31LX1 g22110(.A (alu_opcode[3]), .B (n_373), .C (n_484), .D
(n_481), .Q (n_829));
ON21LX1 g22111(.A (n_452), .B (alu_opcode[3]), .C (n_502), .Q
(n_525));
NA2LX1 g22112(.A (n_515), .B (n_424), .Q (n_524));
ON332LX1 g22113(.A (n_316), .B (alu_x[0]), .C (n_337), .D (n_343), .E
(n_299), .F (alu_a[1]), .G (n_429), .H (n_392), .Q
(\result[1]_780 ));
NA2LX1 g22114(.A (n_923), .B (n_459), .Q (n_828));
ON322LX1 g22115(.A (n_353), .B (n_299), .C (alu_a[1]), .D (n_431), .E
(n_337), .F (n_440), .G (n_393), .Q (\result[1]_788 ));
AN211LX1 g22116(.A (n_337), .B (\A[1] ), .C (n_335), .D (n_487), .Q
(n_523));
OA222LX1 g22117(.A (n_376), .B (n_473), .C (alu_opcode[3]), .D
(n_449), .E (n_394), .F (n_413), .Q (n_522));
HAALX1 g22119(.A (n_854), .B (alu_status[0]), .S (\AL[0] ), .CO
(n_520));
AN22LX1 g22120(.A (n_486), .B (n_351), .C (n_384), .D (n_434), .Q
(n_519));
AN22LX1 g22121(.A (n_455), .B (n_788), .C (n_482), .D (n_390), .Q
(n_518));
ON31LX1 g22122(.A (alu_opcode[6]), .B (n_295), .C (n_420), .D
(n_508), .Q (n_891));
ON21LX1 g22123(.A (n_488), .B (n_385), .C (n_476), .Q (n_517));
OR2LX1 g22124(.A (n_895), .B (n_893), .Q (n_516));
NO2I1LX1 g22125(.B (n_484), .AN (n_351), .Q (n_897));
NO2I1LX1 g22126(.B (n_484), .AN (n_378), .Q (n_898));
NO2LX1 g22127(.A (n_446), .B (n_483), .Q (n_804));
NA2LX1 g22128(.A (n_491), .B (n_488), .Q (n_515));
OR2LX1 g22129(.A (n_896), .B (n_839), .Q (n_872));
NO2LX1 g22130(.A (n_295), .B (n_478), .Q (n_851));
AND2LX1 g22131(.A (n_424), .B (n_486), .Q (n_822));
INLX2 g22132(.A (n_514), .Q (n_920));
NO2LX1 g22133(.A (n_454), .B (n_474), .Q (n_514));
NO2I1LX1 g22134(.B (n_488), .AN (n_424), .Q (n_821));
NO2LX1 g22135(.A (n_358), .B (n_484), .Q (n_836));
NO2I1LX1 g22136(.B (\result[1]_682 ), .AN (n_837), .Q (n_513));
AND2LX1 g22137(.A (n_414), .B (n_486), .Q (n_819));
NO2I1LX1 g22138(.B (n_491), .AN (n_424), .Q (n_823));
AND2LX1 g22139(.A (n_482), .B (n_314), .Q (n_900));
NO2I1LX1 g22140(.B (n_491), .AN (n_414), .Q (n_820));
NA2LX1 g22141(.A (n_456), .B (n_484), .Q (n_512));
NO2LX1 g22142(.A (n_488), .B (n_422), .Q (n_840));
AN21LX1 g22143(.A (n_450), .B (\result[6]_757 ), .C (\result[6]_639
), .Q (n_511));
AN21LX1 g22144(.A (n_451), .B (n_372), .C (\result[2]_635 ), .Q
(n_510));
INLX1 g22146(.A (n_927), .Q (n_509));
AO211LX1 g22147(.A (n_352), .B (n_295), .C (n_437), .D (n_478), .Q
(n_927));
NA3I1LX1 g22148(.B (n_378), .C (alu_opcode[2]), .AN (n_491), .Q
(n_923));
NA3I1LX1 g22149(.B (n_351), .C (n_434), .AN (n_919), .Q (n_508));
AN21LX1 g22150(.A (n_374), .B (n_330), .C (n_406), .Q (n_507));
OA21LX1 g22151(.A (n_835), .B (n_825), .C (n_854), .Q (n_506));
ON21LX1 g22152(.A (n_852), .B (n_788), .C (alu_opcode[1]), .Q
(n_505));
AND2LX1 g22153(.A (n_394), .B (n_493), .Q (n_504));
NA2LX1 g22154(.A (n_492), .B (n_475), .Q (n_503));
NO3I2LX1 g22155(.C (n_488), .AN (n_918), .BN (n_787), .Q (n_899));
NO3LX1 g22156(.A (n_478), .B (n_352), .C (alu_opcode[2]), .Q (n_878));
NO3I2LX1 g22157(.C (n_385), .AN (n_486), .BN (n_787), .Q (n_830));
NA4LX1 g22158(.A (n_894), .B (n_902), .C (n_330), .D (n_314), .Q
(n_928));
AN321LX1 g22159(.A (alu_opcode[1]), .B (n_331), .C (n_357), .D
(n_391), .E (n_378), .F (n_433), .Q (n_502));
ON222LX1 g22160(.A (n_376), .B (n_358), .C (alu_opcode[0]), .D
(n_427), .E (n_300), .F (n_295), .Q (n_501));
OA211LX1 g22161(.A (n_787), .B (n_320), .C (n_361), .D (n_330), .Q
(n_500));
EO2LX1 g22162(.A (n_362), .B (n_439), .Q (n_499));
EO2LX1 g22163(.A (n_350), .B (\result[1]_744 ), .Q (n_498));
EO2LX1 g22164(.A (\result[6]_749 ), .B (n_457), .Q (n_497));
EO2LX1 g22165(.A (alu_opcode[2]), .B (n_455), .Q (n_496));
EO2LX1 g22166(.A (n_451), .B (\result[2]_745 ), .Q (n_495));
EO2LX1 g22167(.A (n_450), .B (\result[6]_749 ), .Q (n_494));
NO2I1LX1 g22168(.B (n_456), .AN (n_378), .Q (n_895));
NA2LX1 g22169(.A (n_434), .B (alu_opcode[7]), .Q (n_493));
NA2I1LX1 g22170(.B (n_406), .AN (n_436), .Q (n_492));
NA2LX1 g22171(.A (n_403), .B (n_437), .Q (n_926));
NA2I1LX1 g22172(.B (n_434), .AN (n_881), .Q (n_491));
INLX1 g22173(.A (n_489), .Q (n_490));
AND2LX1 g22174(.A (n_834), .B (alu_enable), .Q (n_489));
NA2I1LX1 g22175(.B (n_434), .AN (n_331), .Q (n_488));
NO2LX1 g22176(.A (n_358), .B (n_456), .Q (n_837));
NO2I1LX1 g22177(.B (n_438), .AN (\A[0] ), .Q (n_487));
AND2LX1 g22178(.A (n_391), .B (n_434), .Q (n_486));
NO2LX1 g22179(.A (alu_status[0]), .B (n_854), .Q (n_485));
NA2I1LX1 g22180(.B (n_437), .AN (n_331), .Q (n_484));
NO2I1LX1 g22181(.B (n_442), .AN (n_815), .Q (n_483));
NO2I1LX1 g22182(.B (n_456), .AN (n_351), .Q (n_896));
AND2LX1 g22183(.A (n_437), .B (n_374), .Q (n_482));
NO2LX1 g22184(.A (n_408), .B (n_448), .Q (n_839));
NA2LX1 g22185(.A (n_455), .B (n_399), .Q (n_481));
AO211LX1 g22186(.A (n_337), .B (alu_y[1]), .C (n_335), .D (n_398), .Q
(n_480));
AO211LX1 g22187(.A (n_337), .B (alu_x[1]), .C (n_335), .D (n_397), .Q
(n_479));
AO211LX1 g22188(.A (n_325), .B (alu_opcode[7]), .C (n_902), .D
(n_447), .Q (n_478));
ON21LX1 g22189(.A (n_395), .B (alu_opcode[7]), .C (n_295), .Q
(n_477));
NA3LX1 g22190(.A (n_902), .B (n_391), .C (n_788), .Q (n_476));
NO3I2LX1 g22191(.C (n_408), .AN (n_901), .BN (n_787), .Q (n_893));
ON21LX1 g22192(.A (n_295), .B (alu_opcode[7]), .C (n_444), .Q
(n_475));
NO2LX1 g22193(.A (alu_opcode[4]), .B (n_458), .Q (n_474));
NO2LX1 g22194(.A (alu_opcode[2]), .B (n_453), .Q (n_473));
AO21LX1 g22195(.A (n_816), .B (n_333), .C (n_443), .Q (n_472));
INLX3 g22196(.A (n_471), .Q (\result[2]_699 ));
HAALX1 g22197(.A (n_354), .B (n_327), .S (n_471), .CO (n_470));
HAALX1 g22198(.A (n_336), .B (alu_a[2]), .S (\result[2]_659 ), .CO
(n_469));
INLX1 g22199(.A (n_468), .Q (\result[2]_683 ));
HAALX1 g22200(.A (n_335), .B (n_319), .S (n_468), .CO (n_467));
INLX3 g22201(.A (n_466), .Q (\result[2]_691 ));
HAALX1 g22202(.A (n_342), .B (n_304), .S (n_466), .CO (n_465));
HAALX1 g22203(.A (n_364), .B (alu_y[2]), .S (\result[2]_675 ), .CO
(n_464));
HAALX1 g22204(.A (n_339), .B (alu_x[2]), .S (\result[2]_667 ), .CO
(n_463));
MU2LX1 g22205(.S (n_406), .IN0 (alu_opcode[0]), .IN1 (alu_opcode[5]),
.Q (n_462));
EO2LX1 g22206(.A (n_814), .B (n_419), .Q (n_461));
EO2LX1 g22207(.A (n_387), .B (n_419), .Q (n_460));
NA2I1LX1 g22208(.B (n_378), .AN (n_413), .Q (n_459));
NO2LX1 g22209(.A (n_918), .B (n_395), .Q (n_458));
NA2LX1 g22210(.A (n_416), .B (n_379), .Q (n_457));
NA2I1LX1 g22211(.B (alu_opcode[2]), .AN (n_408), .Q (n_456));
NO2I1LX1 g22212(.B (n_402), .AN (n_378), .Q (n_826));
AND2LX1 g22213(.A (n_406), .B (n_295), .Q (n_455));
NA2I1LX1 g22214(.B (n_919), .AN (n_852), .Q (n_454));
NO2I1LX1 g22215(.B (n_413), .AN (n_351), .Q (n_824));
NO2I1LX1 g22216(.B (n_402), .AN (n_351), .Q (n_825));
NO2LX1 g22217(.A (n_390), .B (n_394), .Q (n_453));
NO2LX1 g22218(.A (n_358), .B (n_413), .Q (n_834));
NO2LX1 g22219(.A (n_358), .B (n_402), .Q (n_835));
AN211LX1 g22220(.A (n_318), .B (n_325), .C (n_351), .D (n_403), .Q
(n_452));
ON21LX1 g22221(.A (n_809), .B (n_910), .C (n_810), .Q (n_451));
ON21LX1 g22222(.A (n_904), .B (n_814), .C (n_806), .Q (n_450));
OA21LX1 g22223(.A (n_376), .B (alu_opcode[4]), .C (n_413), .Q
(n_449));
NA3I1LX1 g22224(.B (n_918), .C (alu_opcode[6]), .AN (n_352), .Q
(n_448));
OA21LX1 g22225(.A (n_376), .B (n_318), .C (n_394), .Q (n_447));
AN21LX1 g22226(.A (n_370), .B (n_346), .C (n_359), .Q (n_446));
NA2LX1 g22227(.A (n_394), .B (n_421), .Q (n_445));
ON21LX1 g22228(.A (n_787), .B (alu_opcode[2]), .C (n_377), .Q
(n_444));
NA2LX1 g22229(.A (n_411), .B (n_370), .Q (n_443));
NA2LX1 g22230(.A (n_409), .B (n_341), .Q (n_442));
NO2I1LX1 g22231(.B (n_375), .AN (n_418), .Q (n_803));
INLX1 g22232(.A (n_441), .Q (n_800));
NA2I1LX1 g22233(.B (n_415), .AN (n_367), .Q (n_441));
HAALX1 g22234(.A (alu_a[0]), .B (n_321), .S (n_793), .CO (n_440));
INLX1 g22237(.A (n_439), .Q (\result[1]_744 ));
HAALX1 g22238(.A (n_305), .B (alu_a[1]), .S (n_439), .CO (n_438));
INLX2 g22239(.A (n_396), .Q (n_909));
INLX1 g22241(.A (n_330), .Q (n_788));
HAALX1 g22244(.A (n_295), .B (alu_opcode[2]), .S (n_436), .CO
(n_437));
HAALX1 g22245(.A (n_298), .B (alu_a[7]), .S (n_435), .CO (n_790));
HAALX1 g22246(.A (n_295), .B (n_301), .S (n_433), .CO (n_434));
INLX1 g22247(.A (n_432), .Q (\result[1]_674 ));
INLX1 g22249(.A (n_430), .Q (n_431));
HAALX1 g22250(.A (alu_y[1]), .B (n_321), .S (n_432), .CO (n_430));
HAALX1 g22251(.A (alu_a[0]), .B (n_312), .S (n_908), .CO (n_429));
HAALX1 g22252(.A (n_313), .B (alu_a[7]), .S (n_428), .CO (n_795));
AN22LX1 g22253(.A (n_383), .B (n_352), .C (alu_opcode[4]), .D
(n_300), .Q (n_427));
ON22LX1 g22254(.A (n_919), .B (alu_opcode[5]), .C (alu_opcode[6]), .D
(n_325), .Q (n_894));
EO2LX1 g22255(.A (alu_opcode[5]), .B (n_381), .Q (n_426));
NO2I1LX1 g22256(.B (n_797), .AN (n_796), .Q (n_425));
NO2LX1 g22257(.A (n_919), .B (n_358), .Q (n_424));
AND2LX1 g22258(.A (n_349), .B (n_366), .Q (n_799));
AND2LX1 g22259(.A (n_349), .B (n_369), .Q (n_423));
NA2I1LX1 g22260(.B (n_337), .AN (n_335), .Q (\result[1]_682 ));
NA2I1LX1 g22261(.B (n_918), .AN (n_361), .Q (n_422));
NA2LX1 g22262(.A (n_902), .B (n_318), .Q (n_421));
NO2LX1 g22263(.A (alu_opcode[4]), .B (n_919), .Q (n_420));
INLX2 g22267(.A (\result[5]_748 ), .Q (n_419));
NA2LX1 g22268(.A (n_341), .B (n_379), .Q (\result[5]_748 ));
NO2I1LX1 g22269(.B (n_389), .AN (n_355), .Q (n_802));
NA2I1LX1 g22270(.B (n_355), .AN (n_347), .Q (n_418));
NA2I1LX1 g22271(.B (n_348), .AN (n_368), .Q (\result[2]_745 ));
NO2LX1 g22272(.A (alu_opcode[4]), .B (n_377), .Q (n_901));
NA2I1LX1 g22273(.B (n_347), .AN (n_389), .Q (n_417));
NA2I1LX1 g22274(.B (n_344), .AN (n_387), .Q (\AH[0] ));
INLX1 g22275(.A (n_416), .Q (n_816));
NA2I1LX1 g22277(.B (n_341), .AN (n_387), .Q (n_416));
NO2LX1 g22278(.A (n_904), .B (n_905), .Q (n_812));
NA2I1LX1 g22279(.B (n_366), .AN (n_369), .Q (n_415));
AND2LX1 g22280(.A (n_357), .B (n_919), .Q (n_414));
NA2I1LX1 g22281(.B (alu_opcode[0]), .AN (n_881), .Q (n_413));
INLX1 g22282(.A (\result[1]_690 ), .Q (n_412));
NA2I1LX1 g22283(.B (n_343), .AN (n_339), .Q (\result[1]_690 ));
AND2LX1 g22284(.A (n_855), .B (n_318), .Q (n_852));
NO2I1LX1 g22285(.B (n_359), .AN (n_333), .Q (n_815));
NA2I1LX1 g22286(.B (n_358), .AN (n_378), .Q (n_868));
NA2I1LX1 g22287(.B (n_333), .AN (n_379), .Q (n_411));
INLX1 g22288(.A (\result[3]_746 ), .Q (n_410));
NA2I1LX1 g22289(.B (n_345), .AN (n_380), .Q (\result[3]_746 ));
NA2LX1 g22290(.A (n_344), .B (n_379), .Q (n_409));
NA2I1LX1 g22291(.B (alu_opcode[1]), .AN (n_376), .Q (n_408));
INLX1 g22292(.A (\result[7]_5789 ), .Q (n_407));
NA2I1LX1 g22293(.B (n_346), .AN (n_359), .Q (\result[7]_5789 ));
NO2LX1 g22294(.A (n_300), .B (n_373), .Q (n_406));
NA2I1LX1 g22295(.B (n_791), .AN (n_792), .Q (n_405));
NO2I1LX1 g22296(.B (n_367), .AN (n_366), .Q (n_404));
AND2LX1 g22297(.A (\result[6]_757 ), .B (n_340), .Q (n_805));
NO2LX1 g22298(.A (n_314), .B (n_374), .Q (n_403));
NA2LX1 g22299(.A (n_391), .B (alu_opcode[0]), .Q (n_402));
INLX1 g22300(.A (\result[6]_749 ), .Q (n_401));
NA2LX1 g22302(.A (n_333), .B (n_370), .Q (\result[6]_749 ));
NO2I1LX1 g22303(.B (n_375), .AN (n_355), .Q (n_400));
ON21LX1 g22304(.A (n_295), .B (n_325), .C (alu_opcode[7]), .Q
(n_924));
AO21LX1 g22305(.A (n_299), .B (\A[0] ), .C (n_362), .Q (n_854));
AN21LX1 g22306(.A (alu_opcode[2]), .B (alu_opcode[4]), .C (n_331), .Q
(n_399));
ON21LX1 g22307(.A (alu_a[1]), .B (n_321), .C (n_363), .Q (n_398));
ON21LX1 g22308(.A (alu_a[1]), .B (n_312), .C (n_338), .Q (n_397));
AN21LX1 g22309(.A (alu_opcode[2]), .B (n_301), .C (n_788), .Q
(n_396));
EO2LX1 g22310(.A (alu_opcode[2]), .B (alu_opcode[6]), .Q (n_395));
EO2LX1 g22311(.A (n_314), .B (alu_opcode[0]), .Q (n_394));
EO2LX1 g22312(.A (alu_y[1]), .B (n_309), .Q (n_393));
EO2LX1 g22313(.A (alu_x[1]), .B (n_309), .Q (n_392));
INLX1 g22315(.A (n_880), .Q (n_391));
NA2LX1 g22318(.A (n_314), .B (n_325), .Q (n_880));
NO2LX1 g22319(.A (n_320), .B (n_296), .Q (n_855));
NA2LX1 g22320(.A (alu_opcode[3]), .B (alu_opcode[4]), .Q (n_390));
NO2LX1 g22321(.A (alu_x[4]), .B (n_307), .Q (n_389));
INLX1 g22322(.A (n_807), .Q (n_388));
NA2LX1 g22323(.A (alu_a[7]), .B (\A[7] ), .Q (n_807));
NO2LX1 g22324(.A (\A[4] ), .B (n_307), .Q (n_387));
INLX1 g22325(.A (n_386), .Q (n_811));
NA2I1LX1 g22327(.B (n_328), .AN (\A[3] ), .Q (n_386));
NA2LX1 g22328(.A (n_296), .B (alu_opcode[7]), .Q (n_385));
NA2I1LX1 g22329(.B (n_299), .AN (\A[0] ), .Q (\result[0]_751 ));
INLX1 g22330(.A (n_383), .Q (n_384));
NA2LX1 g22331(.A (alu_opcode[5]), .B (alu_opcode[7]), .Q (n_383));
NA2LX1 g22332(.A (n_323), .B (\A[5] ), .Q (n_382));
NA2LX1 g22333(.A (n_318), .B (n_301), .Q (n_911));
NO2LX1 g22334(.A (alu_opcode[6]), .B (n_300), .Q (n_787));
NA2LX1 g22335(.A (alu_opcode[5]), .B (n_314), .Q (n_881));
NA2LX1 g22336(.A (n_303), .B (alu_y[6]), .Q (n_791));
NA2LX1 g22337(.A (n_300), .B (n_296), .Q (n_381));
AND2LX1 g22338(.A (n_328), .B (\A[3] ), .Q (n_380));
NA2LX1 g22339(.A (n_306), .B (\A[5] ), .Q (n_379));
NO2LX1 g22340(.A (alu_opcode[7]), .B (alu_opcode[6]), .Q (n_378));
NO2LX1 g22341(.A (alu_x[6]), .B (n_303), .Q (n_797));
INLX1 g22344(.A (n_377), .Q (n_918));
NA2LX1 g22347(.A (n_320), .B (n_296), .Q (n_377));
NA2LX1 g22348(.A (n_295), .B (alu_opcode[5]), .Q (n_376));
NO2LX1 g22349(.A (n_315), .B (n_303), .Q (\result[6]_639 ));
NO2LX1 g22350(.A (n_308), .B (alu_a[5]), .Q (n_375));
INLX1 g22351(.A (n_373), .Q (n_374));
NA2LX1 g22355(.A (alu_opcode[7]), .B (n_318), .Q (n_373));
INLX1 g22356(.A (n_372), .Q (n_907));
NA2I1LX1 g22357(.B (n_319), .AN (\A[2] ), .Q (n_372));
INLX1 g22359(.A (n_814), .Q (n_371));
NA2LX1 g22360(.A (alu_a[4]), .B (\A[4] ), .Q (n_814));
NA2LX1 g22361(.A (n_303), .B (\A[6] ), .Q (n_370));
NA2LX1 g22362(.A (n_303), .B (alu_x[6]), .Q (n_796));
NA2LX1 g22363(.A (n_307), .B (alu_y[4]), .Q (n_369));
NO2LX1 g22364(.A (\A[2] ), .B (n_319), .Q (n_368));
NO2LX1 g22365(.A (n_302), .B (alu_a[5]), .Q (n_367));
NA2LX1 g22366(.A (alu_a[5]), .B (n_302), .Q (n_366));
INLX1 g22367(.A (n_365), .Q (n_809));
NA2LX1 g22369(.A (n_309), .B (n_305), .Q (n_365));
INLX1 g22370(.A (n_363), .Q (n_364));
NA2LX1 g22371(.A (alu_y[0]), .B (alu_y[1]), .Q (n_363));
NA2LX1 g22372(.A (alu_opcode[2]), .B (n_320), .Q (n_912));
NO2LX1 g22373(.A (\A[0] ), .B (n_299), .Q (n_362));
NA2LX1 g22374(.A (alu_opcode[6]), .B (alu_opcode[3]), .Q (n_361));
INLX1 g22375(.A (n_360), .Q (n_904));
NA2I1LX1 g22379(.B (n_306), .AN (\A[5] ), .Q (n_360));
NO2I1LX1 g22380(.B (\A[7] ), .AN (alu_a[7]), .Q (n_359));
NO2LX1 g22381(.A (alu_opcode[6]), .B (alu_opcode[3]), .Q (n_884));
INLX1 g22383(.A (n_358), .Q (n_357));
NA2LX1 g22384(.A (alu_opcode[6]), .B (alu_opcode[7]), .Q (n_358));
INLX1 g22385(.A (n_356), .Q (n_905));
NA2I1LX1 g22387(.B (n_307), .AN (\A[4] ), .Q (n_356));
NA2LX1 g22388(.A (alu_a[5]), .B (n_308), .Q (n_355));
INLX1 g22389(.A (n_353), .Q (n_354));
NA2I1LX1 g22390(.B (n_321), .AN (alu_y[1]), .Q (n_353));
NO2LX1 g22391(.A (alu_y[6]), .B (n_303), .Q (n_792));
NA2LX1 g22392(.A (alu_opcode[3]), .B (n_301), .Q (n_352));
NA2LX1 g22393(.A (alu_a[1]), .B (\A[1] ), .Q (n_810));
NA2LX1 g22394(.A (n_303), .B (n_315), .Q (\result[6]_757 ));
NO2LX1 g22395(.A (alu_opcode[7]), .B (n_318), .Q (n_351));
INLX2 g22396(.A (n_910), .Q (n_350));
NA2LX1 g22398(.A (alu_a[0]), .B (\A[0] ), .Q (n_910));
NA2LX1 g22399(.A (alu_a[4]), .B (n_311), .Q (n_349));
NA2LX1 g22400(.A (n_319), .B (\A[2] ), .Q (n_348));
NA2LX1 g22401(.A (n_307), .B (alu_x[4]), .Q (n_347));
NA2LX1 g22402(.A (n_317), .B (\A[7] ), .Q (n_346));
NA2I1LX1 g22403(.B (alu_a[3]), .AN (\A[3] ), .Q (n_345));
NA2LX1 g22404(.A (n_307), .B (\A[4] ), .Q (n_344));
INLX1 g22405(.A (n_343), .Q (n_342));
NA2LX1 g22406(.A (n_312), .B (n_316), .Q (n_343));
NA2I1LX1 g22407(.B (alu_a[5]), .AN (\A[5] ), .Q (n_341));
INLX1 g22408(.A (n_340), .Q (n_808));
NA2I1LX1 g22410(.B (n_317), .AN (\A[7] ), .Q (n_340));
NO2LX1 g22411(.A (n_320), .B (alu_opcode[0]), .Q (n_902));
INLX1 g22413(.A (n_338), .Q (n_339));
NA2LX1 g22414(.A (alu_x[0]), .B (alu_x[1]), .Q (n_338));
AND2LX1 g22415(.A (alu_a[2]), .B (\A[2] ), .Q (\result[2]_635 ));
INLX1 g22416(.A (n_337), .Q (n_336));
NA2LX1 g22417(.A (alu_a[1]), .B (alu_a[0]), .Q (n_337));
NO2LX1 g22418(.A (alu_a[0]), .B (alu_a[1]), .Q (n_335));
NA2LX1 g22419(.A (n_296), .B (alu_opcode[3]), .Q (n_919));
INLX1 g22420(.A (n_806), .Q (n_334));
NA2LX1 g22421(.A (alu_a[5]), .B (\A[5] ), .Q (n_806));
NA2LX1 g22422(.A (alu_a[6]), .B (n_315), .Q (n_333));
INLX1 g22423(.A (n_332), .Q (\result[3]_636 ));
NA2LX1 g22425(.A (alu_a[3]), .B (\A[3] ), .Q (n_332));
NA2LX1 g22426(.A (alu_opcode[1]), .B (n_325), .Q (n_331));
NA2LX1 g22427(.A (n_317), .B (alu_y[7]), .Q (n_789));
NA2LX1 g22428(.A (n_317), .B (alu_x[7]), .Q (n_794));
NA2LX1 g22430(.A (n_296), .B (alu_opcode[4]), .Q (n_330));
INLX1 g22431(.A (alu_x[3]), .Q (n_329));
INLX3 g22433(.A (alu_a[3]), .Q (n_328));
INLX1 g22437(.A (alu_y[2]), .Q (n_327));
INLX1 g22438(.A (alu_y[6]), .Q (n_326));
INLX1 g22442(.A (alu_opcode[5]), .Q (n_325));
INLX1 g22451(.A (alu_status[3]), .Q (n_324));
INLX3 g22470(.A (alu_enable), .Q (n_323));
INLX1 g22475(.A (alu_x[6]), .Q (n_322));
INLX1 g22478(.A (alu_y[0]), .Q (n_321));
INLX2 g22487(.A (alu_opcode[7]), .Q (n_320));
INLX2 g22490(.A (alu_a[2]), .Q (n_319));
INLX1 g22496(.A (alu_opcode[6]), .Q (n_318));
INLX2 g22501(.A (alu_a[7]), .Q (n_317));
INLX1 g22506(.A (alu_x[1]), .Q (n_316));
INLX1 g22508(.A (\A[6] ), .Q (n_315));
INLX2 g22516(.A (alu_opcode[1]), .Q (n_314));
INLX1 g22519(.A (alu_x[7]), .Q (n_313));
INLX1 g22520(.A (alu_x[0]), .Q (n_312));
INLX1 g22526(.A (alu_y[4]), .Q (n_311));
INLX1 g22527(.A (alu_x[4]), .Q (n_310));
INLX3 g22528(.A (alu_a[1]), .Q (n_309));
INLX1 g22532(.A (alu_x[5]), .Q (n_308));
INLX2 g22538(.A (alu_a[4]), .Q (n_307));
INLX2 g22543(.A (alu_a[5]), .Q (n_306));
INLX1 g22545(.A (\A[1] ), .Q (n_305));
INLX1 g22546(.A (alu_x[2]), .Q (n_304));
INLX2 g22548(.A (alu_a[6]), .Q (n_303));
INLX1 g22556(.A (alu_y[5]), .Q (n_302));
INLX1 g22558(.A (alu_opcode[4]), .Q (n_301));
INLX1 g22566(.A (alu_opcode[3]), .Q (n_300));
INLX2 g22569(.A (alu_a[0]), .Q (n_299));
INLX1 g22574(.A (alu_y[7]), .Q (n_298));
INLX1 g22575(.A (alu_y[3]), .Q (n_297));
INLX2 g22578(.A (alu_opcode[2]), .Q (n_296));
INLX2 g22585(.A (alu_opcode[0]), .Q (n_295));
BULX8 g22593(.A (n_582), .Q (n_925));
SDFRRAQLX1 \A_reg[0] (.RN (reset_n), .C (rc_gclk), .D (n_143), .SD
(DFT_sdi), .SE (RC_CG_TEST_PORT), .Q (\A[0] ));
SDFRRAQLX1 \A_reg[1] (.RN (reset_n), .C (rc_gclk), .D (n_149), .SD
(\A[0] ), .SE (RC_CG_TEST_PORT), .Q (\A[1] ));
SDFRRAQLX1 \A_reg[2] (.RN (reset_n), .C (rc_gclk), .D (n_151), .SD
(\A[1] ), .SE (RC_CG_TEST_PORT), .Q (\A[2] ));
SDFRRAQLX1 \A_reg[3] (.RN (reset_n), .C (rc_gclk), .D (n_152), .SD
(\A[2] ), .SE (RC_CG_TEST_PORT), .Q (\A[3] ));
SDFRRAQLX1 \A_reg[4] (.RN (reset_n), .C (rc_gclk), .D (n_150), .SD
(\A[3] ), .SE (RC_CG_TEST_PORT), .Q (\A[4] ));
SDFRRAQLX1 \A_reg[5] (.RN (reset_n), .C (rc_gclk), .D (n_148), .SD
(\A[4] ), .SE (RC_CG_TEST_PORT), .Q (\A[5] ));
SDFRRAQLX1 \A_reg[6] (.RN (reset_n), .C (rc_gclk), .D (n_147), .SD
(\A[5] ), .SE (RC_CG_TEST_PORT), .Q (\A[6] ));
SDFRRAQLX1 \A_reg[7] (.RN (reset_n), .C (rc_gclk), .D (n_146), .SD
(\A[6] ), .SE (RC_CG_TEST_PORT), .Q (\A[7] ));
SDFRRAQLX1 \alu_status_reg[0] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_286), .SD (alu_result[7]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[0]));
SDFRSAQLX1 \alu_status_reg[1] (.SN (reset_n), .C (rc_gclk_10251), .D
(n_294), .SD (alu_status[0]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[1]));
SDFRRAQLX1 \alu_status_reg[2] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_278), .SD (alu_status[1]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[2]));
SDFRRAQLX1 \alu_status_reg[3] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_277), .SD (alu_status[2]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[3]));
SDFRRAQLX1 \alu_status_reg[4] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_276), .SD (alu_status[3]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[4]));
SDFRSAQLX1 \alu_status_reg[5] (.SN (reset_n), .C (rc_gclk_10251), .D
(n_272), .SD (alu_status[4]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[5]));
SDFRRAQLX1 \alu_status_reg[6] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_290), .SD (alu_status[5]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[6]));
SDFRRAQLX1 \alu_status_reg[7] (.RN (reset_n), .C (rc_gclk_10251), .D
(n_292), .SD (alu_status[6]), .SE (RC_CG_TEST_PORT), .Q
(alu_status[7]));
SDFRRAQLX1 \alu_x_reg[0] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_89), .SD (alu_status[7]), .SE (RC_CG_TEST_PORT), .Q
(alu_x[0]));
SDFRRAQLX1 \alu_x_reg[1] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_88), .SD (alu_x[0]), .SE (RC_CG_TEST_PORT), .Q (alu_x[1]));
SDFRRAQLX1 \alu_x_reg[2] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_90), .SD (alu_x[1]), .SE (RC_CG_TEST_PORT), .Q (alu_x[2]));
SDFRRAQLX1 \alu_x_reg[3] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_87), .SD (alu_x[2]), .SE (RC_CG_TEST_PORT), .Q (alu_x[3]));
SDFRRAQLX1 \alu_x_reg[4] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_91), .SD (alu_x[3]), .SE (RC_CG_TEST_PORT), .Q (alu_x[4]));
SDFRRAQLX1 \alu_x_reg[5] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_93), .SD (alu_x[4]), .SE (RC_CG_TEST_PORT), .Q (alu_x[5]));
SDFRRAQLX1 \alu_x_reg[6] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_86), .SD (alu_x[5]), .SE (RC_CG_TEST_PORT), .Q (alu_x[6]));
SDFRRAQLX1 \alu_x_reg[7] (.RN (reset_n), .C (rc_gclk_10254), .D
(n_92), .SD (alu_x[6]), .SE (RC_CG_TEST_PORT), .Q (alu_x[7]));
SDFRRAQLX1 \alu_y_reg[0] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_142), .SD (alu_x[7]), .SE (RC_CG_TEST_PORT), .Q (alu_y[0]));
SDFRRAQLX1 \alu_y_reg[1] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_141), .SD (alu_y[0]), .SE (RC_CG_TEST_PORT), .Q (alu_y[1]));
SDFRRAQLX1 \alu_y_reg[2] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_145), .SD (alu_y[1]), .SE (RC_CG_TEST_PORT), .Q (alu_y[2]));
SDFRRAQLX1 \alu_y_reg[3] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_140), .SD (alu_y[2]), .SE (RC_CG_TEST_PORT), .Q (alu_y[3]));
SDFRRAQLX1 \alu_y_reg[4] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_139), .SD (alu_y[3]), .SE (RC_CG_TEST_PORT), .Q (alu_y[4]));
SDFRRAQLX1 \alu_y_reg[5] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_144), .SD (alu_y[4]), .SE (RC_CG_TEST_PORT), .Q (alu_y[5]));
SDFRRAQLX1 \alu_y_reg[6] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_138), .SD (alu_y[5]), .SE (RC_CG_TEST_PORT), .Q (alu_y[6]));
SDFRRAQLX1 \alu_y_reg[7] (.RN (reset_n), .C (rc_gclk_10257), .D
(n_137), .SD (alu_y[6]), .SE (RC_CG_TEST_PORT), .Q (alu_y[7]));
MU2LX1 g11732(.S (n_256), .IN0 (n_293), .IN1 (alu_status[1]), .Q
(n_294));
AO322LX1 g11734(.A (n_108), .B (n_288), .C (n_291), .D
(alu_status[1]), .E (n_241), .F (alu_a[1]), .G (n_185), .Q
(n_293));
MU2LX1 g11736(.S (n_256), .IN0 (n_289), .IN1 (alu_status[7]), .Q
(n_292));
AN21LX1 g11738(.A (n_202), .B (n_62), .C (n_287), .Q (n_291));
MU2LX1 g11739(.S (n_268), .IN0 (n_282), .IN1 (alu_status[6]), .Q
(n_290));
NA2LX1 g11740(.A (n_284), .B (n_274), .Q (n_289));
AN21LX1 g11741(.A (n_196), .B (n_57), .C (n_285), .Q (n_288));
ON221LX1 g11742(.A (n_222), .B (n_235), .C (n_323), .D (n_195), .E
(n_283), .Q (n_287));
MU2LX1 g11743(.S (n_255), .IN0 (n_279), .IN1 (alu_status[0]), .Q
(n_286));
ON211LX1 g11747(.A (n_189), .B (n_51), .C (n_216), .D (n_275), .Q
(n_285));
AN21LX1 g11748(.A (\bcdh[3] ), .B (n_110), .C (n_280), .Q (n_284));
AN21LX1 g11749(.A (n_250), .B (n_176), .C (n_281), .Q (n_283));
AO322LX1 g11750(.A (n_169), .B (n_270), .C (n_170), .D
(alu_status[6]), .E (n_242), .F (alu_a[6]), .G (n_198), .Q
(n_282));
NA3LX1 g11752(.A (n_237), .B (n_261), .C (n_130), .Q (n_281));
NA2LX1 g11753(.A (n_108), .B (n_273), .Q (n_280));
NA2LX1 g11754(.A (n_155), .B (n_271), .Q (n_279));
MU2LX1 g11755(.S (n_267), .IN0 (n_240), .IN1 (alu_status[2]), .Q
(n_278));
MU2LX1 g11756(.S (n_265), .IN0 (n_239), .IN1 (alu_status[3]), .Q
(n_277));
MU2LX1 g11757(.S (n_266), .IN0 (alu_status[4]), .IN1 (n_243), .Q
(n_276));
AN211LX1 g11758(.A (n_248), .B (alu_enable), .C (n_257), .D (n_241),
.Q (n_275));
AN21LX1 g11759(.A (\result[7]_721 ), .B (n_109), .C (n_260), .Q
(n_274));
OA211LX1 g11760(.A (n_235), .B (n_77), .C (n_264), .D (n_258), .Q
(n_273));
NA2LX1 g11761(.A (n_269), .B (n_262), .Q (n_272));
AN221LX1 g11762(.A (n_869), .B (n_57), .C (n_175), .D (n_109), .E
(n_253), .Q (n_271));
AN21LX1 g11763(.A (n_81), .B (n_57), .C (n_263), .Q (n_270));
NA2LX1 g11764(.A (n_254), .B (alu_status[5]), .Q (n_269));
NO2I1LX1 g11765(.B (n_163), .AN (n_259), .Q (n_268));
AN31LX1 g11766(.A (alu_opcode[6]), .B (n_106), .C (n_157), .D
(n_252), .Q (n_267));
ON21LX1 g11767(.A (n_131), .B (n_59), .C (n_259), .Q (n_266));
AN31LX1 g11768(.A (alu_opcode[6]), .B (alu_opcode[7]), .C (n_157), .D
(n_252), .Q (n_265));
AN211LX1 g11769(.A (\result[7]_742 ), .B (n_55), .C (n_204), .D
(n_251), .Q (n_264));
OR4LX1 g11770(.A (n_153), .B (n_242), .C (n_190), .D (n_198), .Q
(n_263));
NA3I2LX1 g11771(.C (n_923), .AN (n_254), .BN (n_190), .Q (n_262));
AN221LX1 g11772(.A (n_84), .B (n_159), .C (n_208), .D (n_67), .E
(n_236), .Q (n_261));
AO321LX1 g11773(.A (alu_x[7]), .B (n_829), .C (n_234), .D (n_52), .E
(\result[7]_786 ), .F (n_223), .Q (n_260));
NA2LX1 g11774(.A (n_244), .B (alu_enable), .Q (n_259));
NA2LX1 g11775(.A (n_250), .B (alu_y[7]), .Q (n_258));
NA2I1LX1 g11776(.B (n_246), .AN (n_185), .Q (n_257));
NA2LX1 g11777(.A (n_238), .B (alu_enable), .Q (n_256));
AN211LX1 g11778(.A (n_157), .B (n_884), .C (n_37), .D (n_245), .Q
(n_255));
OA21LX1 g11779(.A (n_920), .B (n_323), .C (n_249), .Q (n_254));
OR4LX1 g11780(.A (n_247), .B (n_225), .C (n_214), .D (n_213), .Q
(n_253));
NA2LX1 g11781(.A (n_249), .B (n_174), .Q (n_252));
AO22LX1 g11782(.A (n_230), .B (alu_status[7]), .C (\result[7]_794 ),
.D (n_50), .Q (n_251));
AND2LX1 g11783(.A (n_234), .B (n_827), .Q (n_250));
NA2LX1 g11784(.A (n_226), .B (alu_enable), .Q (n_249));
NA2LX1 g11785(.A (n_227), .B (n_79), .Q (n_248));
NO6I5LX1 g11786(.F (n_110), .AN (n_215), .BN (n_219), .CN
(alu_status[0]), .DN (n_53), .EN (n_54), .Q (n_247));
ON211LX1 g11787(.A (n_203), .B (n_839), .C (n_199), .D (alu_enable),
.Q (n_246));
AN21LX1 g11788(.A (n_220), .B (n_156), .C (n_323), .Q (n_245));
NA2LX1 g11789(.A (n_229), .B (n_154), .Q (n_244));
NA3LX1 g11790(.A (n_231), .B (n_925), .C (n_205), .Q (n_243));
NA2I1LX1 g11791(.B (n_224), .AN (n_230), .Q (n_242));
AND2LX1 g11792(.A (n_228), .B (n_323), .Q (n_241));
NA3LX1 g11793(.A (n_233), .B (n_925), .C (n_201), .Q (n_240));
NA3LX1 g11794(.A (n_232), .B (n_925), .C (n_200), .Q (n_239));
NA3LX1 g11795(.A (n_229), .B (n_186), .C (n_912), .Q (n_238));
AN332LX1 g11796(.A (alu_enable), .B (n_836), .C (n_211), .D
(alu_enable), .E (n_821), .F (n_209), .G (n_70), .H (n_210), .Q
(n_237));
AO332LX1 g11797(.A (alu_enable), .B (n_822), .C (n_207), .D
(alu_enable), .E (n_823), .F (n_206), .G (n_135), .H (n_63), .Q
(n_236));
INLX2 g11799(.A (n_235), .Q (n_234));
NA2LX1 g11800(.A (n_219), .B (alu_enable), .Q (n_235));
NA2LX1 g11801(.A (n_219), .B (alu_status[2]), .Q (n_233));
NA2LX1 g11802(.A (n_219), .B (alu_status[3]), .Q (n_232));
NA2LX1 g11803(.A (n_219), .B (alu_status[4]), .Q (n_231));
AND2LX1 g11804(.A (n_219), .B (n_323), .Q (n_230));
AND2LX1 g11805(.A (n_220), .B (n_920), .Q (n_229));
NA2I1LX1 g11806(.B (n_923), .AN (n_219), .Q (n_228));
AN21LX1 g11807(.A (n_895), .B (alu_status[0]), .C (n_218), .Q
(n_227));
NA2LX1 g11808(.A (n_220), .B (n_187), .Q (n_226));
NA3LX1 g11809(.A (n_221), .B (n_178), .C (n_925), .Q (n_225));
NA2LX1 g11810(.A (n_219), .B (n_48), .Q (n_224));
ON21LX1 g11811(.A (n_168), .B (n_323), .C (n_217), .Q (n_223));
AN21LX1 g11812(.A (n_829), .B (n_177), .C (n_212), .Q (n_222));
AN21LX1 g11813(.A (n_194), .B (alu_a[0]), .C (n_161), .Q (n_221));
NO7LX1 g11814(.A (n_83), .B (n_875), .C (n_878), .D (n_851), .E
(n_82), .F (n_136), .G (alu_opcode[1]), .Q (n_220));
NA3I1LX1 g11815(.B (n_33), .C (n_193), .AN (n_873), .Q (n_219));
AO222LX1 g11816(.A (n_179), .B (n_899), .C (n_180), .D (n_840), .E
(n_121), .F (n_897), .Q (n_218));
AN21LX1 g11817(.A (n_198), .B (alu_a[7]), .C (n_118), .Q (n_217));
AN211LX1 g11818(.A (n_192), .B (n_52), .C (n_190), .D (n_191), .Q
(n_216));
NO2LX1 g11819(.A (n_194), .B (n_162), .Q (n_215));
AND2LX1 g11820(.A (n_197), .B (n_52), .Q (n_214));
AN21LX1 g11821(.A (n_183), .B (n_789), .C (n_51), .Q (n_213));
OA21LX1 g11822(.A (n_180), .B (\A[0] ), .C (n_838), .Q (n_212));
OR8LX1 g11823(.A (\result[6]_687 ), .B (\result[4]_685 ), .C
(\result[1]_682 ), .D (n_299), .E (\result[7]_688 ), .F
(\result[5]_686 ), .G (\result[3]_684 ), .H (\result[2]_683 ),
.Q (n_211));
OR7LX1 g11824(.A (\result[7]_704 ), .B (\result[5]_702 ), .C
(\result[3]_700 ), .D (\result[6]_703 ), .E (\result[4]_701 ),
.F (n_68), .G (\result[2]_699 ), .Q (n_210));
OR8LX1 g11825(.A (\result[6]_695 ), .B (\result[4]_693 ), .C
(\result[1]_690 ), .D (n_312), .E (\result[7]_696 ), .F
(\result[5]_694 ), .G (\result[3]_692 ), .H (\result[2]_691 ),
.Q (n_209));
OR7LX1 g11826(.A (\result[7]_664 ), .B (\result[5]_662 ), .C
(\result[3]_660 ), .D (\result[6]_663 ), .E (\result[4]_661 ),
.F (n_65), .G (\result[2]_659 ), .Q (n_208));
OR8LX1 g11827(.A (\result[6]_679 ), .B (\result[4]_677 ), .C
(\result[2]_675 ), .D (n_321), .E (\result[7]_680 ), .F
(\result[5]_678 ), .G (\result[3]_676 ), .H (\result[1]_674 ),
.Q (n_207));
OR7LX1 g11828(.A (\result[7]_672 ), .B (\result[5]_670 ), .C
(\result[3]_668 ), .D (\result[6]_671 ), .E (\result[4]_669 ),
.F (n_36), .G (\result[2]_667 ), .Q (n_206));
AN21LX1 g11829(.A (n_185), .B (alu_a[4]), .C (n_127), .Q (n_205));
NA3LX1 g11830(.A (n_188), .B (n_105), .C (n_925), .Q (n_204));
OA21LX1 g11831(.A (n_179), .B (alu_status[0]), .C (n_893), .Q
(n_203));
OR8LX1 g11832(.A (\result[6]_720 ), .B (\result[4]_718 ), .C (\AL[1]
), .D (\AL[0] ), .E (\result[7]_721 ), .F (\result[5]_719 ), .G
(\AL[3] ), .H (\AL[2] ), .Q (n_202));
AN22LX1 g11833(.A (n_185), .B (alu_a[2]), .C (n_94), .D (n_42), .Q
(n_201));
AN22LX1 g11834(.A (n_185), .B (alu_a[3]), .C (n_95), .D (n_42), .Q
(n_200));
AO211LX1 g11835(.A (n_893), .B (n_179), .C (alu_status[0]), .D
(n_180), .Q (n_199));
NA2I1LX1 g11836(.B (n_923), .AN (n_185), .Q (n_198));
NA2LX1 g11837(.A (n_184), .B (n_794), .Q (n_197));
OR7LX1 g11838(.A (\bcdh[2]_812 ), .B (\result[4]_775 ), .C
(\AL[2]_802 ), .D (\bcdh[1]_811 ), .E (\AL[3]_803 ), .F
(\AL[1]_801 ), .G (n_28), .Q (n_196));
AN21LX1 g11839(.A (n_828), .B (n_165), .C (n_181), .Q (n_195));
AO21LX1 g11840(.A (n_818), .B (alu_enable), .C (n_185), .Q (n_194));
NO2I1LX1 g11841(.B (n_182), .AN (n_928), .Q (n_193));
OR8LX1 g11842(.A (\result[6]_785 ), .B (\result[3]_782 ), .C
(\result[1]_780 ), .D (n_24), .E (\result[7]_786 ), .F
(\result[5]_784 ), .G (\result[4]_783 ), .H (\result[2]_781 ),
.Q (n_192));
OA211LX1 g11843(.A (n_121), .B (alu_status[0]), .C (n_896), .D
(alu_enable), .Q (n_191));
NA3I1LX1 g11844(.B (n_160), .C (n_158), .AN (n_127), .Q (n_190));
NO4LX1 g11845(.A (n_167), .B (\result[6]_793 ), .C (\result[5]_792 ),
.D (\result[7]_794 ), .Q (n_189));
AN211LX1 g11846(.A (n_124), .B (alu_enable), .C (n_126), .D (n_103),
.Q (n_188));
NA2I1LX1 g11847(.B (n_164), .AN (n_59), .Q (n_187));
NA2LX1 g11848(.A (n_164), .B (n_102), .Q (n_186));
NO5I4LX1 g11849(.E (alu_opcode[0]), .AN (n_85), .BN (n_76), .CN
(n_918), .DN (n_49), .Q (n_185));
NA2I1LX1 g11850(.B (n_172), .AN (n_795), .Q (n_184));
NA2I1LX1 g11851(.B (n_171), .AN (n_790), .Q (n_183));
NA2LX1 g11852(.A (n_173), .B (n_926), .Q (n_182));
OA21LX1 g11853(.A (n_121), .B (alu_a[0]), .C (n_832), .Q (n_181));
OR6LX1 g11854(.A (\A[7] ), .B (\A[3] ), .C (\A[1] ), .D (n_32), .E
(\A[5] ), .F (\A[2] ), .Q (n_180));
OR6LX1 g11855(.A (\A[5] ), .B (\A[2] ), .C (\A[1] ), .D (n_32), .E
(\A[3] ), .F (\A[0] ), .Q (n_179));
AN21LX1 g11856(.A (n_78), .B (n_42), .C (n_166), .Q (n_178));
OR8LX1 g11857(.A (alu_x[6]), .B (alu_x[4]), .C (alu_x[0]), .D
(alu_x[1]), .E (alu_x[7]), .F (alu_x[5]), .G (alu_x[3]), .H
(alu_x[2]), .Q (n_177));
OR8LX1 g11858(.A (alu_y[6]), .B (alu_y[4]), .C (alu_y[1]), .D
(alu_y[0]), .E (alu_y[7]), .F (alu_y[5]), .G (alu_y[3]), .H
(alu_y[2]), .Q (n_176));
EO2LX1 g11859(.A (n_129), .B (n_128), .Q (n_175));
NA2LX1 g11876(.A (n_157), .B (alu_opcode[0]), .Q (n_174));
NA2I1LX1 g11877(.B (n_136), .AN (alu_opcode[1]), .Q (n_173));
NA2LX1 g11878(.A (n_133), .B (n_796), .Q (n_172));
NA2LX1 g11879(.A (n_132), .B (n_791), .Q (n_171));
ON21LX1 g11880(.A (n_74), .B (\result[7]_5789 ), .C (n_110), .Q
(n_170));
ON21LX1 g11881(.A (n_73), .B (\result[7]_5789 ), .C (n_109), .Q
(n_169));
AN21LX1 g11882(.A (\result[7]_688 ), .B (n_836), .C (n_125), .Q
(n_168));
NA5I4LX1 g11883(.E (n_793), .AN (\result[3]_790 ), .BN
(\result[4]_791 ), .CN (\result[1]_788 ), .DN (\result[2]_789 ),
.Q (n_167));
AN21LX1 g11884(.A (n_80), .B (n_804), .C (n_56), .Q (n_166));
NA4I3LX1 g11885(.D (n_807), .AN (n_123), .BN (\result[3]_636 ), .CN
(\result[2]_635 ), .Q (n_165));
ON21LX1 g11886(.A (n_850), .B (n_66), .C (n_156), .Q (n_164));
AN21LX1 g11887(.A (n_868), .B (alu_opcode[7]), .C (n_134), .Q
(n_163));
AO211LX1 g11888(.A (n_831), .B (alu_enable), .C (n_109), .D (n_122),
.Q (n_162));
AO333LX1 g11889(.A (\A[7] ), .B (alu_enable), .C (n_833), .D
(alu_a[7]), .E (alu_enable), .F (n_817), .G (\A[0] ), .H
(alu_enable), .J (n_831), .Q (n_161));
AN32LX1 g11890(.A (alu_opcode[4]), .B (n_902), .C (n_42), .D (n_38),
.E (n_95), .Q (n_160));
OR8LX1 g11891(.A (\result[2]_745 ), .B (\result[5]_748 ), .C (\AH[0]
), .D (n_854), .E (\result[7]_5789 ), .F (\result[3]_746 ), .G
(\result[1]_744 ), .H (\result[6]_749 ), .Q (n_159));
ON22LX1 g11892(.A (n_94), .B (n_78), .C (n_38), .D (n_42), .Q
(n_158));
AN21LX1 g11901(.A (n_920), .B (n_69), .C (n_323), .Q (n_157));
NA2LX1 g11902(.A (n_112), .B (n_85), .Q (n_156));
NA2LX1 g11903(.A (n_857), .B (n_110), .Q (n_155));
NA2LX1 g11904(.A (n_85), .B (n_901), .Q (n_154));
NO2I1LX1 g11905(.B (n_108), .AN (\A[7] ), .Q (n_153));
NA2LX1 g11906(.A (n_111), .B (n_925), .Q (n_152));
NA2LX1 g11907(.A (n_119), .B (n_925), .Q (n_151));
NA2LX1 g11908(.A (n_117), .B (n_925), .Q (n_150));
NA2LX1 g11909(.A (n_120), .B (n_925), .Q (n_149));
NA2LX1 g11910(.A (n_116), .B (n_925), .Q (n_148));
NA2LX1 g11911(.A (n_115), .B (n_925), .Q (n_147));
NA2LX1 g11912(.A (n_114), .B (n_925), .Q (n_146));
NA2LX1 g11913(.A (n_99), .B (n_925), .Q (n_145));
NA2LX1 g11914(.A (n_97), .B (n_925), .Q (n_144));
NA2LX1 g11915(.A (n_96), .B (n_925), .Q (n_143));
NA2LX1 g11916(.A (n_101), .B (n_925), .Q (n_142));
NA2LX1 g11917(.A (n_100), .B (n_925), .Q (n_141));
NA2LX1 g11918(.A (n_113), .B (n_925), .Q (n_140));
NA2LX1 g11919(.A (n_98), .B (n_925), .Q (n_139));
NA2LX1 g11920(.A (n_107), .B (n_925), .Q (n_138));
NA2LX1 g11921(.A (n_104), .B (n_925), .Q (n_137));
AN211LX1 g11922(.A (n_295), .B (alu_opcode[4]), .C (n_25), .D
(n_924), .Q (n_136));
NA5I1LX1 g11923(.B (n_75), .C (n_905), .D (n_808), .E (n_811), .AN
(\result[0]_751 ), .Q (n_135));
AN31LX1 g11924(.A (alu_enable), .B (n_295), .C (n_60), .D (n_37), .Q
(n_134));
AO21LX1 g11925(.A (n_41), .B (n_803), .C (n_797), .Q (n_133));
AO21LX1 g11926(.A (n_58), .B (n_800), .C (n_792), .Q (n_132));
AN21LX1 g11927(.A (n_44), .B (alu_enable), .C (n_37), .Q (n_131));
ON21LX1 g11928(.A (\AL[4] ), .B (\AH[4] ), .C (n_110), .Q (n_130));
AN31LX1 g11929(.A (n_805), .B (n_812), .C (n_853), .D (\AH[4] ), .Q
(n_129));
NA4I1LX1 g11930(.B (n_889), .C (n_903), .D (n_890), .AN (n_892), .Q
(n_128));
NO4I1LX1 g11931(.B (n_880), .C (n_911), .D (alu_opcode[3]), .AN
(n_112), .Q (n_127));
AO22LX1 g11932(.A (n_63), .B (n_340), .C (n_70), .D (\result[7]_704
), .Q (n_126));
AO222LX1 g11933(.A (alu_status[0]), .B (n_872), .C (alu_a[7]), .D
(n_832), .E (n_822), .F (\result[7]_680 ), .Q (n_125));
AO222LX1 g11934(.A (n_823), .B (\result[7]_672 ), .C (n_821), .D
(\result[7]_696 ), .E (\result[7]_5789 ), .F (n_825), .Q
(n_124));
NA5I1LX1 g11935(.B (n_810), .C (n_806), .D (n_910), .E (n_814), .AN
(\result[6]_639 ), .Q (n_123));
OR4LX1 g11936(.A (n_55), .B (n_52), .C (n_50), .D (n_57), .Q (n_122));
OR7LX1 g11937(.A (alu_a[4]), .B (alu_a[6]), .C (alu_a[3]), .D
(alu_a[2]), .E (alu_a[7]), .F (alu_a[1]), .G (alu_a[5]), .Q
(n_121));
NA2LX1 g11938(.A (n_847), .B (n_34), .Q (n_120));
NA2LX1 g11939(.A (n_846), .B (n_34), .Q (n_119));
NO2I1LX1 g11940(.B (n_53), .AN (\A[6] ), .Q (n_118));
NA2LX1 g11941(.A (n_844), .B (n_34), .Q (n_117));
NA2LX1 g11942(.A (n_843), .B (n_34), .Q (n_116));
NA2LX1 g11943(.A (n_842), .B (n_34), .Q (n_115));
NA2LX1 g11944(.A (n_841), .B (n_34), .Q (n_114));
NA2LX1 g11945(.A (n_845), .B (n_71), .Q (n_113));
NO2I1LX1 g11946(.B (alu_opcode[2]), .AN (n_66), .Q (n_112));
NA2LX1 g11947(.A (n_845), .B (n_34), .Q (n_111));
AND2LX1 g11948(.A (n_62), .B (alu_status[3]), .Q (n_110));
NO2I1LX1 g11949(.B (alu_status[3]), .AN (n_62), .Q (n_109));
NA2LX1 g11950(.A (result), .B (n_57), .Q (n_108));
NA2LX1 g11951(.A (n_842), .B (n_71), .Q (n_107));
NA2LX1 g11952(.A (n_60), .B (alu_opcode[3]), .Q (n_106));
NA2LX1 g11953(.A (\result[7]_664 ), .B (n_67), .Q (n_105));
NA2LX1 g11954(.A (n_841), .B (n_71), .Q (n_104));
NO2I1LX1 g11955(.B (n_54), .AN (alu_a[6]), .Q (n_103));
NA2LX1 g11956(.A (n_909), .B (n_44), .Q (n_102));
NA2LX1 g11957(.A (n_848), .B (n_71), .Q (n_101));
NA2LX1 g11958(.A (n_847), .B (n_71), .Q (n_100));
NA2LX1 g11959(.A (n_846), .B (n_71), .Q (n_99));
NA2LX1 g11960(.A (n_844), .B (n_71), .Q (n_98));
NA2LX1 g11961(.A (n_843), .B (n_71), .Q (n_97));
NA2LX1 g11962(.A (n_848), .B (n_34), .Q (n_96));
NO2I1LX1 g11963(.B (n_39), .AN (n_902), .Q (n_95));
NO2I1LX1 g11964(.B (n_39), .AN (n_66), .Q (n_94));
NA2LX1 g11965(.A (n_35), .B (n_925), .Q (n_93));
NA2LX1 g11966(.A (n_72), .B (n_925), .Q (n_92));
NA2LX1 g11967(.A (n_43), .B (n_925), .Q (n_91));
NA2LX1 g11968(.A (n_46), .B (n_925), .Q (n_90));
NA2LX1 g11969(.A (n_45), .B (n_925), .Q (n_89));
NA2LX1 g11970(.A (n_47), .B (n_925), .Q (n_88));
NA2LX1 g11971(.A (n_40), .B (n_925), .Q (n_87));
NA2LX1 g11972(.A (n_61), .B (n_925), .Q (n_86));
ON21LX1 g11973(.A (n_25), .B (alu_opcode[3]), .C (n_27), .Q (n_85));
NA2LX1 g11974(.A (n_56), .B (n_64), .Q (n_84));
NO3I1LX1 g11975(.B (n_921), .C (n_852), .AN (n_919), .Q (n_83));
NO3I2LX1 g11976(.C (n_788), .AN (n_894), .BN (n_902), .Q (n_82));
ON21LX1 g11977(.A (result), .B (\A[7] ), .C (\result[7]_5789 ), .Q
(n_81));
NA3LX1 g11978(.A (n_906), .B (n_816), .C (n_815), .Q (n_80));
ON21LX1 g11979(.A (n_895), .B (n_898), .C (n_879), .Q (n_79));
AND3LX1 g11980(.A (n_66), .B (n_25), .C (alu_opcode[4]), .Q (n_78));
AN21LX1 g11981(.A (n_838), .B (\A[7] ), .C (n_31), .Q (n_77));
AN211LX1 g11982(.A (n_325), .B (alu_opcode[3]), .C (alu_opcode[4]),
.D (alu_opcode[1]), .Q (n_76));
NO4I3LX1 g11983(.D (\result[6]_757 ), .AN (n_904), .BN (n_809), .CN
(n_907), .Q (n_75));
EO2LX1 g11984(.A (n_30), .B (\bcdh[3] ), .Q (n_74));
EO2LX1 g11985(.A (n_30), .B (\result[7]_721 ), .Q (n_73));
NA2LX1 g11986(.A (n_841), .B (n_871), .Q (n_72));
NA2I1LX1 g11987(.B (n_928), .AN (n_900), .Q (n_71));
AND2LX1 g11988(.A (n_830), .B (alu_enable), .Q (n_70));
NA2LX1 g11989(.A (n_788), .B (n_295), .Q (n_69));
NA2LX1 g11990(.A (\result[1]_674 ), .B (alu_y[0]), .Q (n_68));
AND2LX1 g11991(.A (n_837), .B (alu_enable), .Q (n_67));
NO2LX1 g11992(.A (alu_opcode[0]), .B (alu_opcode[7]), .Q (n_66));
NA2LX1 g11993(.A (\result[1]_682 ), .B (alu_a[0]), .Q (n_65));
NA2LX1 g11994(.A (n_825), .B (alu_enable), .Q (n_64));
AND2LX1 g11995(.A (n_826), .B (alu_enable), .Q (n_63));
AND2LX1 g11996(.A (n_824), .B (alu_enable), .Q (n_62));
NA2LX1 g11997(.A (n_842), .B (n_871), .Q (n_61));
NO2LX1 g11998(.A (n_918), .B (n_855), .Q (n_60));
NO2I1LX1 g11999(.B (n_855), .AN (n_909), .Q (n_59));
NA2LX1 g12000(.A (n_798), .B (n_799), .Q (n_58));
AND2LX1 g12001(.A (n_834), .B (alu_enable), .Q (n_57));
INLX1 g12003(.A (n_56), .Q (n_55));
NA2LX1 g12004(.A (n_835), .B (alu_enable), .Q (n_56));
NA2LX1 g12005(.A (n_817), .B (alu_enable), .Q (n_54));
NA2LX1 g12006(.A (n_833), .B (alu_enable), .Q (n_53));
AND2LX1 g12007(.A (n_820), .B (alu_enable), .Q (n_52));
INLX2 g12008(.A (n_51), .Q (n_50));
NA2LX1 g12010(.A (n_819), .B (alu_enable), .Q (n_51));
NA2I1LX1 g12011(.B (alu_opcode[5]), .AN (alu_opcode[3]), .Q (n_49));
NO2LX1 g12012(.A (n_834), .B (n_824), .Q (n_48));
NA2LX1 g12013(.A (n_847), .B (n_871), .Q (n_47));
NA2LX1 g12014(.A (n_846), .B (n_871), .Q (n_46));
NA2LX1 g12015(.A (n_848), .B (n_871), .Q (n_45));
NO2LX1 g12016(.A (alu_opcode[6]), .B (alu_opcode[7]), .Q (n_44));
NA2LX1 g12017(.A (n_844), .B (n_871), .Q (n_43));
NO2LX1 g12018(.A (n_881), .B (n_919), .Q (n_42));
NA2LX1 g12019(.A (n_801), .B (n_802), .Q (n_41));
NA2LX1 g12020(.A (n_845), .B (n_871), .Q (n_40));
NA2LX1 g12021(.A (alu_opcode[6]), .B (alu_opcode[4]), .Q (n_39));
NO2LX1 g12022(.A (n_880), .B (n_919), .Q (n_38));
NO2LX1 g12023(.A (n_323), .B (n_850), .Q (n_37));
NA2LX1 g12024(.A (\result[1]_690 ), .B (alu_x[0]), .Q (n_36));
NA2LX1 g12025(.A (n_843), .B (n_871), .Q (n_35));
INLX2 g12026(.A (n_34), .Q (n_33));
NA2I1LX1 g12027(.B (n_927), .AN (n_875), .Q (n_34));
OR2LX1 g12028(.A (\A[6] ), .B (\A[4] ), .Q (n_32));
NO2I1LX1 g12029(.B (n_807), .AN (n_828), .Q (n_31));
INLX1 g12031(.A (\A[7] ), .Q (n_30));
INLX1 g12033(.A (\AL[0] ), .Q (n_28));
INLX1 g12034(.A (n_787), .Q (n_27));
INLX2 g12037(.A (alu_opcode[6]), .Q (n_25));
INLX1 g12039(.A (n_908), .Q (n_24));
SDFRRAQLX1 \alu_result_reg[0] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_10), .SD (\A[7] ), .SE (RC_CG_TEST_PORT), .Q (alu_result[0]));
SDFRRAQLX1 \alu_result_reg[2] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_15), .SD (alu_result[1]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[2]));
SDFRRAQLX1 \alu_result_reg[3] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_16), .SD (alu_result[2]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[3]));
SDFRRAQLX1 \alu_result_reg[4] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_14), .SD (alu_result[3]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[4]));
SDFRRAQLX1 \alu_result_reg[5] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_13), .SD (alu_result[4]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[5]));
SDFRRAQLX1 \alu_result_reg[6] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_11), .SD (alu_result[5]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[6]));
SDFRRAQLX1 \alu_result_reg[1] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_9), .SD (alu_result[0]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[1]));
SDFRRAQLX1 \alu_result_reg[7] (.RN (reset_n), .C (rc_gclk_10247), .D
(n_12), .SD (alu_result[6]), .SE (RC_CG_TEST_PORT), .Q
(alu_result[7]));
NA2LX1 g8507(.A (n_7), .B (n_925), .Q (n_16));
NA2LX1 g8508(.A (n_8), .B (n_925), .Q (n_15));
NA2LX1 g8509(.A (n_6), .B (n_925), .Q (n_14));
NA2LX1 g8510(.A (n_5), .B (n_925), .Q (n_13));
NA2LX1 g8511(.A (n_3), .B (n_925), .Q (n_12));
NA2LX1 g8512(.A (n_4), .B (n_925), .Q (n_11));
NA2LX1 g8513(.A (n_2), .B (n_925), .Q (n_10));
NA2LX1 g8514(.A (n_1), .B (n_925), .Q (n_9));
NA2LX1 g8515(.A (n_846), .B (n_0), .Q (n_8));
NA2LX1 g8516(.A (n_845), .B (n_0), .Q (n_7));
NA2LX1 g8517(.A (n_844), .B (n_0), .Q (n_6));
NA2LX1 g8518(.A (n_843), .B (n_0), .Q (n_5));
NA2LX1 g8519(.A (n_842), .B (n_0), .Q (n_4));
NA2LX1 g8520(.A (n_841), .B (n_0), .Q (n_3));
NA2LX1 g8521(.A (n_848), .B (n_0), .Q (n_2));
NA2LX1 g8522(.A (n_847), .B (n_0), .Q (n_1));
NA3I1LX1 g8523(.B (n_927), .C (n_926), .AN (n_891), .Q (n_0));
endmodule
 
module RC_CG_MOD_1443(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1444(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1445(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1446(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1447(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1448(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1449(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1438(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1439(enable, ck_in, ck_out, test, s_rst);
input enable, ck_in, test, s_rst;
output ck_out;
wire enable, ck_in, test, s_rst;
wire ck_out;
wire n_0;
LSGCPLX1 RC_CGIC_INST(.E (n_0), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
OR2LX1 g6(.A (s_rst), .B (enable), .Q (n_0));
endmodule
 
module RC_CG_MOD_1440(enable, ck_in, ck_out, test, s_rst);
input enable, ck_in, test, s_rst;
output ck_out;
wire enable, ck_in, test, s_rst;
wire ck_out;
wire n_0;
LSGCPLX1 RC_CGIC_INST(.E (n_0), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
OR2LX1 g6(.A (enable), .B (s_rst), .Q (n_0));
endmodule
 
module RC_CG_MOD_1441(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1442(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module RC_CG_MOD_1445_1459(enable, ck_in, ck_out, test);
input enable, ck_in, test;
output ck_out;
wire enable, ck_in, test;
wire ck_out;
LSGCPLX1 RC_CGIC_INST(.E (enable), .CLK (ck_in), .SE (test), .GCLK
(ck_out));
endmodule
 
module t6507lp_fsm_DATA_SIZE8_ADDR_SIZE13(clk, reset_n, alu_result,
alu_status, data_in, alu_x, alu_y, address, rw_mem, data_out,
alu_opcode, alu_a, alu_enable, RC_CG_TEST_PORT, DFT_sdo);
input clk, reset_n, RC_CG_TEST_PORT;
input [7:0] alu_result, alu_status, data_in, alu_x, alu_y;
output [12:0] address;
output rw_mem, alu_enable, DFT_sdo;
output [7:0] data_out, alu_opcode, alu_a;
wire clk, reset_n, RC_CG_TEST_PORT;
wire [7:0] alu_result, alu_status, data_in, alu_x, alu_y;
wire [12:0] address;
wire rw_mem, alu_enable, DFT_sdo;
wire [7:0] data_out, alu_opcode, alu_a;
wire branch_643, \index[0] , \index[1] , \index[2] , \index[3] ,
\index[4] , \index[5] , \index[6] ;
wire \index[7] , indirecty_17792, \ir[0] , \ir[1] , \ir[3] , \ir[4] ,
\ir[5] , \ir[6] ;
wire \ir[7] , jump_indirect_17774, n_1, n_2, n_3, n_4, n_5, n_6;
wire n_7, n_8, n_9, n_10, n_11, n_12, n_13, n_14;
wire n_16, n_17, n_18, n_19, n_20, n_21, n_22, n_23;
wire n_24, n_25, n_26, n_28, n_29, n_30, n_31, n_32;
wire n_33, n_34, n_35, n_36, n_37, n_38, n_39, n_40;
wire n_41, n_42, n_43, n_44, n_45, n_46, n_47, n_48;
wire n_49, n_50, n_51, n_52, n_53, n_54, n_55, n_56;
wire n_57, n_58, n_59, n_60, n_61, n_62, n_63, n_64;
wire n_65, n_66, n_67, n_68, n_69, n_70, n_71, n_72;
wire n_73, n_74, n_75, n_76, n_77, n_78, n_79, n_80;
wire n_81, n_82, n_83, n_84, n_85, n_86, n_87, n_88;
wire n_89, n_90, n_91, n_92, n_93, n_94, n_96, n_97;
wire n_98, n_99, n_100, n_101, n_102, n_103, n_104, n_105;
wire n_106, n_107, n_108, n_109, n_110, n_111, n_112, n_113;
wire n_114, n_115, n_116, n_117, n_118, n_119, n_120, n_121;
wire n_122, n_123, n_124, n_125, n_126, n_127, n_128, n_129;
wire n_130, n_131, n_132, n_133, n_134, n_135, n_136, n_137;
wire n_138, n_139, n_140, n_141, n_142, n_143, n_144, n_145;
wire n_146, n_147, n_148, n_149, n_150, n_151, n_152, n_153;
wire n_154, n_155, n_156, n_157, n_158, n_159, n_160, n_161;
wire n_162, n_163, n_164, n_165, n_166, n_167, n_168, n_169;
wire n_170, n_171, n_172, n_173, n_174, n_175, n_176, n_177;
wire n_178, n_179, n_180, n_181, n_182, n_183, n_184, n_185;
wire n_186, n_187, n_188, n_189, n_190, n_191, n_192, n_193;
wire n_194, n_195, n_196, n_197, n_198, n_199, n_200, n_201;
wire n_202, n_203, n_204, n_205, n_206, n_207, n_208, n_209;
wire n_210, n_211, n_212, n_213, n_214, n_215, n_216, n_217;
wire n_218, n_219, n_220, n_221, n_222, n_223, n_224, n_225;
wire n_226, n_227, n_228, n_229, n_230, n_231, n_232, n_233;
wire n_234, n_235, n_236, n_237, n_238, n_239, n_240, n_241;
wire n_242, n_243, n_244, n_245, n_246, n_247, n_248, n_249;
wire n_250, n_251, n_252, n_253, n_254, n_255, n_256, n_257;
wire n_258, n_259, n_260, n_261, n_262, n_263, n_264, n_265;
wire n_266, n_267, n_268, n_269, n_270, n_271, n_272, n_273;
wire n_274, n_275, n_276, n_277, n_278, n_279, n_280, n_281;
wire n_282, n_283, n_284, n_285, n_286, n_287, n_288, n_293;
wire n_294, n_295, n_297, n_298, n_299, n_300, n_301, n_302;
wire n_303, n_304, n_305, n_306, n_307, n_308, n_309, n_310;
wire n_311, n_313, n_314, n_315, n_316, n_317, n_318, n_319;
wire n_320, n_321, n_322, n_323, n_324, n_325, n_326, n_327;
wire n_328, n_329, n_330, n_331, n_332, n_333, n_334, n_335;
wire n_336, n_337, n_338, n_339, n_340, n_341, n_342, n_343;
wire n_344, n_345, n_346, n_347, n_348, n_349, n_350, n_351;
wire n_352, n_353, n_354, n_355, n_356, n_357, n_358, n_359;
wire n_360, n_361, n_362, n_363, n_364, n_365, n_366, n_367;
wire n_368, n_369, n_370, n_371, n_372, n_373, n_374, n_375;
wire n_376, n_377, n_378, n_379, n_380, n_381, n_382, n_383;
wire n_384, n_385, n_386, n_387, n_388, n_389, n_390, n_391;
wire n_392, n_393, n_394, n_395, n_396, n_397, n_398, n_399;
wire n_400, n_401, n_402, n_403, n_404, n_405, n_406, n_407;
wire n_408, n_409, n_410, n_411, n_412, n_413, n_414, n_415;
wire n_416, n_417, n_418, n_419, n_420, n_421, n_422, n_423;
wire n_424, n_425, n_426, n_427, n_428, n_429, n_430, n_432;
wire n_433, n_434, n_435, n_436, n_437, n_438, n_439, n_440;
wire n_441, n_442, n_443, n_444, n_445, n_446, n_447, n_448;
wire n_449, n_450, n_451, n_452, n_453, n_454, n_455, n_456;
wire n_457, n_458, n_459, n_460, n_461, n_462, n_463, n_464;
wire n_465, n_466, n_467, n_468, n_469, n_470, n_471, n_472;
wire n_473, n_474, n_475, n_476, n_477, n_478, n_479, n_480;
wire n_481, n_482, n_483, n_484, n_485, n_486, n_487, n_488;
wire n_489, n_490, n_491, n_492, n_493, n_494, n_495, n_496;
wire n_497, n_498, n_499, n_500, n_501, n_502, n_503, n_504;
wire n_505, n_506, n_507, n_508, n_509, n_510, n_511, n_512;
wire n_513, n_514, n_515, n_516, n_517, n_518, n_519, n_520;
wire n_521, n_522, n_523, n_524, n_525, n_526, n_527, n_528;
wire n_529, n_530, n_531, n_532, n_533, n_534, n_535, n_536;
wire n_537, n_538, n_539, n_540, n_541, n_542, n_543, n_544;
wire n_545, n_546, n_547, n_548, n_549, n_550, n_551, n_552;
wire n_553, n_554, n_555, n_556, n_557, n_558, n_559, n_560;
wire n_561, n_562, n_563, n_564, n_565, n_566, n_567, n_568;
wire n_569, n_570, n_571, n_572, n_573, n_574, n_575, n_576;
wire n_577, n_578, n_579, n_580, n_581, n_582, n_583, n_584;
wire n_585, n_586, n_587, n_588, n_589, n_590, n_591, n_592;
wire n_593, n_594, n_595, n_596, n_597, n_598, n_599, n_600;
wire n_601, n_602, n_603, n_604, n_605, n_606, n_607, n_608;
wire n_609, n_610, n_611, n_612, n_613, n_614, n_615, n_616;
wire n_617, n_618, n_619, n_620, n_621, n_622, n_623, n_624;
wire n_633, n_634, n_635, n_636, n_637, n_638, n_651, n_652;
wire n_653, n_654, n_655, n_656, n_657, n_658, n_659, n_671;
wire n_672, n_673, n_674, n_675, n_693, n_695, n_696, n_697;
wire n_698, n_699, n_700, n_701, n_702, n_703, n_704, n_705;
wire n_706, n_707, n_708, n_709, n_710, n_711, n_724, n_747;
wire n_748, n_749, n_750, n_751, n_752, n_753, n_754, n_755;
wire n_756, n_757, n_758, n_759, n_760, n_761, n_762, n_763;
wire n_764, n_765, n_766, n_767, n_768, n_769, n_770, n_771;
wire n_773, n_774, n_775, n_776, n_777, n_778, n_779, n_780;
wire n_781, n_782, n_783, n_784, n_785, n_786, n_787, n_797;
wire n_798, n_799, n_800, n_801, n_802, n_803, n_804, n_805;
wire n_806, n_807, n_808, n_809, n_810, n_811, n_812, n_813;
wire n_814, n_815, \next_pc[1] , \next_pc[2] , \next_pc[3] ,
\next_pc[4] , \next_pc[5] , \next_pc[6] ;
wire \next_pc[7] , \next_pc[9] , \next_pc[10] , \next_pc[11] ,
\next_pc[12] , page_crossed_17678, \pc[0] , \pc[1] ;
wire \pc[2] , \pc[3] , \pc[4] , \pc[5] , \pc[6] , \pc[7] , \pc[8] ,
\pc[9] ;
wire \pc[10] , \pc[11] , \pc[12] , pha, php, rc_gclk, rc_gclk_818,
rc_gclk_17826;
wire rc_gclk_17829, rc_gclk_17832, rc_gclk_17835, rc_gclk_17838,
rc_gclk_17841, rc_gclk_17844, rc_gclk_17847, rc_gclk_17850;
wire rc_gclk_17853, rc_gclk_17856, read_17663,
read_modify_write_17759, relative_17630, \rst_counter[0] ,
\rst_counter[1] , \rst_counter[2] ;
wire rti, \sp[0] , \sp[1] , \sp[2] , \sp[3] , \sp[4] , \sp[5] ,
\sp[6] ;
wire \sp[7] , \sp_minus_one[0] , \sp_minus_one[2] , \sp_minus_one[3]
, \sp_minus_one[4] , \sp_minus_one[5] , \sp_minus_one[6] ,
\sp_minus_one[7] ;
wire \sp_plus_one[1] , \sp_plus_one[2] , \sp_plus_one[3] ,
\sp_plus_one[4] , \sp_plus_one[5] , \sp_plus_one[6] ,
\sp_plus_one[7] , \state[0] ;
wire \state[1] , \state[2] , \state[3] , \state[4] , \temp_addr[0] ,
\temp_addr[1] , \temp_addr[2] , \temp_addr[3] ;
wire \temp_addr[4] , \temp_addr[5] , \temp_addr[6] , \temp_addr[7] ,
\temp_addr[8] , \temp_addr[9] , \temp_addr[10] , \temp_addr[11] ;
wire \temp_addr[12] , \temp_data[0] , \temp_data[1] , \temp_data[2] ,
\temp_data[3] , \temp_data[4] , \temp_data[5] , \temp_data[6] ;
wire zero_page_15968;
RC_CG_MOD_1443 RC_CG_HIER_INST10(.enable (n_697), .ck_in (clk),
.ck_out (rc_gclk_17838), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1444 RC_CG_HIER_INST11(.enable (n_696), .ck_in (clk),
.ck_out (rc_gclk_17841), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1445 RC_CG_HIER_INST12(.enable (n_747), .ck_in
(rc_gclk_818), .ck_out (rc_gclk_17844), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1446 RC_CG_HIER_INST13(.enable (n_704), .ck_in (clk),
.ck_out (rc_gclk_17847), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1447 RC_CG_HIER_INST14(.enable (n_698), .ck_in (clk),
.ck_out (rc_gclk_17850), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1448 RC_CG_HIER_INST15(.enable (n_699), .ck_in (clk),
.ck_out (rc_gclk_17853), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1449 RC_CG_HIER_INST16(.enable (n_701), .ck_in (clk),
.ck_out (rc_gclk_17856), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1438 RC_CG_HIER_INST5(.enable (n_700), .ck_in (clk),
.ck_out (rc_gclk), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1439 RC_CG_HIER_INST6(.enable (n_779), .ck_in (clk),
.ck_out (rc_gclk_17826), .test (RC_CG_TEST_PORT), .s_rst
(n_778));
RC_CG_MOD_1440 RC_CG_HIER_INST7(.enable (n_703), .ck_in (clk),
.ck_out (rc_gclk_17829), .test (RC_CG_TEST_PORT), .s_rst
(n_769));
RC_CG_MOD_1441 RC_CG_HIER_INST8(.enable (n_773), .ck_in
(rc_gclk_818), .ck_out (rc_gclk_17832), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1442 RC_CG_HIER_INST9(.enable (n_705), .ck_in (clk),
.ck_out (rc_gclk_17835), .test (RC_CG_TEST_PORT));
RC_CG_MOD_1445_1459 RC_CG_SHARED_HIER_L1_INST(.enable (\state[1] ),
.ck_in (clk), .ck_out (rc_gclk_818), .test (RC_CG_TEST_PORT));
SDFRRAQLX1 \address_reg[8] (.RN (reset_n), .C (clk), .D (n_594), .SD
(address[7]), .SE (RC_CG_TEST_PORT), .Q (address[8]));
SDFRRAQLX1 \pc_reg[0] (.RN (reset_n), .C (rc_gclk_17838), .D (n_554),
.SD (\ir[7] ), .SE (RC_CG_TEST_PORT), .Q (\pc[0] ));
SDFRRAQLX1 \pc_reg[10] (.RN (reset_n), .C (rc_gclk_17841), .D
(n_551), .SD (\pc[9] ), .SE (RC_CG_TEST_PORT), .Q (\pc[10] ));
SDFRRAQLX1 \pc_reg[11] (.RN (reset_n), .C (rc_gclk_17841), .D
(n_573), .SD (\pc[10] ), .SE (RC_CG_TEST_PORT), .Q (\pc[11] ));
SDFRRAQLX1 \pc_reg[12] (.RN (reset_n), .C (rc_gclk_17841), .D
(n_572), .SD (\pc[11] ), .SE (RC_CG_TEST_PORT), .Q (\pc[12] ));
SDFRRAQLX1 \pc_reg[1] (.RN (reset_n), .C (rc_gclk_17838), .D (n_565),
.SD (\pc[0] ), .SE (RC_CG_TEST_PORT), .Q (\pc[1] ));
SDFRRAQLX1 \pc_reg[2] (.RN (reset_n), .C (rc_gclk_17838), .D (n_564),
.SD (\pc[1] ), .SE (RC_CG_TEST_PORT), .Q (\pc[2] ));
SDFRRAQLX1 \pc_reg[3] (.RN (reset_n), .C (rc_gclk_17838), .D (n_563),
.SD (\pc[2] ), .SE (RC_CG_TEST_PORT), .Q (\pc[3] ));
SDFRRAQLX1 \pc_reg[4] (.RN (reset_n), .C (rc_gclk_17838), .D (n_562),
.SD (\pc[3] ), .SE (RC_CG_TEST_PORT), .Q (\pc[4] ));
SDFRRAQLX1 \pc_reg[5] (.RN (reset_n), .C (rc_gclk_17838), .D (n_561),
.SD (\pc[4] ), .SE (RC_CG_TEST_PORT), .Q (\pc[5] ));
SDFRRAQLX1 \pc_reg[6] (.RN (reset_n), .C (rc_gclk_17838), .D (n_560),
.SD (\pc[5] ), .SE (RC_CG_TEST_PORT), .Q (\pc[6] ));
SDFRRAQLX1 \pc_reg[7] (.RN (reset_n), .C (rc_gclk_17838), .D (n_559),
.SD (\pc[6] ), .SE (RC_CG_TEST_PORT), .Q (\pc[7] ));
SDFRRAQLX1 \pc_reg[8] (.RN (reset_n), .C (rc_gclk_17841), .D (n_553),
.SD (\pc[7] ), .SE (RC_CG_TEST_PORT), .Q (\pc[8] ));
SDFRRAQLX1 \pc_reg[9] (.RN (reset_n), .C (rc_gclk_17841), .D (n_552),
.SD (\pc[8] ), .SE (RC_CG_TEST_PORT), .Q (\pc[9] ));
SDFRRAQLX1 \rst_counter_reg[0] (.RN (reset_n), .C (rc_gclk_17844), .D
(n_437), .SD (\pc[12] ), .SE (RC_CG_TEST_PORT), .Q
(\rst_counter[0] ));
SDFRRAQLX1 \rst_counter_reg[1] (.RN (reset_n), .C (rc_gclk_17844), .D
(n_489), .SD (\rst_counter[0] ), .SE (RC_CG_TEST_PORT), .Q
(\rst_counter[1] ));
SDFRRAQLX1 \rst_counter_reg[2] (.RN (reset_n), .C (rc_gclk_17844), .D
(n_533), .SD (\rst_counter[1] ), .SE (RC_CG_TEST_PORT), .Q
(\rst_counter[2] ));
SDFRRAQLX1 rw_mem_reg(.RN (reset_n), .C (clk), .D (n_584), .SD
(\rst_counter[2] ), .SE (RC_CG_TEST_PORT), .Q (rw_mem));
SDFRSAQLX1 \sp_reg[0] (.SN (reset_n), .C (rc_gclk_17847), .D (n_534),
.SD (rw_mem), .SE (RC_CG_TEST_PORT), .Q (\sp[0] ));
SDFRSAQLX1 \sp_reg[1] (.SN (reset_n), .C (rc_gclk_17847), .D (n_523),
.SD (\sp[0] ), .SE (RC_CG_TEST_PORT), .Q (\sp[1] ));
SDFRSAQLX1 \sp_reg[2] (.SN (reset_n), .C (rc_gclk_17847), .D (n_521),
.SD (\sp[1] ), .SE (RC_CG_TEST_PORT), .Q (\sp[2] ));
SDFRSAQLX1 \sp_reg[3] (.SN (reset_n), .C (rc_gclk_17847), .D (n_520),
.SD (\sp[2] ), .SE (RC_CG_TEST_PORT), .Q (\sp[3] ));
SDFRSAQLX1 \sp_reg[4] (.SN (reset_n), .C (rc_gclk_17847), .D (n_519),
.SD (\sp[3] ), .SE (RC_CG_TEST_PORT), .Q (\sp[4] ));
SDFRSAQLX1 \sp_reg[5] (.SN (reset_n), .C (rc_gclk_17847), .D (n_518),
.SD (\sp[4] ), .SE (RC_CG_TEST_PORT), .Q (\sp[5] ));
SDFRSAQLX1 \sp_reg[6] (.SN (reset_n), .C (rc_gclk_17847), .D (n_517),
.SD (\sp[5] ), .SE (RC_CG_TEST_PORT), .Q (\sp[6] ));
SDFRSAQLX1 \sp_reg[7] (.SN (reset_n), .C (rc_gclk_17847), .D (n_516),
.SD (\sp[6] ), .SE (RC_CG_TEST_PORT), .Q (\sp[7] ));
SDFRSAQLX1 \state_reg[0] (.SN (reset_n), .C (clk), .D (n_597), .SD
(\sp[7] ), .SE (RC_CG_TEST_PORT), .Q (\state[0] ));
SDFRSAQLX1 \state_reg[1] (.SN (reset_n), .C (clk), .D (n_599), .SD
(\state[0] ), .SE (RC_CG_TEST_PORT), .Q (\state[1] ));
SDFRSAQLX1 \state_reg[2] (.SN (reset_n), .C (clk), .D (n_596), .SD
(\state[1] ), .SE (RC_CG_TEST_PORT), .Q (\state[2] ));
SDFRSAQLX1 \state_reg[3] (.SN (reset_n), .C (clk), .D (n_598), .SD
(\state[2] ), .SE (RC_CG_TEST_PORT), .Q (\state[3] ));
SDFRSAQLX1 \state_reg[4] (.SN (reset_n), .C (clk), .D (n_590), .SD
(\state[3] ), .SE (RC_CG_TEST_PORT), .Q (\state[4] ));
SDFRRAQLX1 \temp_addr_reg[0] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_515), .SD (\state[4] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[0] ));
SDFRRAQLX1 \temp_addr_reg[10] (.RN (reset_n), .C (rc_gclk_17853), .D
(n_514), .SD (\temp_addr[9] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[10] ));
SDFRRAQLX1 \temp_addr_reg[11] (.RN (reset_n), .C (rc_gclk_17853), .D
(n_513), .SD (\temp_addr[10] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[11] ));
SDFRRAQLX1 \temp_addr_reg[12] (.RN (reset_n), .C (rc_gclk_17853), .D
(n_512), .SD (\temp_addr[11] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[12] ));
SDFRRAQLX1 \temp_addr_reg[1] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_511), .SD (\temp_addr[0] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[1] ));
SDFRRAQLX1 \temp_addr_reg[2] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_510), .SD (\temp_addr[1] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[2] ));
SDFRRAQLX1 \temp_addr_reg[3] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_509), .SD (\temp_addr[2] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[3] ));
SDFRRAQLX1 \temp_addr_reg[4] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_508), .SD (\temp_addr[3] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[4] ));
SDFRRAQLX1 \temp_addr_reg[5] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_507), .SD (\temp_addr[4] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[5] ));
SDFRRAQLX1 \temp_addr_reg[6] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_506), .SD (\temp_addr[5] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[6] ));
SDFRRAQLX1 \temp_addr_reg[7] (.RN (reset_n), .C (rc_gclk_17850), .D
(n_505), .SD (\temp_addr[6] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[7] ));
SDFRRAQLX1 \temp_addr_reg[8] (.RN (reset_n), .C (rc_gclk_17853), .D
(n_504), .SD (\temp_addr[7] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[8] ));
SDFRRAQLX1 \temp_addr_reg[9] (.RN (reset_n), .C (rc_gclk_17853), .D
(n_503), .SD (\temp_addr[8] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_addr[9] ));
NO2I1LX1 g17555(.B (n_288), .AN (n_595), .Q (n_599));
NO2LX1 g17557(.A (n_288), .B (n_591), .Q (n_598));
NO2LX1 g17558(.A (n_288), .B (n_593), .Q (n_597));
NO2LX1 g17559(.A (n_288), .B (n_592), .Q (n_596));
ON321LX1 g17560(.A (n_585), .B (n_656), .C (n_448), .D (\state[4] ),
.E (n_568), .F (n_557), .Q (n_595));
OR2LX1 g17562(.A (n_589), .B (n_771), .Q (n_594));
NO4LX1 g17563(.A (n_586), .B (n_469), .C (n_784), .D (n_750), .Q
(n_593));
AN222LX1 g17564(.A (n_522), .B (n_548), .C (n_567), .D (n_499), .E
(n_472), .F (n_588), .Q (n_592));
NO6I3LX1 g17565(.D (n_785), .E (n_469), .F (n_576), .AN (n_581), .BN
(n_474), .CN (n_472), .Q (n_591));
NO2LX1 g17566(.A (n_288), .B (n_587), .Q (n_590));
MU2LX1 g17567(.S (n_779), .IN0 (address[8]), .IN1 (n_583), .Q
(n_589));
NO2I1LX1 g17569(.B (n_582), .AN (n_474), .Q (n_588));
AN211LX1 g17570(.A (n_567), .B (n_812), .C (n_575), .D (n_577), .Q
(n_587));
ON21LX1 g17571(.A (n_555), .B (\state[1] ), .C (n_580), .Q (n_586));
ON311LX1 g17572(.A (pha), .B (php), .C (n_432), .D (n_474), .E
(n_579), .Q (n_585));
NO2I1LX1 g17575(.B (n_774), .AN (n_571), .Q (n_584));
NA2LX1 g17576(.A (n_497), .B (n_574), .Q (n_583));
OR7LX1 g17577(.A (n_558), .B (n_775), .C (n_535), .D (n_493), .E
(n_479), .F (n_635), .G (n_638), .Q (n_582));
NO8LX1 g17578(.A (n_578), .B (n_635), .C (n_470), .D (n_471), .E
(n_775), .F (n_440), .G (n_449), .H (n_815), .Q (n_581));
AN211LX1 g17579(.A (n_548), .B (n_536), .C (n_539), .D (n_502), .Q
(n_580));
NO8LX1 g17580(.A (n_802), .B (n_706), .C (n_440), .D (n_465), .E
(n_556), .F (n_535), .G (n_781), .H (n_799), .Q (n_579));
NA2I1LX1 g17592(.B (n_570), .AN (n_539), .Q (n_578));
OR5LX1 g17593(.A (n_786), .B (n_539), .C (n_470), .D (n_771), .E
(n_653), .Q (n_577));
AN21LX1 g17594(.A (n_439), .B (n_445), .C (n_568), .Q (n_576));
NA2LX1 g17595(.A (n_555), .B (n_569), .Q (n_575));
AN21LX1 g17596(.A (n_767), .B (\pc[8] ), .C (n_566), .Q (n_574));
AO222LX1 g17597(.A (\next_pc[11] ), .B (n_537), .C (n_448), .D
(n_674), .E (data_in[3]), .F (n_491), .Q (n_573));
AO222LX1 g17598(.A (\next_pc[12] ), .B (n_537), .C (n_448), .D
(n_675), .E (data_in[4]), .F (n_491), .Q (n_572));
MU2LX1 g17599(.S (n_461), .IN0 (n_550), .IN1 (rw_mem), .Q (n_571));
NA2I1LX1 g17600(.B (n_548), .AN (n_695), .Q (n_570));
NA2LX1 g17601(.A (n_548), .B (n_487), .Q (n_569));
INLX2 g17603(.A (n_568), .Q (n_567));
NA2LX1 g17604(.A (n_548), .B (\state[0] ), .Q (n_568));
NA2LX1 g17605(.A (n_531), .B (n_549), .Q (n_566));
NA2LX1 g17606(.A (n_484), .B (n_546), .Q (n_565));
NA2LX1 g17607(.A (n_475), .B (n_545), .Q (n_564));
NA2LX1 g17608(.A (n_485), .B (n_544), .Q (n_563));
NA2LX1 g17609(.A (n_478), .B (n_543), .Q (n_562));
NA2LX1 g17610(.A (n_483), .B (n_542), .Q (n_561));
NA2LX1 g17611(.A (n_482), .B (n_541), .Q (n_560));
NA2LX1 g17612(.A (n_477), .B (n_540), .Q (n_559));
OR6LX1 g17613(.A (n_636), .B (n_471), .C (n_809), .D (n_548), .E
(n_776), .F (n_762), .Q (n_558));
NA2LX1 g17614(.A (n_548), .B (n_538), .Q (n_557));
OR4LX1 g17615(.A (n_548), .B (n_464), .C (n_637), .D (n_652), .Q
(n_556));
NA3I1LX1 g17616(.B (n_548), .C (n_454), .AN (\state[2] ), .Q (n_555));
AO21LX1 g17617(.A (n_760), .B (n_440), .C (n_547), .Q (n_554));
AO222LX1 g17618(.A (data_in[0]), .B (n_491), .C (n_486), .D (n_537),
.E (n_448), .F (n_671), .Q (n_553));
AO222LX1 g17619(.A (data_in[1]), .B (n_491), .C (\next_pc[9] ), .D
(n_537), .E (n_448), .F (n_672), .Q (n_552));
AO222LX1 g17620(.A (data_in[2]), .B (n_491), .C (\next_pc[10] ), .D
(n_537), .E (n_448), .F (n_673), .Q (n_551));
OR8LX1 g17623(.A (n_532), .B (n_637), .C (n_814), .D (n_804), .E
(n_783), .F (n_638), .G (n_771), .H (n_810), .Q (n_550));
AN211LX1 g17624(.A (n_764), .B (data_in[0]), .C (n_527), .D (n_768),
.Q (n_549));
NO3I1LX1 g17625(.B (n_526), .C (n_747), .AN (n_530), .Q (n_548));
ON21LX1 g17626(.A (n_528), .B (\pc[0] ), .C (n_501), .Q (n_547));
AN222LX1 g17627(.A (data_in[1]), .B (n_458), .C (n_752), .D
(\temp_addr[1] ), .E (\next_pc[1] ), .F (n_529), .Q (n_546));
AN222LX1 g17628(.A (data_in[2]), .B (n_458), .C (n_752), .D
(\temp_addr[2] ), .E (n_529), .F (\next_pc[2] ), .Q (n_545));
AN222LX1 g17629(.A (data_in[3]), .B (n_458), .C (n_752), .D
(\temp_addr[3] ), .E (n_529), .F (\next_pc[3] ), .Q (n_544));
AN222LX1 g17630(.A (data_in[4]), .B (n_458), .C (n_752), .D
(\temp_addr[4] ), .E (n_529), .F (\next_pc[4] ), .Q (n_543));
AN222LX1 g17631(.A (data_in[5]), .B (n_458), .C (n_752), .D
(\temp_addr[5] ), .E (n_529), .F (\next_pc[5] ), .Q (n_542));
AN222LX1 g17632(.A (data_in[6]), .B (n_458), .C (n_752), .D
(\temp_addr[6] ), .E (n_529), .F (\next_pc[6] ), .Q (n_541));
AN222LX1 g17633(.A (data_in[7]), .B (n_458), .C (n_752), .D
(\temp_addr[7] ), .E (n_529), .F (\next_pc[7] ), .Q (n_540));
AO322LX1 g17634(.A (n_473), .B (n_525), .C (n_747), .D (n_435), .E
(n_799), .F (read_modify_write_17759), .G (n_803), .Q (n_539));
NA2LX1 g17655(.A (n_524), .B (n_445), .Q (n_538));
NO2LX1 g17656(.A (n_528), .B (n_448), .Q (n_537));
NA2LX1 g17657(.A (n_524), .B (n_467), .Q (n_536));
NO3I1LX1 g17658(.B (n_526), .C (n_473), .AN (n_747), .Q (n_535));
AO22LX1 g17659(.A (n_500), .B (\sp_minus_one[0] ), .C (alu_x[0]), .D
(n_773), .Q (n_534));
EO2LX1 g17660(.A (\rst_counter[2] ), .B (n_488), .Q (n_533));
NO2LX1 g17662(.A (n_770), .B (n_495), .Q (n_532));
ON31LX1 g17663(.A (n_453), .B (n_765), .C (n_446), .D (n_486), .Q
(n_531));
NA2LX1 g17664(.A (n_480), .B (n_490), .Q (n_530));
INLX1 g17666(.A (n_528), .Q (n_529));
OR5LX1 g17668(.A (n_491), .B (n_440), .C (n_458), .D (n_801), .E
(n_809), .Q (n_528));
NA3LX1 g17669(.A (n_447), .B (n_492), .C (n_633), .Q (n_527));
INLX3 g17671(.A (n_525), .Q (n_526));
NA2LX1 g17672(.A (n_455), .B (n_494), .Q (n_525));
AN21LX1 g17673(.A (n_466), .B (\state[0] ), .C (n_496), .Q (n_524));
ON21LX1 g17674(.A (n_460), .B (\sp_plus_one[1] ), .C (n_457), .Q
(n_523));
ON21LX1 g17675(.A (n_439), .B (n_452), .C (n_498), .Q (n_522));
AO222LX1 g17676(.A (\sp_plus_one[2] ), .B (n_433), .C
(\sp_minus_one[2] ), .D (n_459), .E (n_773), .F (alu_x[2]), .Q
(n_521));
AO222LX1 g17677(.A (n_433), .B (\sp_plus_one[3] ), .C
(\sp_minus_one[3] ), .D (n_459), .E (n_773), .F (alu_x[3]), .Q
(n_520));
AO222LX1 g17678(.A (n_433), .B (\sp_plus_one[4] ), .C (n_459), .D
(\sp_minus_one[4] ), .E (n_773), .F (alu_x[4]), .Q (n_519));
AO222LX1 g17679(.A (n_433), .B (\sp_plus_one[5] ), .C (n_459), .D
(\sp_minus_one[5] ), .E (n_773), .F (alu_x[5]), .Q (n_518));
AO222LX1 g17680(.A (n_433), .B (\sp_plus_one[6] ), .C (n_459), .D
(\sp_minus_one[6] ), .E (n_773), .F (alu_x[6]), .Q (n_517));
AO222LX1 g17681(.A (n_433), .B (\sp_plus_one[7] ), .C (n_459), .D
(\sp_minus_one[7] ), .E (n_773), .F (alu_x[7]), .Q (n_516));
AO22LX1 g17682(.A (n_463), .B (data_in[0]), .C (n_760), .D (n_451),
.Q (n_515));
AO22LX1 g17683(.A (n_462), .B (data_in[2]), .C (n_673), .D (n_797),
.Q (n_514));
AO22LX1 g17684(.A (n_462), .B (data_in[3]), .C (n_674), .D (n_797),
.Q (n_513));
AO22LX1 g17685(.A (n_462), .B (data_in[4]), .C (n_675), .D (n_797),
.Q (n_512));
AO22LX1 g17686(.A (n_463), .B (data_in[1]), .C (n_759), .D (n_451),
.Q (n_511));
AO22LX1 g17687(.A (n_463), .B (data_in[2]), .C (n_758), .D (n_451),
.Q (n_510));
AO22LX1 g17688(.A (n_463), .B (data_in[3]), .C (n_757), .D (n_451),
.Q (n_509));
AO22LX1 g17689(.A (n_463), .B (data_in[4]), .C (n_756), .D (n_451),
.Q (n_508));
AO22LX1 g17690(.A (n_463), .B (data_in[5]), .C (n_755), .D (n_451),
.Q (n_507));
AO22LX1 g17691(.A (n_463), .B (data_in[6]), .C (n_754), .D (n_451),
.Q (n_506));
AO22LX1 g17692(.A (n_463), .B (data_in[7]), .C (n_753), .D (n_451),
.Q (n_505));
AO22LX1 g17693(.A (n_462), .B (data_in[0]), .C (n_671), .D (n_797),
.Q (n_504));
AO22LX1 g17694(.A (n_462), .B (data_in[1]), .C (n_672), .D (n_797),
.Q (n_503));
OR8LX1 g17695(.A (n_780), .B (n_441), .C (n_655), .D (n_801), .E
(n_479), .F (n_782), .G (n_654), .H (n_443), .Q (n_502));
AN22LX1 g17696(.A (n_458), .B (data_in[0]), .C (n_752), .D
(\temp_addr[0] ), .Q (n_501));
NA2LX1 g17697(.A (n_460), .B (n_434), .Q (n_500));
OR2LX1 g17698(.A (n_466), .B (n_812), .Q (n_499));
ON21LX1 g17699(.A (n_787), .B (n_450), .C (\state[2] ), .Q (n_498));
ON21LX1 g17700(.A (n_766), .B (n_448), .C (n_456), .Q (n_497));
NA2LX1 g17701(.A (n_695), .B (n_476), .Q (n_496));
NO4LX1 g17702(.A (n_658), .B (n_751), .C (n_806), .D (n_468), .Q
(n_495));
NO2I1LX1 g17703(.B (\state[1] ), .AN (n_481), .Q (n_494));
OR4LX1 g17704(.A (n_798), .B (n_752), .C (n_652), .D (n_799), .Q
(n_493));
NO4LX1 g17705(.A (n_808), .B (n_810), .C (n_807), .D (n_771), .Q
(n_492));
OR4LX1 g17706(.A (n_752), .B (n_803), .C (n_799), .D (n_800), .Q
(n_491));
AO32LX1 g17707(.A (n_436), .B (\state[1] ), .C (n_442), .D (\state[2]
), .E (n_452), .Q (n_490));
HAALX1 g17708(.A (\rst_counter[1] ), .B (\rst_counter[0] ), .S
(n_489), .CO (n_488));
AO22LX1 g17709(.A (n_454), .B (\state[1] ), .C (n_438), .D (\state[3]
), .Q (n_487));
EO2LX1 g17710(.A (\pc[8] ), .B (n_444), .Q (n_486));
NA2LX1 g17711(.A (n_757), .B (n_440), .Q (n_485));
NA2LX1 g17712(.A (n_759), .B (n_440), .Q (n_484));
NA2LX1 g17713(.A (n_755), .B (n_440), .Q (n_483));
NA2LX1 g17714(.A (n_754), .B (n_440), .Q (n_482));
NA2I1LX1 g17715(.B (\state[0] ), .AN (n_454), .Q (n_481));
NA2I1LX1 g17716(.B (n_445), .AN (n_787), .Q (n_480));
OR2LX1 g17717(.A (n_777), .B (n_449), .Q (n_479));
NA2LX1 g17718(.A (n_756), .B (n_440), .Q (n_478));
NA2LX1 g17719(.A (n_753), .B (n_440), .Q (n_477));
NA2I1LX1 g17720(.B (n_454), .AN (n_452), .Q (n_476));
NA2LX1 g17721(.A (n_758), .B (n_440), .Q (n_475));
NO2LX1 g17722(.A (n_441), .B (n_657), .Q (n_474));
NA3I1LX1 g17723(.B (\rst_counter[1] ), .C (\rst_counter[2] ), .AN
(\rst_counter[0] ), .Q (n_473));
NA3I1LX1 g17724(.B (n_786), .C (php), .AN (pha), .Q (n_472));
AND3LX1 g17725(.A (n_653), .B (n_724), .C (n_435), .Q (n_471));
NO3I1LX1 g17726(.B (read_17663), .C (read_modify_write_17759), .AN
(n_801), .Q (n_470));
AO21LX1 g17727(.A (n_805), .B (jump_indirect_17774), .C (n_802), .Q
(n_469));
AO21LX1 g17728(.A (n_773), .B (zero_page_15968), .C (n_708), .Q
(n_468));
NA3LX1 g17729(.A (n_693), .B (\state[0] ), .C (n_436), .Q (n_467));
AO21LX1 g17730(.A (\state[3] ), .B (\state[1] ), .C (n_710), .Q
(n_466));
NO3I2LX1 g17731(.C (indirecty_17792), .AN (n_803), .BN (read_17663),
.Q (n_465));
AO21LX1 g17732(.A (n_805), .B (n_770), .C (n_636), .Q (n_464));
OR3LX1 g17733(.A (n_773), .B (n_815), .C (n_659), .Q (n_463));
OR3LX1 g17734(.A (n_805), .B (n_803), .C (n_634), .Q (n_462));
NO3LX1 g17735(.A (n_702), .B (n_811), .C (n_814), .Q (n_461));
INLX3 g17736(.A (n_460), .Q (n_459));
NO3LX1 g17737(.A (n_709), .B (n_811), .C (n_810), .Q (n_460));
OR3LX1 g17738(.A (n_807), .B (n_651), .C (n_815), .Q (n_458));
AN22LX1 g17739(.A (n_433), .B (\sp_plus_one[1] ), .C (alu_x[1]), .D
(n_773), .Q (n_457));
AO22LX1 g17740(.A (n_803), .B (data_in[0]), .C (n_671), .D (n_813),
.Q (n_456));
AO211LX1 g17741(.A (n_693), .B (\state[2] ), .C (\state[0] ), .D
(n_711), .Q (n_455));
NO2I1LX1 g17743(.B (\state[3] ), .AN (\state[4] ), .Q (n_454));
NO2I1LX1 g17744(.B (branch_643), .AN (n_761), .Q (n_453));
NA2I1LX1 g17745(.B (\state[1] ), .AN (\state[0] ), .Q (n_452));
OR2LX1 g17746(.A (n_797), .B (n_658), .Q (n_451));
NO2LX1 g17747(.A (\state[4] ), .B (\state[1] ), .Q (n_450));
AND2LX1 g17748(.A (n_773), .B (relative_17630), .Q (n_449));
AND2LX1 g17749(.A (page_crossed_17678), .B (n_762), .Q (n_448));
NA2LX1 g17750(.A (n_763), .B (\temp_addr[8] ), .Q (n_447));
NO2I1LX1 g17751(.B (page_crossed_17678), .AN (n_762), .Q (n_446));
NA2I1LX1 g17752(.B (n_436), .AN (\state[4] ), .Q (n_445));
NO2I1LX1 g17753(.B (n_748), .AN (n_749), .Q (n_444));
AND2LX1 g17754(.A (n_653), .B (n_435), .Q (n_443));
NA2I1LX1 g17755(.B (\state[4] ), .AN (\state[0] ), .Q (n_442));
AND2LX1 g17756(.A (n_773), .B (n_707), .Q (n_441));
AND2LX1 g17757(.A (n_761), .B (branch_643), .Q (n_440));
INLX1 g17758(.A (n_439), .Q (n_438));
NA2LX1 g17759(.A (\state[2] ), .B (\state[4] ), .Q (n_439));
INLX1 g17760(.A (\rst_counter[0] ), .Q (n_437));
INLX1 g17763(.A (\state[2] ), .Q (n_436));
INLX3 g17765(.A (rti), .Q (n_435));
INLX3 g17767(.A (n_434), .Q (n_433));
BULX1 g17768(.A (n_633), .Q (n_434));
INLX1 g17769(.A (n_786), .Q (n_432));
SDFRRAQLX1 \address_reg[0] (.RN (reset_n), .C (rc_gclk), .D (n_429),
.SD (alu_y[7]), .SE (RC_CG_TEST_PORT), .Q (address[0]));
SDFRRAQLX1 \address_reg[10] (.RN (reset_n), .C (rc_gclk_17826), .D
(n_428), .SD (address[9]), .SE (RC_CG_TEST_PORT), .Q
(address[10]));
SDFRRAQLX1 \address_reg[11] (.RN (reset_n), .C (rc_gclk_17826), .D
(n_427), .SD (address[10]), .SE (RC_CG_TEST_PORT), .Q
(address[11]));
SDFRRAQLX1 \address_reg[12] (.RN (reset_n), .C (rc_gclk_17826), .D
(n_426), .SD (address[11]), .SE (RC_CG_TEST_PORT), .Q
(address[12]));
SDFRRAQLX1 \address_reg[1] (.RN (reset_n), .C (rc_gclk), .D (n_425),
.SD (address[0]), .SE (RC_CG_TEST_PORT), .Q (address[1]));
SDFRRAQLX1 \address_reg[2] (.RN (reset_n), .C (rc_gclk), .D (n_424),
.SD (address[1]), .SE (RC_CG_TEST_PORT), .Q (address[2]));
SDFRRAQLX1 \address_reg[3] (.RN (reset_n), .C (rc_gclk), .D (n_423),
.SD (address[2]), .SE (RC_CG_TEST_PORT), .Q (address[3]));
SDFRRAQLX1 \address_reg[4] (.RN (reset_n), .C (rc_gclk), .D (n_422),
.SD (address[3]), .SE (RC_CG_TEST_PORT), .Q (address[4]));
SDFRRAQLX1 \address_reg[5] (.RN (reset_n), .C (rc_gclk), .D (n_421),
.SD (address[4]), .SE (RC_CG_TEST_PORT), .Q (address[5]));
SDFRRAQLX1 \address_reg[6] (.RN (reset_n), .C (rc_gclk), .D (n_420),
.SD (address[5]), .SE (RC_CG_TEST_PORT), .Q (address[6]));
SDFRRAQLX1 \address_reg[7] (.RN (reset_n), .C (rc_gclk), .D (n_419),
.SD (address[6]), .SE (RC_CG_TEST_PORT), .Q (address[7]));
SDFRRAQLX1 \address_reg[9] (.RN (reset_n), .C (rc_gclk_17826), .D
(n_418), .SD (address[8]), .SE (RC_CG_TEST_PORT), .Q
(address[9]));
SDFRRAQLX1 \data_out_reg[0] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_417), .SD (address[12]), .SE (RC_CG_TEST_PORT), .Q
(data_out[0]));
SDFRRAQLX1 \data_out_reg[1] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_416), .SD (data_out[0]), .SE (RC_CG_TEST_PORT), .Q
(data_out[1]));
SDFRRAQLX1 \data_out_reg[2] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_415), .SD (data_out[1]), .SE (RC_CG_TEST_PORT), .Q
(data_out[2]));
SDFRRAQLX1 \data_out_reg[3] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_414), .SD (data_out[2]), .SE (RC_CG_TEST_PORT), .Q
(data_out[3]));
SDFRRAQLX1 \data_out_reg[4] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_413), .SD (data_out[3]), .SE (RC_CG_TEST_PORT), .Q
(data_out[4]));
SDFRRAQLX1 \data_out_reg[5] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_412), .SD (data_out[4]), .SE (RC_CG_TEST_PORT), .Q
(data_out[5]));
SDFRRAQLX1 \data_out_reg[6] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_411), .SD (data_out[5]), .SE (RC_CG_TEST_PORT), .Q
(data_out[6]));
SDFRRAQLX1 \data_out_reg[7] (.RN (reset_n), .C (rc_gclk_17829), .D
(n_410), .SD (data_out[6]), .SE (RC_CG_TEST_PORT), .Q
(data_out[7]));
SDFRRAQLX1 \index_reg[0] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_409), .SD (data_out[7]), .SE (RC_CG_TEST_PORT), .Q (\index[0]
));
SDFRRAQLX1 \index_reg[1] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_408), .SD (\index[0] ), .SE (RC_CG_TEST_PORT), .Q (\index[1]
));
SDFRRAQLX1 \index_reg[2] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_407), .SD (\index[1] ), .SE (RC_CG_TEST_PORT), .Q (\index[2]
));
SDFRRAQLX1 \index_reg[3] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_406), .SD (\index[2] ), .SE (RC_CG_TEST_PORT), .Q (\index[3]
));
SDFRRAQLX1 \index_reg[4] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_405), .SD (\index[3] ), .SE (RC_CG_TEST_PORT), .Q (\index[4]
));
SDFRRAQLX1 \index_reg[5] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_404), .SD (\index[4] ), .SE (RC_CG_TEST_PORT), .Q (\index[5]
));
SDFRRAQLX1 \index_reg[6] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_403), .SD (\index[5] ), .SE (RC_CG_TEST_PORT), .Q (\index[6]
));
SDFRRAQLX1 \index_reg[7] (.RN (reset_n), .C (rc_gclk_17832), .D
(n_402), .SD (\index[6] ), .SE (RC_CG_TEST_PORT), .Q (\index[7]
));
SDFRRAQLX1 \ir_reg[0] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[0]), .SD (\index[7] ), .SE (RC_CG_TEST_PORT), .Q
(\ir[0] ));
SDFRRAQLX1 \ir_reg[1] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[1]), .SD (\ir[0] ), .SE (RC_CG_TEST_PORT), .Q (\ir[1]
));
SDFRRAQLX1 \ir_reg[2] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[2]), .SD (\ir[1] ), .SE (RC_CG_TEST_PORT), .Q (n_430));
SDFRRAQLX1 \ir_reg[3] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[3]), .SD (n_430), .SE (RC_CG_TEST_PORT), .Q (\ir[3] ));
SDFRRAQLX1 \ir_reg[4] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[4]), .SD (\ir[3] ), .SE (RC_CG_TEST_PORT), .Q (\ir[4]
));
SDFRRAQLX1 \ir_reg[5] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[5]), .SD (\ir[4] ), .SE (RC_CG_TEST_PORT), .Q (\ir[5]
));
SDFRRAQLX1 \ir_reg[6] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[6]), .SD (\ir[5] ), .SE (RC_CG_TEST_PORT), .Q (\ir[6]
));
SDFRRAQLX1 \ir_reg[7] (.RN (reset_n), .C (rc_gclk_17835), .D
(data_in[7]), .SD (\ir[6] ), .SE (RC_CG_TEST_PORT), .Q (\ir[7]
));
SDFRRAQLX1 \temp_data_reg[0] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_401), .SD (\temp_addr[12] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[0] ));
SDFRRAQLX1 \temp_data_reg[1] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_400), .SD (\temp_data[0] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[1] ));
SDFRRAQLX1 \temp_data_reg[2] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_399), .SD (\temp_data[1] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[2] ));
SDFRRAQLX1 \temp_data_reg[3] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_398), .SD (\temp_data[2] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[3] ));
SDFRRAQLX1 \temp_data_reg[4] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_397), .SD (\temp_data[3] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[4] ));
SDFRRAQLX1 \temp_data_reg[5] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_396), .SD (\temp_data[4] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[5] ));
SDFRRAQLX1 \temp_data_reg[6] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_395), .SD (\temp_data[5] ), .SE (RC_CG_TEST_PORT), .Q
(\temp_data[6] ));
SDFRRAQLX1 \temp_data_reg[7] (.RN (reset_n), .C (rc_gclk_17856), .D
(n_394), .SD (\temp_data[6] ), .SE (RC_CG_TEST_PORT), .Q
(DFT_sdo));
AO21LX1 g28679(.A (n_393), .B (\pc[0] ), .C (n_392), .Q (n_429));
NO2LX1 g28669(.A (n_778), .B (n_391), .Q (n_428));
NO2LX1 g28659(.A (n_778), .B (n_390), .Q (n_427));
NO2LX1 g28651(.A (n_778), .B (n_389), .Q (n_426));
AO21LX1 g28675(.A (n_393), .B (\pc[1] ), .C (n_388), .Q (n_425));
AO221LX1 g28666(.A (n_387), .B (n_758), .C (\pc[2] ), .D (n_393), .E
(n_386), .Q (n_424));
AO221LX1 g28658(.A (n_387), .B (n_757), .C (\pc[3] ), .D (n_393), .E
(n_385), .Q (n_423));
AO221LX1 g28650(.A (n_387), .B (n_756), .C (\pc[4] ), .D (n_393), .E
(n_384), .Q (n_422));
AO221LX1 g28641(.A (n_387), .B (n_755), .C (\pc[5] ), .D (n_393), .E
(n_383), .Q (n_421));
AO221LX1 g28639(.A (n_387), .B (n_754), .C (\pc[6] ), .D (n_393), .E
(n_382), .Q (n_420));
AO221LX1 g28637(.A (n_387), .B (n_753), .C (\pc[7] ), .D (n_393), .E
(n_381), .Q (n_419));
NO2LX1 g28672(.A (n_778), .B (n_380), .Q (n_418));
AN31LX1 g28792(.A (n_379), .B (n_378), .C (n_377), .D (n_769), .Q
(n_417));
AN31LX1 g28793(.A (n_376), .B (n_375), .C (n_374), .D (n_769), .Q
(n_416));
AN31LX1 g28794(.A (n_373), .B (n_372), .C (n_371), .D (n_769), .Q
(n_415));
AN31LX1 g28795(.A (n_370), .B (n_369), .C (n_368), .D (n_769), .Q
(n_414));
AN31LX1 g28796(.A (n_367), .B (n_366), .C (n_365), .D (n_769), .Q
(n_413));
NO2LX1 g28774(.A (n_769), .B (n_364), .Q (n_412));
NO2LX1 g28775(.A (n_769), .B (n_363), .Q (n_411));
NO2LX1 g28776(.A (n_769), .B (n_362), .Q (n_410));
AO222LX1 g28819(.A (\temp_data[0] ), .B (relative_17630), .C (n_361),
.D (alu_y[0]), .E (n_360), .F (alu_x[0]), .Q (n_409));
AO222LX1 g28820(.A (\temp_data[1] ), .B (relative_17630), .C (n_361),
.D (alu_y[1]), .E (n_360), .F (alu_x[1]), .Q (n_408));
AO222LX1 g28821(.A (\temp_data[2] ), .B (relative_17630), .C (n_361),
.D (alu_y[2]), .E (n_360), .F (alu_x[2]), .Q (n_407));
AO222LX1 g28822(.A (\temp_data[3] ), .B (relative_17630), .C (n_361),
.D (alu_y[3]), .E (n_360), .F (alu_x[3]), .Q (n_406));
AO222LX1 g28823(.A (\temp_data[4] ), .B (relative_17630), .C (n_361),
.D (alu_y[4]), .E (n_360), .F (alu_x[4]), .Q (n_405));
AO222LX1 g28824(.A (\temp_data[5] ), .B (relative_17630), .C (n_361),
.D (alu_y[5]), .E (n_360), .F (alu_x[5]), .Q (n_404));
AO222LX1 g28825(.A (\temp_data[6] ), .B (relative_17630), .C (n_361),
.D (alu_y[6]), .E (n_360), .F (alu_x[6]), .Q (n_403));
AO222LX1 g28826(.A (DFT_sdo), .B (relative_17630), .C (n_361), .D
(alu_y[7]), .E (n_360), .F (alu_x[7]), .Q (n_402));
NO2I1LX1 g28911(.B (n_359), .AN (data_in[0]), .Q (n_401));
NO2I1LX1 g28905(.B (n_359), .AN (data_in[1]), .Q (n_400));
NO2I1LX1 g28906(.B (n_359), .AN (data_in[2]), .Q (n_399));
NO2I1LX1 g28907(.B (n_359), .AN (data_in[3]), .Q (n_398));
NO2I1LX1 g28902(.B (n_359), .AN (data_in[4]), .Q (n_397));
NO2I1LX1 g28908(.B (n_359), .AN (data_in[5]), .Q (n_396));
NO2I1LX1 g28909(.B (n_359), .AN (data_in[6]), .Q (n_395));
NO2I1LX1 g28910(.B (n_359), .AN (data_in[7]), .Q (n_394));
OR2LX1 g28689(.A (n_767), .B (n_616), .Q (n_393));
AO221LX1 g28681(.A (n_760), .B (n_387), .C (\sp[0] ), .D (n_768), .E
(n_358), .Q (n_392));
AN21LX1 g28673(.A (n_357), .B (n_673), .C (n_356), .Q (n_391));
AN21LX1 g28662(.A (n_674), .B (n_357), .C (n_355), .Q (n_390));
AN21LX1 g28654(.A (n_675), .B (n_357), .C (n_354), .Q (n_389));
NA2LX1 g28678(.A (n_353), .B (n_352), .Q (n_388));
OR2LX1 g28690(.A (n_766), .B (n_611), .Q (n_387));
AO221LX1 g28801(.A (\sp[2] ), .B (n_768), .C (data_in[2]), .D
(n_351), .E (n_350), .Q (n_386));
AO221LX1 g28802(.A (\sp[3] ), .B (n_768), .C (data_in[3]), .D
(n_351), .E (n_349), .Q (n_385));
AO221LX1 g28768(.A (\sp[4] ), .B (n_768), .C (data_in[4]), .D
(n_351), .E (n_348), .Q (n_384));
NA2LX1 g28751(.A (n_347), .B (n_346), .Q (n_383));
AO221LX1 g28747(.A (\sp[6] ), .B (n_768), .C (n_345), .D (\next_pc[6]
), .E (n_344), .Q (n_382));
AO221LX1 g28740(.A (n_345), .B (\next_pc[7] ), .C (\sp[7] ), .D
(n_768), .E (n_343), .Q (n_381));
AN21LX1 g28677(.A (n_357), .B (n_672), .C (n_342), .Q (n_380));
AN22LX1 g28880(.A (n_341), .B (alu_status[0]), .C (n_637), .D
(data_in[0]), .Q (n_379));
AN22LX1 g29002(.A (\pc[8] ), .B (n_638), .C (\pc[0] ), .D (n_810), .Q
(n_378));
NA2LX1 g28860(.A (alu_result[0]), .B (n_340), .Q (n_377));
AN22LX1 g29004(.A (n_637), .B (data_in[1]), .C (\pc[1] ), .D (n_810),
.Q (n_376));
AN22LX1 g28881(.A (n_341), .B (alu_status[1]), .C (\pc[9] ), .D
(n_638), .Q (n_375));
NA2LX1 g28861(.A (alu_result[1]), .B (n_340), .Q (n_374));
AN22LX1 g29003(.A (n_637), .B (data_in[2]), .C (\pc[2] ), .D (n_810),
.Q (n_373));
AN22LX1 g28882(.A (n_341), .B (alu_status[2]), .C (\pc[10] ), .D
(n_638), .Q (n_372));
NA2LX1 g28862(.A (alu_result[2]), .B (n_340), .Q (n_371));
AN22LX1 g29005(.A (n_637), .B (data_in[3]), .C (\pc[3] ), .D (n_810),
.Q (n_370));
AN22LX1 g28884(.A (n_341), .B (alu_status[3]), .C (\pc[11] ), .D
(n_638), .Q (n_369));
NA2LX1 g28859(.A (alu_result[3]), .B (n_340), .Q (n_368));
AN22LX1 g29006(.A (n_637), .B (data_in[4]), .C (\pc[4] ), .D (n_810),
.Q (n_367));
AN22LX1 g28883(.A (n_341), .B (alu_status[4]), .C (\pc[12] ), .D
(n_638), .Q (n_366));
NA2LX1 g28863(.A (alu_result[4]), .B (n_340), .Q (n_365));
AN21LX1 g28799(.A (alu_result[5]), .B (n_339), .C (n_338), .Q
(n_364));
AN21LX1 g28797(.A (alu_result[6]), .B (n_339), .C (n_337), .Q
(n_363));
AN21LX1 g28798(.A (alu_result[7]), .B (n_339), .C (n_336), .Q
(n_362));
NO2LX1 g28966(.A (relative_17630), .B (n_360), .Q (n_361));
AO211LX1 g28989(.A (n_335), .B (n_602), .C (n_334), .D (n_333), .Q
(n_360));
AN311LX1 g28935(.A (n_613), .B (n_332), .C (n_773), .D (n_797), .E
(n_614), .Q (n_359));
AO21LX1 g28835(.A (n_351), .B (data_in[0]), .C (n_331), .Q (n_358));
AND2LX1 g28687(.A (n_330), .B (n_813), .Q (n_357));
AO221LX1 g28682(.A (\pc[10] ), .B (n_767), .C (\next_pc[10] ), .D
(n_329), .E (n_328), .Q (n_356));
AO221LX1 g28683(.A (\pc[11] ), .B (n_767), .C (\next_pc[11] ), .D
(n_329), .E (n_327), .Q (n_355));
AO221LX1 g28684(.A (\pc[12] ), .B (n_767), .C (\next_pc[12] ), .D
(n_329), .E (n_326), .Q (n_354));
NA2LX1 g28680(.A (n_759), .B (n_387), .Q (n_353));
AN221LX1 g28800(.A (n_351), .B (data_in[1]), .C (n_768), .D (\sp[1]
), .E (n_325), .Q (n_352));
ON21LX1 g28898(.A (n_623), .B (n_618), .C (n_620), .Q (n_351));
AO221LX1 g28875(.A (\next_pc[2] ), .B (n_345), .C (\temp_addr[2] ),
.D (n_324), .E (n_323), .Q (n_350));
AO221LX1 g28876(.A (n_345), .B (\next_pc[3] ), .C (\temp_addr[3] ),
.D (n_324), .E (n_322), .Q (n_349));
AO221LX1 g28803(.A (n_345), .B (\next_pc[4] ), .C (\temp_addr[4] ),
.D (n_324), .E (n_321), .Q (n_348));
AN221LX1 g28755(.A (n_351), .B (data_in[5]), .C (\next_pc[5] ), .D
(n_345), .E (n_320), .Q (n_347));
NA2LX1 g28804(.A (n_768), .B (\sp[5] ), .Q (n_346));
OR3LX1 g28915(.A (n_765), .B (n_776), .C (n_762), .Q (n_345));
AO221LX1 g28754(.A (data_in[6]), .B (n_351), .C (n_617), .D
(\sp_minus_one[6] ), .E (n_319), .Q (n_344));
AO221LX1 g28746(.A (n_617), .B (\sp_minus_one[7] ), .C (data_in[7]),
.D (n_351), .E (n_318), .Q (n_343));
AO221LX1 g28685(.A (\pc[9] ), .B (n_767), .C (\next_pc[9] ), .D
(n_329), .E (n_317), .Q (n_342));
OR2LX1 g28917(.A (n_316), .B (n_809), .Q (n_341));
OR4LX1 g28897(.A (n_315), .B (n_775), .C (n_803), .D (n_804), .Q
(n_340));
AN21LX1 g28827(.A (n_314), .B (n_770), .C (n_313), .Q (n_339));
AO222LX1 g28877(.A (data_in[5]), .B (n_637), .C (alu_status[5]), .D
(n_341), .E (n_810), .F (\pc[5] ), .Q (n_338));
AO222LX1 g28873(.A (data_in[6]), .B (n_637), .C (alu_status[6]), .D
(n_341), .E (n_810), .F (\pc[6] ), .Q (n_337));
AO222LX1 g28878(.A (alu_status[7]), .B (n_341), .C (data_in[7]), .D
(n_637), .E (n_810), .F (\pc[7] ), .Q (n_336));
NO2LX1 g29178(.A (n_2), .B (n_604), .Q (n_335));
AND2LX1 g29038(.A (n_311), .B (\ir[4] ), .Q (n_334));
ON311LX1 g29018(.A (\ir[0] ), .B (\ir[3] ), .C (n_607), .D (n_310),
.E (n_309), .Q (n_333));
INLX1 g29024(.A (n_707), .Q (n_332));
NA2LX1 g28868(.A (n_308), .B (n_307), .Q (n_331));
AO21LX1 g28694(.A (page_crossed_17678), .B (n_762), .C (n_766), .Q
(n_330));
NA2LX1 g28700(.A (n_624), .B (n_306), .Q (n_329));
AO221LX1 g28957(.A (data_in[2]), .B (n_305), .C (n_763), .D
(\temp_addr[10] ), .E (n_610), .Q (n_328));
AO221LX1 g28958(.A (data_in[3]), .B (n_305), .C (n_763), .D
(\temp_addr[11] ), .E (n_610), .Q (n_327));
AO221LX1 g28959(.A (data_in[4]), .B (n_305), .C (n_763), .D
(\temp_addr[12] ), .E (n_610), .Q (n_326));
AO221LX1 g28874(.A (\next_pc[1] ), .B (n_345), .C (\temp_addr[1] ),
.D (n_324), .E (n_304), .Q (n_325));
OR3LX1 g28991(.A (n_806), .B (n_763), .C (n_805), .Q (n_324));
AO221LX1 g28976(.A (\sp_minus_one[2] ), .B (n_617), .C
(\sp_plus_one[2] ), .D (n_615), .E (n_610), .Q (n_323));
AO221LX1 g28918(.A (\sp_minus_one[3] ), .B (n_617), .C (n_615), .D
(\sp_plus_one[3] ), .E (n_610), .Q (n_322));
AO221LX1 g28837(.A (n_617), .B (\sp_minus_one[4] ), .C (n_615), .D
(\sp_plus_one[4] ), .E (n_610), .Q (n_321));
NA2LX1 g28766(.A (n_303), .B (n_302), .Q (n_320));
AO221LX1 g28756(.A (n_615), .B (\sp_plus_one[6] ), .C (\temp_addr[6]
), .D (n_324), .E (n_610), .Q (n_319));
AO221LX1 g28752(.A (n_615), .B (\sp_plus_one[7] ), .C (\temp_addr[7]
), .D (n_324), .E (n_610), .Q (n_318));
AO221LX1 g28960(.A (data_in[1]), .B (n_305), .C (n_763), .D
(\temp_addr[9] ), .E (n_610), .Q (n_317));
NO3I1LX1 g28938(.B (n_622), .C (pha), .AN (n_773), .Q (n_316));
NO2I1LX1 g28903(.B (n_770), .AN (n_314), .Q (n_315));
OR2LX1 g28934(.A (n_301), .B (n_621), .Q (n_314));
OR4LX1 g28879(.A (n_300), .B (n_341), .C (n_638), .D (n_612), .Q
(n_313));
NA2LX1 g29075(.A (n_608), .B (n_299), .Q (n_311));
AN32LX1 g29090(.A (n_298), .B (n_297), .C (n_13), .D (\ir[0] ), .E
(n_609), .Q (n_310));
AN21LX1 g29089(.A (n_606), .B (n_605), .C (n_295), .Q (n_309));
AN211LX1 g28961(.A (n_324), .B (\temp_addr[0] ), .C (n_807), .D
(n_294), .Q (n_308));
NA2I1LX1 g28893(.B (n_345), .AN (\pc[0] ), .Q (n_307));
NO2LX1 g28900(.A (n_776), .B (n_765), .Q (n_306));
OR2LX1 g28988(.A (n_764), .B (n_803), .Q (n_305));
AO211LX1 g28997(.A (n_615), .B (\sp_plus_one[1] ), .C (n_610), .D
(n_293), .Q (n_304));
AN221LX1 g28779(.A (n_324), .B (\temp_addr[5] ), .C (\sp_plus_one[5]
), .D (n_615), .E (n_610), .Q (n_303));
NA2LX1 g28806(.A (\sp_minus_one[5] ), .B (n_617), .Q (n_302));
NA2I1LX1 g28942(.B (n_620), .AN (n_708), .Q (n_301));
NA4I3LX1 g28962(.D (n_619), .AN (n_752), .BN (n_611), .CN (n_810), .Q
(n_300));
NO2LX1 g29100(.A (n_605), .B (n_335), .Q (n_299));
INLX1 g29240(.A (n_600), .Q (n_298));
ON21LX1 g29200(.A (n_430), .B (n_173), .C (n_604), .Q (n_297));
ON31LX1 g29109(.A (n_61), .B (n_21), .C (n_601), .D (n_603), .Q
(n_295));
OA21LX1 g28994(.A (n_617), .B (n_615), .C (\sp_minus_one[0] ), .Q
(n_294));
NO2I1LX1 g29011(.B (\sp_plus_one[1] ), .AN (n_617), .Q (n_293));
ON211LX1 g28640(.A (n_287), .B (n_286), .C (n_285), .D (n_284), .Q
(n_753));
AO21LX1 g28642(.A (n_283), .B (n_282), .C (n_281), .Q (n_754));
NA2LX1 g28644(.A (n_287), .B (n_286), .Q (n_285));
NA2LX1 g28645(.A (n_280), .B (n_279), .Q (n_755));
ON21LX1 g28646(.A (n_283), .B (n_282), .C (n_278), .Q (n_281));
NO2I1LX1 g28648(.B (n_282), .AN (n_283), .Q (n_287));
NA2LX1 g28649(.A (n_277), .B (n_654), .Q (n_280));
HAALX1 g28652(.A (n_276), .B (n_275), .S (n_277), .CO (n_283));
NA2LX1 g28655(.A (n_274), .B (n_273), .Q (n_756));
NA2LX1 g28657(.A (n_675), .B (n_654), .Q (n_274));
HAALX1 g28660(.A (n_272), .B (n_271), .S (n_675), .CO (n_276));
NA2LX1 g28663(.A (n_270), .B (n_269), .Q (n_757));
NA2LX1 g28665(.A (n_674), .B (n_654), .Q (n_270));
HAALX1 g28670(.A (n_268), .B (n_267), .S (n_674), .CO (n_272));
NA2LX1 g28674(.A (n_266), .B (n_265), .Q (n_758));
NA2LX1 g28676(.A (n_673), .B (n_654), .Q (n_266));
HAALX1 g28686(.A (n_264), .B (n_263), .S (n_673), .CO (n_268));
NA2LX1 g28688(.A (n_262), .B (n_261), .Q (n_759));
NA2LX1 g28691(.A (n_672), .B (n_654), .Q (n_262));
OR5LX1 g28692(.A (n_260), .B (n_259), .C (n_258), .D (n_708), .E
(n_634), .Q (n_699));
OR4LX1 g28693(.A (n_260), .B (n_258), .C (n_621), .D (n_659), .Q
(n_698));
NA3I1LX1 g28695(.B (n_633), .C (n_257), .AN (n_702), .Q (n_700));
NA2I1LX1 g28696(.B (n_256), .AN (n_750), .Q (n_701));
NA2LX1 g28697(.A (n_624), .B (n_255), .Q (n_702));
NA2LX1 g28698(.A (n_624), .B (n_254), .Q (n_697));
AO211LX1 g28699(.A (n_785), .B (n_288), .C (n_253), .D (n_750), .Q
(n_767));
AO21LX1 g28701(.A (page_crossed_17678), .B (n_797), .C (n_252), .Q
(n_260));
NA3I1LX1 g28702(.B (n_624), .C (n_251), .AN (n_776), .Q (n_705));
OR3LX1 g28703(.A (n_656), .B (n_259), .C (n_250), .Q (n_766));
HAALX1 g28704(.A (n_249), .B (n_248), .S (n_672), .CO (n_264));
NO2LX1 g28705(.A (n_619), .B (page_crossed_17678), .Q (n_750));
NA2I1LX1 g28706(.B (n_762), .AN (page_crossed_17678), .Q (n_624));
NO2I1LX1 g28707(.B (n_619), .AN (page_crossed_17678), .Q (n_656));
NA2LX1 g28708(.A (n_247), .B (n_246), .Q (n_760));
NA2LX1 g28709(.A (n_671), .B (n_654), .Q (n_247));
AO221LX1 g28710(.A (n_245), .B (n_244), .C (n_243), .D (n_242), .E
(n_241), .Q (page_crossed_17678));
AN222LX1 g28711(.A (n_243), .B (n_240), .C (n_239), .D (n_245), .E
(n_238), .F (n_237), .Q (n_284));
HAALX1 g28712(.A (n_236), .B (n_235), .S (n_671), .CO (n_249));
AN222LX1 g28713(.A (n_243), .B (n_234), .C (n_233), .D (n_245), .E
(n_238), .F (n_232), .Q (n_278));
FAALX1 g28714(.A (\index[7] ), .B (DFT_sdo), .CI (n_231), .S (n_240),
.CO (n_242));
NA3I1LX1 g28715(.B (n_230), .C (n_813), .AN (n_241), .Q (n_236));
NA2LX1 g28716(.A (n_244), .B (n_229), .Q (n_230));
AN222LX1 g28717(.A (n_243), .B (n_228), .C (n_227), .D (n_245), .E
(n_238), .F (n_226), .Q (n_279));
FAALX1 g28718(.A (\temp_addr[7] ), .B (\index[7] ), .CI (n_225), .S
(n_239), .CO (n_244));
FAALX1 g28719(.A (\index[6] ), .B (\temp_data[6] ), .CI (n_224), .S
(n_234), .CO (n_231));
OA211LX1 g28720(.A (n_223), .B (n_222), .C (n_221), .D (n_220), .Q
(n_241));
EO2LX1 g28721(.A (n_219), .B (n_223), .Q (n_237));
AN222LX1 g28722(.A (n_243), .B (n_218), .C (n_217), .D (n_245), .E
(n_238), .F (n_216), .Q (n_273));
FAALX1 g28723(.A (\index[5] ), .B (\temp_data[5] ), .CI (n_215), .S
(n_228), .CO (n_224));
FAALX1 g28724(.A (\temp_addr[6] ), .B (\index[6] ), .CI (n_214), .S
(n_233), .CO (n_225));
FAALX1 g28725(.A (\pc[6] ), .B (\index[6] ), .CI (n_213), .S (n_232),
.CO (n_223));
AN222LX1 g28726(.A (n_243), .B (n_212), .C (n_211), .D (n_245), .E
(n_238), .F (n_210), .Q (n_269));
FAALX1 g28727(.A (\index[4] ), .B (\temp_data[4] ), .CI (n_209), .S
(n_218), .CO (n_215));
FAALX1 g28728(.A (\pc[5] ), .B (\index[5] ), .CI (n_208), .S (n_226),
.CO (n_213));
FAALX1 g28729(.A (\temp_addr[5] ), .B (\index[5] ), .CI (n_207), .S
(n_227), .CO (n_214));
AN222LX1 g28730(.A (n_243), .B (n_206), .C (n_205), .D (n_245), .E
(n_238), .F (n_204), .Q (n_265));
FAALX1 g28731(.A (\temp_addr[4] ), .B (\index[4] ), .CI (n_203), .S
(n_217), .CO (n_207));
FAALX1 g28732(.A (\index[3] ), .B (\temp_data[3] ), .CI (n_202), .S
(n_212), .CO (n_209));
FAALX1 g28733(.A (\pc[4] ), .B (\index[4] ), .CI (n_201), .S (n_216),
.CO (n_208));
EO2LX1 g28734(.A (\pc[12] ), .B (n_200), .Q (\next_pc[12] ));
AN222LX1 g28735(.A (n_243), .B (n_199), .C (n_198), .D (n_245), .E
(n_238), .F (n_197), .Q (n_261));
FAALX1 g28736(.A (\index[2] ), .B (\temp_data[2] ), .CI (n_196), .S
(n_206), .CO (n_202));
FAALX1 g28737(.A (\pc[3] ), .B (\index[3] ), .CI (n_195), .S (n_210),
.CO (n_201));
FAALX1 g28738(.A (\temp_addr[3] ), .B (\index[3] ), .CI (n_194), .S
(n_211), .CO (n_203));
HAALX1 g28739(.A (n_193), .B (\pc[11] ), .S (\next_pc[11] ), .CO
(n_200));
AN222LX1 g28741(.A (n_192), .B (n_243), .C (n_191), .D (n_238), .E
(n_245), .F (n_190), .Q (n_246));
FAALX1 g28742(.A (\pc[2] ), .B (\index[2] ), .CI (n_189), .S (n_204),
.CO (n_195));
FAALX1 g28743(.A (\temp_addr[2] ), .B (\index[2] ), .CI (n_188), .S
(n_205), .CO (n_194));
FAALX1 g28744(.A (\index[1] ), .B (\temp_data[1] ), .CI (n_187), .S
(n_199), .CO (n_196));
HAALX1 g28745(.A (n_186), .B (\pc[10] ), .S (\next_pc[10] ), .CO
(n_193));
FAALX1 g28748(.A (\index[0] ), .B (\temp_data[0] ), .CI (n_659), .S
(n_192), .CO (n_187));
FAALX1 g28749(.A (\pc[1] ), .B (\index[1] ), .CI (n_185), .S (n_197),
.CO (n_189));
FAALX1 g28750(.A (\temp_addr[1] ), .B (\index[1] ), .CI (n_184), .S
(n_198), .CO (n_188));
HAALX1 g28753(.A (n_183), .B (\pc[9] ), .S (\next_pc[9] ), .CO
(n_186));
HAALX1 g28757(.A (\pc[0] ), .B (\index[0] ), .S (n_191), .CO (n_185));
HAALX1 g28758(.A (\temp_addr[0] ), .B (\index[0] ), .S (n_190), .CO
(n_184));
EO2LX1 g28759(.A (\pc[7] ), .B (n_182), .Q (\next_pc[7] ));
EO2LX1 g28760(.A (\sp[7] ), .B (n_181), .Q (\sp_minus_one[7] ));
EO2LX1 g28761(.A (\sp[7] ), .B (n_180), .Q (\sp_plus_one[7] ));
NO2I1LX1 g28765(.B (n_222), .AN (n_221), .Q (n_219));
AND3LX1 g28767(.A (n_182), .B (\pc[8] ), .C (\pc[7] ), .Q (n_183));
OR2LX1 g28777(.A (\pc[7] ), .B (\index[7] ), .Q (n_221));
AND2LX1 g28778(.A (\pc[7] ), .B (\index[7] ), .Q (n_222));
INLX3 g28780(.A (n_179), .Q (\sp_minus_one[6] ));
HAALX1 g28781(.A (n_178), .B (n_177), .S (n_179), .CO (n_181));
HAALX1 g28782(.A (n_176), .B (\sp[6] ), .S (\sp_plus_one[6] ), .CO
(n_180));
HAALX1 g28783(.A (n_175), .B (\pc[6] ), .S (\next_pc[6] ), .CO
(n_182));
NO2I1LX1 g28805(.B (n_8), .AN (alu_enable), .Q (alu_opcode[7]));
NO2I1LX1 g28807(.B (n_3), .AN (alu_enable), .Q (alu_opcode[6]));
NO2I1LX1 g28808(.B (n_174), .AN (alu_enable), .Q (alu_opcode[5]));
NO2I1LX1 g28809(.B (n_21), .AN (alu_enable), .Q (alu_opcode[4]));
NO2I1LX1 g28810(.B (n_4), .AN (alu_enable), .Q (alu_opcode[3]));
NO2I1LX1 g28811(.B (n_61), .AN (alu_enable), .Q (n_1));
NO2I1LX1 g28812(.B (n_2), .AN (alu_enable), .Q (alu_opcode[1]));
NO2I1LX1 g28813(.B (n_173), .AN (n_172), .Q (alu_opcode[0]));
NA2LX1 g28814(.A (n_171), .B (n_170), .Q (n_235));
NA2LX1 g28815(.A (n_169), .B (n_168), .Q (n_271));
NA2LX1 g28816(.A (n_167), .B (n_166), .Q (n_267));
NA2LX1 g28817(.A (n_165), .B (n_164), .Q (n_263));
NA2LX1 g28818(.A (n_163), .B (n_162), .Q (n_248));
BULX8 g28833(.A (n_172), .Q (alu_enable));
OA311LX1 g28834(.A (n_161), .B (n_160), .C (n_159), .D (n_158), .E
(n_157), .Q (n_172));
ON21LX1 g28836(.A (n_156), .B (n_288), .C (n_155), .Q (n_768));
AO222LX1 g28838(.A (data_in[2]), .B (n_154), .C (\temp_data[2] ), .D
(n_153), .E (\sp[2] ), .F (n_652), .Q (alu_a[2]));
AO222LX1 g28839(.A (data_in[1]), .B (n_154), .C (\temp_data[1] ), .D
(n_153), .E (\sp[1] ), .F (n_652), .Q (alu_a[1]));
AO222LX1 g28840(.A (data_in[0]), .B (n_154), .C (\temp_data[0] ), .D
(n_153), .E (\sp[0] ), .F (n_652), .Q (alu_a[0]));
AN222LX1 g28841(.A (\temp_data[0] ), .B (n_258), .C (\temp_addr[0] ),
.D (n_152), .E (n_229), .F (\temp_addr[8] ), .Q (n_171));
AN222LX1 g28842(.A (\temp_data[4] ), .B (n_258), .C (\temp_addr[4] ),
.D (n_152), .E (n_229), .F (\temp_addr[12] ), .Q (n_169));
AN222LX1 g28843(.A (\temp_data[3] ), .B (n_258), .C (\temp_addr[3] ),
.D (n_152), .E (n_229), .F (\temp_addr[11] ), .Q (n_167));
AN222LX1 g28844(.A (\temp_data[2] ), .B (n_258), .C (\temp_addr[2] ),
.D (n_152), .E (n_229), .F (\temp_addr[10] ), .Q (n_165));
AN222LX1 g28845(.A (\temp_data[1] ), .B (n_258), .C (\temp_addr[1] ),
.D (n_152), .E (n_229), .F (\temp_addr[9] ), .Q (n_163));
AO222LX1 g28846(.A (data_in[7]), .B (n_154), .C (DFT_sdo), .D
(n_153), .E (n_652), .F (\sp[7] ), .Q (alu_a[7]));
AO222LX1 g28847(.A (data_in[6]), .B (n_154), .C (\temp_data[6] ), .D
(n_153), .E (\sp[6] ), .F (n_652), .Q (alu_a[6]));
AO222LX1 g28848(.A (data_in[5]), .B (n_154), .C (\temp_data[5] ), .D
(n_153), .E (\sp[5] ), .F (n_652), .Q (alu_a[5]));
AO222LX1 g28849(.A (data_in[4]), .B (n_154), .C (\temp_data[4] ), .D
(n_153), .E (\sp[4] ), .F (n_652), .Q (alu_a[4]));
AO222LX1 g28850(.A (data_in[3]), .B (n_154), .C (\temp_data[3] ), .D
(n_153), .E (\sp[3] ), .F (n_652), .Q (alu_a[3]));
INLX2 g28851(.A (n_151), .Q (\sp_minus_one[5] ));
HAALX1 g28852(.A (n_150), .B (n_149), .S (n_151), .CO (n_178));
HAALX1 g28853(.A (n_148), .B (\sp[5] ), .S (\sp_plus_one[5] ), .CO
(n_176));
HAALX1 g28854(.A (n_147), .B (\pc[5] ), .S (\next_pc[5] ), .CO
(n_175));
AN22LX1 g28855(.A (n_258), .B (\temp_data[6] ), .C (\temp_addr[6] ),
.D (n_152), .Q (n_282));
AN22LX1 g28856(.A (n_258), .B (DFT_sdo), .C (\temp_addr[7] ), .D
(n_152), .Q (n_286));
AO22LX1 g28857(.A (n_258), .B (\temp_data[5] ), .C (\temp_addr[5] ),
.D (n_152), .Q (n_275));
NO2LX1 g28858(.A (n_146), .B (n_156), .Q (n_778));
NO2LX1 g28864(.A (n_145), .B (n_156), .Q (n_785));
NO2I1LX1 g28865(.B (n_156), .AN (n_724), .Q (n_784));
NO2I1LX1 g28866(.B (n_156), .AN (n_144), .Q (n_783));
NO2LX1 g28867(.A (n_143), .B (n_142), .Q (n_254));
OR5LX1 g28869(.A (n_143), .B (n_616), .C (n_141), .D (n_140), .E
(n_762), .Q (n_696));
NO4LX1 g28870(.A (n_288), .B (n_635), .C (n_769), .D (n_139), .Q
(n_157));
NO4I3LX1 g28871(.D (n_138), .AN (n_143), .BN (n_137), .CN (n_136), .Q
(n_252));
OR7LX1 g28872(.A (n_617), .B (n_141), .C (n_161), .D (n_135), .E
(n_134), .F (n_612), .G (n_658), .Q (n_703));
NA3I1LX1 g28895(.B (n_786), .C (n_136), .AN (n_133), .Q (n_156));
NO3LX1 g28896(.A (n_146), .B (n_132), .C (n_133), .Q (n_143));
ON21LX1 g28899(.A (n_288), .B (n_131), .C (n_130), .Q (n_153));
OR2LX1 g28901(.A (n_288), .B (n_145), .Q (n_146));
NO2I1LX1 g28904(.B (n_623), .AN (n_129), .Q (n_657));
NO2I1LX1 g28912(.B (n_623), .AN (n_618), .Q (n_786));
NO2I1LX1 g28913(.B (n_288), .AN (n_804), .Q (n_154));
NO2I1LX1 g28914(.B (n_623), .AN (n_138), .Q (n_802));
HAALX1 g28919(.A (n_128), .B (\sp[4] ), .S (\sp_plus_one[4] ), .CO
(n_148));
INLX3 g28920(.A (n_127), .Q (\sp_minus_one[4] ));
HAALX1 g28921(.A (n_126), .B (n_125), .S (n_127), .CO (n_150));
HAALX1 g28922(.A (n_124), .B (\pc[4] ), .S (\next_pc[4] ), .CO
(n_147));
ON211LX1 g28923(.A (n_123), .B (pha), .C (n_122), .D (n_121), .Q
(n_139));
NA2I1LX1 g28924(.B (n_120), .AN (n_123), .Q (n_623));
NA2LX1 g28925(.A (\pc[8] ), .B (n_238), .Q (n_170));
OR2LX1 g28926(.A (n_238), .B (n_229), .Q (n_813));
NA2LX1 g28927(.A (\pc[12] ), .B (n_238), .Q (n_168));
NA2LX1 g28928(.A (\pc[11] ), .B (n_238), .Q (n_166));
NA2LX1 g28929(.A (\pc[10] ), .B (n_238), .Q (n_164));
NA2LX1 g28930(.A (\pc[9] ), .B (n_238), .Q (n_162));
OR2LX1 g28931(.A (n_119), .B (n_140), .Q (n_765));
NO4LX1 g28932(.A (n_118), .B (n_117), .C (n_116), .D (n_762), .Q
(n_288));
AN211LX1 g28933(.A (n_773), .B (n_138), .C (n_119), .D (n_614), .Q
(n_256));
AO21LX1 g28936(.A (n_658), .B (n_770), .C (n_769), .Q (n_706));
NO2LX1 g28937(.A (n_115), .B (n_132), .Q (n_134));
NO3I2LX1 g28940(.C (n_622), .AN (n_773), .BN (pha), .Q (n_775));
OR2LX1 g28941(.A (n_774), .B (n_621), .Q (n_259));
NO2I1LX1 g28943(.B (branch_643), .AN (n_761), .Q (n_776));
NO2I1LX1 g28944(.B (n_620), .AN (n_770), .Q (n_769));
NO2LX1 g28945(.A (n_144), .B (n_622), .Q (n_115));
NA3I1LX1 g28946(.B (n_114), .C (n_613), .AN (n_132), .Q (n_123));
BULX1 g28954(.A (n_220), .Q (n_238));
OA21LX1 g28955(.A (n_761), .B (n_762), .C (branch_643), .Q (n_220));
NA2I1LX1 g28956(.B (n_113), .AN (n_777), .Q (n_119));
NA2LX1 g28963(.A (n_114), .B (n_136), .Q (n_622));
NA2I1LX1 g28964(.B (n_773), .AN (n_120), .Q (n_113));
NA2I1LX1 g28965(.B (n_112), .AN (n_751), .Q (n_621));
AND2LX1 g28967(.A (n_111), .B (n_110), .Q (branch_643));
NA2LX1 g28968(.A (n_773), .B (zero_page_15968), .Q (n_620));
NO2I1LX1 g28969(.B (n_770), .AN (n_806), .Q (n_135));
OR4LX1 g28970(.A (n_109), .B (n_655), .C (n_636), .D (n_108), .Q
(n_253));
NO3LX1 g28971(.A (n_638), .B (n_782), .C (n_814), .Q (n_155));
NO2I1LX1 g28972(.B (n_107), .AN (n_619), .Q (n_122));
NA2LX1 g28973(.A (n_255), .B (n_106), .Q (n_779));
ON21LX1 g28974(.A (n_159), .B (n_777), .C (n_770), .Q (n_158));
OR5LX1 g28975(.A (n_615), .B (n_105), .C (n_709), .D (n_810), .E
(n_811), .Q (n_704));
INLX3 g28977(.A (n_104), .Q (\sp_minus_one[3] ));
HAALX1 g28978(.A (n_103), .B (n_102), .S (n_104), .CO (n_126));
HAALX1 g28979(.A (n_101), .B (\sp[3] ), .S (\sp_plus_one[3] ), .CO
(n_128));
INLX1 g28980(.A (n_124), .Q (n_748));
HAALX1 g28981(.A (n_100), .B (\pc[3] ), .S (\next_pc[3] ), .CO
(n_124));
AN211LX1 g28982(.A (n_99), .B (n_98), .C (n_97), .D (n_96), .Q
(n_116));
AND2LX1 g28983(.A (n_332), .B (n_137), .Q (n_120));
OR2LX1 g28984(.A (read_17663), .B (read_modify_write_17759), .Q
(n_770));
NA2LX1 g28985(.A (n_797), .B (read_17663), .Q (n_619));
NO2I1LX1 g28986(.B (read_17663), .AN (n_797), .Q (n_751));
NO2LX1 g28987(.A (n_138), .B (n_129), .Q (n_618));
NA5LX1 g28990(.A (n_636), .B (n_94), .C (n_93), .D (\ir[6] ), .E
(\ir[7] ), .Q (n_121));
OR5LX1 g28992(.A (n_141), .B (n_140), .C (n_807), .D (n_152), .E
(n_651), .Q (n_142));
OR2LX1 g28993(.A (n_92), .B (n_652), .Q (n_109));
NA3LX1 g28995(.A (n_773), .B (n_91), .C (n_90), .Q (n_132));
NO3I1LX1 g28996(.B (n_98), .C (n_89), .AN (n_636), .Q (n_105));
NO6LX1 g28998(.A (n_88), .B (n_159), .C (n_800), .D (n_141), .E
(n_161), .F (n_810), .Q (n_255));
INLX1 g28999(.A (n_114), .Q (zero_page_15968));
ON221LX1 g29001(.A (n_87), .B (n_86), .C (n_21), .D (n_605), .E
(n_85), .Q (n_114));
MU2LX1 g29007(.S (\ir[7] ), .IN0 (n_84), .IN1 (n_83), .Q (n_111));
NO2I1LX1 g29008(.B (n_91), .AN (n_773), .Q (n_636));
NO2LX1 g29009(.A (relative_17630), .B (n_82), .Q (n_137));
AND2LX1 g29010(.A (n_773), .B (n_133), .Q (n_782));
OR2LX1 g29012(.A (n_144), .B (n_724), .Q (n_145));
OR2LX1 g29013(.A (n_637), .B (n_804), .Q (n_763));
AND2LX1 g29014(.A (n_773), .B (n_82), .Q (n_780));
AND2LX1 g29015(.A (n_85), .B (n_81), .Q (n_129));
OR4LX1 g29016(.A (n_616), .B (n_806), .C (n_805), .D (n_634), .Q
(n_764));
ON21LX1 g29017(.A (n_80), .B (read_modify_write_17759), .C (n_79), .Q
(n_92));
NA2I1LX1 g29019(.B (n_78), .AN (n_781), .Q (n_107));
ON221LX1 g29020(.A (n_430), .B (n_77), .C (n_76), .D (n_98), .E
(n_75), .Q (read_17663));
NA6I5LX1 g29021(.F (n_251), .AN (n_612), .BN (n_809), .CN (n_773),
.DN (n_610), .EN (n_250), .Q (n_88));
ON222LX1 g29022(.A (\ir[6] ), .B (n_74), .C (n_73), .D (n_72), .E
(\ir[3] ), .F (n_71), .Q (n_96));
ON22LX1 g29025(.A (n_70), .B (n_21), .C (n_69), .D (n_68), .Q
(n_707));
AND2LX1 g29026(.A (n_801), .B (read_modify_write_17759), .Q (n_637));
NO2I1LX1 g29027(.B (n_613), .AN (n_773), .Q (n_777));
NO2I1LX1 g29028(.B (jump_indirect_17774), .AN (n_654), .Q (n_258));
NA2I1LX1 g29029(.B (n_651), .AN (rti), .Q (n_78));
AND2LX1 g29030(.A (n_797), .B (read_modify_write_17759), .Q (n_781));
NO2I1LX1 g29031(.B (n_67), .AN (n_805), .Q (n_708));
NO2I1LX1 g29032(.B (n_90), .AN (n_66), .Q (n_652));
NA2LX1 g29033(.A (n_651), .B (rti), .Q (n_130));
NO2I1LX1 g29034(.B (n_136), .AN (n_773), .Q (n_638));
AND2LX1 g29035(.A (n_805), .B (n_67), .Q (n_752));
OR2LX1 g29036(.A (n_771), .B (n_810), .Q (n_617));
NO2LX1 g29037(.A (n_65), .B (n_64), .Q (n_724));
AND5LX1 g29039(.A (n_63), .B (n_76), .C (n_62), .D (n_21), .E (n_61),
.Q (n_82));
NO3I2LX1 g29040(.C (jump_indirect_17774), .AN (n_803), .BN (n_60), .Q
(n_774));
OR3LX1 g29041(.A (n_798), .B (n_799), .C (n_800), .Q (n_616));
AND2LX1 g29042(.A (n_59), .B (n_4), .Q (n_85));
AN21LX1 g29043(.A (n_58), .B (n_8), .C (\ir[4] ), .Q (n_86));
ON21LX1 g29044(.A (n_65), .B (n_57), .C (n_56), .Q (n_133));
ON21LX1 g29045(.A (n_55), .B (n_54), .C (n_53), .Q (n_83));
ON21LX1 g29046(.A (n_52), .B (n_54), .C (n_51), .Q (n_84));
NA2LX1 g29047(.A (n_50), .B (n_49), .Q (n_243));
NA2LX1 g29048(.A (n_251), .B (n_48), .Q (n_140));
NO3I1LX1 g29049(.B (n_615), .C (n_762), .AN (n_257), .Q (n_106));
ON22LX1 g29050(.A (n_47), .B (n_58), .C (n_46), .D (\ir[1] ), .Q
(n_117));
ON221LX1 g29051(.A (n_602), .B (n_45), .C (n_604), .D (n_44), .E
(reset_n), .Q (n_118));
HAALX1 g29052(.A (n_43), .B (\pc[2] ), .S (\next_pc[2] ), .CO
(n_100));
HAALX1 g29053(.A (n_42), .B (\sp[2] ), .S (\sp_plus_one[2] ), .CO
(n_101));
OA31LX1 g29054(.A (n_601), .B (n_602), .C (n_89), .D (n_41), .Q
(n_91));
OR2LX1 g29055(.A (php), .B (pha), .Q (n_144));
AND2LX1 g29056(.A (n_815), .B (n_60), .Q (n_654));
INLX3 g29057(.A (n_615), .Q (n_633));
OR2LX1 g29059(.A (n_651), .B (n_40), .Q (n_615));
NA2LX1 g29060(.A (n_39), .B (n_609), .Q (n_136));
AND2LX1 g29061(.A (n_803), .B (jump_indirect_17774), .Q (n_798));
OR2LX1 g29062(.A (n_69), .B (n_89), .Q (n_90));
AND2LX1 g29063(.A (n_809), .B (n_38), .Q (n_771));
OR2LX1 g29064(.A (n_159), .B (n_229), .Q (n_245));
AND2LX1 g29065(.A (n_815), .B (jump_indirect_17774), .Q (n_152));
NA2I1LX1 g29066(.B (n_60), .AN (indirecty_17792), .Q (n_138));
OR2LX1 g29067(.A (n_611), .B (n_805), .Q (n_141));
NA2I1LX1 g29068(.B (n_815), .AN (n_60), .Q (n_50));
NA2LX1 g29069(.A (n_58), .B (n_98), .Q (n_81));
NO2I1LX1 g29070(.B (n_38), .AN (n_809), .Q (n_655));
NA2I1LX1 g29071(.B (n_58), .AN (n_605), .Q (n_59));
AND2LX1 g29072(.A (n_803), .B (indirecty_17792), .Q (n_635));
NO2I1LX1 g29073(.B (n_60), .AN (n_803), .Q (n_806));
AO21LX1 g29074(.A (n_37), .B (\sp[2] ), .C (n_103), .Q
(\sp_minus_one[2] ));
ON211LX1 g29076(.A (n_36), .B (n_35), .C (n_79), .D (n_80), .Q
(n_614));
NA3I1LX1 g29077(.B (n_131), .C (n_34), .AN (n_773), .Q (n_160));
NA4I1LX1 g29078(.B (n_33), .C (n_603), .D (n_430), .AN (n_39), .Q
(n_613));
ON31LX1 g29079(.A (\ir[1] ), .B (n_32), .C (n_31), .D (n_21), .Q
(n_99));
INLX1 g29080(.A (n_56), .Q (rti));
OR4LX1 g29083(.A (n_57), .B (n_600), .C (n_74), .D (\ir[3] ), .Q
(n_56));
ON31LX1 g29084(.A (n_600), .B (n_76), .C (n_607), .D (n_38), .Q
(n_67));
OA21LX1 g29085(.A (n_57), .B (n_4), .C (n_30), .Q (n_64));
OA221LX1 g29086(.A (n_174), .B (n_602), .C (\ir[1] ), .D (n_13), .E
(n_603), .Q (n_75));
MU2LX1 g29087(.S (n_8), .IN0 (n_29), .IN1 (n_33), .Q (n_77));
AO221LX1 g29088(.A (\state[2] ), .B (n_28), .C (n_436), .D (n_26), .E
(\state[3] ), .Q (n_251));
OA32LX1 g29091(.A (n_61), .B (n_76), .C (n_608), .D (n_4), .E (n_44),
.Q (n_70));
MU2LX1 g29092(.S (alu_status[7]), .IN0 (n_25), .IN1 (n_24), .Q
(n_51));
MU2LX1 g29093(.S (alu_status[0]), .IN0 (n_25), .IN1 (n_24), .Q
(n_53));
AN32LX1 g29094(.A (n_74), .B (n_23), .C (n_33), .D (n_7), .E (n_110),
.Q (n_41));
ON21LX1 g29095(.A (n_608), .B (n_68), .C (n_22), .Q
(read_modify_write_17759));
AN211LX1 g29096(.A (n_31), .B (n_21), .C (n_2), .D (n_7), .Q (n_97));
NA2I1LX1 g29097(.B (n_49), .AN (n_815), .Q (n_250));
AND2LX1 g29098(.A (n_606), .B (n_2), .Q (n_39));
NA2I1LX1 g29099(.B (n_80), .AN (n_108), .Q (n_612));
NA2LX1 g29101(.A (n_20), .B (n_711), .Q (n_79));
OR2LX1 g29102(.A (n_761), .B (n_634), .Q (n_611));
NA2I1LX1 g29103(.B (n_609), .AN (n_44), .Q (n_60));
OR2LX1 g29104(.A (n_797), .B (n_804), .Q (n_161));
NA2I1LX1 g29105(.B (n_112), .AN (n_803), .Q (n_159));
NO2LX1 g29106(.A (\sp[2] ), .B (n_37), .Q (n_103));
AND2LX1 g29107(.A (n_20), .B (n_812), .Q (n_610));
OR2LX1 g29108(.A (n_808), .B (n_809), .Q (n_709));
NA3I1LX1 g29110(.B (\ir[3] ), .C (\ir[5] ), .AN (n_98), .Q (n_69));
OA21LX1 g29111(.A (n_19), .B (n_18), .C (n_711), .Q (n_229));
NA3I1LX1 g29112(.B (n_17), .C (n_23), .AN (n_65), .Q (n_38));
OA31LX1 g29113(.A (n_174), .B (n_2), .C (\ir[3] ), .D (n_601), .Q
(n_72));
AN21LX1 g29114(.A (n_36), .B (n_16), .C (n_35), .Q (n_40));
NO3LX1 g29115(.A (n_604), .B (n_44), .C (n_21), .Q (indirecty_17792));
AND4LX1 g29116(.A (n_23), .B (\ir[4] ), .C (n_2), .D (n_4), .Q
(relative_17630));
NO3I1LX1 g29117(.B (n_607), .C (n_76), .AN (n_93), .Q
(jump_indirect_17774));
NO3LX1 g29118(.A (n_30), .B (n_74), .C (\ir[5] ), .Q (php));
NA3LX1 g29119(.A (n_33), .B (n_94), .C (n_8), .Q (n_22));
AN21LX1 g29120(.A (n_602), .B (n_61), .C (n_87), .Q (n_46));
OA211LX1 g29121(.A (n_7), .B (n_61), .C (n_13), .D (n_604), .Q
(n_47));
NO5I4LX1 g29122(.E (n_74), .AN (n_7), .BN (n_298), .CN (\ir[6] ), .DN
(n_61), .Q (pha));
OA22LX1 g29123(.A (n_44), .B (n_61), .C (n_68), .D (n_2), .Q (n_58));
AN22LX1 g29124(.A (n_76), .B (n_14), .C (n_23), .D (\ir[3] ), .Q
(n_45));
AN22LX1 g29125(.A (n_13), .B (n_174), .C (n_32), .D (\ir[1] ), .Q
(n_63));
NA2LX1 g29126(.A (n_23), .B (\ir[1] ), .Q (n_89));
BULX8 g29140(.A (n_66), .Q (n_773));
AND2LX1 g29141(.A (n_18), .B (n_812), .Q (n_66));
AND2LX1 g29142(.A (n_12), .B (n_710), .Q (n_747));
NO2I1LX1 g29143(.B (n_16), .AN (n_812), .Q (n_809));
NO2I1LX1 g29144(.B (n_26), .AN (n_710), .Q (n_762));
NO2I1LX1 g29145(.B (n_35), .AN (n_19), .Q (n_804));
AND2LX1 g29146(.A (n_93), .B (n_3), .Q (n_87));
AND2LX1 g29147(.A (n_94), .B (\ir[5] ), .Q (n_31));
NO2I1LX1 g29148(.B (n_11), .AN (n_710), .Q (n_814));
NO2I1LX1 g29149(.B (n_28), .AN (n_710), .Q (n_803));
INLX1 g29153(.A (n_34), .Q (n_651));
NA2LX1 g29155(.A (n_12), .B (n_9), .Q (n_34));
AND2LX1 g29156(.A (n_711), .B (n_19), .Q (n_634));
NO2I1LX1 g29157(.B (n_28), .AN (n_711), .Q (n_761));
NO2LX1 g29158(.A (n_16), .B (n_35), .Q (n_653));
NA2I1LX1 g29159(.B (n_711), .AN (n_16), .Q (n_48));
NA2LX1 g29160(.A (n_23), .B (\ir[6] ), .Q (n_57));
NA2I1LX1 g29161(.B (n_9), .AN (n_28), .Q (n_131));
NO2LX1 g29162(.A (n_173), .B (n_33), .Q (n_29));
NO2I1LX1 g29163(.B (n_11), .AN (n_711), .Q (n_799));
NA2LX1 g29164(.A (n_10), .B (n_17), .Q (n_25));
NA2LX1 g29165(.A (n_13), .B (\ir[4] ), .Q (n_98));
NO2I1LX1 g29166(.B (n_28), .AN (n_812), .Q (n_805));
AND2LX1 g29167(.A (n_710), .B (n_19), .Q (n_815));
INLX1 g29168(.A (n_49), .Q (n_659));
NA2LX1 g29171(.A (n_710), .B (n_18), .Q (n_49));
NO2I1LX1 g29172(.B (n_11), .AN (n_812), .Q (n_810));
NO2I1LX1 g29173(.B (n_36), .AN (n_812), .Q (n_808));
NA2I1LX1 g29174(.B (n_36), .AN (n_12), .Q (n_20));
NO2LX1 g29175(.A (\ir[4] ), .B (n_604), .Q (n_609));
NO2I1LX1 g29176(.B (n_711), .AN (n_11), .Q (n_257));
AND2LX1 g29177(.A (n_711), .B (n_18), .Q (n_797));
AND2LX1 g29179(.A (n_12), .B (n_812), .Q (n_807));
INLX1 g29180(.A (n_112), .Q (n_658));
NA2I1LX1 g29183(.B (n_711), .AN (n_26), .Q (n_112));
AND2LX1 g29184(.A (n_9), .B (n_18), .Q (n_108));
NA2LX1 g29185(.A (n_602), .B (\ir[1] ), .Q (n_608));
INLX1 g29186(.A (n_80), .Q (n_801));
NA2I1LX1 g29188(.B (n_9), .AN (n_26), .Q (n_80));
NO2I1LX1 g29189(.B (n_36), .AN (n_711), .Q (n_811));
NA2I1LX1 g29190(.B (n_93), .AN (n_74), .Q (n_65));
NO2LX1 g29191(.A (n_35), .B (n_11), .Q (n_800));
AN21LX1 g29192(.A (\ir[1] ), .B (\ir[6] ), .C (n_8), .Q (n_71));
ON21LX1 g29193(.A (\ir[0] ), .B (n_8), .C (n_4), .Q (n_62));
AND3LX1 g29194(.A (\ir[4] ), .B (n_2), .C (n_61), .Q (n_110));
NA3LX1 g29195(.A (\ir[6] ), .B (n_173), .C (n_4), .Q (n_54));
NA3LX1 g29196(.A (n_17), .B (\ir[5] ), .C (n_173), .Q (n_24));
NA3LX1 g29197(.A (n_605), .B (\ir[6] ), .C (n_8), .Q (n_607));
AND3LX1 g29198(.A (n_10), .B (n_3), .C (n_8), .Q (n_606));
NA3LX1 g29199(.A (n_7), .B (n_61), .C (n_3), .Q (n_30));
HAALX1 g29201(.A (\pc[1] ), .B (\pc[0] ), .S (\next_pc[1] ), .CO
(n_43));
HAALX1 g29202(.A (\sp[0] ), .B (\sp[1] ), .S (\sp_plus_one[1] ), .CO
(n_42));
EO2LX1 g29204(.A (\ir[5] ), .B (alu_status[1]), .Q (n_55));
EO2LX1 g29205(.A (\ir[5] ), .B (alu_status[6]), .Q (n_52));
EO2LX1 g29206(.A (\ir[4] ), .B (n_173), .Q (n_73));
NO2LX1 g29207(.A (n_61), .B (\ir[1] ), .Q (n_605));
NO2LX1 g29208(.A (n_2), .B (\ir[0] ), .Q (n_94));
INLX1 g29213(.A (n_76), .Q (n_7));
NA2LX1 g29214(.A (n_173), .B (\ir[3] ), .Q (n_76));
OR2LX1 g29215(.A (n_6), .B (\state[4] ), .Q (n_28));
INLX1 g29216(.A (n_68), .Q (n_14));
NA2LX1 g29217(.A (n_430), .B (n_173), .Q (n_68));
OR2LX1 g29218(.A (n_5), .B (\state[4] ), .Q (n_26));
NA2LX1 g29219(.A (n_710), .B (\state[1] ), .Q (n_695));
NO2LX1 g29220(.A (n_430), .B (\ir[0] ), .Q (n_23));
NA2LX1 g29221(.A (n_4), .B (n_61), .Q (n_604));
NA2LX1 g29222(.A (\ir[1] ), .B (\ir[0] ), .Q (n_603));
NO2LX1 g29223(.A (n_174), .B (\ir[4] ), .Q (n_93));
NA2LX1 g29224(.A (\ir[0] ), .B (n_2), .Q (n_44));
INLX1 g29226(.A (n_32), .Q (n_17));
NA2LX1 g29228(.A (n_4), .B (n_3), .Q (n_32));
NO2LX1 g29229(.A (\ir[4] ), .B (n_4), .Q (n_33));
INLX1 g29233(.A (n_602), .Q (n_13));
NA2LX1 g29235(.A (n_3), .B (\ir[7] ), .Q (n_602));
NA2LX1 g29236(.A (\ir[3] ), .B (n_174), .Q (n_601));
NO2LX1 g29237(.A (\ir[0] ), .B (\ir[5] ), .Q (n_10));
NO2I1LX1 g29238(.B (n_6), .AN (\state[4] ), .Q (n_12));
NA2LX1 g29241(.A (n_21), .B (n_174), .Q (n_600));
NA2I1LX1 g29242(.B (\state[4] ), .AN (n_5), .Q (n_11));
NA2LX1 g29243(.A (n_2), .B (n_8), .Q (n_74));
NA3I1LX1 g29244(.B (\state[4] ), .C (\state[0] ), .AN (\state[1] ),
.Q (n_16));
NO3I1LX1 g29245(.B (\state[4] ), .C (\state[1] ), .AN (\state[0] ),
.Q (n_19));
NO3I1LX1 g29246(.B (\state[4] ), .C (\state[0] ), .AN (\state[1] ),
.Q (n_18));
NA3I1LX1 g29247(.B (\state[4] ), .C (\state[1] ), .AN (\state[0] ),
.Q (n_36));
AND4LX1 g29248(.A (\pc[7] ), .B (\pc[6] ), .C (\pc[5] ), .D (\pc[4]
), .Q (n_749));
INLX1 g29250(.A (\ir[5] ), .Q (n_174));
INLX1 g29257(.A (n_430), .Q (n_61));
INLX1 g29280(.A (\ir[1] ), .Q (n_2));
INLX1 g29289(.A (\ir[3] ), .Q (n_4));
INLX1 g29294(.A (\ir[0] ), .Q (n_173));
INLX1 g29306(.A (\ir[6] ), .Q (n_3));
INLX1 g29314(.A (\ir[4] ), .Q (n_21));
INLX1 g29326(.A (\ir[7] ), .Q (n_8));
NO2I1LX1 g29329(.B (\state[4] ), .AN (\state[3] ), .Q (n_787));
NO2LX1 g29330(.A (\state[2] ), .B (\state[3] ), .Q (n_812));
INLX1 g29334(.A (n_35), .Q (n_9));
NA2I1LX1 g29335(.B (\state[2] ), .AN (\state[3] ), .Q (n_35));
AND2LX1 g29336(.A (\state[3] ), .B (n_436), .Q (n_711));
NO2LX1 g29337(.A (\state[4] ), .B (\state[3] ), .Q (n_693));
NA2I1LX1 g29338(.B (\sp_minus_one[0] ), .AN (\sp[1] ), .Q (n_37));
NA2LX1 g29339(.A (\state[1] ), .B (\state[0] ), .Q (n_6));
OR2LX1 g29340(.A (\state[1] ), .B (\state[0] ), .Q (n_5));
AND2LX1 g29341(.A (\state[3] ), .B (\state[2] ), .Q (n_710));
INLX1 g29342(.A (\sp[5] ), .Q (n_149));
INLX1 g29343(.A (\sp[4] ), .Q (n_125));
INLX1 g29347(.A (\sp[6] ), .Q (n_177));
INLX1 g29348(.A (\sp[0] ), .Q (\sp_minus_one[0] ));
INLX1 g29351(.A (\sp[3] ), .Q (n_102));
BUCLX4 g29352(.A (n_1), .Q (alu_opcode[2]));
endmodule
 
module t6507lp(clk, reset_n, data_in, rw_mem, data_out, address,
RC_CG_TEST_PORT);
input clk, reset_n, RC_CG_TEST_PORT;
input [7:0] data_in;
output rw_mem;
output [7:0] data_out;
output [12:0] address;
wire clk, reset_n, RC_CG_TEST_PORT;
wire [7:0] data_in;
wire rw_mem;
wire [7:0] data_out;
wire [12:0] address;
wire \alu_a[0] , \alu_a[1] , \alu_a[2] , \alu_a[3] , \alu_a[4] ,
\alu_a[5] , \alu_a[6] , \alu_a[7] ;
wire alu_enable, \alu_opcode[0] , \alu_opcode[1] , \alu_opcode[2] ,
\alu_opcode[3] , \alu_opcode[4] , \alu_opcode[5] ,
\alu_opcode[6] ;
wire \alu_opcode[7] , \alu_result[0] , \alu_result[1] ,
\alu_result[2] , \alu_result[3] , \alu_result[4] ,
\alu_result[5] , \alu_result[6] ;
wire \alu_result[7] , \alu_status[0] , \alu_status[1] ,
\alu_status[2] , \alu_status[3] , \alu_status[4] ,
\alu_status[5] , \alu_status[6] ;
wire \alu_status[7] , \alu_x[0] , \alu_x[1] , \alu_x[2] , \alu_x[3] ,
\alu_x[4] , \alu_x[5] , \alu_x[6] ;
wire \alu_x[7] , \alu_y[0] , \alu_y[1] , \alu_y[2] , \alu_y[3] ,
\alu_y[4] , \alu_y[5] , \alu_y[6] ;
wire \alu_y[7] , n_39, n_40;
t6507lp_alu t6507lp_alu(.clk (clk), .reset_n (reset_n), .alu_enable
(alu_enable), .alu_result ({\alu_result[7] , \alu_result[6] ,
\alu_result[5] , \alu_result[4] , \alu_result[3] ,
\alu_result[2] , \alu_result[1] , \alu_result[0] }), .alu_status
({\alu_status[7] , \alu_status[6] , \alu_status[5] ,
\alu_status[4] , \alu_status[3] , \alu_status[2] ,
\alu_status[1] , \alu_status[0] }), .alu_opcode ({\alu_opcode[7]
, \alu_opcode[6] , \alu_opcode[5] , \alu_opcode[4] ,
\alu_opcode[3] , \alu_opcode[2] , \alu_opcode[1] ,
\alu_opcode[0] }), .alu_a ({\alu_a[7] , \alu_a[6] , \alu_a[5] ,
\alu_a[4] , \alu_a[3] , \alu_a[2] , \alu_a[1] , \alu_a[0] }),
.alu_x ({\alu_x[7] , \alu_x[6] , \alu_x[5] , \alu_x[4] ,
\alu_x[3] , \alu_x[2] , \alu_x[1] , \alu_x[0] }), .alu_y
({\alu_y[7] , \alu_y[6] , \alu_y[5] , \alu_y[4] , \alu_y[3] ,
\alu_y[2] , \alu_y[1] , \alu_y[0] }), .RC_CG_TEST_PORT
(RC_CG_TEST_PORT), .DFT_sdi (data_in[0]));
t6507lp_fsm_DATA_SIZE8_ADDR_SIZE13 t6507lp_fsm(.clk (clk), .reset_n
(reset_n), .alu_result ({\alu_result[7] , \alu_result[6] ,
\alu_result[5] , \alu_result[4] , \alu_result[3] ,
\alu_result[2] , \alu_result[1] , \alu_result[0] }), .alu_status
({\alu_status[7] , \alu_status[6] , \alu_status[5] ,
\alu_status[4] , \alu_status[3] , \alu_status[2] ,
\alu_status[1] , \alu_status[0] }), .data_in (data_in), .alu_x
({\alu_x[7] , \alu_x[6] , \alu_x[5] , \alu_x[4] , \alu_x[3] ,
\alu_x[2] , \alu_x[1] , \alu_x[0] }), .alu_y ({\alu_y[7] ,
\alu_y[6] , \alu_y[5] , \alu_y[4] , \alu_y[3] , \alu_y[2] ,
\alu_y[1] , \alu_y[0] }), .address (address), .rw_mem (rw_mem),
.data_out ({data_out[7:1], n_39}), .alu_opcode ({\alu_opcode[7]
, \alu_opcode[6] , \alu_opcode[5] , \alu_opcode[4] ,
\alu_opcode[3] , \alu_opcode[2] , \alu_opcode[1] ,
\alu_opcode[0] }), .alu_a ({\alu_a[7] , \alu_a[6] , \alu_a[5] ,
\alu_a[4] , \alu_a[3] , \alu_a[2] , \alu_a[1] , \alu_a[0] }),
.alu_enable (alu_enable), .RC_CG_TEST_PORT (RC_CG_TEST_PORT),
.DFT_sdo (n_40));
MU2LX1 DFT_shared_out_mux_0(.S (RC_CG_TEST_PORT), .IN0 (n_39), .IN1
(n_40), .Q (data_out[0]));
endmodule
 
module t6507lp_io(clk, reset_n, scan_enable, data_in, rw_mem, data_out,
address);
input clk, reset_n, scan_enable;
input [7:0] data_in;
output rw_mem;
output [7:0] data_out;
output [12:0] address;
wire clk, reset_n, scan_enable;
wire [7:0] data_in;
wire rw_mem;
wire [7:0] data_out;
wire [12:0] address;
wire \addressIO[0] , \addressIO[1] , \addressIO[2] ,
\addressIO[3] , \addressIO[4] , \addressIO[5] , \addressIO[6] ;
wire \addressIO[7] , \addressIO[8] , \addressIO[9] , \addressIO[10] ,
\addressIO[11] , \addressIO[12] , chainfinal, clkIO;
wire \data_inIO[0] , \data_inIO[1] , \data_inIO[2] , \data_inIO[3] ,
\data_inIO[4] , \data_inIO[5] , \data_inIO[6] , \data_inIO[7] ;
wire \data_outIO[0] , \data_outIO[1] , \data_outIO[2] ,
\data_outIO[3] , \data_outIO[4] , \data_outIO[5] ,
\data_outIO[6] , \data_outIO[7] ;
wire dummy_clampc, gnd, muxed, n_34, pipo0, pipo1, pipo2, pipo3;
wire pipo4, pipo5, pipo6, pipo7, pipo8, pipo9, pipo10, reset_nIO;
wire rw_memIO, vdd;
t6507lp t6507lp(.clk (clkIO), .reset_n (reset_nIO), .data_in
({\data_inIO[7] , \data_inIO[6] , \data_inIO[5] , \data_inIO[4]
, \data_inIO[3] , \data_inIO[2] , \data_inIO[1] , \data_inIO[0]
}), .rw_mem (rw_memIO), .data_out ({\data_outIO[7] ,
\data_outIO[6] , \data_outIO[5] , \data_outIO[4] ,
\data_outIO[3] , \data_outIO[2] , \data_outIO[1] ,
\data_outIO[0] }), .address ({\addressIO[12] , \addressIO[11] ,
\addressIO[10] , \addressIO[9] , \addressIO[8] , \addressIO[7] ,
\addressIO[6] , \addressIO[5] , \addressIO[4] , \addressIO[3] ,
\addressIO[2] , \addressIO[1] , \addressIO[0] }),
.RC_CG_TEST_PORT (n_34));
BT4P address_pad0(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[0] ), .EN (1'b0),
.PAD (address[0]));
BT4P address_pad1(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[1] ), .EN (1'b0),
.PAD (address[1]));
BT4P address_pad10(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\addressIO[10]
), .EN (1'b0), .PAD (address[10]));
BT4P address_pad11(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\addressIO[11]
), .EN (1'b0), .PAD (address[11]));
BT4P address_pad12(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\addressIO[12]
), .EN (1'b0), .PAD (address[12]));
BT4P address_pad2(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[2] ), .EN (1'b0),
.PAD (address[2]));
BT4P address_pad3(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[3] ), .EN (1'b0),
.PAD (address[3]));
BT4P address_pad4(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[4] ), .EN (1'b0),
.PAD (address[4]));
BT4P address_pad5(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[5] ), .EN (1'b0),
.PAD (address[5]));
BT4P address_pad6(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[6] ), .EN (1'b0),
.PAD (address[6]));
BT4P address_pad7(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[7] ), .EN (1'b0),
.PAD (address[7]));
BT4P address_pad8(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[8] ), .EN (1'b0),
.PAD (address[8]));
BT4P address_pad9(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (\addressIO[9] ), .EN (1'b0),
.PAD (address[9]));
ICP clk_pad(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo9), .PAD (clk), .Y (clkIO),
.PO (pipo10));
ICP data_in_pad0(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo7), .PAD (data_in[0]), .Y
(\data_inIO[0] ), .PO (pipo8));
ICP data_in_pad1(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo6), .PAD (data_in[1]), .Y
(\data_inIO[1] ), .PO (pipo7));
ICP data_in_pad2(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo5), .PAD (data_in[2]), .Y
(\data_inIO[2] ), .PO (pipo6));
ICP data_in_pad3(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo4), .PAD (data_in[3]), .Y
(\data_inIO[3] ), .PO (pipo5));
ICP data_in_pad4(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo3), .PAD (data_in[4]), .Y
(\data_inIO[4] ), .PO (pipo4));
ICP data_in_pad5(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo2), .PAD (data_in[5]), .Y
(\data_inIO[5] ), .PO (pipo3));
ICP data_in_pad6(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo1), .PAD (data_in[6]), .Y
(\data_inIO[6] ), .PO (pipo2));
ICP data_in_pad7(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo0), .PAD (data_in[7]), .Y
(\data_inIO[7] ), .PO (pipo1));
BT4P data_out_pad0(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[0]
), .EN (1'b0), .PAD (data_out[0]));
BT4P data_out_pad1(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[1]
), .EN (1'b0), .PAD (data_out[1]));
BT4P data_out_pad2(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[2]
), .EN (1'b0), .PAD (data_out[2]));
BT4P data_out_pad3(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[3]
), .EN (1'b0), .PAD (data_out[3]));
BT4P data_out_pad4(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[4]
), .EN (1'b0), .PAD (data_out[4]));
BT4P data_out_pad5(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[5]
), .EN (1'b0), .PAD (data_out[5]));
BT4P data_out_pad6(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[6]
), .EN (1'b0), .PAD (data_out[6]));
BT4P data_out_pad7(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC
(dummy_clampc), .GND5O (gnd), .GND5R (gnd), .A (\data_outIO[7]
), .EN (1'b0), .PAD (data_out[7]));
GND5ALLPADP gnd_pad_down(.CLAMPC (dummy_clampc), .VDD5O (vdd), .VDD5R
(vdd), .GND (gnd));
GND5ALLPADP gnd_pad_left(.CLAMPC (dummy_clampc), .VDD5O (vdd), .VDD5R
(vdd), .GND (gnd));
GND5ALLPADP gnd_pad_right(.CLAMPC (dummy_clampc), .VDD5O (vdd),
.VDD5R (vdd), .GND (gnd));
GND5ALLPADP gnd_pad_up(.CLAMPC (dummy_clampc), .VDD5O (vdd), .VDD5R
(vdd), .GND (gnd));
CORNERCLMP left_down_pad(.VDD5O (vdd), .VDD5R (vdd), .GND5O (gnd),
.GND5R (gnd), .CLAMPC (dummy_clampc));
CORNERCLMP left_up_pad(.VDD5O (vdd), .VDD5R (vdd), .GND5O (gnd),
.GND5R (gnd), .CLAMPC (dummy_clampc));
ICP reset_n_pad(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo8), .PAD (reset_n), .Y
(reset_nIO), .PO (pipo9));
CORNERCLMP right_down_pad(.VDD5O (vdd), .VDD5R (vdd), .GND5O (gnd),
.GND5R (gnd), .CLAMPC (dummy_clampc));
CORNERCLMP right_up_pad(.VDD5O (vdd), .VDD5R (vdd), .GND5O (gnd),
.GND5R (gnd), .CLAMPC (dummy_clampc));
BT4P rw_mem_pad(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .A (muxed), .EN (1'b0), .PAD
(rw_mem));
ICP scan_pad(.VDD5O (vdd), .VDD5R (vdd), .CLAMPC (dummy_clampc),
.GND5O (gnd), .GND5R (gnd), .PI (pipo10), .PAD (scan_enable), .Y
(n_34), .PO (chainfinal));
VDD5ALLPADP vdd_pad_down(.CLAMPC (dummy_clampc), .VDD (vdd), .GND5O
(gnd), .GND5R (gnd));
VDD5ALLPADP vdd_pad_left(.CLAMPC (dummy_clampc), .VDD (vdd), .GND5O
(gnd), .GND5R (gnd));
VDD5ALLPADP vdd_pad_right(.CLAMPC (dummy_clampc), .VDD (vdd), .GND5O
(gnd), .GND5R (gnd));
VDD5ALLPADP vdd_pad_up(.CLAMPC (dummy_clampc), .VDD (vdd), .GND5O
(gnd), .GND5R (gnd));
MU2LX1 g95(.S (reset_nIO), .IN0 (rw_memIO), .IN1 (chainfinal), .Q
(muxed));
endmodule
 
/trunk/syn/cadence/results/t6507lp_io.enc_setup.tcl
0,0 → 1,35
#####################################################################
#
# First Encounter setup file
# Created by Encounter(R) RTL Compiler on 08/31/09 11:31:49
#
#####################################################################
 
 
# This script is intended for use with Encounter version 4.2 or later.
# Multiple timing modes require Encounter version 5.2 or later.
# CPF requires Encounter version 6.2 or later.
 
 
# Design Import
###########################################################
loadConfig /home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp_io.conf
defIn /home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp_io.scan.def
 
 
# Mode Setup
###########################################################
source /home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp_io.mode
 
 
# The following is partial list of suggested prototyping commands.
# These commands are provided for reference only.
# Please consult the First Encounter documentation for more information.
# Placement...
# ecoPlace ;# legalizes placement including placing any cells that may not be placed
# - or -
# placeDesign -incremental ;# adjusts existing placement
# - or -
# placeDesign ;# performs detailed placement discarding any existing placement
# Optimization & Timing...
# optDesign -preCTS ;# performs trial route and optimization

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