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URL https://opencores.org/ocsvn/tg68kc/tg68kc/trunk

Subversion Repositories tg68kc

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 8 to Rev 9
    Reverse comparison

Rev 8 → Rev 9

/tg68kc/trunk/TG68K_Pack.vhd
29,7 → 29,7
ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4,
st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3,
andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3,
rtd1, rtd2, trap00, trap0, trap1, trap2, trap3,
rte4, rte5, rtd1, rtd2, trap00, trap0, trap1, trap2, trap3,
trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1,
mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2);
115,7 → 115,7
constant hold_ea_data : integer := 79; --
constant store_ea_packdata : integer := 80; --
constant exec_BS : integer := 81; --
constant save_OP2 : integer := 82; --
constant hold_OP2 : integer := 82; --
constant opcTRAPV : integer := 83; --
 
constant lastOpcBit : integer := 83;
/tg68kc/trunk/TG68KdotC_Kernel.vhd
21,6 → 21,7
------------------------------------------------------------------------------
------------------------------------------------------------------------------
 
-- 04.11.2019 TG insert RTE from TH
-- 03.11.2019 TG insert TrapV from TH
-- 03.11.2019 TG bugfix MUL 64Bit
-- 03.11.2019 TG rework barrel shifter - some other tweaks
696,7 → 697,7
exec_write_back <= '1';
END IF;
 
IF exec(save_OP2)='1' THEN
IF exec(hold_OP2)='1' THEN
use_direct_data <= '1';
END IF;
IF set_direct_data='1' THEN
1336,7 → 1337,7
PROCESS (clk, cpu, OP1out, OP2out, opcode, exe_condition, nextpass, micro_state, decodeOPC, state, setexecOPC, Flags, FlagsSR, direct_data, build_logical,
build_bcd, set_Z_error, trapd, movem_run, last_data_read, set, set_V_Flag, z_error, trap_trace, trap_interrupt,
SVmode, preSVmode, stop, long_done, ea_only, setstate, execOPC, exec_write_back, exe_datatype,
datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, trap_trapv,
datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, trap_trapv, last_data_in,
long_start, set_datatype, sndOPC, set_exec, exec, ea_build_now, reg_QA, reg_QB, make_berr, trap_berr)
BEGIN
TG68_PC_brw <= '0';
3183,6 → 3184,13
writeSR <= '1';
next_micro_state <= trap3;
-- return from exception - RTE
-- fetch PC and status register from stack
-- 010+ fetches another word containing
-- the 12 bit vector offset and the
-- frame format. If the frame format is
-- 2 another two words have to be taken
-- from the stack
WHEN rte1 => -- RTE
datatype <= "10";
setstate <= "10";
3198,6 → 3206,7
datatype <= "01";
set(update_FC) <= '1';
IF (VBR_Stackframe=1 OR (cpu(0)='1' AND VBR_Stackframe=2)) AND opcode(2)='0' THEN
-- 010+ reads another word
setstate <= "10";
set(postadd) <= '1';
setstackaddr <= '1';
3205,10 → 3214,31
ELSE
next_micro_state <= nop;
END IF;
WHEN rte3 => -- RTE
next_micro_state <= nop;
-- set(update_FC) <= '1';
 
-- WHEN rte3 => -- RTE
-- next_micro_state <= nop;
---- set(update_FC) <= '1';
-- paste and copy form TH ---------
when rte3 => -- RTE
setstate <= "01"; -- idle state to wait
-- for input data to
-- arrive
next_micro_state <= rte4;
WHEN rte4 => -- RTE
-- check for stack frame format #2
if last_data_in(15 downto 12)="0010" then
-- read another 32 bits in this case
setstate <= "10"; -- read
datatype <= "10"; -- long word
set(postadd) <= '1';
setstackaddr <= '1';
next_micro_state <= rte5;
else
datatype <= "01";
next_micro_state <= nop;
end if;
WHEN rte5 => -- RTE
next_micro_state <= nop;
-------------------------------------
 
WHEN rtd1 => -- RTD
next_micro_state <= rtd2;
3299,7 → 3329,7
END IF;
WHEN mul_end1 => -- mulu
IF opcode(15)='0' THEN
set(save_OP2) <= '1';
set(hold_OP2) <= '1';
END IF;
datatype <= "10";
set(opcMULU) <= '1';

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