URL
https://opencores.org/ocsvn/tg68kc/tg68kc/trunk
Subversion Repositories tg68kc
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- This comparison shows the changes necessary to convert path
/tg68kc/trunk
- from Rev 7 to Rev 8
- ↔ Reverse comparison
Rev 7 → Rev 8
/TG68K_ALU.vhd
1152,7 → 1152,6
mulu_reg(31 downto 0) <= reg_QA; |
END IF; |
ELSIF exec(opcMULU)='0' THEN |
mulu_reg(63 downto 32) <= (OTHERS=>'-'); |
mulu_reg <= result_mulu(63 downto 0); |
END IF; |
ELSE |
/TG68K_Pack.vhd
1,9 → 1,9
------------------------------------------------------------------------------ |
------------------------------------------------------------------------------ |
-- -- |
-- Copyright (c) 2009-2018 Tobias Gubener -- |
-- Copyright (c) 2009-2019 Tobias Gubener -- |
-- Patches by MikeJ, Till Harbaum, Rok Krajnk, ... -- |
-- Subdesign fAMpIGA by TobiFlex -- |
-- Patches by MikeJ, Till Harbaum, Rok Krajnk, ... -- |
-- -- |
-- This source file is free software: you can redistribute it and/or modify -- |
-- it under the terms of the GNU Lesser General Public License as published -- |
29,147 → 29,144
ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4, |
st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3, |
andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3, |
rtd1, rtd2, trap0, trap1, trap2, trap3, |
rtd1, rtd2, trap00, trap0, trap1, trap2, trap3, |
trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1, |
mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2); |
|
constant opcMOVE : integer := 0; -- |
constant opcMOVEQ : integer := 1; -- |
constant opcMOVESR : integer := 2; -- |
constant opcADD : integer := 3; -- |
constant opcADDQ : integer := 4; -- |
constant opcOR : integer := 5; -- |
constant opcAND : integer := 6; -- |
constant opcEOR : integer := 7; -- |
constant opcCMP : integer := 8; -- |
constant opcROT : integer := 9; -- |
constant opcCPMAW : integer := 10; |
constant opcEXT : integer := 11; -- |
constant opcABCD : integer := 12; -- |
constant opcSBCD : integer := 13; -- |
constant opcBITS : integer := 14; -- |
constant opcSWAP : integer := 15; -- |
constant opcScc : integer := 16; -- |
constant andiSR : integer := 17; -- |
constant eoriSR : integer := 18; -- |
constant oriSR : integer := 19; -- |
constant opcMULU : integer := 20; -- |
constant opcDIVU : integer := 21; -- |
constant dispouter : integer := 22; -- |
constant rot_nop : integer := 23; -- |
constant ld_rot_cnt : integer := 24; -- |
constant writePC_add : integer := 25; -- |
constant ea_data_OP1 : integer := 26; -- |
constant ea_data_OP2 : integer := 27; -- |
constant use_XZFlag : integer := 28; -- |
constant get_bfoffset : integer := 29; -- |
constant save_memaddr : integer := 30; -- |
constant opcCHK : integer := 31; -- |
constant movec_rd : integer := 32; -- |
constant movec_wr : integer := 33; -- |
constant Regwrena : integer := 34; -- |
constant update_FC : integer := 35; -- |
constant linksp : integer := 36; -- |
constant movepl : integer := 37; -- |
constant update_ld : integer := 38; -- |
constant OP1addr : integer := 39; -- |
constant write_reg : integer := 40; -- |
constant changeMode : integer := 41; -- |
constant ea_build : integer := 42; -- |
constant trap_chk : integer := 43; -- |
constant store_ea_data : integer := 44; -- |
constant addrlong : integer := 45; -- |
constant postadd : integer := 46; -- |
constant presub : integer := 47; -- |
constant subidx : integer := 48; -- |
constant no_Flags : integer := 49; -- |
constant use_SP : integer := 50; -- |
constant to_CCR : integer := 51; -- |
constant to_SR : integer := 52; -- |
constant OP2out_one : integer := 53; -- |
constant OP1out_zero : integer := 54; -- |
constant mem_addsub : integer := 55; -- |
constant addsub : integer := 56; -- |
constant directPC : integer := 57; -- |
constant direct_delta : integer := 58; -- |
constant directSR : integer := 59; -- |
constant directCCR : integer := 60; -- |
constant exg : integer := 61; -- |
constant get_ea_now : integer := 62; -- |
constant ea_to_pc : integer := 63; -- |
constant hold_dwr : integer := 64; -- |
constant to_USP : integer := 65; -- |
constant from_USP : integer := 66; -- |
constant write_lowlong : integer := 67; -- |
constant write_reminder : integer := 68; -- |
constant movem_action : integer := 69; -- |
constant briefext : integer := 70; -- |
constant get_2ndOPC : integer := 71; -- |
constant mem_byte : integer := 72; -- |
constant longaktion : integer := 73; -- |
constant opcRESET : integer := 74; -- |
constant opcBF : integer := 75; -- |
constant opcBFwb : integer := 76; -- |
constant opcPACK : integer := 77; -- |
constant opcUNPACK : integer := 78; -- |
constant hold_ea_data : integer := 79; -- |
constant store_ea_packdata : integer := 80; -- |
constant exec_BS : integer := 81; -- |
-- constant : integer := 75; -- |
-- constant : integer := 76; -- |
-- constant : integer := 7; -- |
-- constant : integer := 7; -- |
-- constant : integer := 7; -- |
constant opcMOVE : integer := 0; -- |
constant opcMOVEQ : integer := 1; -- |
constant opcMOVESR : integer := 2; -- |
constant opcADD : integer := 3; -- |
constant opcADDQ : integer := 4; -- |
constant opcOR : integer := 5; -- |
constant opcAND : integer := 6; -- |
constant opcEOR : integer := 7; -- |
constant opcCMP : integer := 8; -- |
constant opcROT : integer := 9; -- |
constant opcCPMAW : integer := 10; |
constant opcEXT : integer := 11; -- |
constant opcABCD : integer := 12; -- |
constant opcSBCD : integer := 13; -- |
constant opcBITS : integer := 14; -- |
constant opcSWAP : integer := 15; -- |
constant opcScc : integer := 16; -- |
constant andiSR : integer := 17; -- |
constant eoriSR : integer := 18; -- |
constant oriSR : integer := 19; -- |
constant opcMULU : integer := 20; -- |
constant opcDIVU : integer := 21; -- |
constant dispouter : integer := 22; -- |
constant rot_nop : integer := 23; -- |
constant ld_rot_cnt : integer := 24; -- |
constant writePC_add : integer := 25; -- |
constant ea_data_OP1 : integer := 26; -- |
constant ea_data_OP2 : integer := 27; -- |
constant use_XZFlag : integer := 28; -- |
constant get_bfoffset : integer := 29; -- |
constant save_memaddr : integer := 30; -- |
constant opcCHK : integer := 31; -- |
constant movec_rd : integer := 32; -- |
constant movec_wr : integer := 33; -- |
constant Regwrena : integer := 34; -- |
constant update_FC : integer := 35; -- |
constant linksp : integer := 36; -- |
constant movepl : integer := 37; -- |
constant update_ld : integer := 38; -- |
constant OP1addr : integer := 39; -- |
constant write_reg : integer := 40; -- |
constant changeMode : integer := 41; -- |
constant ea_build : integer := 42; -- |
constant trap_chk : integer := 43; -- |
constant store_ea_data : integer := 44; -- |
constant addrlong : integer := 45; -- |
constant postadd : integer := 46; -- |
constant presub : integer := 47; -- |
constant subidx : integer := 48; -- |
constant no_Flags : integer := 49; -- |
constant use_SP : integer := 50; -- |
constant to_CCR : integer := 51; -- |
constant to_SR : integer := 52; -- |
constant OP2out_one : integer := 53; -- |
constant OP1out_zero : integer := 54; -- |
constant mem_addsub : integer := 55; -- |
constant addsub : integer := 56; -- |
constant directPC : integer := 57; -- |
constant direct_delta : integer := 58; -- |
constant directSR : integer := 59; -- |
constant directCCR : integer := 60; -- |
constant exg : integer := 61; -- |
constant get_ea_now : integer := 62; -- |
constant ea_to_pc : integer := 63; -- |
constant hold_dwr : integer := 64; -- |
constant to_USP : integer := 65; -- |
constant from_USP : integer := 66; -- |
constant write_lowlong : integer := 67; -- |
constant write_reminder : integer := 68; -- |
constant movem_action : integer := 69; -- |
constant briefext : integer := 70; -- |
constant get_2ndOPC : integer := 71; -- |
constant mem_byte : integer := 72; -- |
constant longaktion : integer := 73; -- |
constant opcRESET : integer := 74; -- |
constant opcBF : integer := 75; -- |
constant opcBFwb : integer := 76; -- |
constant opcPACK : integer := 77; -- |
constant opcUNPACK : integer := 78; -- |
constant hold_ea_data : integer := 79; -- |
constant store_ea_packdata : integer := 80; -- |
constant exec_BS : integer := 81; -- |
constant save_OP2 : integer := 82; -- |
constant opcTRAPV : integer := 83; -- |
|
constant lastOpcBit : integer := 81; |
constant lastOpcBit : integer := 83; |
|
component TG68K_ALU |
generic( |
MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL, |
MUL_Hardware :integer; --0=>no, 1=>yes, |
DIV_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV, |
BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1) |
MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL, |
MUL_Hardware :integer; --0=>no, 1=>yes, |
DIV_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV, |
BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1) |
); |
port( |
clk : in std_logic; |
Reset : in std_logic; |
clkena_lw : in std_logic:='1'; |
execOPC : in bit; |
decodeOPC : in bit; |
exe_condition : in std_logic; |
exec_tas : in std_logic; |
long_start : in bit; |
non_aligned : in std_logic; |
movem_presub : in bit; |
set_stop : in bit; |
Z_error : in bit; |
rot_bits : in std_logic_vector(1 downto 0); |
exec : in bit_vector(lastOpcBit downto 0); |
OP1out : in std_logic_vector(31 downto 0); |
OP2out : in std_logic_vector(31 downto 0); |
reg_QA : in std_logic_vector(31 downto 0); |
reg_QB : in std_logic_vector(31 downto 0); |
opcode : in std_logic_vector(15 downto 0); |
-- datatype : in std_logic_vector(1 downto 0); |
exe_opcode : in std_logic_vector(15 downto 0); |
exe_datatype : in std_logic_vector(1 downto 0); |
sndOPC : in std_logic_vector(15 downto 0); |
last_data_read : in std_logic_vector(15 downto 0); |
data_read : in std_logic_vector(15 downto 0); |
FlagsSR : in std_logic_vector(7 downto 0); |
micro_state : in micro_states; |
bf_ext_in : in std_logic_vector(7 downto 0); |
bf_ext_out : out std_logic_vector(7 downto 0); |
bf_shift : in std_logic_vector(5 downto 0); |
bf_width : in std_logic_vector(5 downto 0); |
bf_ffo_offset : in std_logic_vector(31 downto 0); |
bf_loffset : in std_logic_vector(4 downto 0); |
|
set_V_Flag : buffer bit; |
Flags : buffer std_logic_vector(7 downto 0); |
c_out : buffer std_logic_vector(2 downto 0); |
addsub_q : buffer std_logic_vector(31 downto 0); |
ALUout : out std_logic_vector(31 downto 0) |
clk : in std_logic; |
Reset : in std_logic; |
clkena_lw : in std_logic:='1'; |
execOPC : in bit; |
decodeOPC : in bit; |
exe_condition : in std_logic; |
exec_tas : in std_logic; |
long_start : in bit; |
non_aligned : in std_logic; |
movem_presub : in bit; |
set_stop : in bit; |
Z_error : in bit; |
rot_bits : in std_logic_vector(1 downto 0); |
exec : in bit_vector(lastOpcBit downto 0); |
OP1out : in std_logic_vector(31 downto 0); |
OP2out : in std_logic_vector(31 downto 0); |
reg_QA : in std_logic_vector(31 downto 0); |
reg_QB : in std_logic_vector(31 downto 0); |
opcode : in std_logic_vector(15 downto 0); |
-- datatype : in std_logic_vector(1 downto 0); |
exe_opcode : in std_logic_vector(15 downto 0); |
exe_datatype : in std_logic_vector(1 downto 0); |
sndOPC : in std_logic_vector(15 downto 0); |
last_data_read : in std_logic_vector(15 downto 0); |
data_read : in std_logic_vector(15 downto 0); |
FlagsSR : in std_logic_vector(7 downto 0); |
micro_state : in micro_states; |
bf_ext_in : in std_logic_vector(7 downto 0); |
bf_ext_out : out std_logic_vector(7 downto 0); |
bf_shift : in std_logic_vector(5 downto 0); |
bf_width : in std_logic_vector(5 downto 0); |
bf_ffo_offset : in std_logic_vector(31 downto 0); |
bf_loffset : in std_logic_vector(4 downto 0); |
|
set_V_Flag : buffer bit; |
Flags : buffer std_logic_vector(7 downto 0); |
c_out : buffer std_logic_vector(2 downto 0); |
addsub_q : buffer std_logic_vector(31 downto 0); |
ALUout : out std_logic_vector(31 downto 0) |
); |
end component; |
|
/TG68KdotC_Kernel.vhd
21,6 → 21,8
------------------------------------------------------------------------------ |
------------------------------------------------------------------------------ |
|
-- 03.11.2019 TG insert TrapV from TH |
-- 03.11.2019 TG bugfix MUL 64Bit |
-- 03.11.2019 TG rework barrel shifter - some other tweaks |
-- 02.11.2019 TG bugfig N-Flag and Z-Flag for DIV |
-- 30.10.2019 TG bugfix RTR in 68020-mode |
86,7 → 88,7
VBR_Stackframe : integer:= 1; --0=>no, 1=>yes/extended, 2=>switchable with CPU(0) |
extAddr_Mode : integer:= 1; --0=>no, 1=>yes, 2=>switchable with CPU(1) |
MUL_Mode : integer := 1; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL, |
MUL_Hardware : integer := 1; --0=>no, 1=>yes, |
MUL_Hardware : integer := 0; --0=>no, 1=>yes, |
DIV_Mode : integer := 1; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV, |
BarrelShifter : integer := 2; --0=>no, 1=>yes, 2=>switchable with CPU(1) |
BitField : integer := 1 --0=>no, 1=>yes, 2=>switchable with CPU(1) |
146,6 → 148,8
signal exe_opcode : std_logic_vector(15 downto 0); |
signal sndOPC : std_logic_vector(15 downto 0); |
|
signal exe_pc : std_logic_vector(31 downto 0);--TH |
signal last_opc_pc : std_logic_vector(31 downto 0);--TH |
signal last_opc_read : std_logic_vector(15 downto 0); |
signal registerin : std_logic_vector(31 downto 0); |
signal reg_QA : std_logic_vector(31 downto 0); |
688,10 → 692,13
IF state="11" THEN |
exec_write_back <= '0'; |
ELSIF setstate="10" AND write_back='1' THEN |
-- elsif setstate = "10" and write_back = '1' and next_micro_state = idle then --??? |
exec_write_back <= '1'; |
END IF; |
|
|
IF exec(save_OP2)='1' THEN |
use_direct_data <= '1'; |
END IF; |
IF set_direct_data='1' THEN |
direct_data <= '1'; |
use_direct_data <= '1'; |
731,8 → 738,21
data_write_tmp <= TG68_PC; |
ELSIF exec(writePC_add)='1' THEN |
data_write_tmp <= TG68_PC_add; |
ELSIF micro_state=trap0 THEN |
data_write_tmp(15 downto 0) <= trap_vector(15 downto 0); |
-- paste and copy form TH --------- |
elsif micro_state=trap00 THEN |
data_write_tmp <= exe_pc; --TH |
elsif micro_state = trap0 then |
-- this is only active for 010+ since in 000 writePC is |
-- true in state trap0 |
if trap_trace='1' or set_exec(opcTRAPV) = '1' then |
-- stack frame format #2 |
data_write_tmp(15 downto 0) <= "0010" & trap_vector(11 downto 0); --TH |
else |
data_write_tmp(15 downto 0) <= "0000" & trap_vector(11 downto 0); |
end if; |
------------------------------------ |
-- ELSIF micro_state=trap0 THEN |
-- data_write_tmp(15 downto 0) <= trap_vector(15 downto 0); |
ELSIF exec(hold_dwr)='1' THEN |
data_write_tmp <= data_write_tmp; |
ELSIF exec(exg)='1' THEN |
1044,6 → 1064,7
END IF; |
IF state="00" THEN |
last_opc_read <= data_read(15 downto 0); |
last_opc_pc <= tg68_pc;--TH |
END IF; |
IF setopcode='1' THEN |
trap_interrupt <= '0'; |
1130,8 → 1151,10
IF setopcode='1' AND berr='0' THEN |
IF state="00" THEN |
opcode <= data_read(15 downto 0); |
exe_pc <= tg68_pc;--TH |
ELSE |
opcode <= last_opc_read(15 downto 0); |
exe_pc <= last_opc_pc;--TH |
END IF; |
nextpass <= '0'; |
ELSIF setinterrupt='1' OR setopcode='1' THEN |
1313,7 → 1336,7
PROCESS (clk, cpu, OP1out, OP2out, opcode, exe_condition, nextpass, micro_state, decodeOPC, state, setexecOPC, Flags, FlagsSR, direct_data, build_logical, |
build_bcd, set_Z_error, trapd, movem_run, last_data_read, set, set_V_Flag, z_error, trap_trace, trap_interrupt, |
SVmode, preSVmode, stop, long_done, ea_only, setstate, execOPC, exec_write_back, exe_datatype, |
datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, |
datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, trap_trapv, |
long_start, set_datatype, sndOPC, set_exec, exec, ea_build_now, reg_QA, reg_QB, make_berr, trap_berr) |
BEGIN |
TG68_PC_brw <= '0'; |
1386,8 → 1409,15
WHEN OTHERS => datatype <= "10"; --Long |
END CASE; |
|
IF trapmake='1' AND trapd='0' THEN |
next_micro_state <= trap0; |
IF trapmake='1' AND trapd='0' THEN |
-- paste and copy form TH --------- |
if trap_trapv = '1' and (VBR_Stackframe = 1 or (cpu(0) = '1' and VBR_Stackframe = 2)) then |
next_micro_state <= trap00; |
else |
next_micro_state <= trap0; |
end if; |
------------------------------------ |
-- next_micro_state <= trap0; |
IF VBR_Stackframe=0 OR (cpu(0)='0' AND VBR_Stackframe=2) THEN |
set(writePC_add) <= '1'; |
-- set_datatype <= "10"; |
1405,7 → 1435,14
setstate <= "01"; |
END IF; |
IF micro_state=int1 OR (interrupt='1' AND trap_trace='1') THEN |
next_micro_state <= trap0; |
-- paste and copy form TH --------- |
if trap_trace='1' AND (VBR_Stackframe=1 or (cpu(0)='1' AND VBR_Stackframe=2)) then |
next_micro_state <= trap00; --TH |
else |
next_micro_state <= trap0; |
end if; |
------------------------------------ |
-- next_micro_state <= trap0; |
-- IF cpu(0)='0' THEN |
-- set_datatype <= "10"; |
-- END IF; |
1414,6 → 1451,20
END IF; |
setstate <= "01"; |
END IF; |
if micro_state = int1 or (interrupt = '1' and trap_trace = '1') then |
if trap_trace='1' AND (VBR_Stackframe=1 or (cpu(0)='1' AND VBR_Stackframe=2)) then |
next_micro_state <= trap00; --TH |
else |
next_micro_state <= trap0; |
end if; |
-- if cpu(0)='0' then |
-- set_datatype <= "10"; |
-- end if; |
if preSVmode = '0' then |
set(changeMode) <= '1'; |
end if; |
setstate <= "01"; |
end if; |
|
IF setexecOPC='1' AND FlagsSR(5)/=preSVmode THEN |
set(changeMode) <= '1'; |
2230,6 → 2281,7
END IF; |
|
WHEN "1110110" => --trapv |
set_exec(opcTRAPV) <= '1'; --TH |
IF decodeOPC='1' THEN |
setstate <= "01"; |
END IF; |
2345,16 → 2397,11
|
-- 0111 ---------------------------------------------------------------------------- |
WHEN "0111" => --moveq |
-- IF opcode(8)='0' THEN -- Cloanto's Amiga Forver ROMs have mangled moveq instructions with a 1 here... |
datatype <= "10"; --Long |
set_exec(Regwrena) <= '1'; |
set_exec(opcMOVEQ) <= '1'; |
set_exec(opcMOVE) <= '1'; |
dest_hbits <= '1'; |
-- ELSE |
-- trap_illegal <= '1'; |
-- trapmake <= '1'; |
-- END IF; |
|
---- 1000 ---------------------------------------------------------------------------- |
WHEN "1000" => --or |
3062,6 → 3109,14
WHEN unlink2 => -- unlink |
set(ea_data_OP2) <= '1'; |
|
-- paste and copy form TH --------- |
when trap00 => -- TRAP format #2 |
next_micro_state <= trap0; |
set(presub) <= '1'; |
setstackaddr <='1'; |
setstate <= "11"; |
datatype <= "10"; |
------------------------------------ |
WHEN trap0 => -- TRAP |
set(presub) <= '1'; |
setstackaddr <='1'; |
3077,7 → 3132,8
END IF; |
datatype <= "10"; |
next_micro_state <= trap2; |
END IF; |
END IF; |
|
WHEN trap1 => -- TRAP |
IF trap_interrupt='1' OR trap_trace='1' THEN |
writePC <= '1'; |
3105,7 → 3161,6
set(directPC) <= '1'; |
setstate <= "10"; |
next_micro_state <= nopnop; |
|
WHEN trap4 => -- TRAP |
set(presub) <= '1'; |
setstackaddr <='1'; |
3235,18 → 3290,21
setstate <="01"; |
next_micro_state <= mul2; |
WHEN mul2 => -- mulu |
setstate <="01"; |
setstate <="01"; |
IF rot_cnt="00001" THEN |
next_micro_state <= mul_end1; |
next_micro_state <= mul_end1; |
|
ELSE |
next_micro_state <= mul2; |
END IF; |
WHEN mul_end1 => -- mulu |
IF opcode(15)='0' THEN |
set(save_OP2) <= '1'; |
END IF; |
datatype <= "10"; |
set(opcMULU) <= '1'; |
IF opcode(15)='0' AND (MUL_Mode=1 OR MUL_Mode=2) THEN |
dest_2ndHbits <= '1'; |
-- source_2ndLbits <= '1';--??? |
set(write_lowlong) <= '1'; |
IF sndOPC(10)='1' THEN |
setstate <="01"; |