URL
https://opencores.org/ocsvn/tv80/tv80/trunk
Subversion Repositories tv80
Compare Revisions
- This comparison shows the changes necessary to convert path
/tv80/trunk
- from Rev 96 to Rev 97
- ↔ Reverse comparison
Rev 96 → Rev 97
/scripts/sc_gen
3,4 → 3,5
verilator --sc --trace -O3 rtl/core/tv80s.v rtl/core/tv80_alu.v \ |
rtl/core/tv80_mcode.v rtl/core/tv80_reg.v rtl/core/tv80_core.v |
|
verilator --sc rtl/uart/T16450.v |
|
/sc_env/sc_env_top.cpp
3,9 → 3,11
#include "env_memory.h" |
#include "tv_responder.h" |
#include "Vtv80s.h" |
#include "VT16450.h" |
#include "SpTraceVcd.h" |
#include <unistd.h> |
#include "z80_decoder.h" |
#include "di_mux.h" |
|
extern char *optarg; |
extern int optind, opterr, optopt; |
20,22 → 22,6
SpTraceFile *tfp; |
z80_decoder dec0 ("dec0"); |
|
while ( (index = getopt(argc, argv, "d:i:k")) != -1) { |
printf ("DEBUG: getopt optind=%d index=%d char=%c\n", optind, index, (char) index); |
if (index == 'd') { |
dumpfile_name = new char(strlen(optarg)+1); |
strcpy (dumpfile_name, optarg); |
dumping = true; |
printf ("VCD dump enabled to %s\n", dumpfile_name); |
} else if (index == 'i') { |
mem_src_name = new char(strlen(optarg)+1); |
strcpy (mem_src_name, optarg); |
memfile = true; |
} else if (index == 'k') { |
printf ("Z80 Instruction decode enabled\n"); |
dec0.en_decode = true; |
} |
} |
sc_clock clk("clk125", 8, SC_NS, 0.5); |
|
sc_signal<bool> reset_n; |
54,9 → 40,30
sc_signal<uint32_t> di; |
sc_signal<uint32_t> di_mem; |
sc_signal<uint32_t> di_resp; |
sc_signal<uint32_t> di_uart; |
sc_signal<uint32_t> dout; |
sc_signal<uint32_t> addr; |
|
sc_signal<bool> uart_cs_n, serial, cts_n, dsr_n, ri_n, dcd_n; |
sc_signal<bool> baudout, uart_int; |
|
while ( (index = getopt(argc, argv, "d:i:k")) != -1) { |
printf ("DEBUG: getopt optind=%d index=%d char=%c\n", optind, index, (char) index); |
if (index == 'd') { |
dumpfile_name = new char(strlen(optarg)+1); |
strcpy (dumpfile_name, optarg); |
dumping = true; |
printf ("VCD dump enabled to %s\n", dumpfile_name); |
} else if (index == 'i') { |
mem_src_name = new char(strlen(optarg)+1); |
strcpy (mem_src_name, optarg); |
memfile = true; |
} else if (index == 'k') { |
printf ("Z80 Instruction decode enabled\n"); |
dec0.en_decode = true; |
} |
} |
|
Vtv80s tv80s ("tv80s"); |
tv80s.A (addr); |
tv80s.reset_n (reset_n); |
76,10 → 83,20
tv80s.di (di); |
tv80s.dout (dout); |
|
di_mux di_mux0("di_mux0"); |
di_mux0.mreq_n (mreq_n); |
di_mux0.iorq_n (iorq_n); |
di_mux0.addr (addr); |
di_mux0.di (di); |
di_mux0.di_mem (di_mem); |
di_mux0.di_uart (di_uart); |
di_mux0.di_resp (di_resp); |
di_mux0.uart_cs_n (uart_cs_n); |
|
env_memory env_memory0("env_memory0"); |
env_memory0.clk (clk); |
env_memory0.wr_data (dout); |
env_memory0.rd_data (di); |
env_memory0.rd_data (di_mem); |
env_memory0.mreq_n (mreq_n); |
env_memory0.rd_n (rd_n); |
env_memory0.wr_n (wr_n); |
112,6 → 129,30
dec0.wait_n (wait_n); |
dec0.di (di); |
dec0.reset_n (reset_n); |
|
VT16450 t16450 ("t16450"); |
t16450.reset_n (reset_n); |
t16450.clk (clk); |
t16450.rclk (clk); |
t16450.cs_n (uart_cs_n); |
t16450.rd_n (rd_n); |
t16450.wr_n (wr_n); |
t16450.addr (addr); |
t16450.wr_data (dout); |
t16450.rd_data (di_uart); |
t16450.sin (serial); |
t16450.cts_n (cts_n); |
t16450.dsr_n (dsr_n); |
t16450.ri_n (ri_n); |
t16450.dcd_n (dcd_n); |
|
t16450.sout (serial); |
t16450.rts_n (cts_n); |
t16450.dtr_n (dsr_n); |
t16450.out1_n (ri_n); |
t16450.out2_n (dcd_n); |
t16450.baudout (baudout); |
t16450.intr (uart_int); |
|
// create dumpfile |
/* |
/sc_env/di_mux.cpp
0,0 → 1,17
#include "di_mux.h" |
|
void di_mux::event() |
{ |
uart_cs_n = 1; |
|
if (!mreq_n) { |
di = di_mem; |
} else if (!iorq_n) { |
if ((addr & 0xF8) == 0x18) { |
di = di_uart; |
uart_cs_n = 0; |
} else |
di = di_resp; |
} else |
di = 0; |
} |
/sc_env/z80_decoder.cpp
5,6 → 5,7
char *table_rp[] = {"BC", "DE", "HL", "SP" }; |
char *table_rp2[] = {"BC","DE","HL","AF"}; |
char *table_alu[] = {"ADD A,","ADC A,","SUB","SBC A,","AND","XOR","OR","CP"}; |
char *table_im[] = {"0","0/1", "1", "2", "0", "0/1", "1", "2" }; |
|
void z80_decoder::op_print () |
{ |
166,6 → 167,7
case 4 : |
op_name = "CALL %04x"; |
state = IMM2; |
op_print(); |
break; |
case 5 : state = PRE_DD; break; |
case 6 : state = PRE_ED; break; |
172,6 → 174,23
case 7 : state = PRE_FD; break; |
} |
break; |
case 6 : |
sprintf (op_buf, "IM %s", table_im[y]); |
op_name = op_buf; |
break; |
break; |
case 7 : |
switch (y) { |
case 0 : op_name="LD I,A"; break; |
case 1 : op_name="LD R,A"; break; |
case 2 : op_name="LD A,I"; break; |
case 3 : op_name="LD A,R"; break; |
case 4 : op_name="RRD"; break; |
case 5 : op_name="RLD"; break; |
case 6 : op_name="NOP"; break; |
case 7 : op_name="NOP"; break; |
} |
break; |
} |
break; |
} |
251,7 → 270,6
case IMM1 : |
imm = ((unsigned int) di) & 0xff; |
sprintf (op_buf, op_name, imm); |
//printf ("DECODE : %02x %s\n", (int) opcode, op_name); |
op_name = op_buf; |
op_print(); |
break; |
/sc_env/di_mux.h
0,0 → 1,26
#ifndef DI_MUX_H_ |
#define DI_MUX_H_ |
|
#include "sc_env.h" |
|
SC_MODULE (di_mux) |
{ |
public: |
sc_in<bool> mreq_n; |
sc_in<bool> iorq_n; |
sc_in<uint32_t> addr; |
sc_in<uint32_t> di_mem; |
sc_in<uint32_t> di_resp; |
sc_in<uint32_t> di_uart; |
sc_out<uint32_t> di; |
sc_out<bool> uart_cs_n; |
|
void event(); |
|
SC_CTOR(di_mux) { |
SC_METHOD(event); |
sensitive << mreq_n << iorq_n << addr << di_mem << di_resp << di_uart; |
} |
}; |
|
#endif /*DI_MUX_H_*/ |
/sc_env/Makefile
4,11 → 4,11
INCLUDES=-I$(SYSTEMC)/include -I$(VERIDIR) -I$(VERILATOR_ROOT)/include -I$(SYSTEMPERL) |
LINKOPT=-L$(SYSTEMC)/lib-linux64 -lsystemc -lm |
DEFINES=-DDEBUG |
OBJFILES=sc_env_top.o env_memory.o tv_responder.o z80_decoder.o \ |
OBJFILES=sc_env_top.o env_memory.o tv_responder.o z80_decoder.o di_mux.o \ |
$(VERIDIR)/Vtv80s.o $(VERIDIR)/Vtv80s__Syms.o \ |
$(VERIDIR)/Vtv80s__Trace.o \ |
$(VERIDIR)/Vtv80s__Trace__Slow.o \ |
verilated.o Sp.o |
$(VERIDIR)/VT16450.o $(VERIDIR)/VT16450__Syms.o verilated.o Sp.o |
OPT_FAST=-O2 |
|
CXX=g++ -g $(OPT_FAST) $(INCLUDES) $(DEFINES) |
38,6 → 38,12
$(VERIDIR)/Vtv80s__Trace__Slow.o: |
(cd $(VERIDIR); make -f Vtv80s.mk Vtv80s__Trace__Slow.o) |
|
$(VERIDIR)/VT16450.o: |
make -C$(VERIDIR) -f VT16450.mk $(@F) |
|
$(VERIDIR)/VT16450__Syms.o: |
make -C$(VERIDIR) -f VT16450.mk $(@F) |
|
Sp.o: $(SYSTEMPERL)/Sp.cpp |
$(CXX) -I$(SYSTEMPERL) -c $^ |
|