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URL https://opencores.org/ocsvn/tv80/tv80/trunk

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  • This comparison shows the changes necessary to convert path 
    /tv80/trunk
    from Rev 98 to Rev 99
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Rev 98 → Rev 99

/tests/otir.asm File deleted
/tests/ivec_flags.ast
0,0 → 1,147
; test of interrupt vector flags
;
; initializes a memory region and then transfers that region
; to an accumulator
 
.module otir
 
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
_sim_ctl_port = 0x0080
_msg_port = 0x0081
_timeout_port = 0x0082
_max_timeout_low = 0x0083
_max_timeout_high = 0x0084
_intr_cntdwn = 0x0090
_cksum_value = 0x0091
_cksum_accum = 0x0092
_inc_on_read = 0x0093
 
.area INIT (ABS)
.org 0
 
jp init
 
 
init:
ld sp, #0xffff
 
;--------------------------------------------------
; test S flag
 
; test for s set on negative values
ld a, #0xff
ld i, a
ld a, i ; S should be set
jp p, test_fail
 
ld a, #0xff
ld r, a
ld a, r ; S should be set
jp p, test_fail
 
; test for s clear on positive values
ld a, #0x20
ld i, a
ld a, i ; S should be clear
jp m, test_fail
 
; test for s clear on positive values
ld a, #0x20
ld r, a
ld a, r ; S should be clear
jp m, test_fail
 
;--------------------------------------------------
; test Z flag
 
; test for z set on zero values
ld a, #0
ld i, a
ld a, i ; S should be set
jp nz, test_fail
 
ld a, #0
ld r, a
ld a, r ; S should be set
jp nz, test_fail
 
; test for s clear on positive values
ld a, #0x20
ld i, a
ld a, i ; S should be clear
jp z, test_fail
 
; test for s clear on positive values
ld a, #0x20
ld r, a
ld a, r ; S should be clear
jp z, test_fail
 
;--------------------------------------------------
; test H flag
 
; by spec the H flag is not in the flags register,
; so this bit is difficult to test
;--------------------------------------------------
; test P/V flag
 
; TBD
 
;--------------------------------------------------
; test N flag
 
neg ; sets the N flag
ld a, i ; clears N flag
push af
pop bc ; N should be bit 4 of C
ld a, c
and #0x10
jp nz, test_fail
 
neg ; sets the N flag
ld a, r ; clears N flag
push af
pop bc ; N should be bit 4 of C
ld a, c
and #0x10
jp nz, test_fail
 
;--------------------------------------------------
; test C flag
; should not be affected by this op
 
scf
ld a, i
ld a, r
jp nc, test_fail
 
ccf
ld a, i
ld a, r
jp c, test_fail
 
test_pass:
;; finish simulation with test passed
ld a, #1
out (_sim_ctl_port), a
halt
 
test_fail:
ld a, #2
out (_sim_ctl_port), a
ret
 
reset_timeout:
ld a, #2
out (_timeout_port), a
ret
.org 0x8000
 
dbuf:
.ds 256
 
/tests/bintr.c
16,6 → 16,7
volatile unsigned char test_pass;
static unsigned char triggers;
int phase;
int loop;
char done;
char nmi_trig;
 
31,23 → 32,17
nmi_trig = 0;
//intr_cntdwn = 255;
//intr_cntdwn = 0;
print ("Final interrupt\n");
intr_cntdwn = 32;
nmi_cntdwn = 0;
} else
nmi_cntdwn = 32;
break;
 
// just trigger once, and disable interrupt
case 3 :
nmi_cntdwn = 0;
nmi_trig_opcode = 0; // pop AF opcode
break;
}
}
 
void isr (void)
{
int i;
triggers++;
 
switch (phase) {
57,6 → 52,7
phase += 1;
triggers = 0;
intr_cntdwn = 0;
print ("Starting NMIs\n");
nmi_cntdwn = 64;
} else {
intr_cntdwn = 32;
65,33 → 61,16
break;
 
 
// int / nmi interaction
// in this phase set up interrupt call
// which will be interrupted by an nmi
case 2 :
phase += 1;
triggers = 0;
nmi_trig = 0;
intr_cntdwn = 20;
nmi_trig_opcode = 0xF1; // pop AF opcode
 
break;
 
// wait for a while while servicing interrupt
// nmi should interrupt us and increment nmi_trig
// if test pass is true when we are done then exit
case 3 :
intr_cntdwn = 0;
if (nmi_trig == 1)
test_pass = 1;
test_pass = 1;
break;
}
}
 
int main ()
{
int i;
//int i;
unsigned char check;
 
test_pass = 0;
101,10 → 80,11
phase = 0;
 
// start interrupt countdown
print ("Starting interrupts\n");
intr_cntdwn = 64;
set_timeout (50000);
 
for (i=0; i<1024; i++) {
for (loop=0; loop<1024; loop++) {
if (test_pass)
break;
check = sim_ctl_port;
/tests/otir.ast
0,0 → 1,118
; basic test of OTIR block-transfer instruction
;
; initializes a memory region and then transfers that region
; to an accumulator
 
.module otir
 
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
_sim_ctl_port = 0x0080
_msg_port = 0x0081
_timeout_port = 0x0082
_max_timeout_low = 0x0083
_max_timeout_high = 0x0084
_intr_cntdwn = 0x0090
_cksum_value = 0x0091
_cksum_accum = 0x0092
_inc_on_read = 0x0093
 
.area INIT (ABS)
.org 0
 
jp init
 
 
init:
ld sp, #0xffff
 
;; initialize dbuf memory area with regular pattern
;; pattern starts with 1 and increments
 
ld hl, #dbuf
ld b, #255
ld c, #1
 
dbuf_init:
ld (hl), c
inc hl
inc c
djnz dbuf_init
 
call reset_timeout
ld b, #16
call xfer_test
 
call reset_timeout
ld b, #63
call xfer_test
 
call reset_timeout
ld b, #127
call xfer_test
 
call reset_timeout
ld b, #128
call xfer_test
 
call reset_timeout
ld b, #254
call xfer_test
 
call reset_timeout
ld b, #255
call xfer_test
 
;; finish simulation with test passed
ld a, #1
out (_sim_ctl_port), a
ret
;; test sending X amount of data from the buffer to the
;; accumulator. Amount of data to transfer is in B.
;; After tranferring data to checksummer, perform
;; checksum and compare
xfer_test:
push bc
ld hl, #dbuf
ld a, #0
out (_cksum_value), a
 
ld c, #_cksum_accum
otir
 
;; do checksum over same region
pop bc
ld hl, #dbuf
ld a, #0
xfer_test_cksum:
add a, (hl)
inc hl
djnz xfer_test_cksum
;; store calc'ed checksum in D and read out cksum register
ld d, a
in a, (_cksum_value)
 
;; compare two values and fail test if not equal
cp d
jp nz, xfer_fail
ret
 
xfer_fail:
ld a, #2
out (_sim_ctl_port), a
ret
 
reset_timeout:
ld a, #2
out (_timeout_port), a
ret
.org 0x8000
 
dbuf:
.ds 256
 
/tests/Makefile
2,9 → 2,12
# SDCC_HOME environment variable should be set to SDCC install location
 
SDCC_ROOT=$(SDCC_HOME)
CC=$(SDCC_ROOT)/bin/sdcc -mz80
AS=$(SDCC_ROOT)/bin/as-z80
LD=$(SDCC_ROOT)/bin/link-z80
#CC=$(SDCC_ROOT)/bin/sdcc -mz80
#AS=$(SDCC_ROOT)/bin/as-z80
#LD=$(SDCC_ROOT)/bin/link-z80
CC=sdcc -mz80
AS=as-z80
LD=link-z80
IHEX2MEM=../scripts/ihex2mem.py
LINK_OPTIONS=-- -m -j -x -b_CODE=0x0200 -b_DATA=0x8000 -k$(SDCC_ROOT)/device/lib/z80 -k$(SDCC_ROOT)/lib/z80 -lz80
AS_LINK_OPTIONS=-bBOOT_VEC=0x0000 -bINT_VEC=0x0038
20,10 → 23,14
%.o : %.asm
$(AS) -l -o $*.o $^
 
%.ihx : %.ast
$(AS) -l -o $*.o $^
$(CC) --no-std-crt0 $*.o
 
#hello.ihx : hello.c bintr_crt0.o
# $(CC) $^ --no-std-crt0 bintr_crt0.o
otir.ihx : otir.o
$(CC) --no-std-crt0 $^
#otir.ihx : otir.o
# $(CC) --no-std-crt0 $^
 
%.ihx : %.o
#$(LD) $(LINK_OPTIONS) $(AS_LINK_OPTIONS) -i $* $^ -e

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