OpenCores
URL https://opencores.org/ocsvn/uart2bus/uart2bus/trunk

Subversion Repositories uart2bus

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /uart2bus/trunk/vhdl/sim
    from Rev 11 to Rev 13
    Reverse comparison

Rev 11 → Rev 13

/ghdl/uart2BusTop_bin_tb.sav
0,0 → 1,43
[*]
[*] GTKWave Analyzer v3.3.45 (w)1999-2012 BSI
[*] Mon Jul 22 09:26:49 2013
[*]
[dumpfile] "/dev/shm/uart2BusTop_bin_tb.fst"
[dumpfile_mtime] "Mon Jul 22 09:26:41 2013"
[dumpfile_size] 146929
[savefile] "/run/media/smuller/DATA/Projects/uart2bus/sim/ghdl/uart2BusTop_bin_tb.sav"
[timestart] 0
[size] 1680 974
[pos] -1 -1
*-38.645287 83900000000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 210
[signals_width] 255
[sst_expanded] 1
[sst_vpaned_height] 286
@28
uut.clr
uut.clk
@200
-Asynchronous serial link
@28
uut.serin
uut.serout
@200
-Internal bus
@22
intaddress[7:0]
intrddata[7:0]
@28
intread
@22
intwrdata[7:0]
@28
intwrite
@200
-Other internal signals
@28
newrxdata
@23
recvdata[7:0]
[pattern_trace] 1
[pattern_trace] 0
ghdl/uart2BusTop_bin_tb.sav Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: ghdl/shell_tools.sh =================================================================== --- ghdl/shell_tools.sh (nonexistent) +++ ghdl/shell_tools.sh (revision 13) @@ -0,0 +1,16 @@ +# !/bin/bash + +RED='\e[1;31m' +GREEN='\e[1;32m' +YELLOW='\e[1;33m' +NORMAL='\e[0;m' + +run() +{ + echo -e "${GREEN}'$*'${NORMAL}" + $@ + if [ $? -ne 0 ] ; then + echo -e "${RED}Script stopped due to '$*' at error at '$( caller )'${NORMAL}" + exit 1 + fi +}
ghdl/shell_tools.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: ghdl/uart2BusTop_txt_tb.sav =================================================================== --- ghdl/uart2BusTop_txt_tb.sav (nonexistent) +++ ghdl/uart2BusTop_txt_tb.sav (revision 13) @@ -0,0 +1,43 @@ +[*] +[*] GTKWave Analyzer v3.3.45 (w)1999-2012 BSI +[*] Mon Jul 22 09:25:59 2013 +[*] +[dumpfile] "/dev/shm/uart2BusTop_txt_tb.fst" +[dumpfile_mtime] "Mon Jul 22 09:24:50 2013" +[dumpfile_size] 2827856 +[savefile] "/run/media/smuller/DATA/Projects/uart2bus/sim/ghdl/uart2BusTop_txt_tb.sav" +[timestart] 0 +[size] 1680 974 +[pos] -1 -1 +*-42.967213 83900000000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[sst_width] 210 +[signals_width] 255 +[sst_expanded] 1 +[sst_vpaned_height] 286 +@28 +uut.clr +uut.clk +@200 +-Asynchronous serial link +@28 +uut.serin +uut.serout +@200 +-Internal bus +@22 +intaddress[7:0] +intrddata[7:0] +@28 +intread +@22 +intwrdata[7:0] +@28 +intwrite +@200 +-Other internal signals +@28 +newrxdata +@23 +recvdata[7:0] +[pattern_trace] 1 +[pattern_trace] 0
ghdl/uart2BusTop_txt_tb.sav Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: ghdl/uart2bus_bin_build.sh =================================================================== --- ghdl/uart2bus_bin_build.sh (nonexistent) +++ ghdl/uart2bus_bin_build.sh (revision 13) @@ -0,0 +1,32 @@ +# !/bin/bash +source ./shell_tools.sh + +TEST_BENCH=uart2BusTop_bin_tb +SIM_TIME=2500us + +TEMP_DIR=/dev/shm +VCD=${TEMP_DIR}/${TEST_BENCH}.vcd +FST=${TEMP_DIR}/${TEST_BENCH}.fst +SAV=${TEST_BENCH}.sav + +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uart2BusTop_pkg.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/baudGen.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uart2BusTop.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartParser.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartRx.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartTop.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartTx.vhd" + +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/helpers/helpers_pkg.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/helpers/regFileModel.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/uart2BusTop_bin_tb.vhd" + +run ghdl -e --workdir=${TEMP_DIR} ${TEST_BENCH} +run ghdl -r --workdir=${TEMP_DIR} ${TEST_BENCH} --vcd=${VCD} --stop-time=${SIM_TIME} + +(cd ${TEMP_DIR} ; run ghdl --clean) + +run vcd2fst ${VCD} ${FST} +rm ${VCD} + +gtkwave -a ${SAV} ${FST}
ghdl/uart2bus_bin_build.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: ghdl/uart2bus_txt_build.sh =================================================================== --- ghdl/uart2bus_txt_build.sh (nonexistent) +++ ghdl/uart2bus_txt_build.sh (revision 13) @@ -0,0 +1,32 @@ +# !/bin/bash +source ./shell_tools.sh + +TEST_BENCH=uart2BusTop_txt_tb +SIM_TIME=50ms + +TEMP_DIR=/dev/shm +VCD=${TEMP_DIR}/${TEST_BENCH}.vcd +FST=${TEMP_DIR}/${TEST_BENCH}.fst +SAV=${TEST_BENCH}.sav + +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uart2BusTop_pkg.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/baudGen.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uart2BusTop.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartParser.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartRx.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartTop.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../rtl/uartTx.vhd" + +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/helpers/helpers_pkg.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/helpers/regFileModel.vhd" +run ghdl -a --workdir="${TEMP_DIR}" "../../bench/uart2BusTop_txt_tb.vhd" + +run ghdl -e --workdir=${TEMP_DIR} ${TEST_BENCH} +run ghdl -r --workdir=${TEMP_DIR} ${TEST_BENCH} --vcd=${VCD} --stop-time=${SIM_TIME} + +(cd ${TEMP_DIR} ; run ghdl --clean) + +run vcd2fst ${VCD} ${FST} +rm ${VCD} + +gtkwave -a ${SAV} ${FST}
ghdl/uart2bus_txt_build.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.