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URL https://opencores.org/ocsvn/uart2bus_testbench/uart2bus_testbench/trunk

Subversion Repositories uart2bus_testbench

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  • This comparison shows the changes necessary to convert path 
    /uart2bus_testbench/trunk
    from Rev 11 to Rev 13
    ↔ Reverse comparison
  •

Rev 11 → Rev 13

/doc/.~lock.uart2bus_verification_plan.odt#
1,?rev1len? → ?rev2line?,?rev2len?
,hany,hany-Inspiron-3542,19.02.2016 14:58,file:///home/hany/.config/libreoffice/4;
,hany,hany-Inspiron-3542,23.06.2017 01:29,file:///home/hany/.config/libreoffice/4;
/doc/uart2bus_verification_plan.odt Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/tb/agent/coverage/uart_coverage.svh
20,16 → 20,13
// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
//-------------------------------------------------------------------------------------------------
 
class uart_coverage extends uvm_component;
 
class uart_coverage extends uvm_subscriber#(uart_transaction);
`uvm_component_utils(uart_coverage)
 
uart_transaction trans,_trans;
 
uvm_analysis_export #(uart_transaction) cov_mon;
 
uvm_tlm_analysis_fifo #(uart_transaction) mon_fifo;
 
covergroup trans_attrib;
communication_mode:
coverpoint trans._mode{
47,7 → 44,7
covergroup text_mode_cov;
command:
coverpoint trans._command{
bins valid_command ={read,write};
bins valid_command ={read,2};
illegal_bins invalid_command={nop,invalid_read,invalid_write};
}
first_white_space_field:
63,7 → 60,7
covergroup binary_mode_cov;
command:
coverpoint trans._command{
bins normal_command={read,write,nop};
bins normal_command={read,2,nop};
bins wrong_command ={invalid_read,invalid_write};
}
acknowledge_requirement:
92,8 → 89,9
extern task run_phase (uvm_phase);
 
extern function void write (uart_transaction t);
endclass:uart_coverage
 
 
104,21 → 102,19
trans = uart_transaction::type_id::create("trans");
_trans = uart_transaction::type_id::create("_trans");
 
cov_mon = new ("cov_mon",this);
mon_fifo = new ("mon_fifo",this);
 
endfunction:build_phase
 
function void uart_coverage::connect_phase(uvm_phase phase);
cov_mon.connect(mon_fifo.analysis_export);
// cov_mon.connect(mon_fifo.analysis_export);
endfunction:connect_phase
 
task uart_coverage::run_phase(uvm_phase phase);
forever
begin
mon_fifo.get(_trans);
$cast(trans,_trans.clone());
trans_attrib.sample();
 
endtask:run_phase
 
function void uart_coverage::write(uart_transaction t);
$cast(trans,t.clone());
trans_attrib.sample();
if(trans._mode == text)
begin
text_mode_cov.sample();
128,5 → 124,4
begin
binary_mode_cov.sample();
end
end
endtask:run_phase
endfunction // write
/tb/agent/transaction/uart_transaction.svh
148,6 → 148,9
 
extern function void do_copy (uvm_object rhs);
 
extern function bit do_compare(uvm_object rhs);
endclass:uart_transaction
 
 
180,4 → 183,34
false_data =_trans.false_data;
false_data_en =_trans.false_data_en;
_id =_trans._id;
endfunction:do_copy
endfunction:do_copy
 
 
function bit uart_transaction::do_compare(uvm_object rhs,
uvm_comparer comparer);
uart_transaction t;
do_compare=super.do_compare(rhs,comparer);
$cast(t,rhs);
do_compare &= comparer.compare_field_ ("_mode",_mode,rhs._mode);
do_compare &= comparer.compare_field_ ("_spacetype1",_spacetype1, rhs._spacetype1);
do_compare &= comparer.compare_field_ ("_spacetype2",_spacetype2, rhs._spacetype2);
do_compare &= comparer.compare_field_ ("space_wrong1",space_wrong1, rhs.space_wrong1);
do_compare &= comparer.compare_field_ ("space_wrong2",space_wrong2, rhs.space_wrong2);
do_compare &= comparer.compare_field_ ("_data",_data, rhs._data);
do_compare &= comparer.compare_field_ ("length_data",length_data, rhs.length_data);
do_compare &= comparer.compare_field_ ("_eoltype",_eoltype, rhs._eoltype);
do_compare &= comparer.compare_field_ ("eol_wrong",eol_wrong, rhs.eol_wrong);
do_compare &= comparer.compare_field_ ("address",address, rhs.address);
do_compare &= comparer.compare_field_ ("_command",_command, rhs._command);
do_compare &= comparer.compare_field_ ("_reqack",_reqack, rhs._reqack);
do_compare &= comparer.compare_field_ ("_reqinc",_reqinc, rhs._reqinc);
do_compare &= comparer.compare_field_ ("_chartype",_chartype, rhs._chartype);
do_compare &= comparer.compare_field_ ("_arbit",_arbit, rhs._arbit);
do_compare &= comparer.compare_field_ ("time_before",time_before, rhs.time_before);
do_compare &= comparer.compare_field_ ("time_after",time_after, rhs.time_after);
do_compare &= comparer.compare_field_ ("acknowledge",acknowledge, rhs.acknowledge);
do_compare &= comparer.compare_field_ ("wrong_prefix",wrong_prefix, rhs.wrong_prefix);
do_compare &= comparer.compare_field_ ("false_data",false_data, rhs.false_data);
do_compare &= comparer.compare_field_ ("false_data_en",false_data_en, rhs.false_data_en);
do_compare &= comparer.compare_field_ ("_id",_id, rhs._id);
endfunction // do_compare
/tb/agent/uart_agent.svh
71,5 → 71,5
_drv.drv_scbd_cov.connect(drv_port);
 
_mon.mon_scbd.connect(mon_port);
_mon.mon_scbd.connect(_cov.cov_mon);
endfunction:connect_phase
_mon.mon_scbd.connect(_cov.analysis_export);
endfunction:connect_phase
/tb/test/uart_test.svh
85,7 → 85,8
report_server = new();
env_configuration();
TE_configuration();
uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
endfunction:build_phase
 
function void connect_phase (uvm_phase phase);
108,7 → 109,7
printer.knobs.depth = 3;
uvm_resource_db#(int)::set("Reporting","matched_packets",0,null);
uvm_root::get().set_timeout(10s);
uvm_root::get().finish_on_completion=1'b0;
//uvm_root::get().finish_on_completion=1'b0;
endfunction // TE_configuration
task run_phase (uvm_phase phase);
127,10 → 128,6
$display("--------------------------------------------------");
`uvm_info("FINAL STATUS",$sformatf("The number of matched packets are %0d",matched),UVM_NONE);
endfunction // report_phase
 
function void final_phase (uvm_phase phase);
$stop;
endfunction // final_phase
endclass:uart_base_test
 
630,4 → 627,357
if(text_coverage >= 95) coverage_hit=1'b1;
endfunction // evaluate_coverage
endclass:text_mode_test
endclass:text_mode_test
 
//-------------------------------------------------------------------------------------------------
//
// Coverage Driven Test
//
//-------------------------------------------------------------------------------------------------
 
class all_tests extends uart_base_test;
 
rand int unsigned testnumber;
bit coverage_hit=1'b0;
 
int iteration=0;
parameter MAX_ITER=10000;
// Text write tests
seq_1p1 seq1;
seq_1p2 seq2;
seq_1p3 seq3;
seq_1p4 seq4;
seq_1p5 seq5;
seq_1p8 seq6;
seq_1p9 seq7;
seq_1p10 seq8;
seq_1p11 seq9;
seq_1p12 seq10;
 
// Text read tests
seq_2p1 seq11;
seq_2p2 seq12;
seq_2p3 seq13;
// seq_2p4 seq17;
seq_2p5 seq14;
seq_2p8 seq15;
seq_2p9 seq16;
seq_2p10 seq17;
seq_2p11 seq18;
seq_2p12 seq19;
 
// NOP
seq_3p1 seq20;
seq_3p2 seq21;
seq_3p3 seq22;
seq_4p1 seq23;
seq_4p2 seq24;
seq_4p3 seq25;
 
// Write Command Mode
seq_5p2 seq26;
seq_5p3 seq27;
seq_5p4 seq28;
seq_5p5 seq29;
seq_5p6 seq30;
seq_5p7 seq31;
seq_5p8 seq32;
seq_5p9 seq33;
seq_5p10 seq34;
 
// Read Command Mode
seq_6p2 seq35;
seq_6p3 seq36;
seq_6p4 seq37;
seq_6p5 seq38;
seq_6p6 seq39;
seq_6p7 seq40;
seq_6p8 seq41;
seq_6p9 seq42;
seq_6p10 seq43;
 
// GRANT test
seq_7p1 seq44;
seq_7p2 seq45;
 
`uvm_component_utils(all_tests)
 
constraint validtest{testnumber inside{[0:45]};
testnumber != 13;}
function new (string name,uvm_component parent);
super.new(name,parent);
endfunction // new
 
function void build_phase (uvm_phase phase);
super.build_phase(phase);
seq1 = seq_1p1::type_id::create("seq1");
seq2 = seq_1p2::type_id::create("seq2");
seq3 = seq_1p3::type_id::create("seq3");
seq4 = seq_1p4::type_id::create("seq4");
seq5 = seq_1p5::type_id::create("seq5");
seq6 = seq_1p8::type_id::create("seq6");
seq7 = seq_1p9::type_id::create("seq7");
seq8 = seq_1p10::type_id::create("seq8");
seq9 = seq_1p11::type_id::create("seq9");
seq10 = seq_1p12::type_id::create("seq10");
seq11 = seq_2p1::type_id::create("seq11");
seq12 = seq_2p2::type_id::create("seq12");
seq13 = seq_2p3::type_id::create("seq13");
//seq17 = seq_2p4::type_id::create("seq17");
seq14 = seq_2p5::type_id::create("seq14");
seq15 = seq_2p8::type_id::create("seq15");
seq16 = seq_2p9::type_id::create("seq16");
seq17 = seq_2p10::type_id::create("seq17");
seq18 = seq_2p11::type_id::create("seq18");
seq19 = seq_2p12::type_id::create("seq19");
seq20 = seq_3p1::type_id::create("seq20");
seq21 = seq_3p2::type_id::create("seq21");
seq22 = seq_3p3::type_id::create("seq22");
seq23 = seq_4p1::type_id::create("seq23");
seq24 = seq_4p2::type_id::create("seq24");
seq25 = seq_4p3::type_id::create("seq25");
seq26 = seq_5p2::type_id::create("seq26");
seq27 = seq_5p3::type_id::create("seq27");
seq28 = seq_5p4::type_id::create("seq28");
seq29 = seq_5p5::type_id::create("seq29");
seq30 = seq_5p6::type_id::create("seq30");
seq31 = seq_5p7::type_id::create("seq31");
seq32 = seq_5p8::type_id::create("seq32");
seq33 = seq_5p9::type_id::create("seq33");
seq34 = seq_5p10::type_id::create("seq34");
seq35 = seq_6p2::type_id::create("seq35");
seq36 = seq_6p3::type_id::create("seq36");
seq37 = seq_6p4::type_id::create("seq37");
seq38 = seq_6p5::type_id::create("seq38");
seq39 = seq_6p6::type_id::create("seq39");
seq40 = seq_6p7::type_id::create("seq40");
seq41 = seq_6p8::type_id::create("seq41");
seq42 = seq_6p9::type_id::create("seq42");
seq43 = seq_6p10::type_id::create("seq43");
seq44 = seq_7p1::type_id::create("seq44");
seq45 = seq_7p2::type_id::create("seq45");
endfunction // build_phase
 
task run_phase (uvm_phase phase);
super.run_phase(phase);
phase.raise_objection(this);
while(coverage_hit==1'b0 && (iteration < MAX_ITER) ) begin
iteration++;
randomize();
case(testnumber)
0:
begin
seq1.start(env.agent._seq,null);
end
1:
begin
seq2.start(env.agent._seq,null);
end
2:
begin
seq3.start(env.agent._seq,null);
end
3:
begin
seq4.start(env.agent._seq,null);
end
4:
begin
seq5.start(env.agent._seq,null);
end
5:
begin
seq6.start(env.agent._seq,null);
end
6:
begin
seq7.start(env.agent._seq,null);
end
7:
begin
seq8.start(env.agent._seq,null);
end
8:
begin
seq9.start(env.agent._seq,null);
end
9:
begin
seq10.start(env.agent._seq,null);
end
10:
begin
seq11.start(env.agent._seq,null);
end
11:
begin
seq12.start(env.agent._seq,null);
end
12:
begin
seq13.start(env.agent._seq,null);
end
/* 13:
begin
seq17.start(env.agent._seq,null);
end*/
14:
begin
seq14.start(env.agent._seq,null);
end
15:
begin
seq15.start(env.agent._seq,null);
end
16:
begin
seq16.start(env.agent._seq,null);
end
17:
begin
seq17.start(env.agent._seq,null);
end
18:
begin
seq18.start(env.agent._seq,null);
end
19:
begin
seq19.start(env.agent._seq,null);
end
20:
begin
seq20.start(env.agent._seq,null);
end
21:
begin
seq21.start(env.agent._seq,null);
end
22:
begin
seq22.start(env.agent._seq,null);
end
23:
begin
seq23.start(env.agent._seq,null);
end
24:
begin
seq24.start(env.agent._seq,null);
end
25:
begin
seq25.start(env.agent._seq,null);
end
26:
begin
seq26.start(env.agent._seq,null);
end
27:
begin
seq27.start(env.agent._seq,null);
end
28:
begin
seq28.start(env.agent._seq,null);
end
29:
begin
seq29.start(env.agent._seq,null);
end
30:
begin
seq30.start(env.agent._seq,null);
end
31:
begin
seq31.start(env.agent._seq,null);
end
32:
begin
seq32.start(env.agent._seq,null);
end
33:
begin
seq33.start(env.agent._seq,null);
end
34:
begin
seq34.start(env.agent._seq,null);
end
35:
begin
seq35.start(env.agent._seq,null);
end
36:
begin
seq36.start(env.agent._seq,null);
end
37:
begin
seq37.start(env.agent._seq,null);
end
38:
begin
seq38.start(env.agent._seq,null);
end
39:
begin
seq39.start(env.agent._seq,null);
end
40:
begin
seq40.start(env.agent._seq,null);
end
41:
begin
seq41.start(env.agent._seq,null);
end
42:
begin
seq42.start(env.agent._seq,null);
end
43:
begin
seq43.start(env.agent._seq,null);
end
44:
begin
seq44.start(env.agent._seq,null);
end
45:
begin
seq45.start(env.agent._seq,null);
end
default:
begin
`uvm_error("TE","Invalid_test")
end
endcase // case (testnumber)
evaluate_coverage();
end // while (coverage_hit==1'b0)
phase.drop_objection(this);
endtask // run_phase
function void evaluate_coverage();
int text_coverage;
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
if(text_coverage >= 80) coverage_hit=1'b1;
endfunction // evaluate_coverage
 
function void report_phase(uvm_phase phase);
int coverage;
super.report_phase(phase);
if(!(iteration<MAX_ITER))
begin
uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",coverage);
`uvm_warning("SIM",$sformatf("coverage not hit and reached %0d",coverage));
end
endfunction // report_phase
endclass // all_tests
/tb/uart_top.sv
104,7 → 104,7
uvm_config_db#(virtual rf_interface)::set(uvm_root::get(), "*", "rf_inf",rf_inf);
 
uvm_config_db#(virtual uart_arbiter)::set(uvm_root::get(),"*","arb_inf",arb_inf);
run_test("text_mode_test");
run_test("all_tests");
end

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