URL
https://opencores.org/ocsvn/uart2bus_testbench/uart2bus_testbench/trunk
Subversion Repositories uart2bus_testbench
Compare Revisions
- This comparison shows the changes necessary to convert path
/uart2bus_testbench
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/trunk/tb/run.do
1,23 → 1,25
vlib work |
#vlog -novopt ../../../uvm-1.2/src/uvm.sv +incdir+../../../uvm-1.2/src/ |
#------------------------------ |
# BFMs Compiling |
#------------------------------ |
vlog -novopt interfaces/uart_interface.sv +incdir+../ |
vlog -novopt interfaces/rf_interface.sv +incdir+../ |
vlog -novopt interfaces/uart_arbiter.sv +incdir+../ |
#vlog -novopt agent/agent_pkg.sv +incdir+agent/ |
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#vlog -novopt agent/agent_pkg.sv +incdir+agent +incdir+agent/driver +incdir+./ +incdir+agent/configuration +incdir+agent/sequence +incdir+agent/transaction +incdir+../../../uvm-1.2/src/ |
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#----------------------------- |
# Agent Compiling |
#------------------------------ |
vlog -novopt agent/agent_pkg.sv +incdir+agent +incdir+agent/driver +incdir+./ +incdir+agent/configuration +incdir+agent/sequence +incdir+agent/transaction +incdir+agent/monitor +incdir+agent/coverage |
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#----------------------------- |
# Environment & Scoreboard Compiling |
#------------------------------ |
vlog -novopt env/env_pkg.sv +incdir+env +incdir+analysis |
#vlog -novopt env/env_pkg.sv +incdir+env +incdir+../../../uvm-1.2/src/ |
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#----------------------------- |
# UART TEST Compiling |
#------------------------------ |
vlog -novopt uart_pkg.sv +incdir+test/ +incdir+agent/ +incdir+env/ +incdir+./ +incdir+../ |
#vlog -novopt uart_pkg.sv +incdir+test/ +incdir+agent/ +incdir+env/ +incdir+../../../uvm-1.2/src/ +incdir+./ |
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#----------------------------- |
# UART DUT Compiling |
#------------------------------ |
vlog ../rtl/uart_tx.v +incdir+../rtl |
vlog ../rtl/uart_rx.v +incdir+../rtl |
vlog ../rtl/baud_gen.v +incdir+../rtl |
24,40 → 26,12
vlog ../rtl/uart_top.v +incdir+../rtl |
vlog ../rtl/uart_parser.v +incdir+../rtl |
vlog ../rtl/uart2bus_top.v +incdir+../rtl |
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#----------------------------- |
# UART Top Testbench Compiling |
#------------------------------ |
vlog -novopt uart_top.sv +incdir+../../rtl/i2c/ +incdir+./ +incdir+../rtl |
#vlog -novopt uart_top.sv +incdir+../../rtl/i2c/ +incdir+../../../uvm-1.2/src/ |
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#----------------------------- |
# UART Top Testbench Simulation |
#------------------------------ |
vsim -novopt +coverage uart_top_tb |
#vsim -novopt uart_top_tb +UVM_TIMEOUT=50,'NO' |
#vsim -novopt uart_top_tb +uvm_set_severity=uart_scoreboard,uart_s,UVM_LOW,UVM_LOW |
view wave |
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add wave \ |
sim:/uart_top_tb/uart_inf/ser_in \ |
sim:/uart_top_tb/uart_inf/ser_out \ |
sim:/uart_top_tb/uart_inf/clock \ |
sim:/uart_top_tb/uart_inf/start_trans \ |
sim:/uart_top_tb/rf_inf/int_address \ |
sim:/uart_top_tb/rf_inf/int_wr_data \ |
sim:/uart_top_tb/rf_inf/int_write \ |
sim:/uart_top_tb/rf_inf/int_rd_data \ |
sim:/uart_top_tb/rf_inf/int_read \ |
sim:/uart_top_tb/rf_inf/int_gnt \ |
sim:/uart_top_tb/rf_inf/int_req \ |
sim:/uart_top_tb/dut/int_gnt \ |
sim:/uart_top_tb/dut/int_req \ |
sim:/uart_top_tb/dut/ser_in \ |
sim:/uart_top_tb/dut/ser_out \ |
sim:/uart_top_tb/dut/reset \ |
sim:/uart_top_tb/dut/clock |
run -all |
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#vsim i2c_top +UVM_CONFIG_DB_TRACE |
#run -all |
run -all |