URL
https://opencores.org/ocsvn/uart2spi/uart2spi/trunk
Subversion Repositories uart2spi
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/uart2spi/trunk/rtl/top/top.v
80,8 → 80,8
// Global Dec |
// --------------------------------- |
|
input line_reset_n ; // line reset |
input line_clk ; // line clock |
input line_reset_n ; // line reset |
input line_clk ; // line clock |
|
//------------------------------------- |
// Configuration |
118,26 → 118,26
// Control Unit interface |
// -------------------------------------- |
|
wire [15:0] reg_addr ; // Register Address |
wire [31:0] reg_wdata ; // Register Wdata |
wire reg_req ; // Register Request |
wire reg_wr ; // 1 -> write; 0 -> read |
wire reg_ack ; // Register Ack |
wire [31:0] reg_rdata ; |
wire [15:0] reg_addr ; // Register Address |
wire [31:0] reg_wdata ; // Register Wdata |
wire reg_req ; // Register Request |
wire reg_wr ; // 1 -> write; 0 -> read |
wire reg_ack ; // Register Ack |
wire [31:0] reg_rdata ; |
//-------------------------------------- |
// TXD Path |
// ------------------------------------- |
wire tx_data_avail ; // Indicate valid TXD Data |
wire [7:0] tx_data ; // TXD Data to be transmited |
wire tx_rd ; // Indicate TXD Data Been Read |
wire tx_data_avail ; // Indicate valid TXD Data |
wire [7:0] tx_data ; // TXD Data to be transmited |
wire tx_rd ; // Indicate TXD Data Been Read |
|
|
//-------------------------------------- |
// RXD Path |
// ------------------------------------- |
wire rx_ready ; // Indicate Ready to accept the Read Data |
wire [7:0] rx_data ; // RXD Data |
wire rx_wr ; // Valid RXD Data |
wire rx_ready ; // Indicate Ready to accept the Read Data |
wire [7:0] rx_data ; // RXD Data |
wire rx_wr ; // Valid RXD Data |
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spi_core u_spi ( |
|
170,20 → 170,20
// configuration control |
.cfg_tx_enable (cfg_tx_enable) , |
.cfg_rx_enable (cfg_rx_enable) , |
.cfg_stop_bit (cfg_stop_bit) , |
.cfg_pri_mod (cfg_pri_mod) , |
.cfg_baud_16x (cfg_baud_16x) , |
.cfg_stop_bit (cfg_stop_bit) , |
.cfg_pri_mod (cfg_pri_mod) , |
.cfg_baud_16x (cfg_baud_16x) , |
|
// TXD Information |
.tx_data_avail (tx_data_avail) , |
.tx_rd (tx_rd) , |
.tx_data (tx_data) , |
.tx_rd (tx_rd) , |
.tx_data (tx_data) , |
|
|
// RXD Information |
.rx_ready (rx_ready) , |
.rx_wr (rx_wr) , |
.rx_data (rx_data) , |
.rx_ready (rx_ready) , |
.rx_wr (rx_wr) , |
.rx_data (rx_data) , |
|
// Status information |
.frm_error (frm_error) , |