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/IP_complete_nomac.vhd
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---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: |
-- |
-- Create Date: 12:43:16 06/04/2011 |
-- Design Name: |
-- Module Name: IP_complete_nomac - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: Implements complete IP stack with ARP (but no MAC) |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - separated RX and TX clocks |
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: |
-- |
-- Create Date: 12:43:16 06/04/2011 |
-- Design Name: |
-- Module Name: IP_complete_nomac - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: Implements complete IP stack with ARP (but no MAC) |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - separated RX and TX clocks |
-- Revision 0.03 - Added mac_tx_tfirst |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library ieee; |
use ieee.std_logic_1164.all; |
use IEEE.NUMERIC_STD.all; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
use work.arp; |
use work.arpv2; |
|
entity IP_complete_nomac is |
generic ( |
use_arpv2 : boolean := true; -- use ARP with multipule entries. for signel entry, set |
-- to false |
no_default_gateway : boolean := false; -- set to false if communicating with devices accessed |
-- through a "default gateway or router" |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the ARP store |
); |
port ( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
ip_rx : out ipv4_rx_type; |
-- system signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic; |
our_ip_address : in std_logic_vector (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
control : in ip_control_type; |
-- status signals |
arp_pkt_count : out std_logic_vector(7 downto 0); -- count of arp pkts received |
ip_pkt_count : out std_logic_vector(7 downto 0); -- number of IP pkts received for us |
-- MAC Transmitter |
mac_tx_tdata : out std_logic_vector(7 downto 0); -- data byte to tx |
mac_tx_tvalid : out std_logic; -- tdata is valid |
mac_tx_tready : in std_logic; -- mac is ready to accept data |
mac_tx_tfirst : out std_logic; -- indicates first byte of frame |
mac_tx_tlast : out std_logic; -- indicates last byte of frame |
-- MAC Receiver |
mac_rx_tdata : in std_logic_vector(7 downto 0); -- data byte received |
mac_rx_tvalid : in std_logic; -- indicates tdata is valid |
mac_rx_tready : out std_logic; -- tells mac that we are ready to take data |
mac_rx_tlast : in std_logic -- indicates last byte of the trame |
); |
end IP_complete_nomac; |
|
|
architecture structural of IP_complete_nomac is |
|
component IPv4 |
port( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
ip_rx : out ipv4_rx_type; |
-- system control signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic; |
our_ip_address : in std_logic_vector (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
-- system status signals |
rx_pkt_count : out std_logic_vector(7 downto 0); -- number of IP pkts received for us |
-- ARP lookup signals |
arp_req_req : out arp_req_req_type; |
arp_req_rslt : in arp_req_rslt_type; |
-- MAC layer RX signals |
mac_data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
mac_data_in_valid : in std_logic; -- indicates data_in valid on clock |
mac_data_in_last : in std_logic; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
mac_data_out_ready : in std_logic; -- indicates system ready to consume data |
mac_data_out_valid : out std_logic; -- indicates data out is valid |
mac_data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
mac_data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
mac_data_out : out std_logic_vector (7 downto 0) -- ethernet frame (from dst mac addr through to last byte of frame) |
); |
end component; |
|
component arp |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 1; -- (added for compatibility with arpv2. this value not used in this impl) |
MAX_ARP_ENTRIES : integer := 1 -- (added for compatibility with arpv2. this value not used in this impl) |
); |
port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; |
arp_req_rslt : out arp_req_rslt_type; |
-- MAC layer RX signals |
data_in_clk : in std_logic; |
reset : in std_logic; |
data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in std_logic; -- indicates data_in valid on clock |
data_in_last : in std_logic; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_clk : in std_logic; |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in std_logic_vector (47 downto 0); |
our_ip_address : in std_logic_vector (31 downto 0); |
control : in arp_control_type; |
req_count : out std_logic_vector(7 downto 0) -- count of arp pkts received |
); |
end component; |
|
component tx_arbitrator |
port( |
clk : in std_logic; |
reset : in std_logic; |
|
req_1 : in std_logic; |
grant_1 : out std_logic; |
data_1 : in std_logic_vector(7 downto 0); -- data byte to tx |
valid_1 : in std_logic; -- tdata is valid |
first_1 : in std_logic; -- indicates first byte of frame |
last_1 : in std_logic; -- indicates last byte of frame |
|
req_2 : in std_logic; |
grant_2 : out std_logic; |
data_2 : in std_logic_vector(7 downto 0); -- data byte to tx |
valid_2 : in std_logic; -- tdata is valid |
first_2 : in std_logic; -- indicates first byte of frame |
last_2 : in std_logic; -- indicates last byte of frame |
|
data : out std_logic_vector(7 downto 0); -- data byte to tx |
valid : out std_logic; -- tdata is valid |
first : out std_logic; -- indicates first byte of frame |
last : out std_logic -- indicates last byte of frame |
); |
end component; |
|
|
------------------- |
-- Configuration |
-- |
-- Enable one of the following to specify which |
-- implementation of the ARP layer to use |
------------------- |
|
|
-- for arp_layer : arp use entity work.arp; -- single slot arbitrator |
-- for arp_layer : arp use entity work.arpv2; -- multislot arbitrator |
|
|
|
--------------------------- |
-- Signals |
--------------------------- |
|
-- ARP REQUEST |
signal arp_req_req_int : arp_req_req_type; |
signal arp_req_rslt_int : arp_req_rslt_type; |
-- MAC arbitration busses |
signal ip_mac_req : std_logic; |
signal ip_mac_grant : std_logic; |
signal ip_mac_data_out : std_logic_vector (7 downto 0); |
signal ip_mac_valid : std_logic; |
signal ip_mac_first : std_logic; |
signal ip_mac_last : std_logic; |
signal arp_mac_req : std_logic; |
signal arp_mac_grant : std_logic; |
signal arp_mac_data_out : std_logic_vector (7 downto 0); |
signal arp_mac_valid : std_logic; |
signal arp_mac_first : std_logic; |
signal arp_mac_last : std_logic; |
-- MAC RX bus |
signal mac_rx_tready_int : std_logic; |
-- MAC TX bus |
signal mac_tx_tdata_int : std_logic_vector (7 downto 0); |
signal mac_tx_tvalid_int : std_logic; |
signal mac_tx_tfirst_int : std_logic; |
signal mac_tx_tlast_int : std_logic; |
-- control signals |
signal mac_tx_granted_int : std_logic; |
|
begin |
|
mac_rx_tready_int <= '1'; -- enable the mac receiver |
|
-- set followers |
mac_tx_tdata <= mac_tx_tdata_int; |
mac_tx_tvalid <= mac_tx_tvalid_int; |
mac_tx_tfirst <= mac_tx_tfirst_int; |
mac_tx_tlast <= mac_tx_tlast_int; |
|
mac_rx_tready <= mac_rx_tready_int; |
|
------------------------------------------------------------------------------ |
-- Instantiate the IP layer |
------------------------------------------------------------------------------ |
|
IP_layer : IPv4 port map |
( |
ip_tx_start => ip_tx_start, |
ip_tx => ip_tx, |
ip_tx_result => ip_tx_result, |
ip_tx_data_out_ready => ip_tx_data_out_ready, |
ip_rx_start => ip_rx_start, |
ip_rx => ip_rx, |
rx_clk => rx_clk, |
tx_clk => tx_clk, |
reset => reset, |
our_ip_address => our_ip_address, |
our_mac_address => our_mac_address, |
rx_pkt_count => ip_pkt_count, |
arp_req_req => arp_req_req_int, |
arp_req_rslt => arp_req_rslt_int, |
mac_tx_req => ip_mac_req, |
mac_tx_granted => ip_mac_grant, |
mac_data_out_ready => mac_tx_tready, |
mac_data_out_valid => ip_mac_valid, |
mac_data_out_first => ip_mac_first, |
mac_data_out_last => ip_mac_last, |
mac_data_out => ip_mac_data_out, |
mac_data_in => mac_rx_tdata, |
mac_data_in_valid => mac_rx_tvalid, |
mac_data_in_last => mac_rx_tlast |
); |
|
------------------------------------------------------------------------------ |
-- Instantiate the ARP layer |
------------------------------------------------------------------------------ |
signle_entry_arp: if (not use_arpv2) generate |
arp_layer : entity work.arp |
generic map ( |
CLOCK_FREQ => CLOCK_FREQ, |
ARP_TIMEOUT => ARP_TIMEOUT, |
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO, |
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES |
) |
port map( |
-- request signals |
arp_req_req => arp_req_req_int, |
arp_req_rslt => arp_req_rslt_int, |
-- rx signals |
data_in_clk => rx_clk, |
reset => reset, |
data_in => mac_rx_tdata, |
data_in_valid => mac_rx_tvalid, |
data_in_last => mac_rx_tlast, |
-- tx signals |
mac_tx_req => arp_mac_req, |
mac_tx_granted => arp_mac_grant, |
data_out_clk => tx_clk, |
data_out_ready => mac_tx_tready, |
data_out_valid => arp_mac_valid, |
data_out_first => arp_mac_first, |
data_out_last => arp_mac_last, |
data_out => arp_mac_data_out, |
-- system signals |
our_mac_address => our_mac_address, |
our_ip_address => our_ip_address, |
control => control.arp_controls, |
req_count => arp_pkt_count |
); |
end generate signle_entry_arp; |
|
multi_entry_arp: if (use_arpv2) generate |
arp_layer : entity work.arpv2 |
generic map ( |
no_default_gateway => no_default_gateway, |
CLOCK_FREQ => CLOCK_FREQ, |
ARP_TIMEOUT => ARP_TIMEOUT, |
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO, |
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES |
) |
port map( |
-- request signals |
arp_req_req => arp_req_req_int, |
arp_req_rslt => arp_req_rslt_int, |
-- rx signals |
data_in_clk => rx_clk, |
reset => reset, |
data_in => mac_rx_tdata, |
data_in_valid => mac_rx_tvalid, |
data_in_last => mac_rx_tlast, |
-- tx signals |
mac_tx_req => arp_mac_req, |
mac_tx_granted => arp_mac_grant, |
data_out_clk => tx_clk, |
data_out_ready => mac_tx_tready, |
data_out_valid => arp_mac_valid, |
data_out_first => arp_mac_first, |
data_out_last => arp_mac_last, |
data_out => arp_mac_data_out, |
-- system signals |
our_mac_address => our_mac_address, |
our_ip_address => our_ip_address, |
control => control.arp_controls, |
req_count => arp_pkt_count |
); |
end generate multi_entry_arp; |
|
------------------------------------------------------------------------------ |
-- Instantiate the TX Arbitrator |
------------------------------------------------------------------------------ |
mac_tx_arb : tx_arbitrator |
port map( |
clk => tx_clk, |
reset => reset, |
|
req_1 => ip_mac_req, |
grant_1 => ip_mac_grant, |
data_1 => ip_mac_data_out, |
valid_1 => ip_mac_valid, |
first_1 => ip_mac_first, |
last_1 => ip_mac_last, |
|
req_2 => arp_mac_req, |
grant_2 => arp_mac_grant, |
data_2 => arp_mac_data_out, |
valid_2 => arp_mac_valid, |
first_2 => arp_mac_first, |
last_2 => arp_mac_last, |
|
data => mac_tx_tdata_int, |
valid => mac_tx_tvalid_int, |
first => mac_tx_tfirst_int, |
last => mac_tx_tlast_int |
); |
|
end structural; |
|
|
|
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
LIBRARY ieee; |
USE ieee.std_logic_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
use work.arp; |
use work.arpv2; |
|
entity IP_complete_nomac is |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the ARP store |
); |
Port ( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
ip_rx : out ipv4_rx_type; |
-- system signals |
rx_clk : in STD_LOGIC; |
tx_clk : in STD_LOGIC; |
reset : in STD_LOGIC; |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
control : in ip_control_type; |
-- status signals |
arp_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- count of arp pkts received |
ip_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- number of IP pkts received for us |
-- MAC Transmitter |
mac_tx_tdata : out std_logic_vector(7 downto 0); -- data byte to tx |
mac_tx_tvalid : out std_logic; -- tdata is valid |
mac_tx_tready : in std_logic; -- mac is ready to accept data |
mac_tx_tfirst : out std_logic; -- indicates first byte of frame |
mac_tx_tlast : out std_logic; -- indicates last byte of frame |
-- MAC Receiver |
mac_rx_tdata : in std_logic_vector(7 downto 0); -- data byte received |
mac_rx_tvalid : in std_logic; -- indicates tdata is valid |
mac_rx_tready : out std_logic; -- tells mac that we are ready to take data |
mac_rx_tlast : in std_logic -- indicates last byte of the trame |
); |
end IP_complete_nomac; |
|
|
architecture structural of IP_complete_nomac is |
|
COMPONENT IPv4 |
PORT( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
ip_rx : out ipv4_rx_type; |
-- system control signals |
rx_clk : in STD_LOGIC; |
tx_clk : in STD_LOGIC; |
reset : in STD_LOGIC; |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
-- system status signals |
rx_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- number of IP pkts received for us |
-- ARP lookup signals |
arp_req_req : out arp_req_req_type; |
arp_req_rslt : in arp_req_rslt_type; |
-- MAC layer RX signals |
mac_data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
mac_data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
mac_data_in_last : in STD_LOGIC; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
mac_data_out_ready : in std_logic; -- indicates system ready to consume data |
mac_data_out_valid : out std_logic; -- indicates data out is valid |
mac_data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
mac_data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
mac_data_out : out std_logic_vector (7 downto 0) -- ethernet frame (from dst mac addr through to last byte of frame) |
); |
END COMPONENT; |
|
COMPONENT arp |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 1; -- (added for compatibility with arpv2. this value not used in this impl) |
MAX_ARP_ENTRIES : integer := 1 -- (added for compatibility with arpv2. this value not used in this impl) |
); |
Port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; |
arp_req_rslt : out arp_req_rslt_type; |
-- MAC layer RX signals |
data_in_clk : in STD_LOGIC; |
reset : in STD_LOGIC; |
data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
data_in_last : in STD_LOGIC; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_clk : in std_logic; |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in STD_LOGIC_VECTOR (47 downto 0); |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
control : in arp_control_type; |
req_count : out STD_LOGIC_VECTOR(7 downto 0) -- count of arp pkts received |
); |
END COMPONENT; |
|
COMPONENT tx_arbitrator |
PORT( |
clk : in std_logic; |
reset : in std_logic; |
|
req_1 : in std_logic; |
grant_1 : out std_logic; |
data_1 : in std_logic_vector(7 downto 0); -- data byte to tx |
valid_1 : in std_logic; -- tdata is valid |
first_1 : in std_logic; -- indicates first byte of frame |
last_1 : in std_logic; -- indicates last byte of frame |
|
req_2 : in std_logic; |
grant_2 : out std_logic; |
data_2 : in std_logic_vector(7 downto 0); -- data byte to tx |
valid_2 : in std_logic; -- tdata is valid |
first_2 : in std_logic; -- indicates first byte of frame |
last_2 : in std_logic; -- indicates last byte of frame |
|
data : out std_logic_vector(7 downto 0); -- data byte to tx |
valid : out std_logic; -- tdata is valid |
first : out std_logic; -- indicates first byte of frame |
last : out std_logic -- indicates last byte of frame |
); |
END COMPONENT; |
|
|
------------------- |
-- Configuration |
-- |
-- Enable one of the following to specify which |
-- implementation of the ARP layer to use |
------------------- |
|
|
-- for arp_layer : arp use entity work.arp; -- single slot arbitrator |
for arp_layer : arp use entity work.arpv2; -- multislot arbitrator |
|
|
|
--------------------------- |
-- Signals |
--------------------------- |
|
-- ARP REQUEST |
signal arp_req_req_int : arp_req_req_type; |
signal arp_req_rslt_int : arp_req_rslt_type; |
-- MAC arbitration busses |
signal ip_mac_req : std_logic; |
signal ip_mac_grant : std_logic; |
signal ip_mac_data_out : std_logic_vector (7 downto 0); |
signal ip_mac_valid : std_logic; |
signal ip_mac_first : std_logic; |
signal ip_mac_last : std_logic; |
signal arp_mac_req : std_logic; |
signal arp_mac_grant : std_logic; |
signal arp_mac_data_out : std_logic_vector (7 downto 0); |
signal arp_mac_valid : std_logic; |
signal arp_mac_first : std_logic; |
signal arp_mac_last : std_logic; |
-- MAC RX bus |
signal mac_rx_tready_int : std_logic; |
-- MAC TX bus |
signal mac_tx_tdata_int : std_logic_vector (7 downto 0); |
signal mac_tx_tvalid_int : std_logic; |
signal mac_tx_tfirst_int : std_logic; |
signal mac_tx_tlast_int : std_logic; |
-- control signals |
signal mac_tx_granted_int : std_logic; |
|
begin |
|
mac_rx_tready_int <= '1'; -- enable the mac receiver |
|
-- set followers |
mac_tx_tdata <= mac_tx_tdata_int; |
mac_tx_tvalid <= mac_tx_tvalid_int; |
mac_tx_tfirst <= mac_tx_tfirst_int; |
mac_tx_tlast <= mac_tx_tlast_int; |
|
mac_rx_tready <= mac_rx_tready_int; |
|
------------------------------------------------------------------------------ |
-- Instantiate the IP layer |
------------------------------------------------------------------------------ |
|
IP_layer : IPv4 PORT MAP |
( |
ip_tx_start => ip_tx_start, |
ip_tx => ip_tx, |
ip_tx_result => ip_tx_result, |
ip_tx_data_out_ready=> ip_tx_data_out_ready, |
ip_rx_start => ip_rx_start, |
ip_rx => ip_rx, |
rx_clk => rx_clk, |
tx_clk => tx_clk, |
reset => reset, |
our_ip_address => our_ip_address, |
our_mac_address => our_mac_address, |
rx_pkt_count => ip_pkt_count, |
arp_req_req => arp_req_req_int, |
arp_req_rslt => arp_req_rslt_int, |
mac_tx_req => ip_mac_req, |
mac_tx_granted => ip_mac_grant, |
mac_data_out_ready => mac_tx_tready, |
mac_data_out_valid => ip_mac_valid, |
mac_data_out_first => ip_mac_first, |
mac_data_out_last => ip_mac_last, |
mac_data_out => ip_mac_data_out, |
mac_data_in => mac_rx_tdata, |
mac_data_in_valid => mac_rx_tvalid, |
mac_data_in_last => mac_rx_tlast |
); |
|
------------------------------------------------------------------------------ |
-- Instantiate the ARP layer |
------------------------------------------------------------------------------ |
arp_layer : arp |
generic map ( |
CLOCK_FREQ => CLOCK_FREQ, |
ARP_TIMEOUT => ARP_TIMEOUT, |
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO, |
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES |
) |
Port map( |
-- request signals |
arp_req_req => arp_req_req_int, |
arp_req_rslt => arp_req_rslt_int, |
-- rx signals |
data_in_clk => rx_clk, |
reset => reset, |
data_in => mac_rx_tdata, |
data_in_valid => mac_rx_tvalid, |
data_in_last => mac_rx_tlast, |
-- tx signals |
mac_tx_req => arp_mac_req, |
mac_tx_granted => arp_mac_grant, |
data_out_clk => tx_clk, |
data_out_ready => mac_tx_tready, |
data_out_valid => arp_mac_valid, |
data_out_first => arp_mac_first, |
data_out_last => arp_mac_last, |
data_out => arp_mac_data_out, |
-- system signals |
our_mac_address => our_mac_address, |
our_ip_address => our_ip_address, |
control => control.arp_controls, |
req_count => arp_pkt_count |
); |
|
|
------------------------------------------------------------------------------ |
-- Instantiate the TX Arbitrator |
------------------------------------------------------------------------------ |
mac_tx_arb : tx_arbitrator |
Port map( |
clk => tx_clk, |
reset => reset, |
|
req_1 => ip_mac_req, |
grant_1 => ip_mac_grant, |
data_1 => ip_mac_data_out, |
valid_1 => ip_mac_valid, |
first_1 => ip_mac_first, |
last_1 => ip_mac_last, |
|
req_2 => arp_mac_req, |
grant_2 => arp_mac_grant, |
data_2 => arp_mac_data_out, |
valid_2 => arp_mac_valid, |
first_2 => arp_mac_first, |
last_2 => arp_mac_last, |
|
data => mac_tx_tdata_int, |
valid => mac_tx_tvalid_int, |
first => mac_tx_tfirst_int, |
last => mac_tx_tlast_int |
); |
|
end structural; |
|
|
|
/arp_SYNC.vhd
1,163 → 1,163
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: |
-- |
-- Create Date: 14:09:01 02/20/2012 |
-- Design Name: |
-- Module Name: arp_SYNC - Behavioral - synchronises between rx and tx clock domains |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: |
-- |
-- Create Date: 14:09:01 02/20/2012 |
-- Design Name: |
-- Module Name: arp_SYNC - Behavioral - synchronises between rx and tx clock domains |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use work.arp_types.all; |
|
entity arp_SYNC is |
port ( |
-- REQ to TX |
arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC |
send_who_has : out std_logic; |
ip_entry : out std_logic_vector (31 downto 0); |
-- RX to TX |
recv_who_has : in std_logic; -- this is for us, we will respond |
arp_entry_for_who_has : in arp_entry_t; |
send_I_have : out std_logic; |
arp_entry : out arp_entry_t; |
-- RX to REQ |
I_have_received : in std_logic; |
nwk_result_status : out arp_nwk_rslt_t; |
-- System Signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic |
); |
end arp_SYNC; |
|
architecture Behavioral of arp_SYNC is |
|
type sync_state_t is (IDLE, HOLD1, HOLD2); |
|
-- state registers |
signal ip_entry_state : sync_state_t; |
signal arp_entry_state : sync_state_t; |
signal ip_entry_reg : std_logic_vector (31 downto 0); |
signal arp_entry_reg : arp_entry_t; |
|
-- synchronisation registers |
signal send_who_has_r1 : std_logic; |
signal send_who_has_r2 : std_logic; |
signal send_I_have_r1 : std_logic; |
signal send_I_have_r2 : std_logic; |
|
begin |
|
combinatorial : process ( |
-- input signals |
arp_nwk_req, recv_who_has, arp_entry_for_who_has, I_have_received, reset, |
-- state |
ip_entry_state, ip_entry_reg, arp_entry_state, arp_entry_reg, |
-- synchronisation registers |
send_who_has_r1, send_who_has_r2, |
send_I_have_r1, send_I_have_r2 |
) |
begin |
-- set output followers |
send_who_has <= send_who_has_r2; |
ip_entry <= ip_entry_reg; |
send_I_have <= send_I_have_r2; |
arp_entry <= arp_entry_reg; |
|
-- combinaltorial outputs |
if I_have_received = '1' then |
nwk_result_status <= RECEIVED; |
else |
nwk_result_status <= IDLE; |
end if; |
end process; |
|
-- process for stablisising RX clock domain data registers |
-- essentially holds data registers ip_entry and arp_entry static for 2 rx clk cycles |
-- during transfer to TX clk domain |
rx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
ip_entry_reg <= (others => '0'); |
arp_entry_reg.ip <= (others => '0'); |
arp_entry_reg.mac <= (others => '0'); |
else |
-- normal (non reset) processing |
case ip_entry_state is |
when IDLE => |
if arp_nwk_req.req = '1' then |
ip_entry_reg <= arp_nwk_req.ip; |
ip_entry_state <= HOLD1; |
else |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= IDLE; |
end if; |
when HOLD1 => |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= HOLD2; |
when HOLD2 => |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= IDLE; |
end case; |
|
case arp_entry_state is |
when IDLE => |
if recv_who_has = '1' then |
arp_entry_reg <= arp_entry_for_who_has; |
arp_entry_state <= HOLD1; |
else |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= IDLE; |
end if; |
when HOLD1 => |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= HOLD2; |
when HOLD2 => |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= IDLE; |
end case; |
end if; |
end if; |
end process; |
|
-- process for syncing to the TX clock domain |
-- clocks control signals through 2 layers of tx clocking |
tx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
send_who_has_r1 <= '0'; |
send_who_has_r2 <= '0'; |
send_I_have_r1 <= '0'; |
send_I_have_r2 <= '0'; |
else |
-- normal (non reset) processing |
|
send_who_has_r1 <= arp_nwk_req.req; |
send_who_has_r2 <= send_who_has_r1; |
|
send_I_have_r1 <= recv_who_has; |
send_I_have_r2 <= send_I_have_r1; |
end if; |
end if; |
end process; |
|
|
end Behavioral; |
|
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.arp_types.all; |
|
entity arp_SYNC is |
Port ( |
-- REQ to TX |
arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC |
send_who_has : out std_logic; |
ip_entry : out STD_LOGIC_VECTOR (31 downto 0); |
-- RX to TX |
recv_who_has : in std_logic; -- this is for us, we will respond |
arp_entry_for_who_has : in arp_entry_t; |
send_I_have : out std_logic; |
arp_entry : out arp_entry_t; |
-- RX to REQ |
I_have_received : in std_logic; |
nwk_result_status : out arp_nwk_rslt_t; |
-- System Signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic |
); |
end arp_SYNC; |
|
architecture Behavioral of arp_SYNC is |
|
type sync_state_t is (IDLE,HOLD1, HOLD2); |
|
-- state registers |
signal ip_entry_state : sync_state_t; |
signal arp_entry_state : sync_state_t; |
signal ip_entry_reg : STD_LOGIC_VECTOR (31 downto 0); |
signal arp_entry_reg : arp_entry_t; |
|
-- synchronisation registers |
signal send_who_has_r1 : std_logic; |
signal send_who_has_r2 : std_logic; |
signal send_I_have_r1 : std_logic; |
signal send_I_have_r2 : std_logic; |
|
begin |
|
combinatorial : process ( |
-- input signals |
arp_nwk_req, recv_who_has, arp_entry_for_who_has, I_have_received, reset, |
-- state |
ip_entry_state, ip_entry_reg, arp_entry_state, arp_entry_reg, |
-- synchronisation registers |
send_who_has_r1, send_who_has_r2, |
send_I_have_r1, send_I_have_r2 |
) |
begin |
-- set output followers |
send_who_has <= send_who_has_r2; |
ip_entry <= ip_entry_reg; |
send_I_have <= send_I_have_r2; |
arp_entry <= arp_entry_reg; |
|
-- combinaltorial outputs |
if I_have_received = '1' then |
nwk_result_status <= RECEIVED; |
else |
nwk_result_status <= IDLE; |
end if; |
end process; |
|
-- process for stablisising RX clock domain data registers |
-- essentially holds data registers ip_entry and arp_entry static for 2 rx clk cycles |
-- during transfer to TX clk domain |
rx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
ip_entry_reg <= (others => '0'); |
arp_entry_reg.ip <= (others => '0'); |
arp_entry_reg.mac <= (others => '0'); |
else |
-- normal (non reset) processing |
case ip_entry_state is |
when IDLE => |
if arp_nwk_req.req = '1' then |
ip_entry_reg <= arp_nwk_req.ip; |
ip_entry_state <= HOLD1; |
else |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= IDLE; |
end if; |
when HOLD1 => |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= HOLD2; |
when HOLD2 => |
ip_entry_reg <= ip_entry_reg; |
ip_entry_state <= IDLE; |
end case; |
|
case arp_entry_state is |
when IDLE => |
if recv_who_has = '1' then |
arp_entry_reg <= arp_entry_for_who_has; |
arp_entry_state <= HOLD1; |
else |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= IDLE; |
end if; |
when HOLD1 => |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= HOLD2; |
when HOLD2 => |
arp_entry_reg <= arp_entry_reg; |
arp_entry_state <= IDLE; |
end case; |
end if; |
end if; |
end process; |
|
-- process for syncing to the TX clock domain |
-- clocks control signals through 2 layers of tx clocking |
tx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
send_who_has_r1 <= '0'; |
send_who_has_r2 <= '0'; |
send_I_have_r1 <= '0'; |
send_I_have_r2 <= '0'; |
else |
-- normal (non reset) processing |
|
send_who_has_r1 <= arp_nwk_req.req; |
send_who_has_r2 <= send_who_has_r1; |
|
send_I_have_r1 <= recv_who_has; |
send_I_have_r2 <= send_I_have_r1; |
end if; |
end if; |
end process; |
|
|
end Behavioral; |
|
/arp_STORE_br.vhd
1,6 → 1,6
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- Engineer: Peter Fall |
-- |
-- Create Date: 12:00:04 05/31/2011 |
-- Design Name: |
9,291 → 9,288
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- ARP storage table using block ram with lookup based on IP address |
-- implements upto 255 entries with sequential search |
-- uses round robin overwrite when full (LRU would be better, but ...) |
-- ARP storage table using block ram with lookup based on IP address |
-- implements upto 255 entries with sequential search |
-- uses round robin overwrite when full (LRU would be better, but ...) |
-- |
-- store may take a number of cycles and the request is latched |
-- lookup may take a number of cycles. Assumes that request signals remain valid during lookup |
-- |
-- store may take a number of cycles and the request is latched |
-- lookup may take a number of cycles. Assumes that request signals remain valid during lookup |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.01 - File Created |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use ieee.std_logic_unsigned.all; |
use work.arp_types.all; |
|
entity arp_STORE_br is |
generic ( |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the store |
); |
port ( |
-- read signals |
read_req : in arp_store_rdrequest_t; -- requesting a lookup or store |
read_result : out arp_store_result_t; -- the result |
-- write signals |
write_req : in arp_store_wrrequest_t; -- requesting a lookup or store |
-- control and status signals |
clear_store : in std_logic; -- erase all entries |
entry_count : out unsigned(7 downto 0); -- how many entries currently in store |
-- system signals |
clk : in std_logic; |
reset : in std_logic |
); |
entity arp_STORE_br is |
generic ( |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the store |
); |
Port ( |
-- read signals |
read_req : in arp_store_rdrequest_t; -- requesting a lookup or store |
read_result : out arp_store_result_t; -- the result |
-- write signals |
write_req : in arp_store_wrrequest_t; -- requesting a lookup or store |
-- control and status signals |
clear_store : in std_logic; -- erase all entries |
entry_count : out unsigned(7 downto 0); -- how many entries currently in store |
-- system signals |
clk : in std_logic; |
reset : in STD_LOGIC |
); |
end arp_STORE_br; |
|
architecture Behavioral of arp_STORE_br is |
|
type st_state_t is (IDLE, PAUSE, SEARCH, FOUND, NOT_FOUND); |
|
type ip_ram_t is array (0 to MAX_ARP_ENTRIES-1) of std_logic_vector(31 downto 0); |
type mac_ram_t is array (0 to MAX_ARP_ENTRIES-1) of std_logic_vector(47 downto 0); |
subtype addr_t is integer range 0 to MAX_ARP_ENTRIES; |
|
type count_mode_t is (RST, INCR, HOLD); |
|
type mode_t is (MREAD, MWRITE); |
|
-- state variables |
signal ip_ram : ip_ram_t; -- will be implemented as block ram |
signal mac_ram : mac_ram_t; -- will be implemented as block ram |
signal st_state : st_state_t; |
signal next_write_addr : addr_t; -- where to make the next write |
signal num_entries : addr_t; -- number of entries in the store |
signal next_read_addr : addr_t; -- next addr to read from |
signal entry_found : arp_entry_t; -- entry found in search |
signal mode : mode_t; -- are we writing or reading? |
signal req_entry : arp_entry_t; -- entry latched from req |
|
-- busses |
signal next_st_state : st_state_t; |
signal arp_entry_val : arp_entry_t; |
signal mode_val : mode_t; |
signal write_addr : addr_t; -- actual write address to use |
signal read_result_int : arp_store_result_t; |
|
-- control signals |
signal set_st_state : std_logic; |
signal set_next_write_addr : count_mode_t; |
signal set_num_entries : count_mode_t; |
signal set_next_read_addr : count_mode_t; |
signal write_ram : std_logic; |
signal set_entry_found : std_logic; |
signal set_mode : std_logic; |
|
function read_status(status : arp_store_rslt_t; signal mode : mode_t) return arp_store_rslt_t is |
variable ret : arp_store_rslt_t; |
begin |
case status is |
when IDLE => |
ret := status; |
when others => |
if mode = MWRITE then |
ret := BUSY; |
else |
ret := status; |
end if; |
end case; |
return ret; |
end read_status; |
|
|
type st_state_t is (IDLE,PAUSE,SEARCH,FOUND,NOT_FOUND); |
|
type ip_ram_t is array (0 to MAX_ARP_ENTRIES-1) of std_logic_vector(31 downto 0); |
type mac_ram_t is array (0 to MAX_ARP_ENTRIES-1) of std_logic_vector(47 downto 0); |
subtype addr_t is integer range 0 to MAX_ARP_ENTRIES; |
|
type count_mode_t is (RST,INCR,HOLD); |
|
type mode_t is (MREAD,MWRITE); |
|
-- state variables |
signal ip_ram : ip_ram_t; -- will be implemented as block ram |
signal mac_ram : mac_ram_t; -- will be implemented as block ram |
signal st_state : st_state_t; |
signal next_write_addr : addr_t; -- where to make the next write |
signal num_entries : addr_t; -- number of entries in the store |
signal next_read_addr : addr_t; -- next addr to read from |
signal entry_found : arp_entry_t; -- entry found in search |
signal mode : mode_t; -- are we writing or reading? |
signal req_entry : arp_entry_t; -- entry latched from req |
|
-- busses |
signal next_st_state : st_state_t; |
signal arp_entry_val : arp_entry_t; |
signal mode_val : mode_t; |
signal write_addr : addr_t; -- actual write address to use |
|
-- control signals |
signal set_st_state : std_logic; |
signal set_next_write_addr : count_mode_t; |
signal set_num_entries : count_mode_t; |
signal set_next_read_addr : count_mode_t; |
signal write_ram : std_logic; |
signal set_entry_found : std_logic; |
signal set_mode : std_logic; |
|
function read_status(status : arp_store_rslt_t; signal mode : mode_t) return arp_store_rslt_t is |
variable ret : arp_store_rslt_t; |
begin |
case status is |
when IDLE => |
ret := status; |
when others => |
if mode = MWRITE then |
ret := BUSY; |
else |
ret := status; |
end if; |
end case; |
return ret; |
end read_status; |
|
begin |
combinatorial : process ( |
-- input signals |
read_req, write_req, clear_store, reset, |
-- state variables |
ip_ram, mac_ram, st_state, next_write_addr, num_entries, |
next_read_addr, entry_found, mode, req_entry, |
-- busses |
next_st_state, arp_entry_val, mode_val, write_addr, read_result_int, |
-- control signals |
set_st_state, set_next_write_addr, set_num_entries, set_next_read_addr, set_entry_found, |
write_ram, set_mode |
) |
begin |
-- set output followers |
read_result_int.status <= IDLE; |
read_result_int.entry <= entry_found; |
entry_count <= to_unsigned(num_entries, 8); |
combinatorial : process ( |
-- input signals |
read_req, write_req, clear_store, reset, |
-- state variables |
ip_ram, mac_ram, st_state, next_write_addr, num_entries, |
next_read_addr, entry_found, mode, req_entry, |
-- busses |
next_st_state, arp_entry_val, mode_val, write_addr, |
-- control signals |
set_st_state, set_next_write_addr, set_num_entries, set_next_read_addr, set_entry_found, |
write_ram, set_mode |
) |
begin |
-- set output followers |
read_result.status <= IDLE; |
read_result.entry <= entry_found; |
entry_count <= to_unsigned(num_entries,8); |
|
-- set bus defaults |
next_st_state <= IDLE; |
mode_val <= MREAD; |
write_addr <= next_write_addr; |
|
-- set signal defaults |
set_st_state <= '0'; |
set_next_write_addr <= HOLD; |
set_num_entries <= HOLD; |
set_next_read_addr <= HOLD; |
write_ram <= '0'; |
set_entry_found <= '0'; |
set_mode <= '0'; |
|
-- STORE FSM |
case st_state is |
when IDLE => |
if write_req.req = '1' then |
-- need to search to see if this IP already there |
set_next_read_addr <= RST; -- start lookup from beginning |
mode_val <= MWRITE; |
set_mode <= '1'; |
next_st_state <= PAUSE; |
set_st_state <= '1'; |
elsif read_req.req = '1' then |
set_next_read_addr <= RST; -- start lookup from beginning |
mode_val <= MREAD; |
set_mode <= '1'; |
next_st_state <= PAUSE; |
set_st_state <= '1'; |
end if; |
|
when PAUSE => |
-- wait until read addr is latched and we get first data out of the ram |
read_result.status <= read_status(BUSY,mode); |
set_next_read_addr <= INCR; |
next_st_state <= SEARCH; |
set_st_state <= '1'; |
|
when SEARCH => |
read_result.status <= read_status(SEARCHING,mode); |
-- check if have a match at this entry |
if req_entry.ip = arp_entry_val.ip and next_read_addr <= num_entries then |
-- found it |
set_entry_found <= '1'; |
next_st_state <= FOUND; |
set_st_state <= '1'; |
elsif next_read_addr > num_entries or next_read_addr >= MAX_ARP_ENTRIES then |
-- reached end of entry table |
read_result.status <= read_status(NOT_FOUND,mode); |
next_st_state <= NOT_FOUND; |
set_st_state <= '1'; |
else |
-- no match at this entry , go to next |
set_next_read_addr <= INCR; |
end if; |
|
when FOUND => |
read_result.status <= read_status(FOUND,mode); |
if mode = MWRITE then |
write_addr <= next_read_addr - 1; |
write_ram <= '1'; |
next_st_state <= IDLE; |
set_st_state <= '1'; |
elsif read_req.req = '0' then -- wait in this state until request de-asserted |
next_st_state <= IDLE; |
set_st_state <= '1'; |
end if; |
|
when NOT_FOUND => |
read_result.status <= read_status(NOT_FOUND,mode); |
if mode = MWRITE then |
-- need to write into the next free slot |
write_addr <= next_write_addr; |
write_ram <= '1'; |
set_next_write_addr <= INCR; |
if num_entries < MAX_ARP_ENTRIES then |
-- if not full, count another entry (if full, it just wraps) |
set_num_entries <= INCR; |
end if; |
next_st_state <= IDLE; |
set_st_state <= '1'; |
elsif read_req.req = '0' then -- wait in this state until request de-asserted |
next_st_state <= IDLE; |
set_st_state <= '1'; |
end if; |
|
end case; |
end process; |
|
-- set bus defaults |
next_st_state <= IDLE; |
mode_val <= MREAD; |
write_addr <= next_write_addr; |
sequential : process (clk) |
begin |
if rising_edge(clk) then |
-- ram processing |
if write_ram = '1' then |
ip_ram(write_addr) <= req_entry.ip; |
mac_ram(write_addr) <= req_entry.mac; |
end if; |
if next_read_addr < MAX_ARP_ENTRIES then |
arp_entry_val.ip <= ip_ram(next_read_addr); |
arp_entry_val.mac <= mac_ram(next_read_addr); |
else |
arp_entry_val.ip <= (others => '0'); |
arp_entry_val.mac <= (others => '0'); |
end if; |
|
if reset = '1' or clear_store = '1' then |
-- reset state variables |
st_state <= IDLE; |
next_write_addr <= 0; |
num_entries <= 0; |
next_read_addr <= 0; |
entry_found.ip <= (others => '0'); |
entry_found.mac <= (others => '0'); |
req_entry.ip <= (others => '0'); |
req_entry.mac <= (others => '0'); |
mode <= MREAD; |
|
else |
-- Next req_state processing |
if set_st_state = '1' then |
st_state <= next_st_state; |
else |
st_state <= st_state; |
end if; |
|
-- mode setting and write request latching |
if set_mode = '1' then |
mode <= mode_val; |
if mode_val = MWRITE then |
req_entry <= write_req.entry; |
else |
req_entry.ip <= read_req.ip; |
req_entry.mac <= (others => '0'); |
end if; |
else |
mode <= mode; |
req_entry <= req_entry; |
end if; |
|
-- latch entry found |
if set_entry_found = '1' then |
entry_found <= arp_entry_val; |
else |
entry_found <= entry_found; |
end if; |
|
-- next_write_addr counts and wraps |
case set_next_write_addr is |
when HOLD => next_write_addr <= next_write_addr; |
when RST => next_write_addr <= 0; |
when INCR => if next_write_addr < MAX_ARP_ENTRIES-1 then next_write_addr <= next_write_addr + 1; else next_write_addr <= 0; end if; |
end case; |
|
-- num_entries counts and holds at max |
case set_num_entries is |
when HOLD => num_entries <= num_entries; |
when RST => num_entries <= 0; |
when INCR => if next_write_addr < MAX_ARP_ENTRIES then num_entries <= num_entries + 1; else num_entries <= num_entries; end if; |
end case; |
|
-- next_read_addr counts and wraps |
case set_next_read_addr is |
when HOLD => next_read_addr <= next_read_addr; |
when RST => next_read_addr <= 0; |
when INCR => if next_read_addr < MAX_ARP_ENTRIES then next_read_addr <= next_read_addr + 1; else next_read_addr <= 0; end if; |
end case; |
|
end if; |
end if; |
end process; |
|
-- set signal defaults |
set_st_state <= '0'; |
set_next_write_addr <= HOLD; |
set_num_entries <= HOLD; |
set_next_read_addr <= HOLD; |
write_ram <= '0'; |
set_entry_found <= '0'; |
set_mode <= '0'; |
|
-- STORE FSM |
case st_state is |
when IDLE => |
if write_req.req = '1' then |
-- need to search to see if this IP already there |
set_next_read_addr <= RST; -- start lookup from beginning |
mode_val <= MWRITE; |
set_mode <= '1'; |
next_st_state <= PAUSE; |
set_st_state <= '1'; |
elsif read_req.req = '1' then |
set_next_read_addr <= RST; -- start lookup from beginning |
mode_val <= MREAD; |
set_mode <= '1'; |
next_st_state <= PAUSE; |
set_st_state <= '1'; |
end if; |
|
when PAUSE => |
-- wait until read addr is latched and we get first data out of the ram |
read_result_int.status <= read_status(BUSY, mode); |
set_next_read_addr <= INCR; |
next_st_state <= SEARCH; |
set_st_state <= '1'; |
|
when SEARCH => |
read_result_int.status <= read_status(SEARCHING, mode); |
-- check if have a match at this entry |
if req_entry.ip = arp_entry_val.ip and next_read_addr <= num_entries then |
-- found it |
set_entry_found <= '1'; |
next_st_state <= FOUND; |
set_st_state <= '1'; |
elsif next_read_addr > num_entries or next_read_addr >= MAX_ARP_ENTRIES then |
-- reached end of entry table |
read_result_int.status <= read_status(NOT_FOUND, mode); |
next_st_state <= NOT_FOUND; |
set_st_state <= '1'; |
else |
-- no match at this entry , go to next |
set_next_read_addr <= INCR; |
end if; |
|
when FOUND => |
read_result_int.status <= read_status(FOUND, mode); |
if mode = MWRITE then |
write_addr <= next_read_addr - 1; |
write_ram <= '1'; |
next_st_state <= IDLE; |
set_st_state <= '1'; |
elsif read_req.req = '0' then -- wait in this state until request de-asserted |
next_st_state <= IDLE; |
set_st_state <= '1'; |
end if; |
|
when NOT_FOUND => |
read_result_int.status <= read_status(NOT_FOUND, mode); |
if mode = MWRITE then |
-- need to write into the next free slot |
write_addr <= next_write_addr; |
write_ram <= '1'; |
set_next_write_addr <= INCR; |
if num_entries < MAX_ARP_ENTRIES then |
-- if not full, count another entry (if full, it just wraps) |
set_num_entries <= INCR; |
end if; |
next_st_state <= IDLE; |
set_st_state <= '1'; |
elsif read_req.req = '0' then -- wait in this state until request de-asserted |
next_st_state <= IDLE; |
set_st_state <= '1'; |
end if; |
|
end case; |
end process; |
|
sequential : process (clk) |
begin |
if rising_edge(clk) then |
-- ram processing |
if write_ram = '1' then |
ip_ram(write_addr) <= req_entry.ip; |
mac_ram(write_addr) <= req_entry.mac; |
end if; |
if next_read_addr < MAX_ARP_ENTRIES then |
arp_entry_val.ip <= ip_ram(next_read_addr); |
arp_entry_val.mac <= mac_ram(next_read_addr); |
else |
arp_entry_val.ip <= (others => '0'); |
arp_entry_val.mac <= (others => '0'); |
end if; |
|
read_result <= read_result_int; |
|
if reset = '1' or clear_store = '1' then |
-- reset state variables |
st_state <= IDLE; |
next_write_addr <= 0; |
num_entries <= 0; |
next_read_addr <= 0; |
entry_found.ip <= (others => '0'); |
entry_found.mac <= (others => '0'); |
req_entry.ip <= (others => '0'); |
req_entry.mac <= (others => '0'); |
mode <= MREAD; |
|
else |
-- Next req_state processing |
if set_st_state = '1' then |
st_state <= next_st_state; |
else |
st_state <= st_state; |
end if; |
|
-- mode setting and write request latching |
if set_mode = '1' then |
mode <= mode_val; |
if mode_val = MWRITE then |
req_entry <= write_req.entry; |
else |
req_entry.ip <= read_req.ip; |
req_entry.mac <= (others => '0'); |
end if; |
else |
mode <= mode; |
req_entry <= req_entry; |
end if; |
|
-- latch entry found |
if set_entry_found = '1' then |
entry_found <= arp_entry_val; |
else |
entry_found <= entry_found; |
end if; |
|
-- next_write_addr counts and wraps |
case set_next_write_addr is |
when HOLD => next_write_addr <= next_write_addr; |
when RST => next_write_addr <= 0; |
when INCR => if next_write_addr < MAX_ARP_ENTRIES-1 then next_write_addr <= next_write_addr + 1; else next_write_addr <= 0; end if; |
end case; |
|
-- num_entries counts and holds at max |
case set_num_entries is |
when HOLD => num_entries <= num_entries; |
when RST => num_entries <= 0; |
when INCR => if next_write_addr < MAX_ARP_ENTRIES then num_entries <= num_entries + 1; else num_entries <= num_entries; end if; |
end case; |
|
-- next_read_addr counts and wraps |
case set_next_read_addr is |
when HOLD => next_read_addr <= next_read_addr; |
when RST => next_read_addr <= 0; |
when INCR => if next_read_addr < MAX_ARP_ENTRIES then next_read_addr <= next_read_addr + 1; else next_read_addr <= 0; end if; |
end case; |
|
end if; |
end if; |
end process; |
|
end Behavioral; |
/arp_REQ.vhd
1,6 → 1,6
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- Engineer: Peter Fall |
-- |
-- Create Date: 12:00:04 05/31/2011 |
-- Design Name: |
9,330 → 9,308
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle requests for ARP resolution |
-- responds from single entry cache or searches external arp store, or asks to send a request |
-- handle requests for ARP resolution |
-- responds from single entry cache or searches external arp store, or asks to send a request |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created from arp.vhd 0.2 |
-- Revision 0.01 - File Created from arp.vhd 0.2 |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.arp_types.all; |
|
entity arp_req is |
generic ( |
no_default_gateway : boolean := true; -- set to false if communicating with devices accessed |
-- through a "default gateway or router" |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error |
); |
port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC |
arp_req_rslt : out arp_req_rslt_type; -- the result |
-- external arp store signals |
arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store |
arp_store_result : in arp_store_result_t; -- the result |
-- network request signals |
arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network |
arp_nwk_result : in arp_nwk_result_t; -- the result |
-- system signals |
clear_cache : in std_logic; -- clear the internal cache |
nwk_gateway : in std_logic_vector(31 downto 0); -- IP address of default gateway |
nwk_mask : in std_logic_vector(31 downto 0); -- Net mask |
clk : in std_logic; |
reset : in std_logic |
); |
entity arp_req is |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error |
); |
Port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC |
arp_req_rslt : out arp_req_rslt_type; -- the result |
-- external arp store signals |
arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store |
arp_store_result : in arp_store_result_t; -- the result |
-- network request signals |
arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network |
arp_nwk_result : in arp_nwk_result_t; -- the result |
-- system signals |
clear_cache : in std_logic; -- clear the internal cache |
clk : in std_logic; |
reset : in STD_LOGIC |
); |
end arp_req; |
|
architecture Behavioral of arp_req is |
|
type req_state_t is (IDLE, LOOKUP, WAIT_REPLY, PAUSE1, PAUSE2, PAUSE3); |
type set_cntr_t is (HOLD, CLR, INCR); |
type set_clr_type is (SET, CLR, HOLD); |
type req_state_t is (IDLE,LOOKUP,WAIT_REPLY,PAUSE1,PAUSE2,PAUSE3); |
type set_cntr_t is (HOLD,CLR,INCR); |
type set_clr_type is (SET, CLR, HOLD); |
|
-- state variables |
signal req_state : req_state_t; |
signal req_ip_addr : std_logic_vector (31 downto 0); -- IP address to lookup |
signal arp_entry_cache : arp_entry_t; -- single entry cache for fast response |
signal cache_valid : std_logic; -- single entry cache is valid |
signal nwk_rx_cntr : unsigned(7 downto 0); -- counts nwk rx pkts that dont satisfy |
signal freq_scaler : unsigned (31 downto 0); -- scales data_in_clk downto 1Hz |
signal timer : unsigned (7 downto 0); -- counts seconds timeout |
signal timeout_reg : std_logic; |
|
-- busses |
signal next_req_state : req_state_t; |
signal arp_entry_val : arp_entry_t; |
|
-- requester control signals |
signal set_req_state : std_logic; |
signal set_req_ip : std_logic; |
signal store_arp_cache : std_logic; |
signal set_nwk_rx_cntr : set_cntr_t; |
signal set_timer : set_cntr_t; -- timer reset, count, hold control |
signal timer_enable : std_logic; -- enable the timer counting |
signal set_timeout : set_clr_type; -- control the timeout register |
signal clear_cache_valid : std_logic; |
|
-- state variables |
signal req_state : req_state_t; |
signal req_ip_addr : std_logic_vector (31 downto 0); -- IP address to lookup |
signal arp_entry_cache : arp_entry_t; -- single entry cache for fast response |
signal cache_valid : std_logic; -- single entry cache is valid |
signal nwk_rx_cntr : unsigned(7 downto 0); -- counts nwk rx pkts that dont satisfy |
signal freq_scaler : unsigned (31 downto 0); -- scales data_in_clk downto 1Hz |
signal timer : unsigned (7 downto 0); -- counts seconds timeout |
signal timeout_reg : std_logic; |
|
-- busses |
signal next_req_state : req_state_t; |
signal arp_entry_val : arp_entry_t; |
|
-- requester control signals |
signal set_req_state : std_logic; |
signal set_req_ip : std_logic; |
signal store_arp_cache : std_logic; |
signal set_nwk_rx_cntr : set_cntr_t; |
signal set_timer : set_cntr_t; -- timer reset, count, hold control |
signal timer_enable : std_logic; -- enable the timer counting |
signal set_timeout : set_clr_type; -- control the timeout register |
signal clear_cache_valid : std_logic; |
|
signal l_arp_req_req_ip : std_logic_vector(31 downto 0); -- local network IP address for resolution |
|
begin |
req_combinatorial : process ( |
-- input signals |
arp_req_req, arp_store_result, arp_nwk_result, clear_cache, |
-- state variables |
req_state, req_ip_addr, arp_entry_cache, cache_valid, nwk_rx_cntr, |
freq_scaler, timer, timeout_reg, |
-- busses |
next_req_state, arp_entry_val, |
-- control signals |
set_req_state, set_req_ip, store_arp_cache, set_nwk_rx_cntr, clear_cache_valid, |
set_timer, timer_enable, set_timeout |
) |
begin |
-- set output followers |
arp_req_rslt.got_mac <= '0'; -- set initial value of request result outputs |
arp_req_rslt.got_err <= '0'; |
arp_req_rslt.mac <= (others => '0'); |
arp_store_req.req <= '0'; |
arp_store_req.ip <= (others => '0'); |
arp_nwk_req.req <= '0'; |
arp_nwk_req.ip <= (others => '0'); |
|
-- zero time response to lookup request if already in cache |
if arp_req_req.lookup_req = '1' and arp_req_req.ip = arp_entry_cache.ip and cache_valid = '1' then |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
elsif arp_req_req.lookup_req = '1' then |
-- hold off got_mac while req is there as arp_entry will not be correct yet |
arp_req_rslt.got_mac <= '0'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
else |
arp_req_rslt.got_mac <= cache_valid; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
end if; |
|
if arp_req_req.lookup_req = '1' then |
-- ensure any existing error report is killed at the start of a request |
arp_req_rslt.got_err <= '0'; |
else |
arp_req_rslt.got_err <= timeout_reg; |
end if; |
|
-- set signal defaults |
next_req_state <= IDLE; |
set_req_state <= '0'; |
set_req_ip <= '0'; |
store_arp_cache <= '0'; |
arp_entry_val.ip <= (others => '0'); |
arp_entry_val.mac <= (others => '0'); |
set_nwk_rx_cntr <= HOLD; |
set_timer <= INCR; -- default is timer running, unless we hold or reset it |
set_timeout <= HOLD; |
timer_enable <= '0'; |
clear_cache_valid <= clear_cache; |
|
-- combinatorial logic |
if freq_scaler = x"00000000" then |
timer_enable <= '1'; |
end if; |
|
-- REQ FSM |
case req_state is |
when IDLE => |
set_timer <= CLR; |
if arp_req_req.lookup_req = '1' then |
-- check if we already have the info in cache |
if arp_req_req.ip = arp_entry_cache.ip and cache_valid = '1' then |
-- already have this IP - feed output back |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
else |
clear_cache_valid <= '1'; -- remove cache entry |
set_timeout <= CLR; |
next_req_state <= LOOKUP; |
set_req_state <= '1'; |
set_req_ip <= '1'; |
end if; |
end if; |
|
when LOOKUP => |
-- put request on the store |
arp_store_req.ip <= req_ip_addr; |
arp_store_req.req <= '1'; |
case arp_store_result.status is |
when FOUND => |
-- update the cache |
arp_entry_val <= arp_store_result.entry; |
store_arp_cache <= '1'; |
-- and feed output back |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_store_result.entry.mac; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
|
when NOT_FOUND => |
-- need to request from the network |
set_timer <= CLR; |
set_nwk_rx_cntr <= CLR; |
arp_nwk_req.req <= '1'; |
arp_nwk_req.ip <= req_ip_addr; |
next_req_state <= WAIT_REPLY; |
set_req_state <= '1'; |
|
when OTHERS => |
-- just keep waiting - no timeout (assumes lookup with either succeed or fail) |
end case; |
|
when WAIT_REPLY => |
case arp_nwk_result.status is |
when RECEIVED => |
-- store into cache |
arp_entry_val <= arp_nwk_result.entry; |
store_arp_cache <= '1'; |
-- and feed output back |
if arp_nwk_result.entry.ip = req_ip_addr then |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_nwk_result.entry.mac; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
else |
if nwk_rx_cntr > ARP_MAX_PKT_TMO then |
set_timeout <= SET; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
else |
set_nwk_rx_cntr <= INCR; |
end if; |
end if; |
|
when ERROR => |
set_timeout <= SET; |
|
when OTHERS => |
if timer >= ARP_TIMEOUT then |
set_timeout <= SET; |
next_req_state <= PAUSE1; |
set_req_state <= '1'; |
end if; |
end case; |
|
when PAUSE1 => |
next_req_state <= PAUSE2; |
set_req_state <= '1'; |
|
when PAUSE2 => |
next_req_state <= PAUSE3; |
set_req_state <= '1'; |
|
when PAUSE3 => |
next_req_state <= IDLE; |
set_req_state <= '1'; |
|
end case; |
end process; |
|
default_GW: if (not no_default_gateway) generate |
default_gw_comb_p: process (arp_req_req.ip, nwk_gateway, nwk_mask) is |
begin -- process default_gw_comb_p |
-- translate IP addresses to local IP address if necessary |
if ((nwk_mask and arp_req_req.ip) = (nwk_mask and nwk_gateway)) then |
-- on local network |
l_arp_req_req_ip <= arp_req_req.ip; |
else |
-- on remote network |
l_arp_req_req_ip <= nwk_gateway; |
end if; |
end process default_gw_comb_p; |
end generate default_GW; |
|
no_default_GW: if (no_default_gateway) generate |
no_default_gw_comb_p: process (arp_req_req.ip) is |
begin -- process no_default_gw_comb_p |
l_arp_req_req_ip <= arp_req_req.ip; |
end process no_default_gw_comb_p; |
end generate no_default_GW; |
req_sequential : process (clk) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
req_state <= IDLE; |
req_ip_addr <= (others => '0'); |
arp_entry_cache.ip <= (others => '0'); |
arp_entry_cache.mac <= (others => '0'); |
cache_valid <= '0'; |
nwk_rx_cntr <= (others => '0'); |
freq_scaler <= to_unsigned(CLOCK_FREQ,32); |
timer <= (others => '0'); |
timeout_reg <= '0'; |
else |
-- Next req_state processing |
if set_req_state = '1' then |
req_state <= next_req_state; |
else |
req_state <= req_state; |
end if; |
|
req_combinatorial : process ( |
arp_entry_cache.ip, arp_entry_cache.mac, arp_nwk_result.entry, arp_nwk_result.entry.ip, |
arp_nwk_result.entry.mac, arp_nwk_result.status, arp_req_req.lookup_req, |
arp_store_result.entry, arp_store_result.entry.mac, arp_store_result.status, cache_valid, |
clear_cache, freq_scaler, l_arp_req_req_ip, nwk_rx_cntr, req_ip_addr, req_state, |
timeout_reg, timer) |
begin |
-- set output followers |
arp_req_rslt.got_mac <= '0'; -- set initial value of request result outputs |
arp_req_rslt.got_err <= '0'; |
arp_req_rslt.mac <= (others => '0'); |
arp_store_req.req <= '0'; |
arp_store_req.ip <= (others => '0'); |
arp_nwk_req.req <= '0'; |
arp_nwk_req.ip <= (others => '0'); |
-- Latch the requested IP address |
if set_req_ip = '1' then |
req_ip_addr <= arp_req_req.ip; |
else |
req_ip_addr <= req_ip_addr; |
end if; |
|
-- network received counter |
case set_nwk_rx_cntr is |
when CLR => nwk_rx_cntr <= (others => '0'); |
when INCR => nwk_rx_cntr <= nwk_rx_cntr + 1; |
when HOLD => nwk_rx_cntr <= nwk_rx_cntr; |
end case; |
|
-- set the arp_entry_cache |
if clear_cache_valid = '1' then |
arp_entry_cache <= arp_entry_cache; |
cache_valid <= '0'; |
elsif store_arp_cache = '1' then |
arp_entry_cache <= arp_entry_val; |
cache_valid <= '1'; |
else |
arp_entry_cache <= arp_entry_cache; |
cache_valid <= cache_valid; |
end if; |
|
-- freq scaling and 1-sec timer |
if freq_scaler = x"00000000" then |
freq_scaler <= to_unsigned(CLOCK_FREQ,32); |
else |
freq_scaler <= freq_scaler - 1; |
end if; |
|
-- timer processing |
case set_timer is |
when CLR => |
timer <= x"00"; |
when INCR => |
if timer_enable = '1' then |
timer <= timer + 1; |
else |
timer <= timer; |
end if; |
when HOLD => |
timer <= timer; |
end case; |
|
-- timeout latching |
case set_timeout is |
when CLR => timeout_reg <= '0'; |
when SET => timeout_reg <= '1'; |
when HOLD => timeout_reg <= timeout_reg; |
end case; |
|
-- zero time response to lookup request if already in cache |
if arp_req_req.lookup_req = '1' and l_arp_req_req_ip = arp_entry_cache.ip and cache_valid = '1' then |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
elsif arp_req_req.lookup_req = '1' then |
-- hold off got_mac while req is there as arp_entry will not be correct yet |
arp_req_rslt.got_mac <= '0'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
else |
arp_req_rslt.got_mac <= cache_valid; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
end if; |
end if; |
end if; |
end process; |
|
if arp_req_req.lookup_req = '1' then |
-- ensure any existing error report is killed at the start of a request |
arp_req_rslt.got_err <= '0'; |
else |
arp_req_rslt.got_err <= timeout_reg; |
end if; |
|
-- set signal defaults |
next_req_state <= IDLE; |
set_req_state <= '0'; |
set_req_ip <= '0'; |
store_arp_cache <= '0'; |
arp_entry_val.ip <= (others => '0'); |
arp_entry_val.mac <= (others => '0'); |
set_nwk_rx_cntr <= HOLD; |
set_timer <= INCR; -- default is timer running, unless we hold or reset it |
set_timeout <= HOLD; |
timer_enable <= '0'; |
clear_cache_valid <= clear_cache; |
|
-- combinatorial logic |
if freq_scaler = x"00000000" then |
timer_enable <= '1'; |
end if; |
|
-- REQ FSM |
case req_state is |
when IDLE => |
set_timer <= CLR; |
if arp_req_req.lookup_req = '1' then |
-- check if we already have the info in cache |
if l_arp_req_req_ip = arp_entry_cache.ip and cache_valid = '1' then |
-- already have this IP - feed output back |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_entry_cache.mac; |
else |
clear_cache_valid <= '1'; -- remove cache entry |
set_timeout <= CLR; |
next_req_state <= LOOKUP; |
set_req_state <= '1'; |
set_req_ip <= '1'; |
end if; |
end if; |
|
when LOOKUP => |
-- put request on the store |
arp_store_req.ip <= req_ip_addr; |
arp_store_req.req <= '1'; |
case arp_store_result.status is |
when FOUND => |
-- update the cache |
arp_entry_val <= arp_store_result.entry; |
store_arp_cache <= '1'; |
-- and feed output back |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_store_result.entry.mac; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
|
when NOT_FOUND => |
-- need to request from the network |
set_timer <= CLR; |
set_nwk_rx_cntr <= CLR; |
arp_nwk_req.req <= '1'; |
arp_nwk_req.ip <= req_ip_addr; |
next_req_state <= WAIT_REPLY; |
set_req_state <= '1'; |
|
when others => |
-- just keep waiting - no timeout (assumes lookup with either succeed or fail) |
end case; |
|
when WAIT_REPLY => |
case arp_nwk_result.status is |
when RECEIVED => |
if arp_nwk_result.entry.ip = req_ip_addr then |
-- store into cache |
arp_entry_val <= arp_nwk_result.entry; |
store_arp_cache <= '1'; |
-- and feed output back |
arp_req_rslt.got_mac <= '1'; |
arp_req_rslt.mac <= arp_nwk_result.entry.mac; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
else |
if nwk_rx_cntr > ARP_MAX_PKT_TMO then |
set_timeout <= SET; |
next_req_state <= IDLE; |
set_req_state <= '1'; |
else |
set_nwk_rx_cntr <= INCR; |
end if; |
end if; |
|
when error => |
set_timeout <= SET; |
|
when others => |
if timer >= ARP_TIMEOUT then |
set_timeout <= SET; |
next_req_state <= PAUSE1; |
set_req_state <= '1'; |
end if; |
end case; |
|
when PAUSE1 => |
next_req_state <= PAUSE2; |
set_req_state <= '1'; |
|
when PAUSE2 => |
next_req_state <= PAUSE3; |
set_req_state <= '1'; |
|
when PAUSE3 => |
next_req_state <= IDLE; |
set_req_state <= '1'; |
|
end case; |
end process; |
|
req_sequential : process (clk) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
req_state <= IDLE; |
req_ip_addr <= (others => '0'); |
arp_entry_cache.ip <= (others => '0'); |
arp_entry_cache.mac <= (others => '0'); |
cache_valid <= '0'; |
nwk_rx_cntr <= (others => '0'); |
freq_scaler <= to_unsigned(CLOCK_FREQ, 32); |
timer <= (others => '0'); |
timeout_reg <= '0'; |
else |
-- Next req_state processing |
if set_req_state = '1' then |
req_state <= next_req_state; |
else |
req_state <= req_state; |
end if; |
|
-- Latch the requested IP address |
if set_req_ip = '1' then |
req_ip_addr <= l_arp_req_req_ip; |
else |
req_ip_addr <= req_ip_addr; |
end if; |
|
-- network received counter |
case set_nwk_rx_cntr is |
when CLR => nwk_rx_cntr <= (others => '0'); |
when INCR => nwk_rx_cntr <= nwk_rx_cntr + 1; |
when HOLD => nwk_rx_cntr <= nwk_rx_cntr; |
end case; |
|
-- set the arp_entry_cache |
if clear_cache_valid = '1' then |
arp_entry_cache <= arp_entry_cache; |
cache_valid <= '0'; |
elsif store_arp_cache = '1' then |
arp_entry_cache <= arp_entry_val; |
cache_valid <= '1'; |
else |
arp_entry_cache <= arp_entry_cache; |
cache_valid <= cache_valid; |
end if; |
|
-- freq scaling and 1-sec timer |
if freq_scaler = x"00000000" then |
freq_scaler <= to_unsigned(CLOCK_FREQ, 32); |
else |
freq_scaler <= freq_scaler - 1; |
end if; |
|
-- timer processing |
case set_timer is |
when CLR => |
timer <= x"00"; |
when INCR => |
if timer_enable = '1' then |
timer <= timer + 1; |
else |
timer <= timer; |
end if; |
when HOLD => |
timer <= timer; |
end case; |
|
-- timeout latching |
case set_timeout is |
when CLR => timeout_reg <= '0'; |
when SET => timeout_reg <= '1'; |
when HOLD => timeout_reg <= timeout_reg; |
end case; |
|
end if; |
end if; |
end process; |
|
end Behavioral; |
/arpv2.vhd
1,6 → 1,6
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- Engineer: Peter Fall |
-- |
-- Create Date: 12:00:04 05/31/2011 |
-- Design Name: |
9,313 → 9,303
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple IP lookup in 1-deep cache and arp store |
-- request cache fill through ARP protocol if required |
-- Handle ARP protocol |
-- Respond to ARP requests and replies |
-- Ignore pkts that are not ARP |
-- Ignore pkts that are not addressed to us |
-- handle simple IP lookup in 1-deep cache and arp store |
-- request cache fill through ARP protocol if required |
-- Handle ARP protocol |
-- Respond to ARP requests and replies |
-- Ignore pkts that are not ARP |
-- Ignore pkts that are not addressed to us |
-- |
-- structural decomposition includes |
-- arp TX block - encoding of ARP protocol |
-- arp RX block - decoding of ARP protocol |
-- arp REQ block - sequencing requests for resolution |
-- arp STORE block - storing address resolution entries (indexed by IP addr) |
-- arp sync block - sync between master RX clock and TX clock domains |
-- |
-- structural decomposition includes |
-- arp TX block - encoding of ARP protocol |
-- arp RX block - decoding of ARP protocol |
-- arp REQ block - sequencing requests for resolution |
-- arp STORE block - storing address resolution entries (indexed by IP addr) |
-- arp sync block - sync between master RX clock and TX clock domains |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.01 - File Created |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.arp_types.all; |
|
entity arpv2 is |
generic ( |
no_default_gateway : boolean := true; -- set to false if communicating with devices accessed |
-- though a "default gateway or router" |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the arp store |
); |
port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; |
arp_req_rslt : out arp_req_rslt_type; |
-- MAC layer RX signals |
data_in_clk : in std_logic; |
reset : in std_logic; |
data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in std_logic; -- indicates data_in valid on clock |
data_in_last : in std_logic; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_clk : in std_logic; |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in std_logic_vector (47 downto 0); |
our_ip_address : in std_logic_vector (31 downto 0); |
nwk_gateway : in std_logic_vector (31 downto 0) := (others => '0'); -- IP address of default gateway |
nwk_mask : in std_logic_vector (31 downto 0) := (others => '0'); -- Net mask |
control : in arp_control_type; |
req_count : out std_logic_vector(7 downto 0) -- count of arp pkts received |
); |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the arp store |
); |
Port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; |
arp_req_rslt : out arp_req_rslt_type; |
-- MAC layer RX signals |
data_in_clk : in STD_LOGIC; |
reset : in STD_LOGIC; |
data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
data_in_last : in STD_LOGIC; -- indicates last data in frame |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_clk : in std_logic; |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in STD_LOGIC_VECTOR (47 downto 0); |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
control : in arp_control_type; |
req_count : out STD_LOGIC_VECTOR(7 downto 0) -- count of arp pkts received |
); |
end arpv2; |
|
architecture structural of arpv2 is |
|
COMPONENT arp_req |
generic ( |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error |
); |
Port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC |
arp_req_rslt : out arp_req_rslt_type; -- the result |
-- external arp store signals |
arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store |
arp_store_result : in arp_store_result_t; -- the result |
-- network request signals |
arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network |
arp_nwk_result : in arp_nwk_result_t; -- the result |
-- system signals |
clear_cache : in std_logic; -- clear the internal cache |
clk : in std_logic; |
reset : in STD_LOGIC |
); |
END COMPONENT; |
|
COMPONENT arp_tx |
PORT( |
-- control signals |
send_I_have : in std_logic; -- pulse will be latched |
arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched) |
send_who_has : in std_logic; -- pulse will be latched |
ip_entry : in STD_LOGIC_VECTOR (31 downto 0); -- ip target for who_has req (will be latched) |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in STD_LOGIC_VECTOR (47 downto 0); |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
tx_clk : in std_logic; |
reset : in std_logic |
); |
END COMPONENT; |
|
COMPONENT arp_rx |
PORT( |
-- MAC layer RX signals |
data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
data_in_last : in STD_LOGIC; -- indicates last data in frame |
-- ARP output signals |
recv_who_has : out std_logic; -- pulse will be latched |
arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to) |
recv_I_have : out std_logic; -- pulse will be latched |
arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg |
-- control and status signals |
req_count : out STD_LOGIC_VECTOR(7 downto 0); -- count of arp pkts received |
-- system signals |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
rx_clk : in std_logic; |
reset : in STD_LOGIC |
); |
END COMPONENT; |
|
|
COMPONENT arp_store_br |
generic ( |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the store |
); |
Port ( |
-- read signals |
read_req : in arp_store_rdrequest_t; -- requesting a lookup or store |
read_result : out arp_store_result_t; -- the result |
-- write signals |
write_req : in arp_store_wrrequest_t; -- requesting a lookup or store |
-- control and status signals |
clear_store : in std_logic; -- erase all entries |
entry_count : out unsigned(7 downto 0); -- how many entries currently in store |
-- system signals |
clk : in std_logic; |
reset : in STD_LOGIC |
); |
END COMPONENT; |
|
COMPONENT arp_sync |
Port ( |
-- REQ to TX |
arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC |
send_who_has : out std_logic; |
ip_entry : out STD_LOGIC_VECTOR (31 downto 0); |
-- RX to TX |
recv_who_has : in std_logic; -- this is for us, we will respond |
arp_entry_for_who_has : in arp_entry_t; |
send_I_have : out std_logic; |
arp_entry : out arp_entry_t; |
-- RX to REQ |
I_have_received : in std_logic; |
nwk_result_status : out arp_nwk_rslt_t; |
-- System Signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic |
); |
END COMPONENT; |
|
|
-- interconnect REQ -> ARP_TX |
signal arp_nwk_req_int : arp_nwk_request_t; -- tx req from REQ |
|
signal send_I_have_int : std_logic; |
signal arp_entry_int : arp_entry_t; |
signal send_who_has_int : std_logic; |
signal ip_entry_int : STD_LOGIC_VECTOR (31 downto 0); |
|
-- interconnect REQ <-> ARP_STORE |
signal arp_store_req_int : arp_store_rdrequest_t; -- lookup request |
signal arp_store_result_int: arp_store_result_t; -- lookup result |
|
-- interconnect ARP_RX -> REQ |
signal nwk_result_status_int : arp_nwk_rslt_t; -- response from a TX req |
|
-- interconnect ARP_RX -> ARP_STORE |
signal recv_I_have_int : std_logic; -- path to store new arp entry |
signal arp_entry_for_I_have_int: arp_entry_t; |
|
-- interconnect ARP_RX -> ARP_TX |
signal recv_who_has_int : std_logic; -- path for reply when we can anser |
signal arp_entry_for_who_has_int : arp_entry_t; -- target for who_has msg (ie, who to reply to) |
|
|
component arp_req |
generic ( |
no_default_gateway : boolean := true; |
CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr |
ARP_TIMEOUT : integer := 60; -- ARP response timeout (s) |
ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error |
); |
port ( |
-- lookup request signals |
arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC |
arp_req_rslt : out arp_req_rslt_type; -- the result |
-- external arp store signals |
arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store |
arp_store_result : in arp_store_result_t; -- the result |
-- network request signals |
arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network |
arp_nwk_result : in arp_nwk_result_t; -- the result |
-- system signals |
clear_cache : in std_logic; -- clear the internal cache |
nwk_gateway : in std_logic_vector(31 downto 0); -- IP address of default gateway |
nwk_mask : in std_logic_vector(31 downto 0); -- Net mask |
clk : in std_logic; |
reset : in std_logic |
); |
end component; |
begin |
|
|
req : arp_req |
generic map ( |
CLOCK_FREQ => CLOCK_FREQ, |
ARP_TIMEOUT => ARP_TIMEOUT, |
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO |
) |
PORT MAP ( |
-- lookup request signals |
arp_req_req => arp_req_req, |
arp_req_rslt => arp_req_rslt, |
-- external arp store signals |
arp_store_req => arp_store_req_int, |
arp_store_result => arp_store_result_int, |
-- network request signals |
arp_nwk_req => arp_nwk_req_int, |
arp_nwk_result.status => nwk_result_status_int, |
arp_nwk_result.entry => arp_entry_for_I_have_int, |
-- system signals |
clear_cache => control.clear_cache, |
clk => data_in_clk, |
reset => reset |
); |
|
sync : arp_sync PORT MAP ( |
-- REQ to TX |
arp_nwk_req => arp_nwk_req_int, |
send_who_has => send_who_has_int, |
ip_entry => ip_entry_int, |
-- RX to TX |
recv_who_has => recv_who_has_int, |
arp_entry_for_who_has => arp_entry_for_who_has_int, |
send_I_have => send_I_have_int, |
arp_entry => arp_entry_int, |
-- RX to REQ |
I_have_received => recv_I_have_int, |
nwk_result_status => nwk_result_status_int, |
-- system |
rx_clk => data_in_clk, |
tx_clk => data_out_clk, |
reset => reset |
); |
|
tx : arp_tx PORT MAP ( |
-- control signals |
send_I_have => send_I_have_int, |
arp_entry => arp_entry_int, |
send_who_has => send_who_has_int, |
ip_entry => ip_entry_int, |
-- MAC layer TX signals |
mac_tx_req => mac_tx_req, |
mac_tx_granted => mac_tx_granted, |
data_out_ready => data_out_ready, |
data_out_valid => data_out_valid, |
data_out_first => data_out_first, |
data_out_last => data_out_last, |
data_out => data_out, |
-- system signals |
our_ip_address => our_ip_address, |
our_mac_address => our_mac_address, |
tx_clk => data_out_clk, |
reset => reset |
); |
|
rx : arp_rx PORT MAP ( |
-- MAC layer RX signals |
data_in => data_in, |
data_in_valid => data_in_valid, |
data_in_last => data_in_last, |
-- ARP output signals |
recv_who_has => recv_who_has_int, |
arp_entry_for_who_has=> arp_entry_for_who_has_int, |
recv_I_have => recv_I_have_int, |
arp_entry_for_I_have=> arp_entry_for_I_have_int, |
-- control and status signals |
req_count => req_count, |
-- system signals |
our_ip_address => our_ip_address, |
rx_clk => data_in_clk, |
reset => reset |
); |
|
store : arp_store_br |
generic map ( |
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES |
) |
PORT MAP ( |
-- read signals |
read_req => arp_store_req_int, |
read_result => arp_store_result_int, |
-- write signals |
write_req.req => recv_I_have_int, |
write_req.entry => arp_entry_for_I_have_int, |
-- control and status signals |
clear_store => control.clear_cache, |
entry_count => open, |
-- system signals |
clk => data_in_clk, |
reset => reset |
); |
|
|
component arp_tx |
port( |
-- control signals |
send_I_have : in std_logic; -- pulse will be latched |
arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched) |
send_who_has : in std_logic; -- pulse will be latched |
ip_entry : in std_logic_vector (31 downto 0); -- ip target for who_has req (will be latched) |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in std_logic_vector (47 downto 0); |
our_ip_address : in std_logic_vector (31 downto 0); |
tx_clk : in std_logic; |
reset : in std_logic |
); |
end component; |
|
component arp_rx |
port( |
-- MAC layer RX signals |
data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in std_logic; -- indicates data_in valid on clock |
data_in_last : in std_logic; -- indicates last data in frame |
-- ARP output signals |
recv_who_has : out std_logic; -- pulse will be latched |
arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to) |
recv_I_have : out std_logic; -- pulse will be latched |
arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg |
-- control and status signals |
req_count : out std_logic_vector(7 downto 0); -- count of arp pkts received |
-- system signals |
our_ip_address : in std_logic_vector (31 downto 0); |
rx_clk : in std_logic; |
reset : in std_logic |
); |
end component; |
|
|
component arp_store_br |
generic ( |
MAX_ARP_ENTRIES : integer := 255 -- max entries in the store |
); |
port ( |
-- read signals |
read_req : in arp_store_rdrequest_t; -- requesting a lookup or store |
read_result : out arp_store_result_t; -- the result |
-- write signals |
write_req : in arp_store_wrrequest_t; -- requesting a lookup or store |
-- control and status signals |
clear_store : in std_logic; -- erase all entries |
entry_count : out unsigned(7 downto 0); -- how many entries currently in store |
-- system signals |
clk : in std_logic; |
reset : in std_logic |
); |
end component; |
|
component arp_sync |
port ( |
-- REQ to TX |
arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC |
send_who_has : out std_logic; |
ip_entry : out std_logic_vector (31 downto 0); |
-- RX to TX |
recv_who_has : in std_logic; -- this is for us, we will respond |
arp_entry_for_who_has : in arp_entry_t; |
send_I_have : out std_logic; |
arp_entry : out arp_entry_t; |
-- RX to REQ |
I_have_received : in std_logic; |
nwk_result_status : out arp_nwk_rslt_t; |
-- System Signals |
rx_clk : in std_logic; |
tx_clk : in std_logic; |
reset : in std_logic |
); |
end component; |
|
|
-- interconnect REQ -> ARP_TX |
signal arp_nwk_req_int : arp_nwk_request_t; -- tx req from REQ |
|
signal send_I_have_int : std_logic; |
signal arp_entry_int : arp_entry_t; |
signal send_who_has_int : std_logic; |
signal ip_entry_int : std_logic_vector (31 downto 0); |
|
-- interconnect REQ <-> ARP_STORE |
signal arp_store_req_int : arp_store_rdrequest_t; -- lookup request |
signal arp_store_result_int : arp_store_result_t; -- lookup result |
|
-- interconnect ARP_RX -> REQ |
signal nwk_result_status_int : arp_nwk_rslt_t; -- response from a TX req |
|
-- interconnect ARP_RX -> ARP_STORE |
signal recv_I_have_int : std_logic; -- path to store new arp entry |
signal arp_entry_for_I_have_int : arp_entry_t; |
|
-- interconnect ARP_RX -> ARP_TX |
signal recv_who_has_int : std_logic; -- path for reply when we can anser |
signal arp_entry_for_who_has_int : arp_entry_t; -- target for who_has msg (ie, who to reply to) |
|
|
begin |
|
|
req : arp_req |
generic map ( |
no_default_gateway => no_default_gateway, |
CLOCK_FREQ => CLOCK_FREQ, |
ARP_TIMEOUT => ARP_TIMEOUT, |
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO |
) |
port map ( |
-- lookup request signals |
arp_req_req => arp_req_req, |
arp_req_rslt => arp_req_rslt, |
-- external arp store signals |
arp_store_req => arp_store_req_int, |
arp_store_result => arp_store_result_int, |
-- network request signals |
arp_nwk_req => arp_nwk_req_int, |
arp_nwk_result.status => nwk_result_status_int, |
arp_nwk_result.entry => arp_entry_for_I_have_int, |
-- system signals |
clear_cache => control.clear_cache, |
nwk_gateway => nwk_gateway, |
nwk_mask => nwk_mask, |
clk => data_in_clk, |
reset => reset |
); |
|
sync : arp_sync port map ( |
-- REQ to TX |
arp_nwk_req => arp_nwk_req_int, |
send_who_has => send_who_has_int, |
ip_entry => ip_entry_int, |
-- RX to TX |
recv_who_has => recv_who_has_int, |
arp_entry_for_who_has => arp_entry_for_who_has_int, |
send_I_have => send_I_have_int, |
arp_entry => arp_entry_int, |
-- RX to REQ |
I_have_received => recv_I_have_int, |
nwk_result_status => nwk_result_status_int, |
-- system |
rx_clk => data_in_clk, |
tx_clk => data_out_clk, |
reset => reset |
); |
|
tx : arp_tx port map ( |
-- control signals |
send_I_have => send_I_have_int, |
arp_entry => arp_entry_int, |
send_who_has => send_who_has_int, |
ip_entry => ip_entry_int, |
-- MAC layer TX signals |
mac_tx_req => mac_tx_req, |
mac_tx_granted => mac_tx_granted, |
data_out_ready => data_out_ready, |
data_out_valid => data_out_valid, |
data_out_first => data_out_first, |
data_out_last => data_out_last, |
data_out => data_out, |
-- system signals |
our_ip_address => our_ip_address, |
our_mac_address => our_mac_address, |
tx_clk => data_out_clk, |
reset => reset |
); |
|
rx : arp_rx port map ( |
-- MAC layer RX signals |
data_in => data_in, |
data_in_valid => data_in_valid, |
data_in_last => data_in_last, |
-- ARP output signals |
recv_who_has => recv_who_has_int, |
arp_entry_for_who_has => arp_entry_for_who_has_int, |
recv_I_have => recv_I_have_int, |
arp_entry_for_I_have => arp_entry_for_I_have_int, |
-- control and status signals |
req_count => req_count, |
-- system signals |
our_ip_address => our_ip_address, |
rx_clk => data_in_clk, |
reset => reset |
); |
|
store : arp_store_br |
generic map ( |
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES |
) |
port map ( |
-- read signals |
read_req => arp_store_req_int, |
read_result => arp_store_result_int, |
-- write signals |
write_req.req => recv_I_have_int, |
write_req.entry => arp_entry_for_I_have_int, |
-- control and status signals |
clear_store => control.clear_cache, |
entry_count => open, |
-- system signals |
clk => data_in_clk, |
reset => reset |
); |
|
|
end structural; |
|
/arp_RX.vhd
1,6 → 1,6
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- Engineer: Peter Fall |
-- |
-- Create Date: 12:00:04 05/31/2011 |
-- Design Name: |
9,365 → 9,364
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle receipt of arp pkt |
-- ignores other types of pkt |
-- handle receipt of arp pkt |
-- ignores other types of pkt |
-- |
-- When it receives an ARP pkt that is either addressed to our IP or is a global request, |
-- it outputs for a single clock cycle either recv_who_has or recv_I_have along |
-- with associated mac or arp entry data. |
-- |
-- Note that if recv who_has and we have it, then we also assert I_have so that we can cache the rev lookup |
-- on the expectation that we will want to reply to this host. |
-- |
-- When it receives an ARP pkt that is either addressed to our IP or is a global request, |
-- it outputs for a single clock cycle either recv_who_has or recv_I_have along |
-- with associated mac or arp entry data. |
-- |
-- Note that if recv who_has and we have it, then we also assert I_have so that we can cache the rev lookup |
-- on the expectation that we will want to reply to this host. |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created - refactored from arp v0.02 module |
-- Revision 0.01 - File Created - refactored from arp v0.02 module |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.arp_types.all; |
|
entity arp_rx is |
port ( |
-- MAC layer RX signals |
data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in std_logic; -- indicates data_in valid on clock |
data_in_last : in std_logic; -- indicates last data in frame |
-- ARP output signals |
recv_who_has : out std_logic; -- pulse will be latched |
arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to) |
recv_I_have : out std_logic; -- pulse will be latched |
arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg |
-- control and status signals |
req_count : out std_logic_vector(7 downto 0); -- count of arp pkts received |
-- system signals |
our_ip_address : in std_logic_vector (31 downto 0); |
rx_clk : in std_logic; |
reset : in std_logic |
); |
Port ( |
-- MAC layer RX signals |
data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
data_in_last : in STD_LOGIC; -- indicates last data in frame |
-- ARP output signals |
recv_who_has : out std_logic; -- pulse will be latched |
arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to) |
recv_I_have : out std_logic; -- pulse will be latched |
arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg |
-- control and status signals |
req_count : out STD_LOGIC_VECTOR(7 downto 0); -- count of arp pkts received |
-- system signals |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
rx_clk : in std_logic; |
reset : in STD_LOGIC |
); |
end arp_rx; |
|
|
|
architecture Behavioral of arp_rx is |
|
type rx_state_t is (IDLE, PARSE, PROCESS_ARP, WAIT_END); |
type rx_event_t is (NO_EVENT, DATA); |
type count_mode_t is (RST, INCR, HOLD); |
type arp_oper_t is (NOP, REQUEST, REPLY); |
type rx_state_t is (IDLE,PARSE,PROCESS_ARP,WAIT_END); |
type rx_event_t is (NO_EVENT,DATA); |
type count_mode_t is (RST,INCR,HOLD); |
type arp_oper_t is (NOP,REQUEST,REPLY); |
|
type tx_state_type is (IDLE, WAIT_MAC, SEND); |
type tx_state_type is (IDLE,WAIT_MAC,SEND); |
|
-- state variables |
signal send_request_needed : std_logic; |
signal tx_mac_chn_reqd : std_logic; |
|
signal rx_state : rx_state_t; |
signal rx_count : unsigned (7 downto 0); |
signal arp_operation : arp_oper_t; |
signal arp_req_count : unsigned (7 downto 0); |
signal new_arp_entry : arp_entry_t; |
|
-- FIXME - remove these debug state signals |
signal arp_err_data : std_logic_vector (7 downto 0); |
signal set_err_data : std_logic; |
|
attribute keep : string; |
attribute keep of arp_err_data : signal is "true"; |
|
|
-- rx control signals |
signal next_rx_state : rx_state_t; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_t; |
signal rx_count_mode : count_mode_t; |
signal set_arp_oper : std_logic; |
signal arp_oper_set_val : arp_oper_t; |
signal dataval : std_logic_vector (7 downto 0); |
signal count_arp_rcvd : std_logic; |
|
signal set_mac5 : std_logic; |
signal set_mac4 : std_logic; |
signal set_mac3 : std_logic; |
signal set_mac2 : std_logic; |
signal set_mac1 : std_logic; |
signal set_mac0 : std_logic; |
|
signal set_ip3 : std_logic; |
signal set_ip2 : std_logic; |
signal set_ip1 : std_logic; |
signal set_ip0 : std_logic; |
|
-- state variables |
signal send_request_needed : std_logic; |
signal tx_mac_chn_reqd : std_logic; |
|
|
signal rx_state : rx_state_t; |
signal rx_count : unsigned (7 downto 0); |
signal arp_operation : arp_oper_t; |
signal arp_req_count : unsigned (7 downto 0); |
signal new_arp_entry : arp_entry_t; |
-- function to determine whether the rx pkt is an arp pkt and whether we want to process it |
-- Returns 1 if we should discard |
-- The following will make us ignore the frame (all values hexadecimal): |
-- PDU type /= 0806 |
-- Protocol Type /= 0800 |
-- Hardware Type /= 1 |
-- Hardware Length /= 6 |
-- Protocol Length /= 4 |
-- Operation /= 1 or 2 |
-- Target IP /= our IP (i.er. message is not meant for us) |
-- |
function not_our_arp(data : STD_LOGIC_VECTOR; count : unsigned; our_ip : std_logic_vector) return std_logic is |
begin |
if |
(count = 12 and data /= x"08") or -- PDU type 0806 : ARP |
(count = 13 and data /= x"06") or |
(count = 14 and data /= x"00") or -- HW type 1 : eth |
(count = 15 and data /= x"01") or |
(count = 16 and data /= x"08") or -- Protocol 0800 : IP |
(count = 17 and data /= x"00") or |
(count = 18 and data /= x"06") or -- HW Length 6 |
(count = 19 and data /= x"04") or -- protocol length 4 |
(count = 20 and data /= x"00") or -- operation 1 or 2 (req or reply) |
(count = 21 and data /= x"01" and data /= x"02") or |
(count = 38 and data /= our_ip(31 downto 24)) or -- target IP is ours |
(count = 39 and data /= our_ip(23 downto 16)) or |
(count = 40 and data /= our_ip(15 downto 8)) or |
(count = 41 and data /= our_ip(7 downto 0)) |
then |
return '1'; |
else |
return '0'; |
end if; |
end function not_our_arp; |
|
-- FIXME - remove these debug state signals |
signal arp_err_data : std_logic_vector (7 downto 0); |
signal set_err_data : std_logic; |
|
attribute keep : string; |
attribute keep of arp_err_data : signal is "true"; |
|
|
-- rx control signals |
signal next_rx_state : rx_state_t; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_t; |
signal rx_count_mode : count_mode_t; |
signal set_arp_oper : std_logic; |
signal arp_oper_set_val : arp_oper_t; |
signal dataval : std_logic_vector (7 downto 0); |
signal count_arp_rcvd : std_logic; |
|
signal set_mac5 : std_logic; |
signal set_mac4 : std_logic; |
signal set_mac3 : std_logic; |
signal set_mac2 : std_logic; |
signal set_mac1 : std_logic; |
signal set_mac0 : std_logic; |
|
signal set_ip3 : std_logic; |
signal set_ip2 : std_logic; |
signal set_ip1 : std_logic; |
signal set_ip0 : std_logic; |
|
|
|
-- function to determine whether the rx pkt is an arp pkt and whether we want to process it |
-- Returns 1 if we should discard |
-- The following will make us ignore the frame (all values hexadecimal): |
-- PDU type /= 0806 |
-- Protocol Type /= 0800 |
-- Hardware Type /= 1 |
-- Hardware Length /= 6 |
-- Protocol Length /= 4 |
-- Operation /= 1 or 2 |
-- Target IP /= our IP (i.er. message is not meant for us) |
-- |
function not_our_arp(data : std_logic_vector; count : unsigned; our_ip : std_logic_vector) return std_logic is |
begin |
if |
(count = 12 and data /= x"08") or -- PDU type 0806 : ARP |
(count = 13 and data /= x"06") or |
(count = 14 and data /= x"00") or -- HW type 1 : eth |
(count = 15 and data /= x"01") or |
(count = 16 and data /= x"08") or -- Protocol 0800 : IP |
(count = 17 and data /= x"00") or |
(count = 18 and data /= x"06") or -- HW Length 6 |
(count = 19 and data /= x"04") or -- protocol length 4 |
(count = 20 and data /= x"00") or -- operation 1 or 2 (req or reply) |
(count = 21 and data /= x"01" and data /= x"02") or |
(count = 38 and data /= our_ip(31 downto 24)) or -- target IP is ours |
(count = 39 and data /= our_ip(23 downto 16)) or |
(count = 40 and data /= our_ip(15 downto 8)) or |
(count = 41 and data /= our_ip(7 downto 0)) |
then |
return '1'; |
else |
return '0'; |
end if; |
end function not_our_arp; |
|
begin |
|
rx_combinatorial : process ( |
-- input signals |
data_in, data_in_valid, data_in_last, our_ip_address, |
-- state variables |
rx_state, rx_count, arp_operation, arp_req_count, arp_err_data, new_arp_entry, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, set_arp_oper, arp_oper_set_val, |
dataval, set_mac5, set_mac4, set_mac3, set_mac2, set_mac1, set_mac0, set_ip3, set_ip2, set_ip1, set_ip0, set_err_data, |
count_arp_rcvd |
) |
begin |
-- set output followers |
req_count <= std_logic_vector(arp_req_count); |
rx_combinatorial : process ( |
-- input signals |
data_in, data_in_valid, data_in_last, our_ip_address, |
-- state variables |
rx_state, rx_count, arp_operation, arp_req_count, arp_err_data, new_arp_entry, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, set_arp_oper, arp_oper_set_val, |
dataval,set_mac5,set_mac4,set_mac3,set_mac2,set_mac1,set_mac0,set_ip3,set_ip2,set_ip1,set_ip0, set_err_data, |
count_arp_rcvd |
) |
begin |
-- set output followers |
req_count <= STD_LOGIC_VECTOR(arp_req_count); |
|
-- set defaults for combinatorial outputs |
recv_who_has <= '0'; |
arp_entry_for_who_has.ip <= (others => '0'); |
arp_entry_for_who_has.mac <= (others => '0'); |
recv_I_have <= '0'; |
arp_entry_for_I_have.ip <= (others => '0'); |
arp_entry_for_I_have.mac <= (others => '0'); |
|
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_arp_oper <= '0'; |
arp_oper_set_val <= NOP; |
dataval <= (others => '0'); |
set_mac5 <= '0'; |
set_mac4 <= '0'; |
set_mac3 <= '0'; |
set_mac2 <= '0'; |
set_mac1 <= '0'; |
set_mac0 <= '0'; |
set_ip3 <= '0'; |
set_ip2 <= '0'; |
set_ip1 <= '0'; |
set_ip0 <= '0'; |
count_arp_rcvd <= '0'; |
set_err_data <= '0'; |
|
-- determine event (if any) |
if data_in_valid = '1' then |
rx_event <= DATA; |
end if; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
next_rx_state <= PARSE; |
set_rx_state <= '1'; |
rx_count_mode <= INCR; |
end case; |
|
-- set defaults for combinatorial outputs |
recv_who_has <= '0'; |
arp_entry_for_who_has.ip <= (others => '0'); |
arp_entry_for_who_has.mac <= (others => '0'); |
recv_I_have <= '0'; |
arp_entry_for_I_have.ip <= (others => '0'); |
arp_entry_for_I_have.mac <= (others => '0'); |
when PARSE => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
rx_count_mode <= INCR; |
-- handle early frame termination |
if data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
else |
-- check for end of frame. Also, detect and discard if not our frame |
if rx_count = 42 then |
next_rx_state <= PROCESS_ARP; |
set_rx_state <= '1'; |
elsif not_our_arp(data_in,rx_count,our_ip_address) = '1' then |
dataval <= data_in; |
set_err_data <= '1'; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
elsif rx_count = 21 then |
-- capture ARP operation |
case data_in is |
when x"01" => |
arp_oper_set_val <= REQUEST; |
set_arp_oper <= '1'; |
when x"02" => |
arp_oper_set_val <= REPLY; |
set_arp_oper <= '1'; |
when others => -- ignore other values |
end case; |
-- capture source mac addr |
elsif rx_count = 22 then |
set_mac5 <= '1'; |
dataval <= data_in; |
elsif rx_count = 23 then |
set_mac4 <= '1'; |
dataval <= data_in; |
elsif rx_count = 24 then |
set_mac3 <= '1'; |
dataval <= data_in; |
elsif rx_count = 25 then |
set_mac2 <= '1'; |
dataval <= data_in; |
elsif rx_count = 26 then |
set_mac1 <= '1'; |
dataval <= data_in; |
elsif rx_count = 27 then |
set_mac0 <= '1'; |
dataval <= data_in; |
-- capture source ip addr |
elsif rx_count = 28 then |
set_ip3 <= '1'; |
dataval <= data_in; |
elsif rx_count = 29 then |
set_ip2 <= '1'; |
dataval <= data_in; |
elsif rx_count = 30 then |
set_ip1 <= '1'; |
dataval <= data_in; |
elsif rx_count = 31 then |
set_ip0 <= '1'; |
dataval <= data_in; |
end if; |
end if; |
end case; |
|
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_arp_oper <= '0'; |
arp_oper_set_val <= NOP; |
dataval <= (others => '0'); |
set_mac5 <= '0'; |
set_mac4 <= '0'; |
set_mac3 <= '0'; |
set_mac2 <= '0'; |
set_mac1 <= '0'; |
set_mac0 <= '0'; |
set_ip3 <= '0'; |
set_ip2 <= '0'; |
set_ip1 <= '0'; |
set_ip0 <= '0'; |
count_arp_rcvd <= '0'; |
set_err_data <= '0'; |
when PROCESS_ARP => |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
arp_oper_set_val <= NOP; |
set_arp_oper <= '1'; |
case arp_operation is |
when NOP => -- (nothing to do) |
when REQUEST => |
count_arp_rcvd <= '1'; |
recv_who_has <= '1'; |
arp_entry_for_who_has <= new_arp_entry; |
-- setting I_Have as well allows us to cache the remote node's entry immediately |
recv_I_have <= '1'; |
arp_entry_for_I_have <= new_arp_entry; |
when REPLY => |
count_arp_rcvd <= '1'; |
recv_I_have <= '1'; |
arp_entry_for_I_have <= new_arp_entry; |
end case; |
|
-- determine event (if any) |
if data_in_valid = '1' then |
rx_event <= DATA; |
end if; |
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end case; |
|
end case; |
|
end process; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
next_rx_state <= PARSE; |
set_rx_state <= '1'; |
rx_count_mode <= INCR; |
end case; |
rx_sequential : process (rx_clk) |
begin |
if rising_edge(rx_clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"00"; |
arp_operation <= NOP; |
arp_req_count <= x"00"; |
arp_err_data <= (others => '0'); |
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => |
rx_count <= x"00"; |
when INCR => |
rx_count <= rx_count + 1; |
when HOLD => |
rx_count <= rx_count; |
end case; |
|
-- err data |
if set_err_data = '1' then |
arp_err_data <= data_in; |
else |
arp_err_data <= arp_err_data; |
end if; |
|
-- arp operation processing |
if set_arp_oper = '1' then |
arp_operation <= arp_oper_set_val; |
else |
arp_operation <= arp_operation; |
end if; |
|
-- source mac capture |
if (set_mac5 = '1') then new_arp_entry.mac(47 downto 40) <= dataval; end if; |
if (set_mac4 = '1') then new_arp_entry.mac(39 downto 32) <= dataval; end if; |
if (set_mac3 = '1') then new_arp_entry.mac(31 downto 24) <= dataval; end if; |
if (set_mac2 = '1') then new_arp_entry.mac(23 downto 16) <= dataval; end if; |
if (set_mac1 = '1') then new_arp_entry.mac(15 downto 8) <= dataval; end if; |
if (set_mac0 = '1') then new_arp_entry.mac(7 downto 0) <= dataval; end if; |
|
when PARSE => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
rx_count_mode <= INCR; |
-- handle early frame termination |
if data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
--else |
end if; |
-- check for end of frame. Also, detect and discard if not our frame |
if rx_count = 41 then -- TB 2013-01-14 15:09:45 was 42 |
next_rx_state <= PROCESS_ARP; |
set_rx_state <= '1'; |
elsif not_our_arp(data_in, rx_count, our_ip_address) = '1' then |
dataval <= data_in; |
set_err_data <= '1'; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
elsif rx_count = 21 then |
-- capture ARP operation |
case data_in is |
when x"01" => |
arp_oper_set_val <= REQUEST; |
set_arp_oper <= '1'; |
when x"02" => |
arp_oper_set_val <= REPLY; |
set_arp_oper <= '1'; |
when others => -- ignore other values |
end case; |
-- capture source mac addr |
elsif rx_count = 22 then |
set_mac5 <= '1'; |
dataval <= data_in; |
elsif rx_count = 23 then |
set_mac4 <= '1'; |
dataval <= data_in; |
elsif rx_count = 24 then |
set_mac3 <= '1'; |
dataval <= data_in; |
elsif rx_count = 25 then |
set_mac2 <= '1'; |
dataval <= data_in; |
elsif rx_count = 26 then |
set_mac1 <= '1'; |
dataval <= data_in; |
elsif rx_count = 27 then |
set_mac0 <= '1'; |
dataval <= data_in; |
-- capture source ip addr |
elsif rx_count = 28 then |
set_ip3 <= '1'; |
dataval <= data_in; |
elsif rx_count = 29 then |
set_ip2 <= '1'; |
dataval <= data_in; |
elsif rx_count = 30 then |
set_ip1 <= '1'; |
dataval <= data_in; |
elsif rx_count = 31 then |
set_ip0 <= '1'; |
dataval <= data_in; |
end if; |
-- end if; |
end case; |
-- source ip capture |
if (set_ip3 = '1') then new_arp_entry.ip(31 downto 24) <= dataval; end if; |
if (set_ip2 = '1') then new_arp_entry.ip(23 downto 16) <= dataval; end if; |
if (set_ip1 = '1') then new_arp_entry.ip(15 downto 8) <= dataval; end if; |
if (set_ip0 = '1') then new_arp_entry.ip(7 downto 0) <= dataval; end if; |
|
-- set arp entry request |
if count_arp_rcvd = '1' then |
-- count another ARP pkt received |
arp_req_count <= arp_req_count + 1; |
else |
arp_req_count <= arp_req_count; |
end if; |
|
end if; |
end if; |
end process; |
|
when PROCESS_ARP => |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
arp_oper_set_val <= NOP; |
set_arp_oper <= '1'; |
case arp_operation is |
when NOP => -- (nothing to do) |
when REQUEST => |
count_arp_rcvd <= '1'; |
recv_who_has <= '1'; |
arp_entry_for_who_has <= new_arp_entry; |
-- setting I_Have as well allows us to cache the remote node's entry immediately |
recv_I_have <= '1'; |
arp_entry_for_I_have <= new_arp_entry; |
when REPLY => |
count_arp_rcvd <= '1'; |
recv_I_have <= '1'; |
arp_entry_for_I_have <= new_arp_entry; |
end case; |
|
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end case; |
|
end case; |
|
end process; |
|
rx_sequential : process (rx_clk) |
begin |
if rising_edge(rx_clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"00"; |
arp_operation <= NOP; |
arp_req_count <= x"00"; |
arp_err_data <= (others => '0'); |
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => |
rx_count <= x"00"; |
when INCR => |
rx_count <= rx_count + 1; |
when HOLD => |
rx_count <= rx_count; |
end case; |
|
-- err data |
if set_err_data = '1' then |
arp_err_data <= data_in; |
else |
arp_err_data <= arp_err_data; |
end if; |
|
-- arp operation processing |
if set_arp_oper = '1' then |
arp_operation <= arp_oper_set_val; |
else |
arp_operation <= arp_operation; |
end if; |
|
-- source mac capture |
if (set_mac5 = '1') then new_arp_entry.mac(47 downto 40) <= dataval; end if; |
if (set_mac4 = '1') then new_arp_entry.mac(39 downto 32) <= dataval; end if; |
if (set_mac3 = '1') then new_arp_entry.mac(31 downto 24) <= dataval; end if; |
if (set_mac2 = '1') then new_arp_entry.mac(23 downto 16) <= dataval; end if; |
if (set_mac1 = '1') then new_arp_entry.mac(15 downto 8) <= dataval; end if; |
if (set_mac0 = '1') then new_arp_entry.mac(7 downto 0) <= dataval; end if; |
|
-- source ip capture |
if (set_ip3 = '1') then new_arp_entry.ip(31 downto 24) <= dataval; end if; |
if (set_ip2 = '1') then new_arp_entry.ip(23 downto 16) <= dataval; end if; |
if (set_ip1 = '1') then new_arp_entry.ip(15 downto 8) <= dataval; end if; |
if (set_ip0 = '1') then new_arp_entry.ip(7 downto 0) <= dataval; end if; |
|
-- set arp entry request |
if count_arp_rcvd = '1' then |
-- count another ARP pkt received |
arp_req_count <= arp_req_count + 1; |
else |
arp_req_count <= arp_req_count; |
end if; |
|
end if; |
end if; |
end process; |
|
end Behavioral; |
|
/IPv4_TX.vhd
1,549 → 1,546
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 16:20:42 06/01/2011 |
-- Design Name: |
-- Module Name: IPv4_TX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple IP TX |
-- doesnt handle segmentation |
-- dest MAC addr resolution through ARP layer |
-- Handle IPv4 protocol |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - fixed up setting of tx_result control defaults |
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 16:20:42 06/01/2011 |
-- Design Name: |
-- Module Name: IPv4_TX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple IP TX |
-- doesnt handle segmentation |
-- dest MAC addr resolution through ARP layer |
-- Handle IPv4 protocol |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - fixed up setting of tx_result control defaults |
-- Revision 0.03 - Added data_out_first |
-- Revision 0.04 - Added handling of broadcast address |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
-- Revision 0.04 - Added handling of broadcast address |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
|
entity IPv4_TX is |
Port ( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
|
-- system signals |
clk : in STD_LOGIC; -- same clock used to clock mac data and ip data |
reset : in STD_LOGIC; |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
-- ARP lookup signals |
arp_req_req : out arp_req_req_type; |
arp_req_rslt : in arp_req_rslt_type; |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
mac_data_out_ready : in std_logic; -- indicates system ready to consume data |
mac_data_out_valid : out std_logic; -- indicates data out is valid |
mac_data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
mac_data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
mac_data_out : out std_logic_vector (7 downto 0) -- ethernet frame (from dst mac addr through to last byte of frame) |
); |
end IPv4_TX; |
|
architecture Behavioral of IPv4_TX is |
|
type tx_state_type is ( |
IDLE, |
WAIT_MAC, -- waiting for response from ARP for mac lookup |
WAIT_CHN, -- waiting for tx access to MAC channel |
SEND_ETH_HDR, -- sending the ethernet header |
SEND_IP_HDR, -- sending the IP header |
SEND_USER_DATA -- sending the users data |
); |
|
type crc_state_type is (IDLE,TOT_LEN,ID,FLAGS,TTL,CKS,SAH,SAL,DAH,DAL,FINAL,WAIT_END); |
|
type count_mode_type is (RST, INCR, HOLD); |
type settable_cnt_type is (RST, SET, INCR, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
-- Configuration |
|
constant IP_TTL : std_logic_vector (7 downto 0) := x"80"; |
|
-- TX state variables |
signal tx_state : tx_state_type; |
signal tx_count : unsigned (11 downto 0); |
signal tx_result_reg : std_logic_vector (1 downto 0); |
signal tx_mac : std_logic_vector (47 downto 0); |
signal tx_mac_chn_reqd : std_logic; |
signal tx_hdr_cks : std_logic_vector (23 downto 0); |
signal mac_lookup_req : std_logic; |
signal crc_state : crc_state_type; |
signal arp_req_ip_reg : std_logic_vector (31 downto 0); |
signal mac_data_out_ready_reg : std_logic; |
|
-- tx control signals |
signal next_tx_state : tx_state_type; |
signal set_tx_state : std_logic; |
signal next_tx_result : std_logic_vector (1 downto 0); |
signal set_tx_result : std_logic; |
signal tx_mac_value : std_logic_vector (47 downto 0); |
signal set_tx_mac : std_logic; |
signal tx_count_val : unsigned (11 downto 0); |
signal tx_count_mode : settable_cnt_type; |
signal tx_data : std_logic_vector (7 downto 0); |
signal set_last : std_logic; |
signal set_chn_reqd : set_clr_type; |
signal set_mac_lku_req : set_clr_type; |
signal tx_data_valid : std_logic; -- indicates whether data is valid to tx or not |
|
-- tx temp signals |
signal total_length : std_logic_vector (15 downto 0); -- computed combinatorially from header size |
|
|
FUNCTION inv_if_one(s1:std_logic_vector;en:std_logic) return std_logic_vector is |
--this function inverts all the bits of a vector if |
--'en' is '1'. |
VARIABLE Z : std_logic_vector(s1'high downto s1'low); |
BEGIN |
FOR i IN (s1'low) to s1'high LOOP |
Z(i) := en XOR s1(i); |
END LOOP; |
RETURN Z; |
END inv_if_one; -- end function |
|
entity IPv4_TX is |
port ( |
-- IP Layer signals |
ip_tx_start : in std_logic; |
ip_tx : in ipv4_tx_type; -- IP tx cxns |
ip_tx_result : out std_logic_vector (1 downto 0); -- tx status (changes during transmission) |
ip_tx_data_out_ready : out std_logic; -- indicates IP TX is ready to take data |
|
-- system signals |
clk : in std_logic; -- same clock used to clock mac data and ip data |
reset : in std_logic; |
our_ip_address : in std_logic_vector (31 downto 0); |
our_mac_address : in std_logic_vector (47 downto 0); |
-- ARP lookup signals |
arp_req_req : out arp_req_req_type; |
arp_req_rslt : in arp_req_rslt_type; |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
mac_data_out_ready : in std_logic; -- indicates system ready to consume data |
mac_data_out_valid : out std_logic; -- indicates data out is valid |
mac_data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
mac_data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
mac_data_out : out std_logic_vector (7 downto 0) -- ethernet frame (from dst mac addr through to last byte of frame) |
); |
end IPv4_TX; |
|
architecture Behavioral of IPv4_TX is |
|
type tx_state_type is ( |
IDLE, |
WAIT_MAC, -- waiting for response from ARP for mac lookup |
WAIT_CHN, -- waiting for tx access to MAC channel |
SEND_ETH_HDR, -- sending the ethernet header |
SEND_IP_HDR, -- sending the IP header |
SEND_USER_DATA -- sending the users data |
); |
|
type crc_state_type is (IDLE, TOT_LEN, ID, FLAGS, TTL, CKS, SAH, SAL, DAH, DAL, FINAL, WAIT_END); |
|
type count_mode_type is (RST, INCR, HOLD); |
type settable_cnt_type is (RST, SET, INCR, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
-- Configuration |
|
constant IP_TTL : std_logic_vector (7 downto 0) := x"80"; |
|
-- TX state variables |
signal tx_state : tx_state_type; |
signal tx_count : unsigned (11 downto 0); |
signal tx_result_reg : std_logic_vector (1 downto 0); |
signal tx_mac : std_logic_vector (47 downto 0); |
signal tx_mac_chn_reqd : std_logic; |
signal tx_hdr_cks : std_logic_vector (23 downto 0); |
signal mac_lookup_req : std_logic; |
signal crc_state : crc_state_type; |
signal arp_req_ip_reg : std_logic_vector (31 downto 0); |
signal mac_data_out_ready_reg : std_logic; |
|
-- tx control signals |
signal next_tx_state : tx_state_type; |
signal set_tx_state : std_logic; |
signal next_tx_result : std_logic_vector (1 downto 0); |
signal set_tx_result : std_logic; |
signal tx_mac_value : std_logic_vector (47 downto 0); |
signal set_tx_mac : std_logic; |
signal tx_count_val : unsigned (11 downto 0); |
signal tx_count_mode : settable_cnt_type; |
signal tx_data : std_logic_vector (7 downto 0); |
signal set_last : std_logic; |
signal set_chn_reqd : set_clr_type; |
signal set_mac_lku_req : set_clr_type; |
signal tx_data_valid : std_logic; -- indicates whether data is valid to tx or not |
|
-- tx temp signals |
signal total_length : std_logic_vector (15 downto 0); -- computed combinatorially from header size |
|
|
function inv_if_one(s1 : std_logic_vector; en : std_logic) return std_logic_vector is |
--this function inverts all the bits of a vector if |
--'en' is '1'. |
variable Z : std_logic_vector(s1'high downto s1'low); |
begin |
for i in (s1'low) to s1'high loop |
Z(i) := en xor s1(i); |
end loop; |
return Z; |
end inv_if_one; -- end function |
|
|
|
-- IP datagram header format |
-- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | Version | *Header | Service Type | Total Length including header | |
-- | (4) | Length | (ignored) | (in bytes) | |
-- -------------------------------------------------------------------------------------------- |
-- | Identification | Flags | Fragment Offset | |
-- | | | (in 32 bit words) | |
-- -------------------------------------------------------------------------------------------- |
-- | Time To Live | Protocol | Header Checksum | |
-- | (ignored) | | | |
-- -------------------------------------------------------------------------------------------- |
-- | Source IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Destination IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Options (if any - ignored) | Padding | |
-- | | (if needed) | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | Version | *Header | Service Type | Total Length including header | |
-- | (4) | Length | (ignored) | (in bytes) | |
-- -------------------------------------------------------------------------------------------- |
-- | Identification | Flags | Fragment Offset | |
-- | | | (in 32 bit words) | |
-- -------------------------------------------------------------------------------------------- |
-- | Time To Live | Protocol | Header Checksum | |
-- | (ignored) | | | |
-- -------------------------------------------------------------------------------------------- |
-- | Source IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Destination IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Options (if any - ignored) | Padding | |
-- | | (if needed) | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- |
-- * - in 32 bit words |
|
begin |
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
|
tx_combinatorial : process( |
-- input signals |
ip_tx_start, ip_tx, our_ip_address, our_mac_address, arp_req_rslt, --clk, |
mac_tx_granted, mac_data_out_ready, |
-- state variables |
tx_state, tx_count, tx_result_reg, tx_mac, tx_mac_chn_reqd, |
mac_lookup_req, tx_hdr_cks, arp_req_ip_reg, mac_data_out_ready_reg, |
-- control signals |
next_tx_state, set_tx_state, next_tx_result, set_tx_result, tx_mac_value, set_tx_mac, tx_count_mode, |
tx_data, set_last, set_chn_reqd, set_mac_lku_req, total_length, |
tx_data_valid, tx_count_val |
) |
begin |
-- set output followers |
ip_tx_result <= tx_result_reg; |
mac_tx_req <= tx_mac_chn_reqd; |
arp_req_req.lookup_req <= mac_lookup_req; |
arp_req_req.ip <= arp_req_ip_reg; |
|
-- set initial values for combinatorial outputs |
mac_data_out_first <= '0'; |
|
case tx_state is |
when SEND_ETH_HDR | SEND_IP_HDR => |
mac_data_out <= tx_data; |
tx_data_valid <= mac_data_out_ready; -- generated internally |
mac_data_out_last <= set_last; |
|
when SEND_USER_DATA => |
mac_data_out <= ip_tx.data.data_out; |
tx_data_valid <= ip_tx.data.data_out_valid; |
mac_data_out_last <= ip_tx.data.data_out_last; |
|
when others => |
mac_data_out <= (others => '0'); |
tx_data_valid <= '0'; -- not transmitting during this phase |
mac_data_out_last <= '0'; |
end case; |
|
mac_data_out_valid <= tx_data_valid and mac_data_out_ready; |
|
-- set signal defaults |
next_tx_state <= IDLE; |
set_tx_state <= '0'; |
tx_count_mode <= HOLD; |
tx_data <= x"00"; |
set_last <= '0'; |
set_tx_mac <= '0'; |
set_chn_reqd <= HOLD; |
set_mac_lku_req <= HOLD; |
next_tx_result <= IPTX_RESULT_NONE; |
set_tx_result <= '0'; |
tx_count_val <= (others => '0'); |
tx_mac_value <= (others => '0'); |
|
-- set temp signals |
total_length <= std_logic_vector(unsigned(ip_tx.hdr.data_length) + 20); -- total length = user data length + header length (bytes) |
|
-- TX FSM |
case tx_state is |
when IDLE => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
tx_count_mode <= RST; |
set_chn_reqd <= CLR; |
if ip_tx_start = '1' then |
-- check header count for error if too high |
if unsigned(ip_tx.hdr.data_length) > 1480 then |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
else |
next_tx_result <= IPTX_RESULT_SENDING; |
set_tx_result <= '1'; |
|
-- TODO - check if we already have the mac addr for this ip, if so, bypass the WAIT_MAC state |
|
if ip_tx.hdr.dst_ip_addr = IP_BC_ADDR then |
-- for IP broadcast, dont need to look up the MAC addr |
tx_mac_value <= MAC_BC_ADDR; |
set_tx_mac <= '1'; |
next_tx_state <= WAIT_CHN; |
set_tx_state <= '1'; |
else |
-- need to req the mac address for this ip |
set_mac_lku_req <= SET; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
end if; |
end if; |
else |
set_mac_lku_req <= CLR; |
end if; |
|
when WAIT_MAC => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
set_mac_lku_req <= CLR; -- clear the request - will have been latched in the ARP layer |
if arp_req_rslt.got_mac = '1' then |
-- save the MAC we got back from the ARP lookup |
tx_mac_value <= arp_req_rslt.mac; |
set_tx_mac <= '1'; |
set_chn_reqd <= SET; |
-- check for optimise when already have the channel |
if mac_tx_granted = '1' then |
-- ready to send data |
next_tx_state <= SEND_ETH_HDR; |
set_tx_state <= '1'; |
else |
next_tx_state <= WAIT_CHN; |
set_tx_state <= '1'; |
end if; |
elsif arp_req_rslt.got_err = '1' then |
set_mac_lku_req <= CLR; |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end if; |
|
when WAIT_CHN => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_tx_granted = '1' then |
-- ready to send data |
next_tx_state <= SEND_ETH_HDR; |
set_tx_state <= '1'; |
end if; |
-- probably should handle a timeout here |
|
when SEND_ETH_HDR => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_data_out_ready = '1' then |
if tx_count = x"00d" then |
tx_count_mode <= RST; |
next_tx_state <= SEND_IP_HDR; |
set_tx_state <= '1'; |
else |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"000" => |
mac_data_out_first <= mac_data_out_ready; |
tx_data <= tx_mac (47 downto 40); -- trg = mac from ARP lookup |
|
when x"001" => tx_data <= tx_mac (39 downto 32); |
when x"002" => tx_data <= tx_mac (31 downto 24); |
when x"003" => tx_data <= tx_mac (23 downto 16); |
when x"004" => tx_data <= tx_mac (15 downto 8); |
when x"005" => tx_data <= tx_mac (7 downto 0); |
when x"006" => tx_data <= our_mac_address (47 downto 40); -- src = our mac |
when x"007" => tx_data <= our_mac_address (39 downto 32); |
when x"008" => tx_data <= our_mac_address (31 downto 24); |
when x"009" => tx_data <= our_mac_address (23 downto 16); |
when x"00a" => tx_data <= our_mac_address (15 downto 8); |
when x"00b" => tx_data <= our_mac_address (7 downto 0); |
when x"00c" => tx_data <= x"08"; -- pkt type = 0800 : IP |
when x"00d" => tx_data <= x"00"; |
when others => |
-- shouldnt get here - handle as error |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end if; |
|
when SEND_IP_HDR => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_data_out_ready = '1' then |
if tx_count = x"013" then |
tx_count_val <= x"001"; |
tx_count_mode <= SET; |
next_tx_state <= SEND_USER_DATA; |
set_tx_state <= '1'; |
else |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"000" => tx_data <= x"45"; -- v4, 5 words in hdr |
when x"001" => tx_data <= x"00"; -- service type |
when x"002" => tx_data <= total_length (15 downto 8); -- total length |
when x"003" => tx_data <= total_length (7 downto 0); |
when x"004" => tx_data <= x"00"; -- identification |
when x"005" => tx_data <= x"00"; |
when x"006" => tx_data <= x"00"; -- flags and fragment offset |
when x"007" => tx_data <= x"00"; |
when x"008" => tx_data <= IP_TTL; -- TTL |
when x"009" => tx_data <= ip_tx.hdr.protocol; -- protocol |
when x"00a" => tx_data <= tx_hdr_cks (15 downto 8); -- HDR checksum |
when x"00b" => tx_data <= tx_hdr_cks (7 downto 0); -- HDR checksum |
when x"00c" => tx_data <= our_ip_address (31 downto 24); -- src ip |
when x"00d" => tx_data <= our_ip_address (23 downto 16); |
when x"00e" => tx_data <= our_ip_address (15 downto 8); |
when x"00f" => tx_data <= our_ip_address (7 downto 0); |
when x"010" => tx_data <= ip_tx.hdr.dst_ip_addr (31 downto 24); -- dst ip |
when x"011" => tx_data <= ip_tx.hdr.dst_ip_addr (23 downto 16); |
when x"012" => tx_data <= ip_tx.hdr.dst_ip_addr (15 downto 8); |
when x"013" => tx_data <= ip_tx.hdr.dst_ip_addr (7 downto 0); |
when others => |
-- shouldnt get here - handle as error |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end if; |
|
when SEND_USER_DATA => |
ip_tx_data_out_ready <= mac_data_out_ready;-- and mac_data_out_ready_reg; -- in this state, we are always ready to accept user data for tx |
if mac_data_out_ready = '1' then |
if ip_tx.data.data_out_valid = '1' or tx_count = x"000" then |
-- only increment if ready and valid has been subsequently established, otherwise data count moves on too fast |
if unsigned(tx_count) = unsigned(ip_tx.hdr.data_length) then |
-- TX terminated due to count - end normally |
set_last <= '1'; |
set_chn_reqd <= CLR; |
tx_data <= ip_tx.data.data_out; |
next_tx_result <= IPTX_RESULT_SENT; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
if ip_tx.data.data_out_last = '0' then |
next_tx_result <= IPTX_RESULT_ERR; |
end if; |
elsif ip_tx.data.data_out_last = '1' then |
-- TX terminated due to receiving last indication from upstream - end with error |
set_last <= '1'; |
set_chn_reqd <= CLR; |
tx_data <= ip_tx.data.data_out; |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
else |
-- TX continues |
tx_count_mode <= INCR; |
tx_data <= ip_tx.data.data_out; |
end if; |
end if; |
end if; |
|
end case; |
end process; |
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
tx_sequential : process (clk)--, reset, mac_data_out_ready_reg) |
begin |
-- if rising_edge(clk) then |
-- mac_data_out_ready_reg <= mac_data_out_ready; |
-- else |
-- mac_data_out_ready_reg <= mac_data_out_ready_reg; |
-- end if; |
|
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
tx_state <= IDLE; |
tx_count <= x"000"; |
tx_result_reg <= IPTX_RESULT_NONE; |
tx_mac <= (others => '0'); |
tx_mac_chn_reqd <= '0'; |
mac_lookup_req <= '0'; |
|
else |
-- Next tx_state processing |
if set_tx_state = '1' then |
tx_state <= next_tx_state; |
else |
tx_state <= tx_state; |
end if; |
|
-- tx result processing |
if set_tx_result = '1' then |
tx_result_reg <= next_tx_result; |
else |
tx_result_reg <= tx_result_reg; |
end if; |
|
-- control arp lookup request |
case set_mac_lku_req is |
when SET => |
arp_req_ip_reg <= ip_tx.hdr.dst_ip_addr; |
mac_lookup_req <= '1'; |
|
when CLR => |
mac_lookup_req <= '0'; |
arp_req_ip_reg <= arp_req_ip_reg; |
|
when HOLD => |
mac_lookup_req <= mac_lookup_req; |
arp_req_ip_reg <= arp_req_ip_reg; |
end case; |
|
-- save MAC |
if set_tx_mac = '1' then |
tx_mac <= tx_mac_value; |
else |
tx_mac <= tx_mac; |
end if; |
|
-- control access request to mac tx chn |
case set_chn_reqd is |
when SET => tx_mac_chn_reqd <= '1'; |
when CLR => tx_mac_chn_reqd <= '0'; |
when HOLD => tx_mac_chn_reqd <= tx_mac_chn_reqd; |
end case; |
|
-- tx_count processing |
case tx_count_mode is |
when RST => tx_count <= x"000"; |
when SET => tx_count <= tx_count_val; |
when INCR => tx_count <= tx_count + 1; |
when HOLD => tx_count <= tx_count; |
end case; |
|
end if; |
end if; |
end process; |
|
----------------------------------------------------------------------------- |
-- Process to calculate CRC in parallel with pkt out processing |
-- this process must yield a valid CRC before it is required to be used in the hdr |
----------------------------------------------------------------------------- |
|
crc : process (clk)--, reset) |
begin |
if rising_edge(clk) then |
case crc_state is |
when IDLE => |
if ip_tx_start = '1' then |
tx_hdr_cks <= x"004500"; -- vers & hdr len & service |
crc_state <= TOT_LEN; |
end if; |
|
when TOT_LEN => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(total_length)); |
crc_state <= ID; |
|
when ID => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= FLAGS; |
|
when FLAGS => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= TTL; |
|
when TTL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(IP_TTL & ip_tx.hdr.protocol)); |
crc_state <= CKS; |
|
when CKS => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= SAH; |
|
when SAH => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(our_ip_address(31 downto 16))); |
crc_state <= SAL; |
|
when SAL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(our_ip_address(15 downto 0))); |
crc_state <= DAH; |
|
when DAH => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(ip_tx.hdr.dst_ip_addr(31 downto 16))); |
crc_state <= DAL; |
|
when DAL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(ip_tx.hdr.dst_ip_addr(15 downto 0))); |
crc_state <= FINAL; |
|
when FINAL => |
tx_hdr_cks <= inv_if_one(std_logic_vector (unsigned(tx_hdr_cks) + unsigned(tx_hdr_cks(23 downto 16))), '1'); |
crc_state <= WAIT_END; |
|
when WAIT_END => |
tx_hdr_cks <= tx_hdr_cks; |
if ip_tx_start = '0' then |
crc_state <= IDLE; |
else |
crc_state <= WAIT_END; |
end if; |
|
|
end case; |
end if; |
end process; |
|
|
end Behavioral; |
|
|
begin |
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
|
tx_combinatorial : process( |
-- input signals |
ip_tx_start, ip_tx, clk, our_ip_address, our_mac_address, arp_req_rslt, |
mac_tx_granted, mac_data_out_ready, |
-- state variables |
tx_state, tx_count, tx_result_reg, tx_mac, tx_mac_chn_reqd, |
mac_lookup_req, tx_hdr_cks, arp_req_ip_reg, mac_data_out_ready_reg, |
-- control signals |
next_tx_state, set_tx_state, next_tx_result, set_tx_result, tx_mac_value, set_tx_mac, tx_count_mode, |
tx_data, set_last, set_chn_reqd, set_mac_lku_req, total_length, |
tx_data_valid, tx_count_val |
) |
begin |
-- set output followers |
ip_tx_result <= tx_result_reg; |
mac_tx_req <= tx_mac_chn_reqd; |
arp_req_req.lookup_req <= mac_lookup_req; |
arp_req_req.ip <= arp_req_ip_reg; |
|
-- set initial values for combinatorial outputs |
mac_data_out_first <= '0'; |
|
case tx_state is |
when SEND_ETH_HDR | SEND_IP_HDR => |
mac_data_out <= tx_data; |
tx_data_valid <= mac_data_out_ready; -- generated internally |
mac_data_out_last <= set_last; |
|
when SEND_USER_DATA => |
mac_data_out <= ip_tx.data.data_out; |
tx_data_valid <= ip_tx.data.data_out_valid; |
mac_data_out_last <= ip_tx.data.data_out_last; |
|
when others => |
mac_data_out <= (others => '0'); |
tx_data_valid <= '0'; -- not transmitting during this phase |
mac_data_out_last <= '0'; |
end case; |
|
mac_data_out_valid <= tx_data_valid and mac_data_out_ready; |
|
-- set signal defaults |
next_tx_state <= IDLE; |
set_tx_state <= '0'; |
tx_count_mode <= HOLD; |
tx_data <= x"00"; |
set_last <= '0'; |
set_tx_mac <= '0'; |
set_chn_reqd <= HOLD; |
set_mac_lku_req <= HOLD; |
next_tx_result <= IPTX_RESULT_NONE; |
set_tx_result <= '0'; |
tx_count_val <= (others => '0'); |
tx_mac_value <= (others => '0'); |
|
-- set temp signals |
total_length <= std_logic_vector(unsigned(ip_tx.hdr.data_length) + 20); -- total length = user data length + header length (bytes) |
|
-- TX FSM |
case tx_state is |
when IDLE => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
tx_count_mode <= RST; |
set_chn_reqd <= CLR; |
if ip_tx_start = '1' then |
-- check header count for error if too high |
if unsigned(ip_tx.hdr.data_length) > 1480 then |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
else |
next_tx_result <= IPTX_RESULT_SENDING; |
set_tx_result <= '1'; |
|
-- TODO - check if we already have the mac addr for this ip, if so, bypass the WAIT_MAC state |
|
if ip_tx.hdr.dst_ip_addr = IP_BC_ADDR then |
-- for IP broadcast, dont need to look up the MAC addr |
tx_mac_value <= MAC_BC_ADDR; |
set_tx_mac <= '1'; |
next_tx_state <= WAIT_CHN; |
set_tx_state <= '1'; |
else |
-- need to req the mac address for this ip |
set_mac_lku_req <= SET; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
end if; |
end if; |
else |
set_mac_lku_req <= CLR; |
end if; |
|
when WAIT_MAC => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
set_mac_lku_req <= CLR; -- clear the request - will have been latched in the ARP layer |
if arp_req_rslt.got_mac = '1' then |
-- save the MAC we got back from the ARP lookup |
tx_mac_value <= arp_req_rslt.mac; |
set_tx_mac <= '1'; |
set_chn_reqd <= SET; |
-- check for optimise when already have the channel |
if mac_tx_granted = '1' then |
-- ready to send data |
next_tx_state <= SEND_ETH_HDR; |
set_tx_state <= '1'; |
else |
next_tx_state <= WAIT_CHN; |
set_tx_state <= '1'; |
end if; |
elsif arp_req_rslt.got_err = '1' then |
set_mac_lku_req <= CLR; |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end if; |
|
when WAIT_CHN => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_tx_granted = '1' then |
-- ready to send data |
next_tx_state <= SEND_ETH_HDR; |
set_tx_state <= '1'; |
end if; |
-- probably should handle a timeout here |
|
when SEND_ETH_HDR => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_data_out_ready = '1' then |
if tx_count = x"00d" then |
tx_count_mode <= RST; |
next_tx_state <= SEND_IP_HDR; |
set_tx_state <= '1'; |
else |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"000" => |
mac_data_out_first <= mac_data_out_ready; |
tx_data <= tx_mac (47 downto 40); -- trg = mac from ARP lookup |
|
when x"001" => tx_data <= tx_mac (39 downto 32); |
when x"002" => tx_data <= tx_mac (31 downto 24); |
when x"003" => tx_data <= tx_mac (23 downto 16); |
when x"004" => tx_data <= tx_mac (15 downto 8); |
when x"005" => tx_data <= tx_mac (7 downto 0); |
when x"006" => tx_data <= our_mac_address (47 downto 40); -- src = our mac |
when x"007" => tx_data <= our_mac_address (39 downto 32); |
when x"008" => tx_data <= our_mac_address (31 downto 24); |
when x"009" => tx_data <= our_mac_address (23 downto 16); |
when x"00a" => tx_data <= our_mac_address (15 downto 8); |
when x"00b" => tx_data <= our_mac_address (7 downto 0); |
when x"00c" => tx_data <= x"08"; -- pkt type = 0800 : IP |
when x"00d" => tx_data <= x"00"; |
when others => |
-- shouldnt get here - handle as error |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end if; |
|
when SEND_IP_HDR => |
ip_tx_data_out_ready <= '0'; -- in this state, we are unable to accept user data for tx |
if mac_data_out_ready = '1' then |
if tx_count = x"013" then |
tx_count_val <= x"001"; |
tx_count_mode <= SET; |
next_tx_state <= SEND_USER_DATA; |
set_tx_state <= '1'; |
else |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"000" => tx_data <= x"45"; -- v4, 5 words in hdr |
when x"001" => tx_data <= x"00"; -- service type |
when x"002" => tx_data <= total_length (15 downto 8); -- total length |
when x"003" => tx_data <= total_length (7 downto 0); |
when x"004" => tx_data <= x"00"; -- identification |
when x"005" => tx_data <= x"00"; |
when x"006" => tx_data <= x"00"; -- flags and fragment offset |
when x"007" => tx_data <= x"00"; |
when x"008" => tx_data <= IP_TTL; -- TTL |
when x"009" => tx_data <= ip_tx.hdr.protocol; -- protocol |
when x"00a" => tx_data <= tx_hdr_cks (15 downto 8); -- HDR checksum |
when x"00b" => tx_data <= tx_hdr_cks (7 downto 0); -- HDR checksum |
when x"00c" => tx_data <= our_ip_address (31 downto 24); -- src ip |
when x"00d" => tx_data <= our_ip_address (23 downto 16); |
when x"00e" => tx_data <= our_ip_address (15 downto 8); |
when x"00f" => tx_data <= our_ip_address (7 downto 0); |
when x"010" => tx_data <= ip_tx.hdr.dst_ip_addr (31 downto 24); -- dst ip |
when x"011" => tx_data <= ip_tx.hdr.dst_ip_addr (23 downto 16); |
when x"012" => tx_data <= ip_tx.hdr.dst_ip_addr (15 downto 8); |
when x"013" => tx_data <= ip_tx.hdr.dst_ip_addr (7 downto 0); |
when others => |
-- shouldnt get here - handle as error |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end if; |
|
when SEND_USER_DATA => |
ip_tx_data_out_ready <= mac_data_out_ready and mac_data_out_ready_reg; -- in this state, we are always ready to accept user data for tx |
if mac_data_out_ready = '1' then |
if ip_tx.data.data_out_valid = '1' or tx_count = x"000" then |
-- only increment if ready and valid has been subsequently established, otherwise data count moves on too fast |
if unsigned(tx_count) = unsigned(ip_tx.hdr.data_length) then |
-- TX terminated due to count - end normally |
set_last <= '1'; |
set_chn_reqd <= CLR; |
tx_data <= ip_tx.data.data_out; |
next_tx_result <= IPTX_RESULT_SENT; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
elsif ip_tx.data.data_out_last = '1' then |
-- TX terminated due to receiving last indication from upstream - end with error |
set_last <= '1'; |
set_chn_reqd <= CLR; |
tx_data <= ip_tx.data.data_out; |
next_tx_result <= IPTX_RESULT_ERR; |
set_tx_result <= '1'; |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
else |
-- TX continues |
tx_count_mode <= INCR; |
tx_data <= ip_tx.data.data_out; |
end if; |
end if; |
end if; |
|
end case; |
end process; |
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
tx_sequential : process (clk,reset,mac_data_out_ready_reg) |
begin |
if rising_edge(clk) then |
mac_data_out_ready_reg <= mac_data_out_ready; |
else |
mac_data_out_ready_reg <= mac_data_out_ready_reg; |
end if; |
|
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
tx_state <= IDLE; |
tx_count <= x"000"; |
tx_result_reg <= IPTX_RESULT_NONE; |
tx_mac <= (others => '0'); |
tx_mac_chn_reqd <= '0'; |
mac_lookup_req <= '0'; |
|
else |
-- Next tx_state processing |
if set_tx_state = '1' then |
tx_state <= next_tx_state; |
else |
tx_state <= tx_state; |
end if; |
|
-- tx result processing |
if set_tx_result = '1' then |
tx_result_reg <= next_tx_result; |
else |
tx_result_reg <= tx_result_reg; |
end if; |
|
-- control arp lookup request |
case set_mac_lku_req is |
when SET => |
arp_req_ip_reg <= ip_tx.hdr.dst_ip_addr; |
mac_lookup_req <= '1'; |
|
when CLR => |
mac_lookup_req <= '0'; |
arp_req_ip_reg <= arp_req_ip_reg; |
|
when HOLD => |
mac_lookup_req <= mac_lookup_req; |
arp_req_ip_reg <= arp_req_ip_reg; |
end case; |
|
-- save MAC |
if set_tx_mac = '1' then |
tx_mac <= tx_mac_value; |
else |
tx_mac <= tx_mac; |
end if; |
|
-- control access request to mac tx chn |
case set_chn_reqd is |
when SET => tx_mac_chn_reqd <= '1'; |
when CLR => tx_mac_chn_reqd <= '0'; |
when HOLD => tx_mac_chn_reqd <= tx_mac_chn_reqd; |
end case; |
|
-- tx_count processing |
case tx_count_mode is |
when RST => tx_count <= x"000"; |
when SET => tx_count <= tx_count_val; |
when INCR => tx_count <= tx_count + 1; |
when HOLD => tx_count <= tx_count; |
end case; |
|
end if; |
end if; |
end process; |
|
----------------------------------------------------------------------------- |
-- Process to calculate CRC in parallel with pkt out processing |
-- this process must yield a valid CRC before it is required to be used in the hdr |
----------------------------------------------------------------------------- |
|
crc : process (clk,reset) |
begin |
if rising_edge(clk) then |
case crc_state is |
when IDLE => |
if ip_tx_start = '1' then |
tx_hdr_cks <= x"004500"; -- vers & hdr len & service |
crc_state <= TOT_LEN; |
end if; |
|
when TOT_LEN => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(total_length)); |
crc_state <= ID; |
|
when ID => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= FLAGS; |
|
when FLAGS => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= TTL; |
|
when TTL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(IP_TTL & ip_tx.hdr.protocol)); |
crc_state <= CKS; |
|
when CKS => |
tx_hdr_cks <= tx_hdr_cks; |
crc_state <= SAH; |
|
when SAH => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(our_ip_address(31 downto 16))); |
crc_state <= SAL; |
|
when SAL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(our_ip_address(15 downto 0))); |
crc_state <= DAH; |
|
when DAH => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(ip_tx.hdr.dst_ip_addr(31 downto 16))); |
crc_state <= DAL; |
|
when DAL => |
tx_hdr_cks <= std_logic_vector (unsigned(tx_hdr_cks) + unsigned(ip_tx.hdr.dst_ip_addr(15 downto 0))); |
crc_state <= FINAL; |
|
when FINAL => |
tx_hdr_cks <= inv_if_one(std_logic_vector (unsigned(tx_hdr_cks) + unsigned(tx_hdr_cks(23 downto 16))),'1'); |
crc_state <= WAIT_END; |
|
when WAIT_END => |
tx_hdr_cks <= tx_hdr_cks; |
if ip_tx_start = '0' then |
crc_state <= IDLE; |
else |
crc_state <= WAIT_END; |
end if; |
|
|
end case; |
end if; |
end process; |
|
|
end Behavioral; |
|
/arp_TX.vhd
1,6 → 1,6
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- Engineer: Peter Fall |
-- |
-- Create Date: 12:00:04 05/31/2011 |
-- Design Name: |
9,326 → 9,328
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle transmission of an ARP packet. |
-- handle transmission of an ARP packet. |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created - refactored this arp_tx module from the complete arp v0.02 module |
-- Revision 0.01 - File Created - refactored this arp_tx module from the complete arp v0.02 module |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.arp_types.all; |
|
entity arp_tx is |
port ( |
-- control signals |
send_I_have : in std_logic; -- pulse will be latched |
arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched) |
send_who_has : in std_logic; -- pulse will be latched |
ip_entry : in std_logic_vector (31 downto 0); -- IP target for who_has req (will be latched) |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in std_logic_vector (47 downto 0); |
our_ip_address : in std_logic_vector (31 downto 0); |
tx_clk : in std_logic; |
reset : in std_logic |
); |
Port ( |
-- control signals |
send_I_have : in std_logic; -- pulse will be latched |
arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched) |
send_who_has : in std_logic; -- pulse will be latched |
ip_entry : in STD_LOGIC_VECTOR (31 downto 0); -- IP target for who_has req (will be latched) |
-- MAC layer TX signals |
mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx) |
mac_tx_granted : in std_logic; -- indicates that access to channel has been granted |
data_out_ready : in std_logic; -- indicates system ready to consume data |
data_out_valid : out std_logic; -- indicates data out is valid |
data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame |
data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame |
data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
-- system signals |
our_mac_address : in STD_LOGIC_VECTOR (47 downto 0); |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
tx_clk : in std_logic; |
reset : in std_logic |
); |
end arp_tx; |
|
architecture Behavioral of arp_tx is |
|
type count_mode_t is (RST, INCR, HOLD); |
type set_clr_t is (SET, CLR, HOLD); |
type tx_state_t is (IDLE, WAIT_MAC, SEND); |
type tx_mode_t is (REPLY, REQUEST); |
type count_mode_t is (RST,INCR,HOLD); |
type set_clr_t is (SET, CLR, HOLD); |
type tx_state_t is (IDLE,WAIT_MAC,SEND); |
type tx_mode_t is (REPLY,REQUEST); |
|
-- state variables |
signal tx_mac_chn_reqd : std_logic; |
signal tx_state : tx_state_t; |
signal tx_count : unsigned (7 downto 0); |
signal send_I_have_reg : std_logic; |
signal send_who_has_reg : std_logic; |
signal I_have_target : arp_entry_t; -- latched target for "I have" request |
signal who_has_target : std_logic_vector (31 downto 0); -- latched IP for "who has" request |
signal tx_mode : tx_mode_t; -- what sort of tx to make |
signal target : arp_entry_t; -- target to send to |
|
-- busses |
signal next_tx_state : tx_state_t; |
signal tx_mode_val : tx_mode_t; |
signal target_val : arp_entry_t; |
|
-- tx control signals |
signal set_tx_state : std_logic; |
signal tx_count_mode : count_mode_t; |
signal set_chn_reqd : set_clr_t; |
signal kill_data_out_valid : std_logic; |
signal set_send_I_have : set_clr_t; |
signal set_send_who_has : set_clr_t; |
signal set_tx_mode : std_logic; |
signal set_target : std_logic; |
|
begin |
|
-- state variables |
signal tx_mac_chn_reqd : std_logic; |
signal tx_state : tx_state_t; |
signal tx_count : unsigned (7 downto 0); |
signal send_I_have_reg : std_logic; |
signal send_who_has_reg : std_logic; |
signal I_have_target : arp_entry_t; -- latched target for "I have" request |
signal who_has_target : std_logic_vector (31 downto 0); -- latched IP for "who has" request |
signal tx_mode : tx_mode_t; -- what sort of tx to make |
signal target : arp_entry_t; -- target to send to |
tx_combinatorial : process ( |
-- input signals |
send_I_have, send_who_has, arp_entry, ip_entry, data_out_ready, mac_tx_granted, |
our_mac_address, our_ip_address, reset, |
-- state variables |
tx_state, tx_count, tx_mac_chn_reqd, I_have_target, who_has_target, |
send_I_have_reg, send_who_has_reg, tx_mode, target, |
-- busses |
next_tx_state, tx_mode_val, target_val, |
-- control signals |
tx_count_mode, kill_data_out_valid, set_send_I_have, set_send_who_has, |
set_chn_reqd, set_tx_mode, set_target |
) |
begin |
-- set output followers |
mac_tx_req <= tx_mac_chn_reqd; |
|
-- set combinatorial output defaults |
data_out_first <= '0'; |
|
case tx_state is |
when SEND => |
if data_out_ready = '1' and kill_data_out_valid = '0' then |
data_out_valid <= '1'; |
else |
data_out_valid <= '0'; |
end if; |
when OTHERS => data_out_valid <= '0'; |
end case; |
|
-- set bus defaults |
next_tx_state <= IDLE; |
tx_mode_val <= REPLY; |
target_val.ip <= (others => '0'); |
target_val.mac <= (others => '0'); |
|
-- set signal defaults |
set_tx_state <= '0'; |
tx_count_mode <= HOLD; |
data_out <= x"00"; |
data_out_last <= '0'; |
set_chn_reqd <= HOLD; |
kill_data_out_valid <= '0'; |
set_send_I_have <= HOLD; |
set_send_who_has <= HOLD; |
set_tx_mode <= '0'; |
set_target <= '0'; |
|
-- process requests in regardless of FSM state |
if send_I_have = '1' then |
set_send_I_have <= SET; |
end if; |
if send_who_has = '1' then |
set_send_who_has <= SET; |
end if; |
|
-- TX FSM |
case tx_state is |
when IDLE => |
tx_count_mode <= RST; |
if send_I_have_reg = '1' then |
set_chn_reqd <= SET; |
tx_mode_val <= REPLY; |
set_tx_mode <= '1'; |
target_val <= I_have_target; |
set_target <= '1'; |
set_send_I_have <= CLR; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
elsif send_who_has_reg = '1' then |
set_chn_reqd <= SET; |
tx_mode_val <= REQUEST; |
set_tx_mode <= '1'; |
target_val.ip <= who_has_target; |
target_val.mac <= (others => '0'); |
set_target <= '1'; |
set_send_who_has <= CLR; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
else |
set_chn_reqd <= CLR; |
end if; |
|
when WAIT_MAC => |
tx_count_mode <= RST; |
if mac_tx_granted = '1' then |
next_tx_state <= SEND; |
set_tx_state <= '1'; |
end if; |
-- TODO - should handle timeout here |
|
when SEND => |
if data_out_ready = '1' then |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"00" => |
data_out_first <= data_out_ready; |
data_out <= x"ff"; -- dst = broadcast |
|
when x"01" => data_out <= x"ff"; |
when x"02" => data_out <= x"ff"; |
when x"03" => data_out <= x"ff"; |
when x"04" => data_out <= x"ff"; |
when x"05" => data_out <= x"ff"; |
when x"06" => data_out <= our_mac_address (47 downto 40); -- src = our mac |
when x"07" => data_out <= our_mac_address (39 downto 32); |
when x"08" => data_out <= our_mac_address (31 downto 24); |
when x"09" => data_out <= our_mac_address (23 downto 16); |
when x"0a" => data_out <= our_mac_address (15 downto 8); |
when x"0b" => data_out <= our_mac_address (7 downto 0); |
when x"0c" => data_out <= x"08"; -- pkt type = 0806 : ARP |
when x"0d" => data_out <= x"06"; |
when x"0e" => data_out <= x"00"; -- HW type = 0001 : eth |
when x"0f" => data_out <= x"01"; |
when x"10" => data_out <= x"08"; -- protocol = 0800 : ip |
when x"11" => data_out <= x"00"; |
when x"12" => data_out <= x"06"; -- HW size = 06 |
when x"13" => data_out <= x"04"; -- prot size = 04 |
|
when x"14" => data_out <= x"00"; -- opcode = |
when x"15" => |
if tx_mode = REPLY then |
data_out <= x"02"; -- 02 : REPLY |
else |
data_out <= x"01"; -- 01 : REQ |
end if; |
|
when x"16" => data_out <= our_mac_address (47 downto 40); -- sender mac |
when x"17" => data_out <= our_mac_address (39 downto 32); |
when x"18" => data_out <= our_mac_address (31 downto 24); |
when x"19" => data_out <= our_mac_address (23 downto 16); |
when x"1a" => data_out <= our_mac_address (15 downto 8); |
when x"1b" => data_out <= our_mac_address (7 downto 0); |
when x"1c" => data_out <= our_ip_address (31 downto 24); -- sender ip |
when x"1d" => data_out <= our_ip_address (23 downto 16); |
when x"1e" => data_out <= our_ip_address (15 downto 8); |
when x"1f" => data_out <= our_ip_address (7 downto 0); |
when x"20" => data_out <= target.mac (47 downto 40); -- target mac |
when x"21" => data_out <= target.mac (39 downto 32); |
when x"22" => data_out <= target.mac (31 downto 24); |
when x"23" => data_out <= target.mac (23 downto 16); |
when x"24" => data_out <= target.mac (15 downto 8); |
when x"25" => data_out <= target.mac (7 downto 0); |
when x"26" => data_out <= target.ip (31 downto 24); -- target ip |
when x"27" => data_out <= target.ip (23 downto 16); |
when x"28" => data_out <= target.ip (15 downto 8); |
|
when x"29" => |
data_out <= target.ip(7 downto 0); |
data_out_last <= '1'; |
|
when x"2a" => |
kill_data_out_valid <= '1'; -- data is no longer valid |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
|
-- busses |
signal next_tx_state : tx_state_t; |
signal tx_mode_val : tx_mode_t; |
signal target_val : arp_entry_t; |
when others => |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end case; |
end process; |
|
-- tx control signals |
signal set_tx_state : std_logic; |
signal tx_count_mode : count_mode_t; |
signal set_chn_reqd : set_clr_t; |
signal kill_data_out_valid : std_logic; |
signal set_send_I_have : set_clr_t; |
signal set_send_who_has : set_clr_t; |
signal set_tx_mode : std_logic; |
signal set_target : std_logic; |
|
begin |
tx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
tx_state <= IDLE; |
tx_count <= (others => '0'); |
tx_mac_chn_reqd <= '0'; |
send_I_have_reg <= '0'; |
send_who_has_reg <= '0'; |
who_has_target <= (others => '0'); |
I_have_target.ip <= (others => '0'); |
I_have_target.mac <= (others => '0'); |
target.ip <= (others => '0'); |
target.mac <= (others => '0'); |
|
else |
-- normal (non reset) processing |
|
-- Next tx_state processing |
if set_tx_state = '1' then |
tx_state <= next_tx_state; |
else |
tx_state <= tx_state; |
end if; |
|
-- input request latching |
case set_send_I_have is |
when SET => |
send_I_have_reg <= '1'; |
I_have_target <= arp_entry; |
when CLR => |
send_I_have_reg <= '0'; |
I_have_target <= I_have_target; |
when HOLD => |
send_I_have_reg <= send_I_have_reg; |
I_have_target <= I_have_target; |
end case; |
|
case set_send_who_has is |
when SET => |
send_who_has_reg <= '1'; |
who_has_target <= ip_entry; |
when CLR => |
send_who_has_reg <= '0'; |
who_has_target <= who_has_target; |
when HOLD => |
send_who_has_reg <= send_who_has_reg; |
who_has_target <= who_has_target; |
end case; |
|
-- tx mode |
if set_tx_mode = '1' then |
tx_mode <= tx_mode_val; |
else |
tx_mode <= tx_mode; |
end if; |
|
-- target latching |
if set_target = '1' then |
target <= target_val; |
else |
target <= target; |
end if; |
|
-- tx_count processing |
case tx_count_mode is |
when RST => |
tx_count <= x"00"; |
when INCR => |
tx_count <= tx_count + 1; |
when HOLD => |
tx_count <= tx_count; |
end case; |
|
-- control access request to mac tx chn |
case set_chn_reqd is |
when SET => tx_mac_chn_reqd <= '1'; |
when CLR => tx_mac_chn_reqd <= '0'; |
when HOLD => tx_mac_chn_reqd <= tx_mac_chn_reqd; |
end case; |
|
end if; |
end if; |
end process; |
|
tx_combinatorial : process ( |
-- input signals |
send_I_have, send_who_has, arp_entry, ip_entry, data_out_ready, mac_tx_granted, |
our_mac_address, our_ip_address, reset, |
-- state variables |
tx_state, tx_count, tx_mac_chn_reqd, I_have_target, who_has_target, |
send_I_have_reg, send_who_has_reg, tx_mode, target, |
-- busses |
next_tx_state, tx_mode_val, target_val, |
-- control signals |
tx_count_mode, kill_data_out_valid, set_send_I_have, set_send_who_has, |
set_chn_reqd, set_tx_mode, set_target |
) |
begin |
-- set output followers |
mac_tx_req <= tx_mac_chn_reqd; |
|
-- set combinatorial output defaults |
data_out_first <= '0'; |
|
case tx_state is |
when SEND => |
if data_out_ready = '1' and kill_data_out_valid = '0' then |
data_out_valid <= '1'; |
else |
data_out_valid <= '0'; |
end if; |
when others => data_out_valid <= '0'; |
end case; |
|
-- set bus defaults |
next_tx_state <= IDLE; |
tx_mode_val <= REPLY; |
target_val.ip <= (others => '0'); |
target_val.mac <= (others => '1'); |
|
-- set signal defaults |
set_tx_state <= '0'; |
tx_count_mode <= HOLD; |
data_out <= x"00"; |
data_out_last <= '0'; |
set_chn_reqd <= HOLD; |
kill_data_out_valid <= '0'; |
set_send_I_have <= HOLD; |
set_send_who_has <= HOLD; |
set_tx_mode <= '0'; |
set_target <= '0'; |
|
-- process requests in regardless of FSM state |
if send_I_have = '1' then |
set_send_I_have <= SET; |
end if; |
if send_who_has = '1' then |
set_send_who_has <= SET; |
end if; |
|
-- TX FSM |
case tx_state is |
when IDLE => |
tx_count_mode <= RST; |
if send_I_have_reg = '1' then |
set_chn_reqd <= SET; |
tx_mode_val <= REPLY; |
set_tx_mode <= '1'; |
target_val <= I_have_target; |
set_target <= '1'; |
set_send_I_have <= CLR; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
elsif send_who_has_reg = '1' then |
set_chn_reqd <= SET; |
tx_mode_val <= REQUEST; |
set_tx_mode <= '1'; |
target_val.ip <= who_has_target; |
target_val.mac <= (others => '1'); |
set_target <= '1'; |
set_send_who_has <= CLR; |
next_tx_state <= WAIT_MAC; |
set_tx_state <= '1'; |
else |
set_chn_reqd <= CLR; |
end if; |
|
when WAIT_MAC => |
tx_count_mode <= RST; |
if mac_tx_granted = '1' then |
next_tx_state <= SEND; |
set_tx_state <= '1'; |
end if; |
-- TODO - should handle timeout here |
|
when SEND => |
if data_out_ready = '1' then |
tx_count_mode <= INCR; |
end if; |
case tx_count is |
when x"00" => data_out_first <= data_out_ready; |
data_out <= target.mac (47 downto 40); -- target mac--data_out <= x"ff"; -- dst = broadcast |
when x"01" => data_out <= target.mac (39 downto 32); --data_out <= x"ff"; |
when x"02" => data_out <= target.mac (31 downto 24); --data_out <= x"ff"; |
when x"03" => data_out <= target.mac (23 downto 16); --data_out <= x"ff"; |
when x"04" => data_out <= target.mac (15 downto 8); --data_out <= x"ff"; |
when x"05" => data_out <= target.mac (7 downto 0); --data_out <= x"ff"; |
when x"06" => data_out <= our_mac_address (47 downto 40); -- src = our mac |
when x"07" => data_out <= our_mac_address (39 downto 32); |
when x"08" => data_out <= our_mac_address (31 downto 24); |
when x"09" => data_out <= our_mac_address (23 downto 16); |
when x"0a" => data_out <= our_mac_address (15 downto 8); |
when x"0b" => data_out <= our_mac_address (7 downto 0); |
when x"0c" => data_out <= x"08"; -- pkt type = 0806 : ARP |
when x"0d" => data_out <= x"06"; |
when x"0e" => data_out <= x"00"; -- HW type = 0001 : eth |
when x"0f" => data_out <= x"01"; |
when x"10" => data_out <= x"08"; -- protocol = 0800 : ip |
when x"11" => data_out <= x"00"; |
when x"12" => data_out <= x"06"; -- HW size = 06 |
when x"13" => data_out <= x"04"; -- prot size = 04 |
|
when x"14" => data_out <= x"00"; -- opcode = |
when x"15" => |
if tx_mode = REPLY then |
data_out <= x"02"; -- 02 : REPLY |
else |
data_out <= x"01"; -- 01 : REQ |
end if; |
|
when x"16" => data_out <= our_mac_address (47 downto 40); -- sender mac |
when x"17" => data_out <= our_mac_address (39 downto 32); |
when x"18" => data_out <= our_mac_address (31 downto 24); |
when x"19" => data_out <= our_mac_address (23 downto 16); |
when x"1a" => data_out <= our_mac_address (15 downto 8); |
when x"1b" => data_out <= our_mac_address (7 downto 0); |
when x"1c" => data_out <= our_ip_address (31 downto 24); -- sender ip |
when x"1d" => data_out <= our_ip_address (23 downto 16); |
when x"1e" => data_out <= our_ip_address (15 downto 8); |
when x"1f" => data_out <= our_ip_address (7 downto 0); |
when x"20" => data_out <= target.mac (47 downto 40); -- target mac |
when x"21" => data_out <= target.mac (39 downto 32); |
when x"22" => data_out <= target.mac (31 downto 24); |
when x"23" => data_out <= target.mac (23 downto 16); |
when x"24" => data_out <= target.mac (15 downto 8); |
when x"25" => data_out <= target.mac (7 downto 0); |
when x"26" => data_out <= target.ip (31 downto 24); -- target ip |
when x"27" => data_out <= target.ip (23 downto 16); |
when x"28" => data_out <= target.ip (15 downto 8); |
|
when x"29" => |
data_out <= target.ip(7 downto 0); |
data_out_last <= '1'; |
|
when x"2a" => |
kill_data_out_valid <= '1'; -- data is no longer valid |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
|
when others => |
next_tx_state <= IDLE; |
set_tx_state <= '1'; |
end case; |
end case; |
end process; |
|
tx_sequential : process (tx_clk) |
begin |
if rising_edge(tx_clk) then |
if reset = '1' then |
-- reset state variables |
tx_state <= IDLE; |
tx_count <= (others => '0'); |
tx_mac_chn_reqd <= '0'; |
send_I_have_reg <= '0'; |
send_who_has_reg <= '0'; |
who_has_target <= (others => '0'); |
I_have_target.ip <= (others => '0'); |
I_have_target.mac <= (others => '0'); |
target.ip <= (others => '0'); |
target.mac <= (others => '1'); |
|
else |
-- normal (non reset) processing |
|
-- Next tx_state processing |
if set_tx_state = '1' then |
tx_state <= next_tx_state; |
else |
tx_state <= tx_state; |
end if; |
|
-- input request latching |
case set_send_I_have is |
when SET => |
send_I_have_reg <= '1'; |
I_have_target <= arp_entry; |
when CLR => |
send_I_have_reg <= '0'; |
I_have_target <= I_have_target; |
when HOLD => |
send_I_have_reg <= send_I_have_reg; |
I_have_target <= I_have_target; |
end case; |
|
case set_send_who_has is |
when SET => |
send_who_has_reg <= '1'; |
who_has_target <= ip_entry; |
when CLR => |
send_who_has_reg <= '0'; |
who_has_target <= who_has_target; |
when HOLD => |
send_who_has_reg <= send_who_has_reg; |
who_has_target <= who_has_target; |
end case; |
|
-- tx mode |
if set_tx_mode = '1' then |
tx_mode <= tx_mode_val; |
else |
tx_mode <= tx_mode; |
end if; |
|
-- target latching |
if set_target = '1' then |
target <= target_val; |
else |
target <= target; |
end if; |
|
-- tx_count processing |
case tx_count_mode is |
when RST => |
tx_count <= x"00"; |
when INCR => |
tx_count <= tx_count + 1; |
when HOLD => |
tx_count <= tx_count; |
end case; |
|
-- control access request to mac tx chn |
case set_chn_reqd is |
when SET => tx_mac_chn_reqd <= '1'; |
when CLR => tx_mac_chn_reqd <= '0'; |
when HOLD => tx_mac_chn_reqd <= tx_mac_chn_reqd; |
end case; |
|
end if; |
end if; |
end process; |
|
|
end Behavioral; |
|
/IPv4_RX.vhd
1,533 → 1,507
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 16:20:42 06/01/2011 |
-- Design Name: |
-- Module Name: IPv4_RX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple IP RX |
-- doesnt handle reassembly |
-- checks and filters for IP protocol |
-- checks and filters for IP addr |
-- Handle IPv4 protocol |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - Improved error handling |
-- Revision 0.03 - Added handling of broadcast address |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 16:20:42 06/01/2011 |
-- Design Name: |
-- Module Name: IPv4_RX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple IP RX |
-- doesnt handle reassembly |
-- checks and filters for IP protocol |
-- checks and filters for IP addr |
-- Handle IPv4 protocol |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - Improved error handling |
-- Revision 0.03 - Added handling of broadcast address |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.axi.all; |
use work.ipv4_types.all; |
use work.arp_types.all; |
|
entity IPv4_RX is |
Port ( |
-- IP Layer signals |
ip_rx : out ipv4_rx_type; |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
-- system signals |
clk : in STD_LOGIC; -- same clock used to clock mac data and ip data |
reset : in STD_LOGIC; |
our_ip_address : in STD_LOGIC_VECTOR (31 downto 0); |
rx_pkt_count : out STD_LOGIC_VECTOR(7 downto 0); -- number of IP pkts received for us |
-- MAC layer RX signals |
mac_data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
mac_data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock |
mac_data_in_last : in STD_LOGIC -- indicates last data in frame |
); |
end IPv4_RX; |
|
architecture Behavioral of IPv4_RX is |
|
type rx_state_type is (IDLE, ETH_HDR, IP_HDR, USER_DATA, WAIT_END, ERR); |
|
type rx_event_type is (NO_EVENT,DATA); |
type count_mode_type is (RST, INCR, HOLD); |
type settable_count_mode_type is (RST, INCR, SET_VAL, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
entity IPv4_RX is |
port ( |
-- IP Layer signals |
ip_rx : out ipv4_rx_type; |
ip_rx_start : out std_logic; -- indicates receipt of ip frame. |
-- system signals |
clk : in std_logic; -- same clock used to clock mac data and ip data |
reset : in std_logic; |
our_ip_address : in std_logic_vector (31 downto 0); |
rx_pkt_count : out std_logic_vector(7 downto 0); -- number of IP pkts received for us |
-- MAC layer RX signals |
mac_data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame) |
mac_data_in_valid : in std_logic; -- indicates data_in valid on clock |
mac_data_in_last : in std_logic -- indicates last data in frame |
); |
end IPv4_RX; |
|
architecture Behavioral of IPv4_RX is |
|
type rx_state_type is (IDLE, ETH_HDR, IP_HDR, USER_DATA, WAIT_END, ERR); |
|
type rx_event_type is (NO_EVENT, DATA); |
type count_mode_type is (RST, INCR, HOLD); |
type settable_count_mode_type is (RST, INCR, SET_VAL, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
|
-- state variables |
signal rx_state : rx_state_type; |
signal rx_count : unsigned (15 downto 0); |
signal src_ip : std_logic_vector (31 downto 0); -- src IP captured from input |
signal dst_ip : std_logic_vector (23 downto 0); -- 1st 3 bytes of dst IP captured from input |
signal is_broadcast_reg : std_logic; |
signal protocol : std_logic_vector (7 downto 0); -- src protocol captured from input |
signal data_len : std_logic_vector (15 downto 0); -- src data length captured from input |
signal ip_rx_start_reg : std_logic; -- indicates start of user data |
signal hdr_valid_reg : std_logic; -- indicates that hdr data is valid |
signal frame_err_cnt : unsigned (7 downto 0); -- number of frame errors |
signal error_code_reg : std_logic_vector (3 downto 0); |
signal rx_pkt_counter : unsigned (7 downto 0); -- number of rx frames received for us |
|
-- rx control signals |
signal next_rx_state : rx_state_type; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_type; |
signal rx_count_mode : settable_count_mode_type; |
signal set_dst_ip3 : std_logic; |
signal set_dst_ip2 : std_logic; |
signal set_dst_ip1 : std_logic; |
signal set_ip3 : std_logic; |
signal set_ip2 : std_logic; |
signal set_ip1 : std_logic; |
signal set_ip0 : std_logic; |
signal set_protocol : std_logic; |
signal set_len_H : std_logic; |
signal set_len_L : std_logic; |
signal set_ip_rx_start : set_clr_type; |
signal set_hdr_valid : set_clr_type; |
signal set_frame_err_cnt : count_mode_type; |
signal dataval : std_logic_vector (7 downto 0); |
signal rx_count_val : unsigned (15 downto 0); |
signal set_error_code : std_logic; |
signal error_code_val : std_logic_vector (3 downto 0); |
signal set_pkt_cnt : count_mode_type; |
signal set_data_last : std_logic; |
signal dst_ip_rx : std_logic_vector (31 downto 0); |
signal set_is_broadcast : set_clr_type; |
|
|
|
-- state variables |
signal rx_state : rx_state_type; |
signal rx_count : unsigned (15 downto 0); |
signal src_ip : std_logic_vector (31 downto 0); -- src IP captured from input |
signal dst_ip : std_logic_vector (23 downto 0); -- 1st 3 bytes of dst IP captured from input |
signal is_broadcast_reg : std_logic; |
signal protocol : std_logic_vector (7 downto 0); -- src protocol captured from input |
signal data_len : std_logic_vector (15 downto 0); -- src data length captured from input |
signal ip_rx_start_reg : std_logic; -- indicates start of user data |
signal hdr_valid_reg : std_logic; -- indicates that hdr data is valid |
signal frame_err_cnt : unsigned (7 downto 0); -- number of frame errors |
signal error_code_reg : std_logic_vector (3 downto 0); |
signal rx_pkt_counter : unsigned (7 downto 0); -- number of rx frames received for us |
|
-- rx control signals |
signal next_rx_state : rx_state_type; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_type; |
signal rx_count_mode : settable_count_mode_type; |
signal set_dst_ip3 : std_logic; |
signal set_dst_ip2 : std_logic; |
signal set_dst_ip1 : std_logic; |
signal set_ip3 : std_logic; |
signal set_ip2 : std_logic; |
signal set_ip1 : std_logic; |
signal set_ip0 : std_logic; |
signal set_protocol : std_logic; |
signal set_len_H : std_logic; |
signal set_len_L : std_logic; |
signal set_ip_rx_start : set_clr_type; |
signal set_hdr_valid : set_clr_type; |
signal set_frame_err_cnt: count_mode_type; |
signal dataval : std_logic_vector (7 downto 0); |
signal rx_count_val : unsigned (15 downto 0); |
signal set_error_code : std_logic; |
signal error_code_val : std_logic_vector (3 downto 0); |
signal set_pkt_cnt : count_mode_type; |
signal set_data_last : std_logic; |
signal dst_ip_rx : std_logic_vector (31 downto 0); |
signal set_is_broadcast : set_clr_type; |
|
|
-- IP datagram header format |
-- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | Version | *Header | Service Type | Total Length including header | |
-- | (4) | Length | (ignored) | (in bytes) | |
-- -------------------------------------------------------------------------------------------- |
-- | Identification | Flags | Fragment Offset | |
-- | | | (in 32 bit words) | |
-- -------------------------------------------------------------------------------------------- |
-- | Time To Live | Protocol | Header Checksum | |
-- | (ignored) | | | |
-- -------------------------------------------------------------------------------------------- |
-- | Source IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Destination IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Options (if any - ignored) | Padding | |
-- | | (if needed) | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | Version | *Header | Service Type | Total Length including header | |
-- | (4) | Length | (ignored) | (in bytes) | |
-- -------------------------------------------------------------------------------------------- |
-- | Identification | Flags | Fragment Offset | |
-- | | | (in 32 bit words) | |
-- -------------------------------------------------------------------------------------------- |
-- | Time To Live | Protocol | Header Checksum | |
-- | (ignored) | | | |
-- -------------------------------------------------------------------------------------------- |
-- | Source IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Destination IP Address | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | Options (if any - ignored) | Padding | |
-- | | (if needed) | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- |
-- * - in 32 bit words |
|
begin |
|
begin |
|
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
|
rx_combinatorial : process ( |
-- input signals |
mac_data_in, mac_data_in_valid, mac_data_in_last, our_ip_address, |
-- state variables |
rx_state, rx_count, src_ip, dst_ip, protocol, data_len, ip_rx_start_reg, hdr_valid_reg, |
frame_err_cnt, error_code_reg, rx_pkt_counter, is_broadcast_reg, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, |
set_ip3, set_ip2, set_ip1, set_ip0, set_protocol, set_len_H, set_len_L, |
set_dst_ip3, set_dst_ip2, set_dst_ip1, |
set_ip_rx_start, set_hdr_valid, set_frame_err_cnt, dataval, rx_count_val, |
set_error_code, error_code_val, set_pkt_cnt, set_data_last, dst_ip_rx, set_is_broadcast |
) |
begin |
-- set output followers |
ip_rx_start <= ip_rx_start_reg; |
ip_rx.hdr.is_valid <= hdr_valid_reg; |
ip_rx.hdr.protocol <= protocol; |
ip_rx.hdr.data_length <= data_len; |
ip_rx.hdr.src_ip_addr <= src_ip; |
ip_rx.hdr.num_frame_errors <= std_logic_vector(frame_err_cnt); |
ip_rx.hdr.last_error_code <= error_code_reg; |
ip_rx.hdr.is_broadcast <= is_broadcast_reg; |
rx_pkt_count <= STD_LOGIC_VECTOR(rx_pkt_counter); |
|
-- transfer data upstream if in user data phase |
if rx_state = USER_DATA then |
ip_rx.data.data_in <= mac_data_in; |
ip_rx.data.data_in_valid <= mac_data_in_valid; |
ip_rx.data.data_in_last <= set_data_last; |
else |
ip_rx.data.data_in <= (others => '0'); |
ip_rx.data.data_in_valid <= '0'; |
ip_rx.data.data_in_last <= '0'; |
end if; |
|
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_ip3 <= '0'; |
set_ip2 <= '0'; |
set_ip1 <= '0'; |
set_ip0 <= '0'; |
set_dst_ip3 <= '0'; |
set_dst_ip2 <= '0'; |
set_dst_ip1 <= '0'; |
set_protocol <= '0'; |
set_len_H <= '0'; |
set_len_L <= '0'; |
set_ip_rx_start <= HOLD; |
set_hdr_valid <= HOLD; |
set_frame_err_cnt <= HOLD; |
rx_count_val <= x"0000"; |
set_error_code <= '0'; |
error_code_val <= RX_EC_NONE; |
set_pkt_cnt <= HOLD; |
dataval <= (others => '0'); |
set_data_last <= '0'; |
dst_ip_rx <= (others => '0'); |
set_is_broadcast <= HOLD; |
|
-- determine event (if any) |
if mac_data_in_valid = '1' then |
rx_event <= DATA; |
dataval <= mac_data_in; |
end if; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
rx_count_mode <= INCR; |
set_hdr_valid <= CLR; |
next_rx_state <= ETH_HDR; |
set_rx_state <= '1'; |
end case; |
|
rx_combinatorial : process ( |
-- input signals |
mac_data_in, mac_data_in_valid, mac_data_in_last, our_ip_address, |
-- state variables |
rx_state, rx_count, src_ip, dst_ip, protocol, data_len, ip_rx_start_reg, hdr_valid_reg, |
frame_err_cnt, error_code_reg, rx_pkt_counter, is_broadcast_reg, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, |
set_ip3, set_ip2, set_ip1, set_ip0, set_protocol, set_len_H, set_len_L, |
set_dst_ip3, set_dst_ip2, set_dst_ip1, |
set_ip_rx_start, set_hdr_valid, set_frame_err_cnt, dataval, rx_count_val, |
set_error_code, error_code_val, set_pkt_cnt, set_data_last, dst_ip_rx, set_is_broadcast |
) |
begin |
-- set output followers |
ip_rx_start <= ip_rx_start_reg; |
ip_rx.hdr.is_valid <= hdr_valid_reg; |
ip_rx.hdr.protocol <= protocol; |
ip_rx.hdr.data_length <= data_len; |
ip_rx.hdr.src_ip_addr <= src_ip; |
ip_rx.hdr.num_frame_errors <= std_logic_vector(frame_err_cnt); |
ip_rx.hdr.last_error_code <= error_code_reg; |
ip_rx.hdr.is_broadcast <= is_broadcast_reg; |
rx_pkt_count <= std_logic_vector(rx_pkt_counter); |
when ETH_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"000d" then |
rx_count_mode <= RST; |
next_rx_state <= IP_HDR; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_ETH; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"000c" => |
if mac_data_in /= x"08" then -- ignore pkts that are not type=IP |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"000d" => |
if mac_data_in /= x"00" then -- ignore pkts that are not type=IP |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when others => -- ignore other bytes in eth header |
end case; |
end if; |
end case; |
|
when IP_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"0013" then |
rx_count_val <= x"0001"; -- start counter at 1 |
rx_count_mode <= SET_VAL; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_IP; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"0000" => |
if mac_data_in /= x"45" then -- ignore pkts that are not v4 with 5 header words |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0002" => set_len_H <= '1'; |
when x"0003" => set_len_L <= '1'; |
|
when x"0006" => |
if (mac_data_in(7) = '1') or (mac_data_in (4 downto 0) /= "00000") then |
-- ignore pkts that require reassembly (MF=1 or frag offst /= 0) |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0007" => |
if mac_data_in /= x"00" then -- ignore pkts that require reassembly (frag offst /= 0) |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0009" => set_protocol <= '1'; |
|
when x"000c" => set_ip3 <= '1'; |
when x"000d" => set_ip2 <= '1'; |
when x"000e" => set_ip1 <= '1'; |
when x"000f" => set_ip0 <= '1'; |
|
when x"0010" => set_dst_ip3 <= '1'; |
when x"0011" => set_dst_ip2 <= '1'; |
when x"0012" => set_dst_ip1 <= '1'; |
|
when x"0013" => |
-- now have the dst IP addr |
dst_ip_rx <= dst_ip & mac_data_in; |
if dst_ip_rx = IP_BC_ADDR then |
set_is_broadcast <= SET; |
else |
set_is_broadcast <= CLR; |
end if; |
set_hdr_valid <= SET; -- header values are now valid, although the pkt may not be for us |
|
if dst_ip_rx = our_ip_address or dst_ip_rx = IP_BC_ADDR then |
next_rx_state <= USER_DATA; |
set_pkt_cnt <= INCR; -- count another pkt received |
set_rx_state <= '1'; |
set_ip_rx_start <= SET; |
else |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when others => -- ignore other bytes in ip header |
end case; |
end if; |
end case; |
|
when USER_DATA => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
-- note: data gets transfered upstream as part of "output followers" processing |
if rx_count = unsigned(data_len) then |
set_ip_rx_start <= CLR; |
rx_count_mode <= RST; |
set_data_last <= '1'; |
if mac_data_in_last = '1' then |
next_rx_state <= IDLE; |
set_ip_rx_start <= CLR; |
else |
next_rx_state <= WAIT_END; |
end if; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
-- check for early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_USER; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end if; |
end case; |
|
-- transfer data upstream if in user data phase |
if rx_state = USER_DATA then |
ip_rx.data.data_in <= mac_data_in; |
ip_rx.data.data_in_valid <= mac_data_in_valid; |
ip_rx.data.data_in_last <= set_data_last; |
else |
ip_rx.data.data_in <= (others => '0'); |
ip_rx.data.data_in_valid <= '0'; |
ip_rx.data.data_in_last <= '0'; |
end if; |
when ERR => |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
if mac_data_in_last = '0' then |
set_data_last <= '1'; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
else |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
|
|
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_ip3 <= '0'; |
set_ip2 <= '0'; |
set_ip1 <= '0'; |
set_ip0 <= '0'; |
set_dst_ip3 <= '0'; |
set_dst_ip2 <= '0'; |
set_dst_ip1 <= '0'; |
set_protocol <= '0'; |
set_len_H <= '0'; |
set_len_L <= '0'; |
set_ip_rx_start <= HOLD; |
set_hdr_valid <= HOLD; |
set_frame_err_cnt <= HOLD; |
rx_count_val <= x"0000"; |
set_error_code <= '0'; |
error_code_val <= RX_EC_NONE; |
set_pkt_cnt <= HOLD; |
dataval <= (others => '0'); |
set_data_last <= '0'; |
dst_ip_rx <= (others => '0'); |
set_is_broadcast <= HOLD; |
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if mac_data_in_last = '1' then |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
set_ip_rx_start <= CLR; |
end if; |
end case; |
|
end case; |
|
end process; |
|
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
-- determine event (if any) |
if mac_data_in_valid = '1' then |
rx_event <= DATA; |
dataval <= mac_data_in; |
end if; |
rx_sequential : process (clk,reset) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"0000"; |
src_ip <= (others => '0'); |
dst_ip <= (others => '0'); |
protocol <= (others => '0'); |
data_len <= (others => '0'); |
ip_rx_start_reg <= '0'; |
hdr_valid_reg <= '0'; |
is_broadcast_reg <= '0'; |
frame_err_cnt <= (others => '0'); |
error_code_reg <= RX_EC_NONE; |
rx_pkt_counter <= x"00"; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
rx_count_mode <= INCR; |
set_hdr_valid <= CLR; |
next_rx_state <= ETH_HDR; |
set_rx_state <= '1'; |
end case; |
|
when ETH_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"000d" then |
rx_count_mode <= RST; |
next_rx_state <= IP_HDR; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_ETH; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"000c" => |
if mac_data_in /= x"08" then -- ignore pkts that are not type=IP |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"000d" => |
if mac_data_in /= x"00" then -- ignore pkts that are not type=IP |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when others => -- ignore other bytes in eth header |
end case; |
end if; |
end case; |
|
when IP_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"0013" then |
rx_count_val <= x"0001"; -- start counter at 1 |
rx_count_mode <= SET_VAL; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_IP; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"0000" => |
if mac_data_in /= x"45" then -- ignore pkts that are not v4 with 5 header words |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0002" => set_len_H <= '1'; |
when x"0003" => set_len_L <= '1'; |
|
when x"0006" => |
if (mac_data_in(7) = '1') or (mac_data_in (4 downto 0) /= "00000") then |
-- ignore pkts that require reassembly (MF=1 or frag offst /= 0) |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0007" => |
if mac_data_in /= x"00" then -- ignore pkts that require reassembly (frag offst /= 0) |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0009" => set_protocol <= '1'; |
|
when x"000c" => set_ip3 <= '1'; |
when x"000d" => set_ip2 <= '1'; |
when x"000e" => set_ip1 <= '1'; |
when x"000f" => set_ip0 <= '1'; |
|
when x"0010" => set_dst_ip3 <= '1'; |
if ((mac_data_in /= our_ip_address(31 downto 24)) and |
(mac_data_in /= IP_BC_ADDR(31 downto 24)))then -- ignore pkts that are not addressed to us |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
when x"0011" => set_dst_ip2 <= '1'; |
if ((mac_data_in /= our_ip_address(23 downto 16)) and |
(mac_data_in /= IP_BC_ADDR(23 downto 16)))then -- ignore pkts that are not addressed to us |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
when x"0012" => set_dst_ip1 <= '1'; |
if ((mac_data_in /= our_ip_address(15 downto 8)) and |
(mac_data_in /= IP_BC_ADDR(15 downto 8)))then -- ignore pkts that are not addressed to us |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
|
when x"0013" => |
if ((mac_data_in /= our_ip_address(7 downto 0)) and |
(mac_data_in /= IP_BC_ADDR(7 downto 0)))then -- ignore pkts that are not addressed to us |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
else |
next_rx_state <= USER_DATA; |
set_pkt_cnt <= INCR; -- count another pkt |
set_rx_state <= '1'; |
set_ip_rx_start <= SET; |
end if; |
|
-- now have the dst IP addr |
dst_ip_rx <= dst_ip & mac_data_in; |
if dst_ip_rx = IP_BC_ADDR then |
set_is_broadcast <= SET; |
else |
set_is_broadcast <= CLR; |
end if; |
set_hdr_valid <= SET; -- header values are now valid, although the pkt may not be for us |
|
--if dst_ip_rx = our_ip_address or dst_ip_rx = IP_BC_ADDR then |
-- next_rx_state <= USER_DATA; |
-- set_pkt_cnt <= INCR; -- count another pkt received |
-- set_rx_state <= '1'; |
-- set_ip_rx_start <= SET; |
--else |
-- next_rx_state <= WAIT_END; |
-- set_rx_state <= '1'; |
--end if; |
|
when others => -- ignore other bytes in ip header |
end case; |
end if; |
end case; |
|
when USER_DATA => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
-- note: data gets transfered upstream as part of "output followers" processing |
if rx_count = unsigned(data_len) then |
set_ip_rx_start <= CLR; |
rx_count_mode <= RST; |
set_data_last <= '1'; |
if mac_data_in_last = '1' then |
next_rx_state <= IDLE; |
set_ip_rx_start <= CLR; |
else |
next_rx_state <= WAIT_END; |
end if; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
-- check for early frame termination |
if mac_data_in_last = '1' then |
error_code_val <= RX_EC_ET_USER; |
set_error_code <= '1'; |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end if; |
end case; |
|
when ERR => |
set_frame_err_cnt <= INCR; |
set_ip_rx_start <= CLR; |
if mac_data_in_last = '0' then |
set_data_last <= '1'; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
else |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
|
|
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if mac_data_in_last = '1' then |
set_data_last <= '1'; |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
set_ip_rx_start <= CLR; |
end if; |
end case; |
|
end case; |
|
end process; |
|
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
rx_sequential : process (clk)--, reset) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"0000"; |
src_ip <= (others => '0'); |
dst_ip <= (others => '0'); |
protocol <= (others => '0'); |
data_len <= (others => '0'); |
ip_rx_start_reg <= '0'; |
hdr_valid_reg <= '0'; |
is_broadcast_reg <= '0'; |
frame_err_cnt <= (others => '0'); |
error_code_reg <= RX_EC_NONE; |
rx_pkt_counter <= x"00"; |
|
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => rx_count <= x"0000"; |
when INCR => rx_count <= rx_count + 1; |
when SET_VAL => rx_count <= rx_count_val; |
when HOLD => rx_count <= rx_count; |
end case; |
|
-- frame error count processing |
case set_frame_err_cnt is |
when RST => frame_err_cnt <= x"00"; |
when INCR => frame_err_cnt <= frame_err_cnt + 1; |
when HOLD => frame_err_cnt <= frame_err_cnt; |
end case; |
|
-- ip pkt processing |
case set_pkt_cnt is |
when RST => rx_pkt_counter <= x"00"; |
when INCR => rx_pkt_counter <= rx_pkt_counter + 1; |
when HOLD => rx_pkt_counter <= rx_pkt_counter; |
end case; |
|
-- source ip capture |
if (set_ip3 = '1') then src_ip(31 downto 24) <= dataval; end if; |
if (set_ip2 = '1') then src_ip(23 downto 16) <= dataval; end if; |
if (set_ip1 = '1') then src_ip(15 downto 8) <= dataval; end if; |
if (set_ip0 = '1') then src_ip(7 downto 0) <= dataval; end if; |
|
-- dst ip capture |
if (set_dst_ip3 = '1') then dst_ip(23 downto 16) <= dataval; end if; |
if (set_dst_ip2 = '1') then dst_ip(15 downto 8) <= dataval; end if; |
if (set_dst_ip1 = '1') then dst_ip(7 downto 0) <= dataval; end if; |
|
if (set_protocol = '1') then |
protocol <= dataval; |
else |
protocol <= protocol; |
end if; |
|
if (set_len_H = '1') then |
data_len (15 downto 8) <= dataval; |
data_len (7 downto 0) <= x"00"; |
elsif (set_len_L = '1') then |
-- compute data length, taking into account that we need to subtract the header length |
data_len <= std_logic_vector(unsigned(data_len(15 downto 8) & dataval) - 20); |
else |
data_len <= data_len; |
end if; |
|
case set_ip_rx_start is |
when SET => ip_rx_start_reg <= '1'; |
when CLR => ip_rx_start_reg <= '0'; |
when HOLD => ip_rx_start_reg <= ip_rx_start_reg; |
end case; |
|
case set_is_broadcast is |
when SET => is_broadcast_reg <= '1'; |
when CLR => is_broadcast_reg <= '0'; |
when HOLD => is_broadcast_reg <= is_broadcast_reg; |
end case; |
|
case set_hdr_valid is |
when SET => hdr_valid_reg <= '1'; |
when CLR => hdr_valid_reg <= '0'; |
when HOLD => hdr_valid_reg <= hdr_valid_reg; |
end case; |
|
-- set error code |
if set_error_code = '1' then |
error_code_reg <= error_code_val; |
else |
error_code_reg <= error_code_reg; |
end if; |
end if; |
end if; |
end process; |
|
end Behavioral; |
|
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => rx_count <= x"0000"; |
when INCR => rx_count <= rx_count + 1; |
when SET_VAL => rx_count <= rx_count_val; |
when HOLD => rx_count <= rx_count; |
end case; |
|
-- frame error count processing |
case set_frame_err_cnt is |
when RST => frame_err_cnt <= x"00"; |
when INCR => frame_err_cnt <= frame_err_cnt + 1; |
when HOLD => frame_err_cnt <= frame_err_cnt; |
end case; |
|
-- ip pkt processing |
case set_pkt_cnt is |
when RST => rx_pkt_counter <= x"00"; |
when INCR => rx_pkt_counter <= rx_pkt_counter + 1; |
when HOLD => rx_pkt_counter <= rx_pkt_counter; |
end case; |
|
-- source ip capture |
if (set_ip3 = '1') then src_ip(31 downto 24) <= dataval; end if; |
if (set_ip2 = '1') then src_ip(23 downto 16) <= dataval; end if; |
if (set_ip1 = '1') then src_ip(15 downto 8) <= dataval; end if; |
if (set_ip0 = '1') then src_ip(7 downto 0) <= dataval; end if; |
|
-- dst ip capture |
if (set_dst_ip3 = '1') then dst_ip(23 downto 16) <= dataval; end if; |
if (set_dst_ip2 = '1') then dst_ip(15 downto 8) <= dataval; end if; |
if (set_dst_ip1 = '1') then dst_ip(7 downto 0) <= dataval; end if; |
|
if (set_protocol = '1') then |
protocol <= dataval; |
else |
protocol <= protocol; |
end if; |
|
if (set_len_H = '1') then |
data_len (15 downto 8) <= dataval; |
data_len (7 downto 0) <= x"00"; |
elsif (set_len_L = '1') then |
-- compute data length, taking into account that we need to subtract the header length |
data_len <= std_logic_vector(unsigned(data_len(15 downto 8) & dataval) - 20); |
else |
data_len <= data_len; |
end if; |
|
case set_ip_rx_start is |
when SET => ip_rx_start_reg <= '1'; |
when CLR => ip_rx_start_reg <= '0'; |
when HOLD => ip_rx_start_reg <= ip_rx_start_reg; |
end case; |
|
case set_is_broadcast is |
when SET => is_broadcast_reg <= '1'; |
when CLR => is_broadcast_reg <= '0'; |
when HOLD => is_broadcast_reg <= is_broadcast_reg; |
end case; |
|
case set_hdr_valid is |
when SET => hdr_valid_reg <= '1'; |
when CLR => hdr_valid_reg <= '0'; |
when HOLD => hdr_valid_reg <= hdr_valid_reg; |
end case; |
|
-- set error code |
if set_error_code = '1' then |
error_code_reg <= error_code_val; |
else |
error_code_reg <= error_code_reg; |
end if; |
end if; |
end if; |
end process; |
|
end Behavioral; |
|
/UDP_RX.vhd
1,343 → 1,343
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 5 June 2011 |
-- Design Name: |
-- Module Name: UDP_RX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple UDP RX |
-- doesnt check the checsum |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - Improved error handling |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.all; |
use IEEE.NUMERIC_STD.all; |
use work.axi.all; |
use work.ipv4_types.all; |
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: Peter Fall |
-- |
-- Create Date: 5 June 2011 |
-- Design Name: |
-- Module Name: UDP_RX - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- handle simple UDP RX |
-- doesnt check the checsum |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Revision 0.02 - Improved error handling |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.NUMERIC_STD.ALL; |
use work.axi.all; |
use work.ipv4_types.all; |
|
entity UDP_RX is |
Port ( |
-- UDP Layer signals |
udp_rx_start : out std_logic; -- indicates receipt of udp header |
udp_rxo : out udp_rx_type; |
-- system signals |
clk : in STD_LOGIC; |
reset : in STD_LOGIC; |
-- IP layer RX signals |
ip_rx_start : in std_logic; -- indicates receipt of ip header |
ip_rx : in ipv4_rx_type |
); |
end UDP_RX; |
|
architecture Behavioral of UDP_RX is |
|
type rx_state_type is (IDLE, UDP_HDR, USER_DATA, WAIT_END, ERR); |
|
type rx_event_type is (NO_EVENT,DATA); |
type count_mode_type is (RST, INCR, HOLD); |
type settable_count_mode_type is (RST, INCR, SET_VAL, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
entity UDP_RX is |
port ( |
-- UDP Layer signals |
udp_rx_start : out std_logic; -- indicates receipt of udp header |
udp_rxo : out udp_rx_type; |
-- system signals |
clk : in std_logic; |
reset : in std_logic; |
-- IP layer RX signals |
ip_rx_start : in std_logic; -- indicates receipt of ip header |
ip_rx : in ipv4_rx_type |
); |
end UDP_RX; |
|
architecture Behavioral of UDP_RX is |
|
type rx_state_type is (IDLE, UDP_HDR, USER_DATA, WAIT_END, ERR); |
|
type rx_event_type is (NO_EVENT, DATA); |
type count_mode_type is (RST, INCR, HOLD); |
type settable_count_mode_type is (RST, INCR, SET_VAL, HOLD); |
type set_clr_type is (SET, CLR, HOLD); |
|
|
-- state variables |
signal rx_state : rx_state_type; |
signal rx_count : unsigned (15 downto 0); |
signal src_port : std_logic_vector (15 downto 0); -- src port captured from input |
signal dst_port : std_logic_vector (15 downto 0); -- dst port captured from input |
signal data_len : std_logic_vector (15 downto 0); -- user data length captured from input |
signal udp_rx_start_reg : std_logic; -- indicates start of user data |
signal hdr_valid_reg : std_logic; -- indicates that hdr data is valid |
signal src_ip_addr : std_logic_vector (31 downto 0); -- captured from IP hdr |
|
-- rx control signals |
signal next_rx_state : rx_state_type; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_type; |
signal rx_count_mode : settable_count_mode_type; |
signal rx_count_val : unsigned (15 downto 0); |
signal set_sph : std_logic; |
signal set_spl : std_logic; |
signal set_dph : std_logic; |
signal set_dpl : std_logic; |
signal set_len_H : std_logic; |
signal set_len_L : std_logic; |
signal set_udp_rx_start : set_clr_type; |
signal set_hdr_valid : set_clr_type; |
signal dataval : std_logic_vector (7 downto 0); |
signal set_pkt_cnt : count_mode_type; |
signal set_src_ip : std_logic; |
signal set_data_last : std_logic; |
|
|
-- state variables |
signal rx_state : rx_state_type; |
signal rx_count : unsigned (15 downto 0); |
signal src_port : std_logic_vector (15 downto 0); -- src port captured from input |
signal dst_port : std_logic_vector (15 downto 0); -- dst port captured from input |
signal data_len : std_logic_vector (15 downto 0); -- user data length captured from input |
signal udp_rx_start_reg : std_logic; -- indicates start of user data |
signal hdr_valid_reg : std_logic; -- indicates that hdr data is valid |
signal src_ip_addr : std_logic_vector (31 downto 0); -- captured from IP hdr |
|
-- rx control signals |
signal next_rx_state : rx_state_type; |
signal set_rx_state : std_logic; |
signal rx_event : rx_event_type; |
signal rx_count_mode : settable_count_mode_type; |
signal rx_count_val : unsigned (15 downto 0); |
signal set_sph : std_logic; |
signal set_spl : std_logic; |
signal set_dph : std_logic; |
signal set_dpl : std_logic; |
signal set_len_H : std_logic; |
signal set_len_L : std_logic; |
signal set_udp_rx_start : set_clr_type; |
signal set_hdr_valid : set_clr_type; |
signal dataval : std_logic_vector (7 downto 0); |
signal set_pkt_cnt : count_mode_type; |
signal set_src_ip : std_logic; |
signal set_data_last : std_logic; |
|
-- IP datagram header format |
-- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | source port number | dest port number | |
-- | | | |
-- -------------------------------------------------------------------------------------------- |
-- | length (bytes) | checksum | |
-- | (header and data combined) | | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- 0 4 8 16 19 24 31 |
-- -------------------------------------------------------------------------------------------- |
-- | source port number | dest port number | |
-- | | | |
-- -------------------------------------------------------------------------------------------- |
-- | length (bytes) | checksum | |
-- | (header and data combined) | | |
-- -------------------------------------------------------------------------------------------- |
-- | Data | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
-- | .... | |
-- | | |
-- -------------------------------------------------------------------------------------------- |
|
|
begin |
|
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
|
rx_combinatorial : process ( |
-- input signals |
ip_rx, ip_rx_start, |
-- state variables |
rx_state, rx_count, src_port, dst_port, data_len, udp_rx_start_reg, hdr_valid_reg, src_ip_addr, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, rx_count_val, |
set_sph, set_spl, set_dph, set_dpl, set_len_H, set_len_L, set_data_last, |
set_udp_rx_start, set_hdr_valid, dataval, set_pkt_cnt, set_src_ip |
) |
begin |
-- set output followers |
udp_rx_start <= udp_rx_start_reg; |
udp_rxo.hdr.is_valid <= hdr_valid_reg; |
udp_rxo.hdr.data_length <= data_len; |
udp_rxo.hdr.src_port <= src_port; |
udp_rxo.hdr.dst_port <= dst_port; |
udp_rxo.hdr.src_ip_addr <= src_ip_addr; |
|
-- transfer data upstream if in user data phase |
if rx_state = USER_DATA then |
udp_rxo.data.data_in <= ip_rx.data.data_in; |
udp_rxo.data.data_in_valid <= ip_rx.data.data_in_valid; |
udp_rxo.data.data_in_last <= set_data_last; |
else |
udp_rxo.data.data_in <= (others => '0'); |
udp_rxo.data.data_in_valid <= '0'; |
udp_rxo.data.data_in_last <= '0'; |
end if; |
|
begin |
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_sph <= '0'; |
set_spl <= '0'; |
set_dph <= '0'; |
set_dpl <= '0'; |
set_len_H <= '0'; |
set_len_L <= '0'; |
set_udp_rx_start <= HOLD; |
set_hdr_valid <= HOLD; |
dataval <= (others => '0'); |
set_src_ip <= '0'; |
rx_count_val <= (others => '0'); |
set_data_last <= '0'; |
|
-- determine event (if any) |
if ip_rx.data.data_in_valid = '1' then |
rx_event <= DATA; |
dataval <= ip_rx.data.data_in; |
end if; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if ip_rx.hdr.protocol = x"11" then |
-- UDP protocol |
rx_count_mode <= INCR; |
set_hdr_valid <= CLR; |
set_src_ip <= '1'; |
set_sph <= '1'; |
next_rx_state <= UDP_HDR; |
set_rx_state <= '1'; |
else |
-- non-UDP protocol - ignore this pkt |
set_hdr_valid <= CLR; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
end case; |
|
----------------------------------------------------------------------- |
-- combinatorial process to implement FSM and determine control signals |
----------------------------------------------------------------------- |
when UDP_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"0007" then |
rx_count_mode <= SET_VAL; |
rx_count_val <= x"0001"; |
next_rx_state <= USER_DATA; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= ERR; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"0000" => set_sph <= '1'; |
when x"0001" => set_spl <= '1'; |
when x"0002" => set_dph <= '1'; |
when x"0003" => set_dpl <= '1'; |
|
when x"0004" => set_len_H <= '1'; |
when x"0005" => set_len_L <= '1'; set_hdr_valid <= SET; -- header values are now valid, although the pkt may not be for us |
|
when x"0006" => -- ignore checksum values |
when x"0007" => set_udp_rx_start <= SET; -- indicate frame received |
|
|
when others => -- ignore other bytes in udp header |
end case; |
end if; |
end case; |
|
when USER_DATA => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
-- note: data gets transfered upstream as part of "output followers" processing |
if rx_count = unsigned(data_len) then |
set_udp_rx_start <= CLR; |
rx_count_mode <= RST; |
set_data_last <= '1'; |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_udp_rx_start <= CLR; |
else |
next_rx_state <= WAIT_END; |
end if; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
-- check for early frame termination |
-- TODO need to mark frame as errored |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
set_data_last <= '1'; |
end if; |
end if; |
end case; |
|
rx_combinatorial : process ( |
-- input signals |
ip_rx, ip_rx_start, |
-- state variables |
rx_state, rx_count, src_port, dst_port, data_len, udp_rx_start_reg, hdr_valid_reg, src_ip_addr, |
-- control signals |
next_rx_state, set_rx_state, rx_event, rx_count_mode, rx_count_val, |
set_sph, set_spl, set_dph, set_dpl, set_len_H, set_len_L, set_data_last, |
set_udp_rx_start, set_hdr_valid, dataval, set_pkt_cnt, set_src_ip |
) |
begin |
-- set output followers |
udp_rx_start <= udp_rx_start_reg; |
udp_rxo.hdr.is_valid <= hdr_valid_reg; |
udp_rxo.hdr.data_length <= data_len; |
udp_rxo.hdr.src_port <= src_port; |
udp_rxo.hdr.dst_port <= dst_port; |
udp_rxo.hdr.src_ip_addr <= src_ip_addr; |
when ERR => |
if ip_rx.data.data_in_last = '0' then |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
else |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
|
|
-- transfer data upstream if in user data phase |
if rx_state = USER_DATA then |
udp_rxo.data.data_in <= ip_rx.data.data_in; |
udp_rxo.data.data_in_valid <= ip_rx.data.data_in_valid; |
udp_rxo.data.data_in_last <= set_data_last; |
else |
udp_rxo.data.data_in <= (others => '0'); |
udp_rxo.data.data_in_valid <= '0'; |
udp_rxo.data.data_in_last <= '0'; |
end if; |
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end case; |
|
end case; |
|
end process; |
|
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
-- set signal defaults |
next_rx_state <= IDLE; |
set_rx_state <= '0'; |
rx_event <= NO_EVENT; |
rx_count_mode <= HOLD; |
set_sph <= '0'; |
set_spl <= '0'; |
set_dph <= '0'; |
set_dpl <= '0'; |
set_len_H <= '0'; |
set_len_L <= '0'; |
set_udp_rx_start <= HOLD; |
set_hdr_valid <= HOLD; |
dataval <= (others => '0'); |
set_src_ip <= '0'; |
rx_count_val <= (others => '0'); |
set_data_last <= '0'; |
|
-- determine event (if any) |
if ip_rx.data.data_in_valid = '1' then |
rx_event <= DATA; |
dataval <= ip_rx.data.data_in; |
end if; |
|
-- RX FSM |
case rx_state is |
when IDLE => |
rx_count_mode <= RST; |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if ip_rx.hdr.protocol = x"11" then |
-- UDP protocol |
rx_count_mode <= INCR; |
set_hdr_valid <= CLR; |
set_src_ip <= '1'; |
set_sph <= '1'; |
next_rx_state <= UDP_HDR; |
set_rx_state <= '1'; |
else |
-- non-UDP protocol - ignore this pkt |
set_hdr_valid <= CLR; |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
end if; |
end case; |
|
when UDP_HDR => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if rx_count = x"0007" then |
rx_count_mode <= SET_VAL; |
rx_count_val <= x"0001"; |
next_rx_state <= USER_DATA; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
end if; |
-- handle early frame termination |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= ERR; |
set_rx_state <= '1'; |
else |
case rx_count is |
when x"0000" => set_sph <= '1'; |
when x"0001" => set_spl <= '1'; |
when x"0002" => set_dph <= '1'; |
when x"0003" => set_dpl <= '1'; |
|
when x"0004" => set_len_H <= '1'; |
when x"0005" => set_len_L <= '1'; set_hdr_valid <= SET; -- header values are now valid, although the pkt may not be for us |
|
when x"0006" => -- ignore checksum values |
when x"0007" => set_udp_rx_start <= SET; -- indicate frame received |
|
|
when others => -- ignore other bytes in udp header |
end case; |
end if; |
end case; |
|
when USER_DATA => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
-- note: data gets transfered upstream as part of "output followers" processing |
if rx_count = unsigned(data_len) then |
set_udp_rx_start <= CLR; |
rx_count_mode <= RST; |
set_data_last <= '1'; |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_udp_rx_start <= CLR; |
else |
next_rx_state <= WAIT_END; |
end if; |
set_rx_state <= '1'; |
else |
rx_count_mode <= INCR; |
-- check for early frame termination |
-- TODO need to mark frame as errored |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
set_data_last <= '1'; |
end if; |
end if; |
end case; |
|
when ERR => |
if ip_rx.data.data_in_last = '0' then |
next_rx_state <= WAIT_END; |
set_rx_state <= '1'; |
else |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
|
|
when WAIT_END => |
case rx_event is |
when NO_EVENT => -- (nothing to do) |
when DATA => |
if ip_rx.data.data_in_last = '1' then |
next_rx_state <= IDLE; |
set_rx_state <= '1'; |
end if; |
end case; |
|
end case; |
|
end process; |
|
|
----------------------------------------------------------------------------- |
-- sequential process to action control signals and change states and outputs |
----------------------------------------------------------------------------- |
|
rx_sequential : process (clk, reset) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"0000"; |
src_port <= (others => '0'); |
dst_port <= (others => '0'); |
data_len <= (others => '0'); |
udp_rx_start_reg <= '0'; |
hdr_valid_reg <= '0'; |
src_ip_addr <= (others => '0'); |
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => rx_count <= x"0000"; |
when INCR => rx_count <= rx_count + 1; |
when SET_VAL => rx_count <= rx_count_val; |
when HOLD => rx_count <= rx_count; |
end case; |
|
-- port number capture |
if (set_sph = '1') then src_port(15 downto 8) <= dataval; end if; |
if (set_spl = '1') then src_port(7 downto 0) <= dataval; end if; |
if (set_dph = '1') then dst_port(15 downto 8) <= dataval; end if; |
if (set_dpl = '1') then dst_port(7 downto 0) <= dataval; end if; |
|
if (set_len_H = '1') then |
data_len (15 downto 8) <= dataval; |
data_len (7 downto 0) <= x"00"; |
elsif (set_len_L = '1') then |
-- compute data length, taking into account that we need to subtract the header length |
data_len <= std_logic_vector(unsigned(data_len(15 downto 8) & dataval) - 8); |
else |
data_len <= data_len; |
end if; |
|
case set_udp_rx_start is |
when SET => udp_rx_start_reg <= '1'; |
when CLR => udp_rx_start_reg <= '0'; |
when HOLD => udp_rx_start_reg <= udp_rx_start_reg; |
end case; |
|
-- capture src IP address |
if set_src_ip = '1' then |
src_ip_addr <= ip_rx.hdr.src_ip_addr; |
else |
src_ip_addr <= src_ip_addr; |
end if; |
|
case set_hdr_valid is |
when SET => hdr_valid_reg <= '1'; |
when CLR => hdr_valid_reg <= '0'; |
when HOLD => hdr_valid_reg <= hdr_valid_reg; |
end case; |
|
end if; |
end if; |
end process; |
|
end Behavioral; |
|
rx_sequential : process (clk,reset) |
begin |
if rising_edge(clk) then |
if reset = '1' then |
-- reset state variables |
rx_state <= IDLE; |
rx_count <= x"0000"; |
src_port <= (others => '0'); |
dst_port <= (others => '0'); |
data_len <= (others => '0'); |
udp_rx_start_reg <= '0'; |
hdr_valid_reg <= '0'; |
src_ip_addr <= (others => '0'); |
else |
-- Next rx_state processing |
if set_rx_state = '1' then |
rx_state <= next_rx_state; |
else |
rx_state <= rx_state; |
end if; |
|
-- rx_count processing |
case rx_count_mode is |
when RST => rx_count <= x"0000"; |
when INCR => rx_count <= rx_count + 1; |
when SET_VAL => rx_count <= rx_count_val; |
when HOLD => rx_count <= rx_count; |
end case; |
|
-- port number capture |
if (set_sph = '1') then src_port(15 downto 8) <= dataval; end if; |
if (set_spl = '1') then src_port(7 downto 0) <= dataval; end if; |
if (set_dph = '1') then dst_port(15 downto 8) <= dataval; end if; |
if (set_dpl = '1') then dst_port(7 downto 0) <= dataval; end if; |
|
if (set_len_H = '1') then |
data_len (15 downto 8) <= dataval; |
data_len (7 downto 0) <= x"00"; |
elsif (set_len_L = '1') then |
-- compute data length, taking into account that we need to subtract the header length |
data_len <= std_logic_vector(unsigned(data_len(15 downto 8) & dataval) - 8); |
else |
data_len <= data_len; |
end if; |
|
case set_udp_rx_start is |
when SET => udp_rx_start_reg <= '1'; |
when CLR => udp_rx_start_reg <= '0'; |
when HOLD => udp_rx_start_reg <= udp_rx_start_reg; |
end case; |
|
-- capture src IP address |
if set_src_ip = '1' then |
src_ip_addr <= ip_rx.hdr.src_ip_addr; |
else |
src_ip_addr <= src_ip_addr; |
end if; |
|
case set_hdr_valid is |
when SET => hdr_valid_reg <= '1'; |
when CLR => hdr_valid_reg <= '0'; |
when HOLD => hdr_valid_reg <= hdr_valid_reg; |
end case; |
|
end if; |
end if; |
end process; |
|
end Behavioral; |
|