URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_library
- from Rev 10 to Rev 9
- ↔ Reverse comparison
Rev 10 → Rev 9
/trunk/rtl/verilog/versatile_library.v
350,7 → 350,7
parameter reset_value = 0; |
|
input [width-1:0] d; |
input ce, clear, clk, rst; |
input ce, clk, rst; |
output reg [width-1:0] q; |
|
always @ (posedge clk or posedge rst) |
/trunk/rtl/verilog/versatile_library_actel.v
256,7 → 256,7
parameter width = 1; |
parameter reset_value = 0; |
input [width-1:0] d; |
input ce, clear, clk, rst; |
input ce, clk, rst; |
output reg [width-1:0] q; |
always @ (posedge clk or posedge rst) |
if (rst) |
/trunk/rtl/verilog/registers.v
106,7 → 106,7
parameter reset_value = 0; |
|
input [width-1:0] d; |
input ce, clear, clk, rst; |
input ce, clk, rst; |
output reg [width-1:0] q; |
|
always @ (posedge clk or posedge rst) |
/trunk/rtl/verilog/versatile_library_altera.v
153,7 → 153,7
parameter width = 1; |
parameter reset_value = 0; |
input [width-1:0] d; |
input ce, clear, clk, rst; |
input ce, clk, rst; |
output reg [width-1:0] q; |
always @ (posedge clk or posedge rst) |
if (rst) |