URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_library/trunk/rtl/verilog
- from Rev 115 to Rev 116
- ↔ Reverse comparison
Rev 115 → Rev 116
/versatile_library.v
1257,7 → 1257,7
`undef MODULE |
input d; |
output reg q; |
output clk, rst; |
input clk, rst; |
reg dff; |
always @ (posedge clk or posedge rst) |
if (rst) |
/versatile_library_actel.v
421,7 → 421,7
module vl_synchronizer (d, q, clk, rst); |
input d; |
output reg q; |
output clk, rst; |
input clk, rst; |
reg dff; |
always @ (posedge clk or posedge rst) |
if (rst) |
/versatile_library_altera.v
528,7 → 528,7
module vl_synchronizer (d, q, clk, rst); |
input d; |
output reg q; |
output clk, rst; |
input clk, rst; |
reg dff; |
always @ (posedge clk or posedge rst) |
if (rst) |
/registers.v
513,7 → 513,7
`undef MODULE |
input d; |
output reg q; |
output clk, rst; |
input clk, rst; |
reg dff; |
always @ (posedge clk or posedge rst) |
if (rst) |