OpenCores

/tools/tcl/rw11a/util.tcl File deleted

/tools/tcl/rw11a/.cvsignore File deleted

/tools/tcl/rw11a

tools/tcl/rw11a Property changes : Deleted: svn:ignore ## -1,33 +0,0 ## -*.dep_ghdl -*.dep_isim -*.dep_xst -work-obj93.cf -*.vcd -*.ghw -*.sav -*.tmp -*.exe -ise -xflow.his -*.ngc -*.ncd -*.pcf -*.bit -*.msk -isim -isim.log -isim.wdb -fuse.log -*_[sft]sim.vhd -*_tsim.sdf -*_xst.log -*_tra.log -*_twr.log -*_map.log -*_par.log -*_pad.log -*_bgn.log -*_svn.log -*_sum.log -*_[dsft]sim.log -pkgIndex.tcl Index: tools/tcl/rw11/asm.tcl =================================================================== --- tools/tcl/rw11/asm.tcl (nonexistent) +++ tools/tcl/rw11/asm.tcl (revision 20) @@ -0,0 +1,102 @@ +# $Id: asm.tcl 510 2013-04-26 16:14:57Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.0 Initial version (extracted from util.tcl) +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # asmrun: run a program loaded with ldasm + # + proc asmrun {cpu symName opts} { + upvar 1 $symName sym + array set defs {r0 0 r1 0 r2 0 r3 0 r4 0 r5 0} + array set defs $opts + + if {![info exists defs(pc)]} { + if {[info exists sym(start)]} { + set defs(pc) $sym(start) + } else { + error "neither opts(pc) nor sym(start) given" + } + } + + if {![info exists defs(sp)]} { + if {[info exists sym(stack)]} { + set defs(sp) $sym(stack) + } elseif {[info exists sym(start)]} { + set defs(sp) $sym(start) + } else { + error "neither opts(sp) nor sym(stack) or sym(start) given" + } + } + + $cpu cp -wr0 $defs(r0) \ + -wr1 $defs(r1) \ + -wr2 $defs(r2) \ + -wr3 $defs(r3) \ + -wr4 $defs(r4) \ + -wr5 $defs(r5) + + $cpu cp -wsp $defs(sp) \ + -stapc $defs(pc) + + return "" + } + + # + # asmwait: wait for completion of a program loaded with ldasm + # + proc asmwait {cpu symName {tout 10.}} { + upvar 1 $symName sym + set dt [$cpu wtcpu -reset $tout] + if {$dt >= 0 && [info exists $sym(stop)]} { + $cpu cp -rpc -edata $sym(stop) + } + return $dt + } + + # + # asmtreg: test registers after running a program loaded with ldasm + # + proc asmtreg {cpu opts} { + array set defs $opts + set cpcmd "" + foreach key [lsort [array names defs]] { + append cpcmd " -r$key -edata $defs($key)" + } + eval $cpu cp $cpcmd + return "" + } + + # + # asmtmem: test memory after running a program loaded with ldasm + # + proc asmtmem {cpu base list} { + set nw [llength $list] + if {$nw == 0} { + error "asmtreg called with empty list" + } + $cpu cp -wal $base -brm $nw -edata $list + return "" + } + +} Index: tools/tcl/rw11/cpumon.tcl =================================================================== --- tools/tcl/rw11/cpumon.tcl (nonexistent) +++ tools/tcl/rw11/cpumon.tcl (revision 20) @@ -0,0 +1,95 @@ +# $Id: cpumon.tcl 511 2013-04-27 13:51:46Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # cpumon: special command environment while cpu is running + # + + variable cpumon_active 0 + variable cpumon_prompt ">" + variable cpumon_attnhdl_added 0 + variable cpumon_eofchar_save {puts {}} + + proc cpumon {{prompt "cpumon> "} } { + variable cpumon_active + variable cpumon_prompt + variable cpumon_attnhdl_added + variable cpumon_eofchar_save + global tirri_interactive + + # quit if cpumon already active + if {$cpumon_active} { + error "cpumon already active" + } + + # check that attn handler is installed + if {!$cpumon_attnhdl_added} { + rls attn -add 0x0001 { rw11::cpumon_attncpu } + set cpumon_attnhdl_added 1 + } + + # redefine ti_rri prompt and eof handling + if { $tirri_interactive } { + # setup new prompt (save old one...) + set cpumon_prompt $prompt + rename ::tclreadline::prompt1 ::rw11::cpumon_prompt1_save + namespace eval ::tclreadline { + proc prompt1 {} { + return $rw11::cpumon_prompt + } + } + # disable ^D (and save old setting) + set cpumon_eofchar_save [::tclreadline::readline eofchar] + ::tclreadline::readline eofchar \ + {puts {^D disabled, use tirri_exit if you really want to bail-out}} + } + + set cpumon_active 1 + return "" + } + + # + # cpumon_attncpu: cpu attn handler + # + proc cpumon_attncpu {} { + variable cpumon_active + variable cpumon_eofchar_save + global tirri_interactive + + if {$cpumon_active} { + puts "CPU down attention" + puts [cpu0 show -pcps] + # restore ti_rri prompt and eof handling + if { $tirri_interactive } { + rename ::tclreadline::prompt1 {} + rename ::rw11::cpumon_prompt1_save ::tclreadline::prompt1 + ::tclreadline::readline eofchar $cpumon_eofchar_save + } + set cpumon_active 0 + } + return "" + } + +} Index: tools/tcl/rw11/tbench.tcl =================================================================== --- tools/tcl/rw11/tbench.tcl (nonexistent) +++ tools/tcl/rw11/tbench.tcl (revision 20) @@ -0,0 +1,72 @@ +# $Id: tbench.tcl 510 2013-04-26 16:14:57Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.0 Initial version (extracted from util.tcl) +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # tbench: driver for tbench scripts + # + proc tbench {fname} { + rlc exec -init 0xff [regbld rlink::INIT anena] + set errcnt [tbench_list $fname] + return $errcnt + } + + # + # tbench_file: execute list of tbench steps + # + proc tbench_list {lname} { + set errcnt 0 + if {[string match "@*" $lname]} { + set fname [string range $lname 1 end] + set fh [open "$::env(RETROBASE)/tools/tbench/$fname"] + while {[gets $fh line] >= 0} { + if {[string match "#*" $line]} { + if {[string match "##*" $line]} { puts $line } + } elseif {[string match "@*" $line]} { + incr errcnt [tbench_list $line] + } else { + incr errcnt [tbench_step $line] + } + } + close $fh + } else { + incr errcnt [tbench_step $lname] + } + puts [format "%s: %s" $lname [rutil::errcnt2txt $errcnt]] + return $errcnt + } + + # + # tbench_step: execute single tbench step + # + proc tbench_step {fname} { + rlc errcnt -clear + set cpu cpu0 + source "$::env(RETROBASE)/tools/tbench/$fname" + set errcnt [rlc errcnt] + puts [format "%s: %s" $fname [rutil::errcnt2txt $errcnt]] + return $errcnt + } + +} Index: tools/tcl/rw11/cpucons.tcl =================================================================== --- tools/tcl/rw11/cpucons.tcl (nonexistent) +++ tools/tcl/rw11/cpucons.tcl (revision 20) @@ -0,0 +1,84 @@ +# $Id: cpucons.tcl 511 2013-04-27 13:51:46Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # cpumon: special command environment while cpu is running + # + + variable cpucons_done 0 + + # + # cpucons: setup special console shortcut commands + # + proc cpucons {} { + variable cpucons_done + + # quit if cpucons already done + if {$cpucons_done} { + return "" + } + + namespace eval :: { + + # + # '.' show current PC and PS + # + proc "." {} { + return [cpu0 show -pcps] + } + + # + # '?' show current PC and PS and R0-R5 + # + proc "?" {} { + return [cpu0 show -pcps -r0r5] + } + + # + # '(' type some chars (no cr at end) + # + proc "(" {args} { + set str [join $args " "] + cpu0tta0 type $str + return "" + } + + # + # '<' type some chars (with cr at end) + # + proc "<" {args} { + set str [join $args " "] + append str "\n" + cpu0tta0 type $str + return "" + } + + } + + set cpucons_done 1 + return "" + } + +} Index: tools/tcl/rw11/util.tcl =================================================================== --- tools/tcl/rw11/util.tcl (nonexistent) +++ tools/tcl/rw11/util.tcl (revision 20) @@ -0,0 +1,76 @@ +# $Id: util.tcl 510 2013-04-26 16:14:57Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.1.1 split, asm* and tbench* into separate files +# 2013-04-01 501 1.1 add regdsc's and asm* procs +# 2013-02-02 380 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + # + # setup cp interface register descriptions for w11a + # + regdsc CP_CNTL {func 3 0} + regdsc CP_STAT {rust 7 4} {halt 3} {go 2} {merr 1} {err 0} + regdsc CP_IBRB {base 12 7} {bw 1 2} + # + # setup w11a register descriptions + # + regdsc PSW {cmode 15 2} {pmode 13 2} {rset 11} {pri 7 3} {tflag 3} {cc 3 4} + + # + # setup_cpu: create w11 cpu system + # + proc setup_cpu {} { + rlc config -basestat 2 -baseaddr 8 -basedata 8 + rw11 rlw rls w11a 1 + cpu0 cp -reset; # reset CPU + return "" + } + + # + # setup_sys: create full system + # + proc setup_sys {} { + if {[info commands rlw] eq ""} { + setup_cpu + } + cpu0 add dl11 + cpu0 add dl11 -base 0176500 -lam 2 + cpu0 add rk11 + rlw start + return "" + } + + # + # run_pdpcp: execute pdpcp type command file + # + proc run_pdpcp {fname {cpu "cpu0"}} { + rlc errcnt -clear + set code [exec ticonv_pdpcp $cpu $fname] + eval $code + set errcnt [rlc errcnt] + if { $errcnt } { + puts [format "run_pdpcp: FAIL after %d errors" $errcnt] + } + return $errcnt + } + +} Index: tools/tcl/rw11/.cvsignore =================================================================== --- tools/tcl/rw11/.cvsignore (nonexistent) +++ tools/tcl/rw11/.cvsignore (revision 20) @@ -0,0 +1 @@ +pkgIndex.tcl Index: tools/tcl/rw11 =================================================================== --- tools/tcl/rw11 (nonexistent) +++ tools/tcl/rw11 (revision 20)

tools/tcl/rw11 Property changes : Added: svn:ignore ## -0,0 +1,33 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +pkgIndex.tcl Index: tools/tcl/setup_packages =================================================================== --- tools/tcl/setup_packages (revision 19) +++ tools/tcl/setup_packages (revision 20) @@ -1,5 +1,5 @@ #! /usr/bin/env tclsh -# $Id: setup_packages 480 2013-02-03 10:11:02Z mueller $ +# $Id: setup_packages 510 2013-04-26 16:14:57Z mueller $ # pkg_mkIndex -verbose ../lib libr*tpp.so # @@ -11,6 +11,6 @@ pkg_mkIndex -verbose rbs3hio *.tcl pkg_mkIndex -verbose rbemon *.tcl # -pkg_mkIndex -verbose rw11a *.tcl +pkg_mkIndex -verbose rw11 *.tcl # pkg_mkIndex -verbose tst_rlink *.tcl Index: tools/tbench/test_w11a_inst_traps.tcl =================================================================== --- tools/tbench/test_w11a_inst_traps.tcl (revision 19) +++ tools/tbench/test_w11a_inst_traps.tcl (revision 20) @@ -1,4 +1,4 @@ -# $Id: test_w11a_inst_traps.tcl 502 2013-04-02 19:29:30Z mueller $ +# $Id: test_w11a_inst_traps.tcl 510 2013-04-26 16:14:57Z mueller $ # # Copyright 2013- by Walter F.J. Mueller # License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory @@ -62,13 +62,13 @@ .word 177777 } -rw11a::asmrun $cpu sym [list r5 $sym(data) ] -rw11a::asmwait $cpu sym 1.0 -rw11a::asmtreg $cpu [list r0 0 r1 0 r2 0 r3 0 \ - r5 [expr {$sym(data) + 6*5*2}] \ - sp $sym(start) ] +rw11::asmrun $cpu sym [list r5 $sym(data) ] +rw11::asmwait $cpu sym 1.0 +rw11::asmtreg $cpu [list r0 0 r1 0 r2 0 r3 0 \ + r5 [expr {$sym(data) + 6*5*2}] \ + sp $sym(start) ] # data: trap ps; trap id; stack-pc; stack-ps opcode -rw11a::asmtmem $cpu $sym(data) \ +rw11::asmtmem $cpu $sym(data) \ [list 000340 001014 $sym(start:350$) 000350 0000003 \ 000341 001020 $sym(start:351$) 000351 0000004 \ 000342 001030 $sym(start:352$) 000352 0104100 \

/tools/tbench/test_w11a_dstm_word_flow.tcl

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/tools/tbench/test_w11a_srcr_word_flow.tcl

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/tools/tbench/test_w11a_dsta_flow.tcl

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/tools/tbench/test_w11a_dstw_word_flow.tcl

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/tools/src/librw11/Rw11VirtTermTcp.cpp

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/tools/src/librw11/Rw11UnitRK11.hpp

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/tools/src/librw11/Rw11UnitRK11.ipp

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/tools/src/librw11/Rw11Cpu.cpp

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/tools/src/librw11/Rw11VirtTermTcp.hpp

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/tools/src/librw11/Rw11Cpu.hpp

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/tools/src/librw11/Makefile

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/tools/src/librw11/Rw11UnitTerm.cpp

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/tools/src/librw11/Rw11UnitTerm.hpp

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/tools/src/librw11/Rw11VirtTerm.cpp

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/tools/src/librw11/Rw11UnitTerm.ipp

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/tools/src/librw11/Rw11UnitRK11.cpp

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/tools/src/librw11/Rw11CntlDL11.cpp

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/tools/src/librwxxtpp/RtclRw11CntlRK11.cpp

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/tools/src/librwxxtpp/RtclRw11CntlRK11.hpp

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/tools/src/librwxxtpp/RtclRw11Cpu.cpp

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/tools/src/librwxxtpp/Makefile

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/tools/src/librwxxtpp/RtclRw11Cpu.hpp

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/tools/src/librwxxtpp/RtclRw11UnitTerm.cpp

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/tools/src/librwxxtpp/RtclRw11UnitTerm.hpp

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/tools/src/librwxxtpp/RtclRw11UnitRK11.cpp

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/tools/src/librwxxtpp/RtclRw11CntlFactory.cpp

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/tools/src/librwxxtpp/RtclRw11UnitDisk.cpp

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/tools/src/librlink/RlinkConnect.hpp

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/tools/src/librlink/RlinkPacketBuf.cpp

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/tools/src/librlink/RlinkConnect.cpp

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/tools/src/librlinktpp/RtclRlinkServer.cpp

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/tools/src/librtcltools/RtclCmdBase.hpp

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/tools/bin/ti_rri

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/rtl/sys_gen/tst_fx2loop/tst_fx2loop.vhd

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/rtl/sys_gen/w11a/tb/dorri

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/rtl/sys_gen/w11a/tb/torri

0,0 → 1,229

rtl/sys_gen/w11a/tb/torri Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: rtl/sys_gen/w11a/tb/uv5_boot.tcl =================================================================== --- rtl/sys_gen/w11a/tb/uv5_boot.tcl (nonexistent) +++ rtl/sys_gen/w11a/tb/uv5_boot.tcl (revision 20) @@ -0,0 +1,29 @@ +# $Id: uv5_boot.tcl 511 2013-04-27 13:51:46Z mueller $ +# +# Setup file for Unix V5 System +# +# Usage: +# +# telnet_starter -d DL0 & +# torri -xxx @uv5_boot.tcl ( -xxx depends on sim or fpga connect) + +# setup w11 cpu +puts [rlw] + +# 2.11 bsd uses parity, so strip it +cpu0tta0 set to7bit 1 + +# setup tcp links for terminals +cpu0tta0 att "tcp:?port=8000" + +# setup log files +cpu0tta0 set log "tt_dl0.log?crlf" + +# mount disks +cpu0rka0 att unix_v5_rk.dsk + +# and boot +#cpu0rka set trace 1 +rw11::cpumon +rw11::cpucons +cpu0 boot rka0 Index: rtl/sys_gen/w11a/tb/211bsd_rk_boot.tcl =================================================================== --- rtl/sys_gen/w11a/tb/211bsd_rk_boot.tcl (nonexistent) +++ rtl/sys_gen/w11a/tb/211bsd_rk_boot.tcl (revision 20) @@ -0,0 +1,38 @@ +# $Id: 211bsd_rk_boot.tcl 511 2013-04-27 13:51:46Z mueller $ +# +# Setup file for 211bsd RK based system (w11a, in sys/tb area...) +# +# Usage: +# +# telnet_starter -d DL0 & +# telnet_starter -d DL1 & +# torri -xxx @211bsd_rk_boot.tcl ( -xxx depends on sim or fpga connect) +# + +# setup w11 cpu +puts [rlw] + +# 2.11 bsd uses parity, so strip it +cpu0tta0 set to7bit 1 +cpu0ttb0 set to7bit 1 + +# setup tcp links for terminals +cpu0tta0 att "tcp:?port=8000" +cpu0ttb0 att "tcp:?port=8001" + +# setup log files +cpu0tta0 set log "tt_dl0.log?crlf" +cpu0ttb0 set log "tt_dl1.log?crlf" + +# mount disks +cpu0rka0 att 211bsd_rk_root.dsk +cpu0rka1 att 211bsd_rk_swap.dsk +cpu0rka2 att 211bsd_rk_tmp.dsk +cpu0rka3 att 211bsd_rk_bin.dsk +cpu0rka4 att 211bsd_rk_usr.dsk + +# and boot +#cpu0rka set trace 1 +rw11::cpumon +rw11::cpucons +cpu0 boot rka0 Index: rtl/sys_gen/w11a/nexys2/sys_conf.vhd =================================================================== --- rtl/sys_gen/w11a/nexys2/sys_conf.vhd (revision 19) +++ rtl/sys_gen/w11a/nexys2/sys_conf.vhd (revision 20) @@ -1,6 +1,6 @@ --- $Id: sys_conf.vhd 428 2011-11-20 12:19:31Z mueller $ +-- $Id: sys_conf.vhd 509 2013-04-21 20:46:20Z mueller $ -- --- Copyright 2010-2011 by Walter F.J. Mueller +-- Copyright 2010-2013 by Walter F.J. Mueller -- -- This program is free software; you may redistribute and/or modify it under -- the terms of the GNU General Public License as published by the Free @@ -19,6 +19,7 @@ -- Tool versions: xst 11.4, 13.1; ghdl 0.26-0.29 -- Revision History: -- Date Rev Version Comment +-- 2013-04-21 509 1.2 add fx2 settings -- 2011-11-19 428 1.1.1 use clksys=56 (58 no closure after numeric_std...) -- 2010-11-27 341 1.1 add dcm and memctl related constants (clksys=58) -- 2010-05-05 295 1.0 Initial version (derived from _s3 version) @@ -46,6 +47,10 @@ constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud + -- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec + constant sys_conf_fx2_petowidth : positive := 10; + constant sys_conf_fx2_ccwidth : positive := 5; + constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers constant sys_conf_bram : integer := 0; -- no bram, use cache

/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.ucf_cpp

1,7 → 1,8

18,3 → 19,8

/rtl/sys_gen/w11a/nexys2/tb/tb_w11a_n2.vbom

1,7 → 1,7

/rtl/sys_gen/w11a/nexys2/tb/sys_conf_sim.vhd

1,6 → 1,6

19,6 → 19,7

41,6 → 42,10

/rtl/sys_gen/w11a/nexys2/tb/tb_w11a_n2.vhd

1,6 → 1,6

13,7 → 13,7

26,13 → 26,14

/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd

1,6 → 1,6

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64,6 → 66,7

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114,10 → 119,17

130,6 → 142,8

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165,7 → 179,15

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316,13 → 340,15

335,6 → 361,7

344,7 → 371,17

557,13 → 594,20

/rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vbom

5,6 → 5,8

18,7 → 20,8

/rtl/sys_gen/w11a/nexys2/.cvsignore

2,3 → 2,4

/rtl/sys_gen/w11a/nexys2/Makefile

1,7 → 1,8

9,6 → 10,7

/rtl/sys_gen/w11a/nexys2

rtl/sys_gen/w11a/nexys2 Property changes : Modified: svn:ignore ## -34,3 +34,4 ## *.dep_ucf_cpp log_* _impact* +*.svf Index: rtl/sys_gen/w11a/nexys3/sys_conf.vhd =================================================================== --- rtl/sys_gen/w11a/nexys3/sys_conf.vhd (revision 19) +++ rtl/sys_gen/w11a/nexys3/sys_conf.vhd (revision 20) @@ -1,6 +1,6 @@ --- $Id: sys_conf.vhd 433 2011-11-27 22:04:39Z mueller $ +-- $Id: sys_conf.vhd 509 2013-04-21 20:46:20Z mueller $ -- --- Copyright 2011- by Walter F.J. Mueller +-- Copyright 2011-2013 by Walter F.J. Mueller -- -- This program is free software; you may redistribute and/or modify it under -- the terms of the GNU General Public License as published by the Free @@ -19,6 +19,7 @@ -- Tool versions: xst 13.1; ghdl 0.29 -- Revision History: -- Date Rev Version Comment +-- 2013-04-21 509 1.1 add fx2 settings -- 2011-11-26 433 1.0.1 use 80 MHz clksys (no closure for 85 after rev 432) -- 2011-11-20 430 1.0 Initial version (derived from _n2 version) ------------------------------------------------------------------------------ @@ -48,6 +49,10 @@ constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud + -- fx2 settings: petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec + constant sys_conf_fx2_petowidth : positive := 10; + constant sys_conf_fx2_ccwidth : positive := 5; + constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers constant sys_conf_bram : integer := 0; -- no bram, use cache

/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.ucf_cpp

1,7 → 1,8

17,3 → 18,8

/rtl/sys_gen/w11a/nexys3/tb/tb_w11a_n3.vbom

1,7 → 1,7

/rtl/sys_gen/w11a/nexys3/tb/sys_conf_sim.vhd

1,6 → 1,6

19,6 → 19,7

40,6 → 41,10

/rtl/sys_gen/w11a/nexys3/tb/tb_w11a_n3.vhd

1,6 → 1,6

13,7 → 13,7

26,13 → 26,14

/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd

1,6 → 1,6

19,7 → 19,8

40,11 → 41,13

57,7 → 60,9

75,10 → 80,17

91,6 → 103,8

102,7 → 116,7

127,7 → 141,15

149,7 → 171,9

279,7 → 303,7

286,6 → 310,8

298,6 → 324,7

307,7 → 334,17

522,13 → 559,20

/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vbom

5,6 → 5,8

18,7 → 20,8

/rtl/sys_gen/w11a/nexys3/.cvsignore

2,3 → 2,4

/rtl/sys_gen/w11a/nexys3/Makefile

1,7 → 1,8

8,6 → 9,7

/rtl/sys_gen/w11a/nexys3

rtl/sys_gen/w11a/nexys3 Property changes : Modified: svn:ignore ## -34,3 +34,4 ## *.dep_ucf_cpp log_* _impact* +*.svf Index: rtl/sys_gen/w11a/s3board/.cvsignore =================================================================== --- rtl/sys_gen/w11a/s3board/.cvsignore (revision 19) +++ rtl/sys_gen/w11a/s3board/.cvsignore (revision 20) @@ -2,3 +2,4 @@ *.dep_ucf_cpp log_* _impact* +*.svf Index: rtl/sys_gen/w11a/s3board =================================================================== --- rtl/sys_gen/w11a/s3board (revision 19) +++ rtl/sys_gen/w11a/s3board (revision 20)

rtl/sys_gen/w11a/s3board Property changes : Modified: svn:ignore ## -34,3 +34,4 ## *.dep_ucf_cpp log_* _impact* +*.svf Index: rtl/bplib/fx2rlink/rlink_sp1c_fx2.vhd =================================================================== --- rtl/bplib/fx2rlink/rlink_sp1c_fx2.vhd (nonexistent) +++ rtl/bplib/fx2rlink/rlink_sp1c_fx2.vhd (revision 20) @@ -0,0 +1,227 @@ +-- $Id: $ +-- +-- Copyright 2013- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: rlink_sp1c_fx2 - syn +-- Description: rlink_core8 + serport_1clock + fx2 combo +-- +-- Dependencies: rlinklib/rlink_core8 +-- serport/serport_1clock +-- rlinklib/rlink_rlbmux +-- fx2lib/fx2_2fifoctl_ic +-- +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Synthesized (xst): +-- Date Rev ise Target flop lutl lutm slic t peri ifa ofa +-- 2013-04-20 509 13.3 O76d xc3s1200e-4 441 903 128 637 s 8.7 - - +-- +-- Revision History: +-- Date Rev Version Comment +-- 2013-04-20 509 1.0 Initial version (derived from rlink_sp1c) +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.slvtypes.all; +use work.rblib.all; +use work.rlinklib.all; +use work.serportlib.all; +use work.fx2lib.all; + +entity rlink_sp1c_fx2 is -- rlink_core8+serport_1clk+fx2_ic combo + generic ( + ATOWIDTH : positive := 5; -- access timeout counter width + ITOWIDTH : positive := 6; -- idle timeout counter width + CPREF : slv4 := c_rlink_cpref; -- comma prefix + IFAWIDTH : natural := 5; -- ser input fifo addr width (0=none) + OFAWIDTH : natural := 5; -- ser output fifo addr width (0=none) + PETOWIDTH : positive := 10; -- fx2 packet end time-out counter width + CCWIDTH : positive := 5; -- fx2 chunk counter width + ENAPIN_RLMON : integer := sbcntl_sbf_rlmon; -- SB_CNTL for rlmon (-1=none) + ENAPIN_RBMON : integer := sbcntl_sbf_rbmon; -- SB_CNTL for rbmon (-1=none) + CDWIDTH : positive := 13; -- clk divider width + CDINIT : natural := 15); -- clk divider initial/reset setting + port ( + CLK : in slbit; -- clock + CE_USEC : in slbit; -- 1 usec clock enable + CE_MSEC : in slbit; -- 1 msec clock enable + CE_INT : in slbit := '0'; -- rri ito time unit clock enable + RESET : in slbit; -- reset + ENAXON : in slbit; -- enable xon/xoff handling + ENAESC : in slbit; -- enable xon/xoff escaping + ENAFX2 : in slbit; -- enable fx2 usage + RXSD : in slbit; -- receive serial data (board view) + TXSD : out slbit; -- transmit serial data (board view) + CTS_N : in slbit := '0'; -- clear to send (act.low, board view) + RTS_N : out slbit; -- request to send (act.low, board view) + RB_MREQ : out rb_mreq_type; -- rbus: request + RB_SRES : in rb_sres_type; -- rbus: response + RB_LAM : in slv16; -- rbus: look at me + RB_STAT : in slv3; -- rbus: status flags + RL_MONI : out rl_moni_type; -- rlink_core: monitor port + RLB_MONI : out rlb_moni_type; -- rlink 8b: monitor port + SER_MONI : out serport_moni_type; -- ser: monitor port + FX2_MONI : out fx2ctl_moni_type; -- fx2: monitor port + I_FX2_IFCLK : in slbit; -- fx2: interface clock + O_FX2_FIFO : out slv2; -- fx2: fifo address + I_FX2_FLAG : in slv4; -- fx2: fifo flags + O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low) + O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low) + O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low) + O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low) + IO_FX2_DATA : inout slv8 -- fx2: data lines + ); +end entity rlink_sp1c_fx2; + + +architecture syn of rlink_sp1c_fx2 is + + signal RLB_DI : slv8 := (others=>'0'); + signal RLB_ENA : slbit := '0'; + signal RLB_BUSY : slbit := '0'; + signal RLB_DO : slv8 := (others=>'0'); + signal RLB_VAL : slbit := '0'; + signal RLB_HOLD : slbit := '0'; + + signal SER_RXDATA : slv8 := (others=>'0'); + signal SER_RXVAL : slbit := '0'; + signal SER_RXHOLD : slbit := '0'; + signal SER_TXDATA : slv8 := (others=>'0'); + signal SER_TXENA : slbit := '0'; + signal SER_TXBUSY : slbit := '0'; + + signal FX2_RXDATA : slv8 := (others=>'0'); + signal FX2_RXVAL : slbit := '0'; + signal FX2_RXHOLD : slbit := '0'; + signal FX2_RXAEMPTY : slbit := '0'; + signal FX2_TXDATA : slv8 := (others=>'0'); + signal FX2_TXENA : slbit := '0'; + signal FX2_TXBUSY : slbit := '0'; + signal FX2_TXAFULL : slbit := '0'; + +begin + + CORE : rlink_core8 + generic map ( + ATOWIDTH => ATOWIDTH, + ITOWIDTH => ITOWIDTH, + CPREF => CPREF, + ENAPIN_RLMON => ENAPIN_RLMON, + ENAPIN_RBMON => ENAPIN_RBMON) + port map ( + CLK => CLK, + CE_INT => CE_INT, + RESET => RESET, + RLB_DI => RLB_DI, + RLB_ENA => RLB_ENA, + RLB_BUSY => RLB_BUSY, + RLB_DO => RLB_DO, + RLB_VAL => RLB_VAL, + RLB_HOLD => RLB_HOLD, + RL_MONI => RL_MONI, + RB_MREQ => RB_MREQ, + RB_SRES => RB_SRES, + RB_LAM => RB_LAM, + RB_STAT => RB_STAT + ); + + SERPORT : serport_1clock + generic map ( + CDWIDTH => CDWIDTH, + CDINIT => CDINIT, + RXFAWIDTH => IFAWIDTH, + TXFAWIDTH => OFAWIDTH) + port map ( + CLK => CLK, + CE_MSEC => CE_MSEC, + RESET => RESET, + ENAXON => ENAXON, + ENAESC => ENAESC, + RXDATA => SER_RXDATA, + RXVAL => SER_RXVAL, + RXHOLD => SER_RXHOLD, + TXDATA => SER_TXDATA, + TXENA => SER_TXENA, + TXBUSY => SER_TXBUSY, + MONI => SER_MONI, + RXSD => RXSD, + TXSD => TXSD, + RXRTS_N => RTS_N, + TXCTS_N => CTS_N + ); + + RLBMUX : rlink_rlbmux + port map ( + SEL => ENAFX2, + RLB_DI => RLB_DI, + RLB_ENA => RLB_ENA, + RLB_BUSY => RLB_BUSY, + RLB_DO => RLB_DO, + RLB_VAL => RLB_VAL, + RLB_HOLD => RLB_HOLD, + P0_RXDATA => SER_RXDATA, + P0_RXVAL => SER_RXVAL, + P0_RXHOLD => SER_RXHOLD, + P0_TXDATA => SER_TXDATA, + P0_TXENA => SER_TXENA, + P0_TXBUSY => SER_TXBUSY, + P1_RXDATA => FX2_RXDATA, + P1_RXVAL => FX2_RXVAL, + P1_RXHOLD => FX2_RXHOLD, + P1_TXDATA => FX2_TXDATA, + P1_TXENA => FX2_TXENA, + P1_TXBUSY => FX2_TXBUSY + ); + + FX2CNTL : fx2_2fifoctl_ic + generic map ( + RXFAWIDTH => 5, + TXFAWIDTH => 5, + PETOWIDTH => PETOWIDTH, + CCWIDTH => CCWIDTH, + RXAEMPTY_THRES => 1, + TXAFULL_THRES => 1) + port map ( + CLK => CLK, + RESET => RESET, + RXDATA => FX2_RXDATA, + RXVAL => FX2_RXVAL, + RXHOLD => FX2_RXHOLD, + RXAEMPTY => FX2_RXAEMPTY, + TXDATA => FX2_TXDATA, + TXENA => FX2_TXENA, + TXBUSY => FX2_TXBUSY, + TXAFULL => FX2_TXAFULL, + MONI => FX2_MONI, + I_FX2_IFCLK => I_FX2_IFCLK, + O_FX2_FIFO => O_FX2_FIFO, + I_FX2_FLAG => I_FX2_FLAG, + O_FX2_SLRD_N => O_FX2_SLRD_N, + O_FX2_SLWR_N => O_FX2_SLWR_N, + O_FX2_SLOE_N => O_FX2_SLOE_N, + O_FX2_PKTEND_N => O_FX2_PKTEND_N, + IO_FX2_DATA => IO_FX2_DATA + ); + + RLB_MONI.rxval <= RLB_VAL; + RLB_MONI.rxhold <= RLB_HOLD; + RLB_MONI.txena <= RLB_ENA; + RLB_MONI.txbusy <= RLB_BUSY; + +end syn; Index: rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vhd =================================================================== --- rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vhd (nonexistent) +++ rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vhd (revision 20) @@ -0,0 +1,115 @@ +-- $Id: ioleds_sp1c_fx2.vhd 509 2013-04-21 20:46:20Z mueller $ +-- +-- Copyright 2013- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: ioleds_sp1c_fx2 - syn +-- Description: io activity leds for rlink+serport_1clk+fx2_ic combo +-- +-- Dependencies: +-- +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2013-04-21 509 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.slvtypes.all; +use work.genlib.all; +use work.rblib.all; +use work.rlinklib.all; +use work.serportlib.all; + +entity ioleds_sp1c_fx2 is -- io activity leds for rlink_sp1c_fx2 + port ( + CLK : in slbit; -- clock + CE_USEC : in slbit; -- 1 usec clock enable + RESET : in slbit; -- reset + ENAFX2 : in slbit; -- enable fx2 usage + RB_SRES : in rb_sres_type; -- rbus: response + RLB_MONI : in rlb_moni_type; -- rlink 8b: monitor port + SER_MONI : in serport_moni_type; -- ser: monitor port + IOLEDS : out slv4 -- 4 bit IO monitor (e.g. for DSP_DP) + ); +end entity ioleds_sp1c_fx2; + + +architecture syn of ioleds_sp1c_fx2 is + + signal R_LEDDIV : slv6 := (others=>'0'); -- clock divider for LED pulses + signal R_LEDCE : slbit := '0'; -- ce every 64 usec + + signal TXENA_LED : slbit := '0'; + signal RXVAL_LED : slbit := '0'; + +begin + + RXVAL_PSTR : led_pulse_stretch + port map ( + CLK => CLK, + CE_INT => R_LEDCE, + RESET => '0', + DIN => RLB_MONI.rxval, + POUT => RXVAL_LED + ); + + TXENA_PSTR : led_pulse_stretch + port map ( + CLK => CLK, + CE_INT => R_LEDCE, + RESET => '0', + DIN => RLB_MONI.txena, + POUT => TXENA_LED + ); + + proc_leddiv: process (CLK) + begin + + if rising_edge(CLK) then + R_LEDCE <= '0'; + if CE_USEC = '1' then + R_LEDDIV <= slv(unsigned(R_LEDDIV) - 1); + if unsigned(R_LEDDIV) = 0 then + R_LEDCE <= '1'; + end if; + end if; + end if; + + end process proc_leddiv; + + proc_ledmux : process (ENAFX2, SER_MONI, RLB_MONI, RB_SRES, + TXENA_LED, RXVAL_LED) + begin + + if ENAFX2 = '0' then + IOLEDS(3) <= not SER_MONI.txok; + IOLEDS(2) <= SER_MONI.txact; + IOLEDS(1) <= not SER_MONI.rxok; + IOLEDS(0) <= SER_MONI.rxact; + else + IOLEDS(3) <= RB_SRES.busy; + IOLEDS(2) <= RLB_MONI.txbusy; + IOLEDS(1) <= TXENA_LED; + IOLEDS(0) <= RXVAL_LED; + end if; + + end process proc_ledmux; + +end syn; Index: rtl/bplib/fx2rlink/fx2rlinklib.vhd =================================================================== --- rtl/bplib/fx2rlink/fx2rlinklib.vhd (nonexistent) +++ rtl/bplib/fx2rlink/fx2rlinklib.vhd (revision 20) @@ -0,0 +1,100 @@ +-- $Id: $ +-- +-- Copyright 2013- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Package Name: fx2rlinklib +-- Description: Definitions for rlink + fx2 interface combos +-- +-- Dependencies: - +-- Tool versions: xst 13.3; ghdl 0.29 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2013-04-20 509 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.slvtypes.all; +use work.rblib.all; +use work.rlinklib.all; +use work.serportlib.all; +use work.fx2lib.all; + +package fx2rlinklib is + +-- +-- core + fx2 interface combo +-- + +component rlink_sp1c_fx2 is -- rlink_core8+serport_1clk+fx2_ic combo + generic ( + ATOWIDTH : positive := 5; -- access timeout counter width + ITOWIDTH : positive := 6; -- idle timeout counter width + CPREF : slv4 := c_rlink_cpref; -- comma prefix + IFAWIDTH : natural := 5; -- ser input fifo addr width (0=none) + OFAWIDTH : natural := 5; -- ser output fifo addr width (0=none) + PETOWIDTH : positive := 10; -- fx2 packet end time-out counter width + CCWIDTH : positive := 5; -- fx2 chunk counter width + ENAPIN_RLMON : integer := sbcntl_sbf_rlmon; -- SB_CNTL for rlmon (-1=none) + ENAPIN_RBMON : integer := sbcntl_sbf_rbmon; -- SB_CNTL for rbmon (-1=none) + CDWIDTH : positive := 13; -- clk divider width + CDINIT : natural := 15); -- clk divider initial/reset setting + port ( + CLK : in slbit; -- clock + CE_USEC : in slbit; -- 1 usec clock enable + CE_MSEC : in slbit; -- 1 msec clock enable + CE_INT : in slbit := '0'; -- rri ito time unit clock enable + RESET : in slbit; -- reset + ENAXON : in slbit; -- enable xon/xoff handling + ENAESC : in slbit; -- enable xon/xoff escaping + ENAFX2 : in slbit; -- enable fx2 usage + RXSD : in slbit; -- receive serial data (board view) + TXSD : out slbit; -- transmit serial data (board view) + CTS_N : in slbit := '0'; -- clear to send (act.low, board view) + RTS_N : out slbit; -- request to send (act.low, board view) + RB_MREQ : out rb_mreq_type; -- rbus: request + RB_SRES : in rb_sres_type; -- rbus: response + RB_LAM : in slv16; -- rbus: look at me + RB_STAT : in slv3; -- rbus: status flags + RL_MONI : out rl_moni_type; -- rlink_core: monitor port + RLB_MONI : out rlb_moni_type; -- rlink 8b: monitor port + SER_MONI : out serport_moni_type; -- ser: monitor port + FX2_MONI : out fx2ctl_moni_type; -- fx2: monitor port + I_FX2_IFCLK : in slbit; -- fx2: interface clock + O_FX2_FIFO : out slv2; -- fx2: fifo address + I_FX2_FLAG : in slv4; -- fx2: fifo flags + O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low) + O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low) + O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low) + O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low) + IO_FX2_DATA : inout slv8 -- fx2: data lines + ); +end component; + +component ioleds_sp1c_fx2 -- io activity leds for rlink_sp1c_fx2 + port ( + CLK : in slbit; -- clock + CE_USEC : in slbit; -- 1 usec clock enable + RESET : in slbit; -- reset + ENAFX2 : in slbit; -- enable fx2 usage + RB_SRES : in rb_sres_type; -- rbus: response + RLB_MONI : in rlb_moni_type; -- rlink 8b: monitor port + SER_MONI : in serport_moni_type; -- ser: monitor port + IOLEDS : out slv4 -- 4 bit IO monitor (e.g. for DSP_DP) + ); +end component; + +end package fx2rlinklib; Index: rtl/bplib/fx2rlink/rlink_sp1c_fx2.vbom =================================================================== --- rtl/bplib/fx2rlink/rlink_sp1c_fx2.vbom (nonexistent) +++ rtl/bplib/fx2rlink/rlink_sp1c_fx2.vbom (revision 20) @@ -0,0 +1,13 @@ +# libs +../../vlib/slvtypes.vhd +../../vlib/rbus/rblib.vhd +../../vlib/rlink/rlinklib.vbom +../../vlib/serport/serportlib.vbom +../fx2lib/fx2lib.vhd +# components +../../vlib/rlink/rlink_core8.vbom +../../vlib/serport/serport_1clock.vbom +../../vlib/rlink/rlink_rlbmux.vbom +../fx2lib/fx2_2fifoctl_ic.vbom +# design +rlink_sp1c_fx2.vhd Index: rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vbom =================================================================== --- rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vbom (nonexistent) +++ rtl/bplib/fx2rlink/ioleds_sp1c_fx2.vbom (revision 20) @@ -0,0 +1,10 @@ +# libs +../../vlib/slvtypes.vhd +../../vlib/genlib/genlib.vhd +../../vlib/rbus/rblib.vhd +../../vlib/rlink/rlinklib.vbom +../../vlib/serport/serportlib.vbom +# components +../../vlib/genlib/led_pulse_stretch.vbom +# design +ioleds_sp1c_fx2.vhd Index: rtl/bplib/fx2rlink/fx2rlinklib.vbom =================================================================== --- rtl/bplib/fx2rlink/fx2rlinklib.vbom (nonexistent) +++ rtl/bplib/fx2rlink/fx2rlinklib.vbom (revision 20) @@ -0,0 +1,7 @@ +# libs +../../vlib/slvtypes.vhd +../../vlib/rbus/rblib.vhd +../../vlib/rlink/rlinklib.vhd +../../vlib/serport/serportlib.vbom +../fx2lib/fx2lib.vhd +fx2rlinklib.vhd Index: rtl/bplib/fx2rlink/Makefile =================================================================== --- rtl/bplib/fx2rlink/Makefile (nonexistent) +++ rtl/bplib/fx2rlink/Makefile (revision 20) @@ -0,0 +1,25 @@ +# $Id: $ +# +# Revision History: +# Date Rev Version Comment +# 2013-04-20 509 1.0 Initial version (cloned..) +# +VBOM_all = $(wildcard *.vbom) +NGC_all = $(VBOM_all:.vbom=.ngc) +# +include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk +# +.PHONY : all clean +# +all : $(NGC_all) +# +clean : ise_clean +# +#---- +# +include $(RETROBASE)/rtl/make/generic_xflow.mk +# +ifndef DONTINCDEP +include $(VBOM_all:.vbom=.dep_xst) +endif +# Index: rtl/bplib/fx2rlink =================================================================== --- rtl/bplib/fx2rlink (nonexistent) +++ rtl/bplib/fx2rlink (revision 20)

rtl/bplib/fx2rlink Property changes : Added: svn:ignore ## -0,0 +1,32 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log Index: rtl/bplib/nexys2/nexys2lib.vhd =================================================================== --- rtl/bplib/nexys2/nexys2lib.vhd (revision 19) +++ rtl/bplib/nexys2/nexys2lib.vhd (revision 20) @@ -1,6 +1,6 @@ --- $Id: nexys2lib.vhd 467 2013-01-02 19:49:05Z mueller $ +-- $Id: nexys2lib.vhd 509 2013-04-21 20:46:20Z mueller $ -- --- Copyright 2010-2011 by Walter F.J. Mueller +-- Copyright 2010-2013 by Walter F.J. Mueller -- -- This program is free software; you may redistribute and/or modify it under -- the terms of the GNU General Public License as published by the Free Index: rtl/bplib/nexys2/tb/tb_nexys2_fusp_cuff.vhd =================================================================== --- rtl/bplib/nexys2/tb/tb_nexys2_fusp_cuff.vhd (revision 19) +++ rtl/bplib/nexys2/tb/tb_nexys2_fusp_cuff.vhd (revision 20) @@ -1,4 +1,4 @@ --- $Id: tb_nexys2_fusp_cuff.vhd 476 2013-01-26 22:23:53Z mueller $ +-- $Id: tb_nexys2_fusp_cuff.vhd 509 2013-04-21 20:46:20Z mueller $ -- -- Copyright 2013- by Walter F.J. Mueller -- @@ -22,7 +22,7 @@ -- tb_nexys2_core -- serport/serport_uart_rxtx -- fx2lib/tb/fx2_2fifo_core --- nexys2_fusp_aif [UUT] +-- nexys2_fusp_cuff_aif [UUT] -- -- To test: generic, any nexys2_fusp_cuff_aif target -- Index: rtl/bplib/nexys3/nexys3lib.vhd =================================================================== --- rtl/bplib/nexys3/nexys3lib.vhd (revision 19) +++ rtl/bplib/nexys3/nexys3lib.vhd (revision 20) @@ -1,6 +1,6 @@ --- $Id: nexys3lib.vhd 432 2011-11-25 20:16:28Z mueller $ +-- $Id: nexys3lib.vhd 509 2013-04-21 20:46:20Z mueller $ -- --- Copyright 2011- by Walter F.J. Mueller +-- Copyright 2011-2013 by Walter F.J. Mueller -- -- This program is free software; you may redistribute and/or modify it under -- the terms of the GNU General Public License as published by the Free @@ -20,6 +20,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2013-04-21 509 1.1 add nexys3_cuff_aif, nexys3_fusp_cuff_aif -- 2011-11-25 432 1.0 Initial version ------------------------------------------------------------------------------ @@ -55,7 +56,7 @@ ); end component; -component nexys3_fusp_aif is -- NEXYS 2, abstract iface, base+fusp +component nexys3_fusp_aif is -- NEXYS 3, abstract iface, base+fusp port ( I_CLK100 : in slbit; -- 100 MHz clock I_RXD : in slbit; -- receive data (board view) @@ -84,4 +85,74 @@ ); end component; +component nexys3_cuff_aif is -- NEXYS 3, abstract iface, base+cuff + port ( + I_CLK100 : in slbit; -- 100 MHz clock + I_RXD : in slbit; -- receive data (board view) + O_TXD : out slbit; -- transmit data (board view) + I_SWI : in slv8; -- n3 switches + I_BTN : in slv5; -- n3 buttons + O_LED : out slv8; -- n3 leds + O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low) + O_SEG_N : out slv8; -- 7 segment disp: segments (act.low) + O_MEM_CE_N : out slbit; -- cram: chip enable (act.low) + O_MEM_BE_N : out slv2; -- cram: byte enables (act.low) + O_MEM_WE_N : out slbit; -- cram: write enable (act.low) + O_MEM_OE_N : out slbit; -- cram: output enable (act.low) + O_MEM_ADV_N : out slbit; -- cram: address valid (act.low) + O_MEM_CLK : out slbit; -- cram: clock + O_MEM_CRE : out slbit; -- cram: command register enable + I_MEM_WAIT : in slbit; -- cram: mem wait + O_MEM_ADDR : out slv23; -- cram: address lines + IO_MEM_DATA : inout slv16; -- cram: data lines + O_PPCM_CE_N : out slbit; -- ppcm: ... + O_PPCM_RST_N : out slbit; -- ppcm: ... + I_FX2_IFCLK : in slbit; -- fx2: interface clock + O_FX2_FIFO : out slv2; -- fx2: fifo address + I_FX2_FLAG : in slv4; -- fx2: fifo flags + O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low) + O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low) + O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low) + O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low) + IO_FX2_DATA : inout slv8 -- fx2: data lines + ); +end component; + +component nexys3_fusp_cuff_aif is -- NEXYS 3, abstract iface, +fusp+cuff + port ( + I_CLK100 : in slbit; -- 100 MHz clock + I_RXD : in slbit; -- receive data (board view) + O_TXD : out slbit; -- transmit data (board view) + I_SWI : in slv8; -- n3 switches + I_BTN : in slv5; -- n3 buttons + O_LED : out slv8; -- n3 leds + O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low) + O_SEG_N : out slv8; -- 7 segment disp: segments (act.low) + O_MEM_CE_N : out slbit; -- cram: chip enable (act.low) + O_MEM_BE_N : out slv2; -- cram: byte enables (act.low) + O_MEM_WE_N : out slbit; -- cram: write enable (act.low) + O_MEM_OE_N : out slbit; -- cram: output enable (act.low) + O_MEM_ADV_N : out slbit; -- cram: address valid (act.low) + O_MEM_CLK : out slbit; -- cram: clock + O_MEM_CRE : out slbit; -- cram: command register enable + I_MEM_WAIT : in slbit; -- cram: mem wait + O_MEM_ADDR : out slv23; -- cram: address lines + IO_MEM_DATA : inout slv16; -- cram: data lines + O_PPCM_CE_N : out slbit; -- ppcm: ... + O_PPCM_RST_N : out slbit; -- ppcm: ... + O_FUSP_RTS_N : out slbit; -- fusp: rs232 rts_n + I_FUSP_CTS_N : in slbit; -- fusp: rs232 cts_n + I_FUSP_RXD : in slbit; -- fusp: rs232 rx + O_FUSP_TXD : out slbit; -- fusp: rs232 tx + I_FX2_IFCLK : in slbit; -- fx2: interface clock + O_FX2_FIFO : out slv2; -- fx2: fifo address + I_FX2_FLAG : in slv4; -- fx2: fifo flags + O_FX2_SLRD_N : out slbit; -- fx2: read enable (act.low) + O_FX2_SLWR_N : out slbit; -- fx2: write enable (act.low) + O_FX2_SLOE_N : out slbit; -- fx2: output enable (act.low) + O_FX2_PKTEND_N : out slbit; -- fx2: packet end (act.low) + IO_FX2_DATA : inout slv8 -- fx2: data lines + ); +end component; + end package nexys3lib;

/rtl/bplib/nexys3/tb/tb_nexys3_fusp_cuff.vbom

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/rtl/bplib/nexys3/tb/.cvsignore

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/rtl/bplib/nexys3/tb/Makefile

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/rtl/bplib/nexys3/tb/tb_nexys3_fusp_cuff.vhd

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/rtl/bplib/nexys3/tb

rtl/bplib/nexys3/tb Property changes : Modified: svn:ignore ## -30,10 +30,5 ## *_svn.log *_sum.log *_[dsft]sim.log -tb_nexys3_dummy tb_nexys3_fusp_dummy -tb_n3_cram_memctl_as -tb_n3_cram_memctl_as_[sft]sim -tb_n3_cram_memctl_as_ISim -tb_n3_cram_memctl_as_ISim_[sft]sim -tb_n3_cram_memctl_stim +tb_nexys3_fusp_cuff_dummy Index: rtl/vlib/rlink/rlinklib.vhd =================================================================== --- rtl/vlib/rlink/rlinklib.vhd (revision 19) +++ rtl/vlib/rlink/rlinklib.vhd (revision 20) @@ -1,6 +1,6 @@ --- $Id: rlinklib.vhd 495 2013-03-06 17:13:48Z mueller $ +-- $Id: rlinklib.vhd 509 2013-04-21 20:46:20Z mueller $ -- --- Copyright 2007-2012 by Walter F.J. Mueller +-- Copyright 2007-2013 by Walter F.J. Mueller -- -- This program is free software; you may redistribute and/or modify it under -- the terms of the GNU General Public License as published by the Free @@ -20,6 +20,7 @@ -- -- Revision History: -- Date Rev Version Comment +-- 2013-04-21 509 3.3.2 add rlb_moni record definition -- 2012-12-29 466 3.3.1 add rlink_rlbmux -- 2011-12-23 444 3.3 CLK_CYCLE now integer -- 2011-12-21 442 3.2.1 retire old, deprecated interfaces @@ -100,6 +101,16 @@ constant rl_moni_init : rl_moni_type := ('0','0','0'); -- eop,attn,lamp +type rlb_moni_type is record -- rlink 8b monitor port + rxval : slbit; -- data in valid + rxhold : slbit; -- data in hold + txena : slbit; -- data out enable + txbusy : slbit; -- data out busy +end record rlb_moni_type; + +constant rlb_moni_init : rlb_moni_type := + ('0','0','0','0'); -- rxval,rxhold,txena,txbusy + -- ise 13.1 xst can bug check if generic defaults in a package are defined via -- 'slv(to_unsigned())'. The conv_ construct prior to numeric_std was ok. -- As workaround the ibus default addresses are defined here as constant.

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