OpenCores
URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 19 to Rev 20
    ↔ Reverse comparison
  •

Rev 19 → Rev 20

/trunk/examples/lpc_7seg/wb_7seg.vhd File deleted
trunk/examples/lpc_7seg/wb_7seg.vhd Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/examples/lpc_7seg/lpc_7seg.ucf =================================================================== --- trunk/examples/lpc_7seg/lpc_7seg.ucf (revision 19) +++ trunk/examples/lpc_7seg/lpc_7seg.ucf (nonexistent) @@ -1,31 +0,0 @@ -#PACE: Start of Constraints generated by PACE - -#PACE: Start of PACE I/O Pin Assignments -NET "DISP_LED<0>" LOC = "AB20" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<1>" LOC = "AA20" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<2>" LOC = "V18" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<3>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<4>" LOC = "AB18" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<5>" LOC = "AA18" | IOSTANDARD = LVCMOS33 ; -NET "DISP_LED<6>" LOC = "W18" | IOSTANDARD = LVCMOS33 ; -NET "DISP_SEL<0>" LOC = "AA17" | IOSTANDARD = LVCMOS33 ; -NET "DISP_SEL<1>" LOC = "U17" | IOSTANDARD = LVCMOS33 ; -NET "DISP_SEL<2>" LOC = "U16" | IOSTANDARD = LVCMOS33 ; -NET "DISP_SEL<3>" LOC = "U14" | IOSTANDARD = LVCMOS33 ; -NET "LAD<0>" LOC = "V5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ; -NET "LAD<1>" LOC = "U5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ; -NET "LAD<2>" LOC = "V2" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ; -NET "LAD<3>" LOC = "V1" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | IOBDELAY = BOTH | KEEPER ; -NET "LAD_OE" LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 12 ; -NET "LFRAME" LOC = "W2" | IOSTANDARD = LVCMOS33 ; -NET "LPC_CLK" LOC = "W1" | IOSTANDARD = LVCMOS33 ; -NET "RST" LOC = "A19" | IOSTANDARD = PCI33_3 ; - -# Update for ISE 10.1, which complains about this. -NET "LPC_CLK" CLOCK_DEDICATED_ROUTE = FALSE; - -#PACE: Start of PACE Area Constraints - -#PACE: Start of PACE Prohibit Constraints - -#PACE: End of Constraints generated by PACE
trunk/examples/lpc_7seg/lpc_7seg.ucf Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/examples/lpc_7seg/lpc_7seg.bit =================================================================== --- trunk/examples/lpc_7seg/lpc_7seg.bit (revision 19) +++ trunk/examples/lpc_7seg/lpc_7seg.bit (nonexistent) @@ -1,79 +0,0 @@ - a -lpc_7seg.ncdb 3s400fg456c 2008/07/24d 19:45:14e=Uf00`D0 @?0A00 0 00@P0 W0aH0aHc  @&d@&d ` !A@@$ (@@@@ P0 00`\`  @  ?U*0x00x0 HHHH تL@H H 3@H 5 €@# @W@0  2 F Ž` O@q@p!(>@&dSH+@X !1@Ā@`@!0[I` -`4%0X@@@@`  0 - - - ! 0p @ 3 08H $@H0UH 3@4 Ȃ# @hh@&`B <p -H@@@ R@@( 000 -p - -0PP]PP  0  @ 3PP 0$p00000x$@HH$@$@A<< _?   H 5@0  @A   !0@ 0Q&0 `@ÀN0$`0!$ x(`O@ 0(p -B@0   @ P @" @ `4@ - - - - - P0P0 -0 010(  A @ wp3_΢0808x $xH $H@$S3@@0sH 5  @# D# A @   !@iyB0@@bB! d(`8@*!"!L&@G@ar@@È`0x@H)KD A@8@P@$ @p0  - -} - - P -  -Pp -\000<`p00 @ @p A?w?0 0x00 Hww3QQ@   P" @ @@0 -C)Odb`с@b w@(J -0@P"b.@@0 0BH6BQ" @@!!!00D0 @ 0 -m . P -( x<0 00 @ @@ - 0Ȁ̘00$px$p$p$p$H$H$@$@$@$@؈H $ȜH  H $   ہ#""@  @A`(rG`1: ! K0`A 4@x(( -p က zP 600R(P0"P0 @ 00 P"j=P - - -> x 00 -00000 @ -@Ƞ0000  @  @+OM b `A& @R@( ( 0>j8 - -0 -P <0 -1P(0p  x P0@ ??$p$p00 0000$p$@$@$@@$@$@$@@_ߏH 2H @@  @    G#"###4L@ (`J  -@  A " (t - ea  J -  -(a@ @" B$$A @ `@PHp@m  -  -0 pP8  8@@|8@0 @@ r "B @ "@D 0   v -p@r}@ -64p - -PTX < $  P<0 0 @ @  - 00$p$p0$p$@$@$@$@$@  -H  MH $      "DȀ -@(lH P0@ 0( @ hp8,:0"H p  -a0 - - - 0 -0 @@ @@@@0 - 0 0P0p - -  0  @0 0300@!D -V&c@@@@@  - p 0 xxHHH 1 D#@pӞ q -@.F@@P0S -W   - -  0@0@00 A  $p0 $x$p$pH $H$@@ @H " H @  D@@(p0# @D40= 6@ `       @ ^00{|߮ 0iӨa Өi0aAB@  $@0 P @ -@ -@  0 - 0 -@ -  - @@0 P0 A  - -   -" @0080 p00020 -0 000_W0 - \ No newline at end of file
trunk/examples/lpc_7seg/lpc_7seg.bit Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/examples/lpc_7seg/lpc_7seg.ise =================================================================== --- trunk/examples/lpc_7seg/lpc_7seg.ise (revision 19) +++ trunk/examples/lpc_7seg/lpc_7seg.ise (nonexistent) @@ -1,1339 +0,0 @@ -PK - -__OBJSTORE__/PK -__OBJSTORE__/Autonym/PK -#__OBJSTORE__/ExpandedNetlistEngine/PK - __OBJSTORE__/HierarchicalDesign/PK -*__OBJSTORE__/HierarchicalDesign/HDProject/PK -3__OBJSTORE__/HierarchicalDesign/HDProject/HDProjectPK -%^;:__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl17/lpc_7segPK -";<<7__OBJSTORE__/HierarchicalDesign/__stored_object_table__(:PK -__OBJSTORE__/PnAutoRun/PK -__OBJSTORE__/PnAutoRun/Scripts/PK ->*__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tclPK -髭1__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl_StrTblnamespace eval xilinx { -namespace eval Dpm { -proc GetIseVersion {} { - set fsetName "fileset.txt" - set fsetPath "" - # Find the file in the Xilinx environment. - # First, construct the environment path. - set sep ":"; # Default to UNIX style seperator. - if {[string compare -length 7 $::tcl_platform(platform) "windows"] == 0} { - set sep ";"; # Platform is a Windows variant, so use semi-colon. - } - set xilinxPath $::env(XILINX) - if [info exists ::env(MYXILINX)] then { - set xilinxPath [join [list $::env(MYXILINX) $xilinxPath] $sep] - } - # Now look in each path of the path until we find a match. - foreach xilElem [split $xilinxPath $sep] { - set checkPath ${xilElem}/$fsetName - set checkPath [ string map { \\ / } $checkPath ] - if { [file exists $checkPath] } { - set fsetPath $checkPath - break - } - } - if { [string equal $fsetPath ""] } { - puts "ERROR: Can not determine the ISE software version." - return "" - } - if { [catch { open $fsetPath r } fset] } { - puts "ERROR: Could not open $fsetPath: $fset" - return "" - } - # have the file open, scan for the version entry. - set sVersion "" - while { ![eof $fset] } { - set line [gets $fset] - regexp {version=(.*)} $line match sVersion - # The above doesn't stop looking in the file. This assumes that if - # there are multiple version entries, the last one is the one we want. - } - close $fset - return $sVersion -} -proc CheckForIron {project_name} { - - # Determine if the currently running version of ProjNav is earlier than Jade. - set version [GetIseVersion] - set dotLocation [string first "." $version] - set versionBase [string range $version 0 [expr {$dotLocation - 1}]] - if {$versionBase < 9} { - - # The project file is newer than Iron, so take action to prevent the - # file from being corrupted. - # Make the file read-only. - if {[string compare -length 7 $::tcl_platform(platform) "windows"]} { - # The above will return 0 for a match to "windows" or "windows64". - # This is the non-zero part of the if, for lin and sol. - # Change the permissions to turn off writability. - file attributes $project_name -permissions a-w - } else { - # On Windows, set file to read-only. - file attributes $project_name -readonly 1 - } - - # And tell the user about it. - set messageText "WARNING: This project was last saved with a newer version of Project Navigator.\nThe project file will be made read-only so that it will not be invalidated by this version." - # In the console window - puts $messageText - # And with a GUI message box if possible. - ::xilinx::Dpm::TOE::loadGuiLibraries - set iInterface 0 - set messageDisplay 0 - if {[catch { - set iInterface [Xilinx::CitP::GetInstance $::xilinx::GuiI::IMessageDlgID] - set messageDisplay [$iInterface GetInterface $::xilinx::GuiI::IMessageDlgID] - if {$messageDisplay != 0} { - # Managed to get a component to display a dialog, so use it - set messageTitle "Incompatible Project Version (Newer)" - set messageType 2 - # 2 corresponds to a warning dialog. TclWrapGuiI_Init.cpp doesn't put the enum into Tcl. - set messageTimeout 300000 - # in milliseconds, 5 minutes - set messageReturn [$messageDisplay MessageDlg $messageTitle $messageText $messageType 1 1 $messageTimeout "OK" "" ""] - } - } catchResult]} { - # There was an error, probably because we aren't in a GUI enviroment. - } else { - # All is well. - } - set messageDisplay 0 - set iInterface 0 - } - - return 1 -} -} -} -::xilinx::Dpm::CheckForIronPK -__OBJSTORE__/ProjectNavigator/PK -/__OBJSTORE__/ProjectNavigator/dpm_project_main/PK - PP?__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main G,PK -H[''F__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbllpc_7segspartan3espartan3PK -j*5__OBJSTORE__/ProjectNavigator/__stored_object_table___L|FX:{vGtIaW YX rggS k=#  /  -')-B<g  -y q' w5  KU ~ x?_ -Y`g ƃI  -J  -xdvr?-   n<  - W R m: I - T| hv F  -{ ib;y 8F   Br  ' o Tc Ft  /8-Q  A-K y#t=  - -E !"  -6  -I  U O 8%-m .v kb =_ *75#Z [8 JZ    Cy   -  h b /n [y i1q (   D   -P :V _ Q/ حB   р G %  th  uP u 6O & m@  u> -  W  ) @ 8 tx = ~C-ȝQ :g  @}A  -)[ 8p f M0 ^A#1j CU L-)vh]H% V 5q#[ X_ d3--S  Z  NA0X t S ; c y  p+zP 78^s {v  & FAd  -) ^;vi  X _G  si =! E  ۔ -tg4F @Ҧ*\/u N  - bs =- vf  -<-Sl / _)h h -- q ( wL u?YAX є Qh B ` D-L I -`EJ r?| A   y0   r -K ns L8W7 Kg(gV d3  + RO -!/Ѣ N-<  - r]U 9 фoWN  b I(-] XX ڐsJ~ieSsvs ->?] To 3 -|f ъ Dz E \s 8 9 R  z r  s n -{ &! -1% i  E YqY t723 :-m8  ) wj@&2* 46 -)\ q 78  - ; Qk fB- ޘT  I r >7 #D `!g B-[E"Dx i)   3Ino G jo (54e5- G+/ ث. T h| J{ T 3   M  -@-lfv F E 90 kME {de$y  .]] N*-  0: ݇u -.T kZ  Y ]|-6 w? . a  O P,i 9U0 jB b  ~ *(9 } ^  r  n -) ! ˓ E  -  'Wc} Np R -8 gMHNbA -4 т LF  -B -Tw   nu  -:^K V -9l 0Y:H   5LY Y`S W' R --i<u . ;3`i -͙"" jb   % -2-]Rw - !l> #r r !Q G  mv "-] +:  -QY  3   Mq[C #C 8-ϏQ )'2EuhSd D nM~"4 '-e C 4@  - -m 1 l -1  p >P ]d}M8^ R)Y  ( |2] * !)[ !z  -7 ` ^k 2  Fz'{ 3X _ ;y N.  -jh  T: 56 ]K  ~&# H ?3 / 3bR9  Q  #0@ s -i O -a VE-{2 .  L 6O  W 9VtjN1 -xi ߅F} @ C1-YX:64 {  ,- U(2;_ -~@e  -ŭ # \N %Q -ba O  - u  [,  K  |  NM   di  q] LxR ba@  YOl~ F-  $ PK E0-w  N,p  -} i  i  &-9s PS !   Com ! W ao -fM y -W`] XhfP ) c T b  z946 ks  I;  - e y" *-k  V tg U Iw  FF ڱ" \ : % f E5  - - TB  - o -   /  -^ -X{ #,2 4Y -n- S x6 ؊ ,o >,} m=$UA ̎q s  ![  z  !4-  D} -pX Wzi   ьN8   W,r  ;? { A*  -&Cx   }en%x ` -dQ(j HaAI- G  L-MsJ  . -  |^\Ĭ - К =W J49 ^N%F  -9  -  F'cg =33v> pI# T  | A- o` ];2 Z -GKq>! n0  ["9  G- }^= M y@  z  2#gv  -# !CGZ e P      , on *_  | QeZ ~ fTls <_] -W ш $ #  -r. d  P|  -  0$  - x "c  *     њU-3JP3  -Jh o   d   ̿& [K-J  ;+  %p % h ;Q m+ W }z?   ~  vs {a  R GK N DV/v! E>  - O;=] F ei. G { s T%[Yd -@ Z tXc ,E`f` >' 4 ]`K 7C -`!f\ J w?  -b  " 1% x  HQs9P bY  a d Hg +  % |f Ur k A$ , Y G\[*@popnI7g-q` <H q  -o ; q gtG -(o]  ' %o*QU   |w @% ZJ -RK< O-Il .J;- Rw I  % +V nL B A  &TH  -tgu -.VN} M- 9X7 ~ F%# * ^ rB Q&  V~ pw ja Dq J M  -)1 3j0 ( &; p0 -3jp   Ja$ (J-N`TPN  -t<D:j g  -k  J u  FfSbW `Aa -BS9 ?4 % -QS ʷ!- t oo  PdIa 3 V GCw  Ig,\+w B - N%W.- -PS &C-f @y?sn mY uM br X: S  ;9 I m}fe OZ ў C6V  > a`z a8 8#  1@5{   1 ] yp B{V -+ 4_    f P '{ )j 5B$1C%r '*}q!  O  mrs I" ?  - / ( [  %> N7#k   4F " -   )cKCq  &C 5 -]/- Z  -cb$B  ќ Z  .,&  _  [Ln f TR 9  # 8 "-e? o h n? 5 -N 2 OK c W7-5 cewT -?"!2    - K w?bd - {Q o|moA65U Y@ \:G`>-'n g-í Hi CP 5 2d  - - /  L-- r& r   r.Ubig юm  Bj e -;gf/*D _ =<$$-  ߦo ) }  јS j3 D|  G $  x T'  TE 6(qg#kB} n ɚ WC  -L Ke B[G  -AY [ Oq 4 H- (z#- Yt >? z=-K  -1 % mi h -kbp $: ; q/ - -\ d ) * q #  lp ۴xCd ;  H A` іL@ `2 ` M  kc;a Kb] o [ 0c Q|  ra <    k' &'[ s  -  m |  5 =  0 1&Z<, ~ #  5  t_P z S ~+-i 16D  -* g7   ђz  _ R    I ц ?- hl ,z  " =}  YV V  W y\ VXʈ %i i9 6n ?~x '-_ S?R  3f ;   o+\ ? `  ѐnL  -cp6- > l BF`' -[  ܔG   e$ [dD/ .(   < #    e 0D G o; u & " m\ { -Dy } LU fog K ?GL c<   Q A S  - ? Ѡ P q  M [:D  -_ OP l7^/ &'v.C & )/  -   oS (> -5l=p s  -c E ܴ |1j : ,5  W  -N + Qw\ K  RT?B׭P?1_M~6{I(6@\L$x R4tAC(>Cܑ=aDn~?";H(pŵ_MKw%iLa֩Jh\1%KdJim +j KwY"L gUXH\_}daGFїA|~ǙS^J -cS~Y2H!OʩH -L@J dЁ>_xi$@0EbVy E jI;BQN4Zf[O;~F:A<N#C]==FAo׮k}\LPCxƅ;Ѷ>,nM4P5\BAK=x -܌Og[.hgDE2PپLP#/'5BfR9,{PI}U_AW=(@WA|#͏Jr^~!Bw@H%ee@3Vy_ N]O(X2KڧhkTC#g:DJ׽3]Nkk)Cyqv!J>cHⅺ* -tCnU'u_?wOj[9L*Ct΍FN/aVTa!@b/Vz -lHL>1e𘣖%IF&xS2amLe:Mb-(:xYeMY% @#pDܼOUݘ""[C/AKwI z@ -{՘f@ïC; -EL -RqH VIO3<6ni3@΋>*L@Mub>b{(3|(HJGeZ(}2FVQZf0VrN -H3ςF%LX+VlA5E͹fLr|LzI>tCg%aE -#FgŠ/@p -BZr`țL̟Җ0a*C/JhzvZO2iƠG5A4+| -Hj4wDnJNpj -t-Bʵ@)Rd+::DFiLv6L#~zOAQ'fL*M% -H~iѱK˔mJZPH 3N^4>A@$IpJY(,-?H*QRtXGY 8[O7[!- AJQ)tQ6jF9\C -I%hi}B]yy+r̅S@L۹,L6FB CF -rnABѤDDOǡaC ]F̢_EZY2+[iHDzWdo~>FNp!&HP?j?.$>GCWc -yh)O3g3/Tk1E-+UE-sA! -3 gv?,,sgO߸U/i LÆφF[V9.QpwI-˥4(r*?OrO˒U%SCu/HKJPJ̣qe2RTt^)BH_J&k -KۄmvsuOy8l3tV&L +qn*TfOΘрL̯|L@\Ig "QL;Hi $cB^4hqk 쾹A޲7d+ߘz3a@(ܫE3Ia6hF(OGxRАevG-%Pk]@dfE!@ZrctHo.u_m=ʬLcojXΗ@Ja[C{~KȺ(ՔN0S9DnLD\d7 -K"`7qF~&WtRIO$sp -h߁lMcqӕ\CMۨgn̅KAiNtzB吂\8\;{F)Y*I>ucD7L;hpFrZr=[_.F,l IĕE:ה2"(OݘRAsYLl޿KmN:.vƾK_DqIhMHnARHMI[?nZhOMԨ>@Q5KBB?>+RE9L "͞KI{M+3;Ni̋Dw[FzAKi[+;@㍇z%Y!:@S PAꀺBMEMTGEiAơʦ#&Q@`^ - I$jNwe3raE+Mj闷QDGYW0PshKR6پ>tFYd(הfK.}vkk?QG*ik\uDѹe%Ccv!6v&O:A~ OyOr -;{HE:A&0#P!H(k"1AA@l7H4^Y/ɨxL5.fڐ2j0R/^Ai[zd5@޾Q7F-N -vM"[>IɆEvODi;N]X4_U.C$=&6MYcZ0oH&ӘU; UŪ@~ -4b=*JQeYvbw(E臊׷5Z[Aer=sJ769J3^W`{DB_gBߤMúvvcDח GSɅ!D6ծ^FvJN\L$x]@n| fyEI%'-UGH&ؒ B'.aKk˃/H1[tJ9bEMcN\⃙¸ɱpB(nIMW4@ndJﮧy3*SIFGyUʪ>k_9O2{ڴvԢCωtN¼07jH>gqNC -ȵAq ܴ@}W]II:qsk@: -/uF|LnghNοy_6$hC\:3<Ʌw@' -J6A;!CTnþ237Lf[&)IzANBeHp)^K?J*OqbCgR~xG˕lWgUUdCBarPcGKθ -v1!+GF⁾zSRK$ $-Gu[Թ~:AWj*oع EueQ+TWȌVA]-J|:(rBчzzWE@@sN̤D4d*C>B';qX(ײZHVcAmMgfCvH͘B%o ƯL{8KD:3,MY}1( VNIÃt2y5NPOne0J(NLfy<@IYk OO՘j:H1뒄nPN&lMhY\Dط@Mò4%)Mp޺e-@&H=H1uge^<LF&+'W"B+D-t2uт8\CJFP)KM4XC -FlꗻpDDCH>^L~#"-]FdB;x|'.M/_؞§o@^x尧PHKH6oWo`y I}Μ dͻz2H7=7x6Np 'eRŸ#B4%6IlUYh5>f'J=lfb -v%J޳5Q4NSHœ([uHCH|#zUAXJ J]osmqtTG1D¨{6 JiaFE`ki;Ej&4Aml@O Y48LDCX& 5+GOEs`̇@3? 7OI͢CFH]O霏_}E)JA -A2~۲hJ~>GGŃ+GHXs -|Oŕ_I&5OIɝj8Ť)IkZnz4+I@eu9IVC*@_Vqe^K ;\,GuCdK -!JsC -΄ʎHK4Jd71_N.`9gtdJ㫍eX"ܯ[HȀP;ca}TDs u[Is(MKT+"l/Ck0Z6Dz0Ч#)< KB #QgKyAIa >]I.^@I_qF0)0(^`Oh q_K_>"Bkz}I΋,> +EFqؓ+c[Bv) `s{2OĄNyRHVAb$շjNi̝Bkb_vGKӝƵ#8*QgJJZhL MUKVStr7>"G#2{Shc68Bꖄ ]ϞG%jd]Y0h@-)cw3 OQ!M]XuL8M4УJJ81l$:'H'Z*X@zeqۨ%!DL1fFHb!@^GpA06P$nk9֠6FE/66>6MI~(>a?@լZwHsa<yN_Ǯjgse!Fˢ]w/`<FLѽ:o kF4=KW S]"Mk[E -mJѤ -mSJK.%EX+g9F[rYxLJ)LAzƣv>HyMF GP!neFjt>뤚LUHmہ}+I0uGtN$򋛞kGG1"' -CJ/l5vUlPA| livN2&}c N͎PqƉQκBp -8D%*Hb;D?Ϋզa7ρCa}-%㲆Aw¶b*IK?Զ.ĔOgN-8D|[AuC!J%fZ`pzEnw!2X@ڱW:!9ݕAJ4aPۘ@9|!ACNՆd*\Ev.$9I`P\8x+BF/wuJ\GNXեNJ0r9 rPD එ]y\syGq>p셻)IV K܇Gl;DUjE4}16N(H~u&@@˟X]#X<$E#NI1@yGͳ(w#: -NߎdE .MܳU+B䱿UNLćD/ -ۑsA*{GևU16HFvF2L\ʑbU8Hד<,v47wxhGvb1gMg`Ν#ӅL%Hi~xװ D -[zkz9@kI!?^9$jDҼ`H۾O0BmǷЗnO=&0 ZEά×gA8n/m@OBϊ`3iĝ-GIʠJS@ 2AtM}OWaH~jRJϼ둄ԣOr& ^KCژƛYxwFēJ8mƎ)M{^;} N~0XA -NJoc|bMX4$0fDLyxəvI@I=#59i Y|B؅nIyodNF.uj(_;sC ʒ -Ч˘7O׿r1+c?G] -qDk𺠧yE?sU -Gs.)\!ZڞNS%0 -XE~F30kVLԒ@@S"6AҪz !9 -KSy{o[88J0WՂ$U B忠I PܮZ+IA8="@)0ynO -L!9ܚg2xNb^mrEEHĦ3Ch${EW9 -F+d1jܽ~(V&O,sH5*UqL#9WmHkFU|;bJc -Z֥]A׊e\D8I.H^Yz&ea G:mh*;1G{E!R*?K4JYyg;bJI _g)XQ sAɴɿ`Hߕ\C'Dӂ^FE+M5kqKt7\duKҋz;}RM^d`OwىIW\ H">R'Hj"0y @hqCgc4\IL C8xAzz׊u2TA~ߌ=V3|CG -n͔?UmWC֦z~! Gv-PbH#D͸n{\ cjK G5r3OL mMW e^bGՓtA *PJ$)`,A^KKX{⦴N2) H(*[$E8LZ9O{%ߢU}Mm\ -w!AgXi1+i3@ԝC~"ߔTBL9cS$2P"HG{ٞņ NZlTʦ|E͍]VNAbH6Q {&T!`ND-UCML83͘G@C)0-X#Jci𒳄F]Lch -c6vPAWB.n -IMNyV"G%TO֘5E8e])OkH(19S#Au"J^H?=,Gf7NGm~D*tKF:omܪL{X]_#%O u4m@µi.F/)D=Vҝbd0IIjCF^H;lCåUM -Nނ0S1X7L̶"y_iD^NvJHw˅HuEڲCP2c#4L'ĒQK5PǷtcJȏ)uQJ#ˬl1%b^Dpԋ9jC9 zIKj8CCW^iHB9m>x)nIEt?`hEQG60(r0٤eIp -oDnXO[k_dyA1i.هkuH_eYs>\Jb\#K.mMCz#WTIӝqa($ I1 P:OTq=&E%jk8EM'Ch.HBo=Aҗ7߉2v~6Vv@GeqlNMڠY \Q`D)& We+k @i굔#{|7~QG8cnnd}өIb$-*nAG+ 8A>S]9E:޾_z"MnqZ,uMIN~h:CydOb< ƟF܁M=GO̹N~[`H,~Iv|4 -e-AwRXQMEXR`0xp:]sL˯3+-ɿ\ҡ@E3Bh@ / -G+p.TJ0Q49UDeI+aO1DII[m&OIkvXĔM;!~ 7\H2Mď&s)NՎJ=N -OSΔomҎ2 -DC3sĚ{t7#O%k7lO̐wvC\xե"4 #{Cѷf+)DӰSKH/BpᄵWEJ4HhQP9'}OyowP#bC4S@c8&"fLɕL;b5aLePvJ>3 -RM -ٚ9|PyN_C W.JfCPE{g_O-GŶ VNhqJ`"A~WU*,Ɓ&`BNm:^0|h@KDĄ>xmH]YpN۫.A(h-dޯaWD-2XGn¡;p[Jrz=J.SVjNĕrŰ8kOP5L20C3x|C쯝zG=z Er#1-_(D;ϢEi{EJZMҝNx=_|Mqz$xIGRqMeIlt%śYF쬯LFT!8*#J)[Ų4)|{xH}BQV (gOOjxH|!y]QApjz#B6H9g\Y"b` -L*(+)GQ^KUC@|)BL -55.dN -ڞ}?-fql=K O8whd|,IO}⭚4aqhE1FV`eQ@ڳ; -k@)BM!~Oh#LA9?cUB&X!KƯ >PZ(vN3)lwo8Hb2#KJBp3.IS@?HđbmNvP5E[obj CH֢kB݋kF5#%襯RGgӮKRBY%#GxL_>KHi@O.g|C$X\0 pmK6Ϣ/(,N0ځ:MEV(%S4㻤FC!s»I[x2a=(NۘFwLBg~m&M  ęyOL˷b'C#Y7pJQJ%,n&߼N_<௩ٵC?(Z@L@ݞJ(MJ(Oˎ IaT51b^Kh%X8>Q\)E݆ - ᘁ\ -٠HcfrsM(@j]MEL3b/b{x|LRD,DiP"Bu_t*KK|!$Z~L޺wXKkҐ[bJV9LܿF*.ۓVLD@8}n1#O,B@ďxcgLo=]l4LݓZFċy]GM@KFqŸXNesj?ˎG?\Bxجѥ -dwNԛz*FeAL)N0O#)z񡞿MC% 0*Oഫ^ފ_Iyw:e, -H~Z܄c<K7R;r,aNvB|ہ rK{BS!R@zdzϳzl~K.OWmRReBzLЏ/%Hޡ҂xW*G&"Y|I~-Ns frQݍ HՈm/tey& MZ -L[@rgW@y]+r -ՄLQėOAVILK9aSحSNq˖EH -}n6OFŘD[/y>K/oCb?Z-e3@*&%De_} ؤ{\D}[c}\dòEهc?V!%ggK01pd`K -F ͡MBJtQNjԹr7B,BkU%xrHl#6/*6!@%Rڵb*OހGܙ{<0N8YQ(0~67C5sQ$F*MߍԉέB{wthm+Lꔴ2z"EƦR!)A؈ZqTаІ⟦J)#3r;J|%a:NlXEޢWʖQtAxlogߑ'H=Uگ:˃E7nͼNJ$ F^I^a"8N+hBqퟭrlK*[8EFi@pn!!@|Ll0cAט'~,C>~CCs"Dƹ>a4XNTL//H+An/Cݗblj GnHiMIG jOFf@' -PY1{A-;~>?K6,Bi}+zx~tMߕ7c?G8H&QH.ϮytD.;!TLM =I>e~iDZ -HCAwqNYO\$ix!nr%IR`R'ŻJ4=䰦$R!BEQCZ+7F(7;G+=B@ѫ@ټJ4ż|ۈAAv)"QCJ -mdD͔iMTY]0sMQD|XLDT -n@MI|bDЉ`T+k-AXo1mq s~Dy1Gv肔'GjM`PjC"FÉB,>zDP\vαBBѭޒR5oLJ9n/PG0GDT{=LaIe }w>q KH*zj=׿MA\On|>ۢ:=IHыV"8(UtNgֺW;̍zGG.‚W-Ccf͕OxIQmAF߭>KB:?Иh-ߺML^ -Z -hLHLPy?Ф +HݪmV J4.Kj K7HZA%u -JjͤjKJ :õzK\7"an!H\y+=^TMflE*۔Q"Dm JK|A{wc:)M#R(YG\VGW'N~rLӒ']mz?GoC=i֫8p~mJxU2=? \?Fr!W}5F쎇{SDc~RB [=ATB&;DbrÌ}8 @ಃgby1vǙGojTܲ2xOeBvijހH4 -a%\ -A%SAiW#_^ -D?^x&6f>_Fí ۔*.}E -c -mxfxE^r_G.#9@d볰K4gLrNlٮK=gN֟EXL}3nĻF;}h{.lLqUmN6 }Ѥ|0=sBo(͏le]VIO*D3xB**#ijy|DuFS&EBÛeyrr2C;hگѪVTZ"F]?wʨOJ}]-4y#n=^ޟK;ju,|"MCb̟JV[L0{Ǫ -ߪ,OlLp}%Ju?̡nM˜wyqNSJjڈKyD)OӿC ;ư07H߾X,ƖȄ*LqqI-XܥIim^EpnL~{4,I]nB"#? ۟BΓ%jĹ'X҈GG,v-h_nLY7GDqV>z,%EۇDSO<+GMa -/`jD|JT*[!I8o&+qAa!}b1hNai8.2LC5"aJX_|BQ[ -Ǘ06oECE%jYSiE!w@MIŬ%G`n4A -1bF(E!]'DGd*ĢMf^>J³9lZ S뮆@ӎΡ2OhqEĂ\?kBݍ# l{Ci@(,nwBC!q - tՋNڟWb2CzvFLxPDҭAHED&犷C&@cpϸi)m{D̟>eT -xH 8DH5uBLE8OM -ˉJT+,“BE(*LYb -DZr(%<2BIHfY۳H(ɨ(e -;NaL5e -&J@+qJCANNͷGt9Zf!6sHEo1_[8jNmBiw§ElKKAf&K1Xݺd21Du 1.iSI8x;ɖIM;j&I=ox[7OGsPMO%=;Gx/.)Nȿ\ij=!6Cϒ~ /[I/-EyXJf)QZNRZU"ãClϒ*uxB)IL07%@<81^F͡JQK'[x7_g^zL`BPICQ:5SI#%}fznBVLOے=TECǩ?P[tWmJ[3 ^Jdy] }@~іp^=LǶܯ%IMZC<2pY -)HLUQOȫr"FIFKn5bj'HUp죿@VhHԨs6OWyj̑DT1x - (Oi pܨJԇ^%#IwIȣ,hš-pjɤ@M5I - E꒻OJ@ؘ$et dT᝸Nƶi0NC&7DO$^2XбaIΦR=N3.IvmExdAA~B-HMis.'7 -w6eN2Oi.eoGџRɧF> Dzb'1 e"x WSM!aޯ|_He\ֺD_E_V܄ N1`,GPVݍ -J :C.ECۙ$.%yOY0S7|`ީJe˴XM@Nt7Z1)jRNPZNz}b I/B"Wg$J -P7Z:QzD߰ߠ"i#KHﱪzئz,gD)|>ׁVES,[ۗ.FКhfufpO*2M͸:ϽLF{2Hx֊vOC -\cwA j8.h7*FKK[m/1DJzθ;D.[ޣ-H0,'v@LuB˰^LTDRQGDؙd8G_m0Jyx6usD2(Ͽrάô.EBU[EeC9E`'g~@a:PANwHӔ@ԖZ;N2Pl0KW`(ggFcOo +) NX˗xvI,h{cٳGE]3>ѰQW&&C!yDž7C, ->S'Q<) HN@:IIeMo퇡ZCk 47BVrv$$K(2zXKCçOPYǓƓyTBK*clR!?Y_I7m?XeA#IKz?ZdEC4 Nw@ᣇAzwD~_![ -_"MsR(%Xa0bwBbG|1dO7bRh{JB?ei H}@K=̗E`h`+nȵ,@_ -6X^ViC5J_:A|@FD@"˖2o0sB7[87N:qhC + -PJgwG-n/CB-`|v6BLE}/u:YfD -Z*rD=RX*:kHs[gDƁ=B&|FK (yEVGHv]_1Kɔ^ -cTx%L -UrVgʠK\TJT+Kf@v73@׼MU!"]2dTPtCN1`TMם\&fHd=9N/jPN'R/KWs:j̇^KCgJҔ|M]TAѴmTG6X! -jTۤ!O8sw<:Cʨ1#SDZlwKԇ -Z۔!A*QZZ+>HNJt2Tu HO~%)F&Kᔯa}TUxPGbS{TBdJU%e2;m̚ N0+EWCDa0B@@ž4h%%_ -?H%IXnhj}EʴbB3 NהὀY=g4IswV5/EJC =sUȟmD =̦x C;wl3~ dE𻨼*m+K)H5lzOdfN,D=otAAǽ<gM&|Fs:zVI2㋯^DU>V忱ͭO$gfEcIٕQNemJD]5hҌ~KN6 Em5BY5}l ;Bw -hh8FմDߌlhqgLK8uS赪n$JK?p.Yv9%G?t/ Fr2<&4c@KWpW[LÝߏtGlOgӂMߌz#t@5nD.[כAhP?0>Dykx'NДO͌D'Pk -|Cn±P"6Hr IgY0%bMeKedFr|]FT:/GnCԉ҈ ŭԝfBi9Or391nNk,j -`j>%L ?y+uݔN(Atx[;MуϟXbïtY*bEk+O"}H{7j#ŐGGZ悒4:YF<0y.9șFb{ =VДK4OvAgALո06.CF~jGj6GHLt*턆bÆ|u-Y@͹!*U i3+BDŽ.x9d9]GV8Jп,uԛN݈p7;dp<@<}OemwE~JfoLtƽ7QСUAHߨ -3ܞ@E"B槺O3}E䇂hX1UѩDٰz;367h=MSW%fL$O//q"LJ𒆿.<%HYDHF̐Ul3=;FE\]Ғ%ׂWM#0m;QKo^uPΟC%)-b7 +|bzF_CMbuD$#ZJEXŠ֏ F9u0COh)l)!4"LPzFޠTC΃bŢ@jQW^p%!RF5㕢z%jB?/:iv aFsV -ONxܾ-h^L[ߵLpG?1 Ml - P=9IJ%g<@A,?J4hBՅL&n%[Ӕ K@2,@-U -IIc{hE)ZDca&kLȬ;YL<(в/|,Cہ~UI S7K_rpk(jLTs(3AC -JHcp, ?i-qM8ɼwx9ݒoOowb%D5Et φ\3FmIc0@1٪7xU\ʀG5.Qehj -VFۄj% -^iO S68te -$ J 6/’ON ,~_KH7w7t8ŒbH gت+c` -GU?м^hA+m@k jF*{)i-NS -ˎJY'xDbYFp HL-eHش^Dh6_)G6 5N?w\fckjGr⁏m\BNlZuCyt -{:HS=IkR0sF׬0v -E 9^7h$$z@iwi -AT"Wh5)HKVIj!K薵ΖAr6wb3]E[ǔ dVB̷g\ OQ5w_jIEjv y!g!Kĝ{_!-Hg_Ndc P86>@cm}=<&P'(GaO3<żQ G8H(2:(nDz^t-m[#G0KR?=4aI ->CA -@LUh]bCIeֈ:K0qT_KԻ4LB@Hfam!/@$Ab|(MK $UdGedfI@d(~.](Ir@ -50`a/DO5d;:/ -Hwj -Z.Mُ@A'qA?][~_ Cq4*ϟ (9C:2-εUD`äs@W-h'TM!%V d+w ݰDb}U0[nN:PLx:=+Lr/~NxEϠ{&ͦ -kQaGd=)=z,L›7K.s nI]pp!O􉶣-]= -i -OⶈIJZZE)9JҠ_{MZ3@ AS{Yw -@\F> wmqZlP6E6ў*CC$ZýUOO!?]'&H_$Va)޴Dܘ]` #] -D!* hMy4ֱw"RL -z.'JkJ̏t;5Ng^4&ޒRCо`O"+ENNE٣;CL?8ypJ"^v[j -K>?J3FZH -M܈ZNέ -qF2ZhFɖ>%51;SDRҰsBjY#Xȴ@EZjdL>&ZB6fDE !ڪ#B۔[ f@UwQ=j0G=/ϰH -MIezZ -:%>J[, M=Gca2pB`'TFήdNaM..6H ( A:8zDی 70gzA_@,OT,JRu+.B$Man:?qp#UAp9M%Ф -ةqC{^NIrĆM:lfv@_c -Z)0R*qE׫]YEH/5R=0D6apafTIByۼEqA]E﷢_nPOheOfM@Y:cϲN-+c !iLDJg`03;ʣIգ4WnX -BTX)#02Xld)(rIvPq@5LO*N.g, -eH@EXOtadvB{o^GB 28'DbJX~7{פKoqꨆj[LBM^Zl?Ce-F{Q@)BďcHUY-Fi-\8|+gEV@b4B Ak9ݷ0 -֨ME 0?rMO+-KA|g JK -.njO%wn#={H- -UYu -S-B}θr=+č۽IeNU8aLs͂)QrRD_flcYk9O!B$wBܓFm|JBȡ/oD+!Q=~E{N>͌0%Ld6t;Q`J)Xs8gv7AԵ+0^@/x:CՅsu\FkuUl@Kt3ؘUC$MPM{S'nFG -/2J}odK9KMcrR}Nm\! FHV8#26LXR@p%"6GGXR.F+pD7mlW(Bnv6aVBpBqPtt%rIߋs 26GvK=9*YڊDOW8G7p5@4,S|7BG0{܉QORfILJ_-MЂaUl3[T/UFYt!qMiIЫŦjw^5TJCC`4{I$0Locz{A,K#CcAʟݰ~t0B9l5fK0gӢH,PFT~LdR_$b;oA 1KDmSǓB?IǞg -`4H6KޡYd"N@rKD%>8Hɑ/06 -GP{:6@H8R'bSj [HT{l;v:QjL;]@j0A')f$A߾Zs똴N6yP70NBÍhG5x&$PvC9|;>IEN2|8quaS1Lڣnr>R -)GLFbTK\ҫ+1vO͸j5c5UVcMyJOLl{@P@gԠrqqH%bd]OvV)e|N8D;6TNYMUf9gОtQJ6]w{v -nߚFo!RwH%c -») ^BFORlza?rN̥*% /TI]IˢdS/Bg9MH衃FyPIHЀyK oHNjT}>c `CGyd*ڼrF츧L v?RA93UEh5tIȊ?iwE3ER`:Kߘ%I)Q: Àe\IJf ^F`Q:K=s[]uDo0gϲGCŘi5 ?IGrK0yND=OՓ6CX:2% AI?ݙFouEK2i!_誱HL -C&a K -a*vwZ&ACk -+ dFa/:ߨqJAIKlkAq ^*F9A -e,kL=ʤqbAUUhSOK7Mm*IԪN=X -g=Kc-ڴ|IZG/3f/JCJF-TBhq)S<@L@Ұ anJݪF[Cts}ALıoiW~92@G@ Q^?L&E2i5J*rCd5H -I$iɣdT@HުI  -kTƦM•N#Vth5E6"%~_/DB%k CNy16ѸBё2'l{YABSx~/R -LN)a-hhD܇v"ŔICMSL^BbwSv{J;P'!KO_L|-ovR ;G&b:|eEH#S^lA3kעr~ǧ8KqD ,X}KJώc[bWB -D ߜ*B,B-G#@Mu:D.='fG!'- -GE-V~"nKK6j8)OMT]7XdDldFb_,-|X~NmB\̱(@Dv}ǭL1F/r2uX[,xIͷzQ_؟btuIY-C - (NFLJB}$ťLq}W@FDLSt3@ލ -=Ws!K uuȡ^D\G7F&#&F#hIiVN}L/V,&r(WF"ӨE,:GG"DEl!hIQD'A/O4NyYЋĴ=KF1BX;F -Kb)#hن\*Nø[-ynK«|Ѽu{ئMeۿyYH -QFRCmGL -qx?e:bEv&hYaVqI\wcnP Dqգr/ѲJ\Z9"WD=8fwu!@1N3mO>]F_ ar5\YB%9-9>+PGuY8 -V3LS* }wMA0![#KN]h8jK -ڎ$dܠ+z.|O:nHOm\KMו3pDZM##gdRQ5Jyg$ȯ-GxOSz -YuEH߻#ZpսB&F!nicY @8Oii-W5!AJR+O@B%v -W))0b5Nny}QB˿Lr_`8=ED]al#xSGl1 A(:HbYpE9PE}B>!+S'Nk*@Nd) -?+Nhq{\*kE8LDY47GC6zـY#Gi?^Є ~:9AmȳL5AOHˉ \O-4C =F8lN݂ϧ<}LH؜8mOTe }.L e'C yMGIڥc[JM>zxrO`C7 giM -`cyDl4C -!fq~JwN2 ̄GnNIjGRNa 9[zh̓B5 OI`POǠX6h`JTCGO##Jx_O -HZoVcujM=R:?B|r< <ϊD5%]O'I&͜sKBl$ -R6+KQK>a5GCBHquuKzxv@/ -1ۋKE߽Z#ME?"ea/tъOĠgOqYo[Nt:aIKF[&"Z>SE(%m 62ElWUu ^+ O)''jm Y)OR+I=,mܕCCjˍGn9M>F(}̉\A #ʒMN)I+u =E)A$E[kg9x\x1Gр5=ZwϫCçeNU+ҷ3v٥NU,\.J(NɚdGf C?앩 -Y+Aʢr2$i*GDÌN״&sHi^.5*Foܻ:>r8aM5.Md@D^ΞcMcoҏiWOvm8|I$6NA2Y*s›B]T8lF)Uf}eF7GJW&K,("GZJ^<_T#Eۦ$,ɉH$A{ -֏dF|A8w\F]!kG`sE#`,v/M>O߃ ONHnIXtD_v^D֕ȓ*mE3-d'IOڳ,Hhu"H2s}DXc5lNLվ*0}T*d.I -?e*ȧ*J rýTjrLKێĂ]Le6g{B~D/tާFo40%H,9A[hx|?1pBRCwe3HhP@7j8KA)Bv0XaO}IG12t#(HK -0N2)9A$ɶ/OLQ˟cM<PV'\KK<"(_o5HޅM9V@YJq5K!(P'xCJd'5;t,qA=fLl6/ƽOJE!)'Owl!dGKn(d]:8PhN݂hu,#MêLlOn"F(d׆yGp1W7c$q1DЖҚǺZ6NL*"Q|H-*ZHۚgs[OI3+2SHkIԭuг -E2MOsAx|Ҫ KX -}z BZĨri9BgM P3%RMRnBlMsOϡ؉MeYE5) (f~d0AM魱u&^5xoJ߹ ii ۯMt:j^K5MYs)lO?.yı<7BMhF1{0wBȩnmX0R -G0d4d;NmU"uv>^*_Buڣos/O81mV(EDwCA1aDccDۈGXpYD(6` - gdE5ED3]2Z@}3):ڵ`D -CK MsW/ىH$4r֤SZJ xsۅ;!Cv@J)#a-0$I˲߲sl"0Z`Nqfs9 -MN63\Nb`"I:>0H ׭PH[F9Dp@zcrN!OC9HduCcKN>GJmڜI6s"+YgBgvcLot)9VO|O1&' -fJH#}Ob(N"&=Eb,oI%w*|rOU1rOƭ$Y/AFǔKH[KGS7 4;'@N}V2XWB~A?G)u6`@IH] 8ID Nj9 spP(N -JL!]λG"@Ӳ!6A||Mf(#{["OVI9amNAM8$ K1ŶiyNWaC-픍VeLi3b+l)(?HbH -Ak<*,B¨rT{9W@WbRF@N,K |}h[F}[ %>NЈnGFWKY`·QIeq5|ŸCj{"^txNcB -0 RIi exQCSI/HKV- -$|#N::-uGёl@LT}GDʍS -lEHeTIQ&SAO/~rծEl -9O&Nr;J -eQOlj O[vQ/LV e<%ApT=aH$IDžj)݉| HO͖>MHPP*8c?:OIT<@~]GGM_ (!c2|J8~l}/hRŇN-@m@l>0 vFLA;!"!]edlGe~@k{#HL%d -̅iJʯ1ESƴUW -F(J9ѷOLKT?2$~EU:l!xOC?@ABCDEFGHIJKLMNO/ - PQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{/bR[U T -W -Qp&V y3 S if -\ac]^X ZYx1n$hdek!s)l"q'r(w-m#v,t*u+o%j _`gPB|}~)+*'(1.-,$&%#0/432"! A@?>=<;:98765z - - 4B  -   - - !"#$%&'()*+,-./B e'B -JgT -RPn# c?[>3=-Wihsq_"0V$;5 -F@] L9UlD<p !%&Y N7a*j$ - H:t{00 0 -0 0  - { - -1 -H+А2 -{{ - -1{{ - -1{{ -3 -1H+ -Y456H+ -Y789:;<=>?@ABCDEFGHIJKLMNOH+P !"#$%&'()*{ - -1{ - -1{ - -1{ - -1{{{ - -1{{ - -1{{ - -1{ - -1{{ - -1{{ - -1{ - -1{ - -1{{ - -1{ - -1{{ -3 -1{{ -3 -1{ -+3 -1+Q+H+L(R+{{ - -1{{ -+3 -1+Q{ - -1{{{{{ -3 -1{{ -3 -1{{ - -1{ - -1{ - -1{{ - -1{{ - -1{{ - -1{ - -1{{{ - -1{ - -1{ - -1{ - -1{ -3 -1{ - -1{{ -{ -+{STU,H>lpc_7seg.stxV44W-yXYZlpc_7seg.isey[.ORP"\]^_`a.[H>:@U/.bc//d0 -[y //<\]^_`a. H>:@T/.be//d0 - yf-trat\]^_`a.fH>:@S/.bg//d0 -fhij1H'Nlpc_7seg.mfpk22l2xmnolpc_7seg.isexp.sil[\]^_`a3pH'N h@j43bq44r5 -pxs/rid$\]^_`a3sH'N h@i43bt44r5 -sxu-XSOc\]^_`a3uH'N h@h43bv44r5 -uwxy6H>;_xmsgs/bitgen.xmsgsz..{7w|}~lpc_7seg.isew. "A"\]^_`a8H>;T@y98b99: -w/erid\]^_`a8H>;T@x98b99: -w-\]^_`a8H>;T@w98b99: -;H>;lpc_7seg.bgn--<vlpc_7seg.isev.weN \]^_`a=H>; @>=b>>? -"v/v \]^_`a=H>; @>=b>>? -v- \]^_`a=H>; @>=b>>? -@H>:lpc_7seg.bit,,Aulpc_7seg.iseu.iaw \]^_`aBH>;@CBbCCD -"u/# \]^_`aBH>;@CBbCCD -u- \]^_`aBH>;@CBbCCD -EH>8lpc_7seg.drc++Ftlpc_7seg.iset. { g\]^_`aGH>;1@HGbHHI -"t/PURR\]^_`aGH>;1@HGbHHI -t-utat\]^_`aGH>;1@HGbHHI -JH>5_xmsgs/trce.xmsgs**{7slpc_7seg.ises.\]^_`aKH>5 -@LKbLL: -s/\]^_`aKH>5 -@LKbLL: -s-nois\]^_`aKH>5 -@LKbLL: -MH>5lpc_7seg.twx))Nrlpc_7seg.iser.user\]^_`aOH>5 -Y@PObPPQ -r/ -\]^_`aOH>5 -Y@PObPPQ -;r-SI\1\]^_`aOH>5 -Y@PObPPQ -RH>5lpc_7seg.twr((Sqlpc_7seg.iseq.nieb\]^_`aTH>5 `@UTbUUV -q/\]^_`aTH>5 `@UTbUUV -;q-\]^_`aTH>5 `@UTbUUV -WH>2_xmsgs/par.xmsgs''{7plpc_7seg.isep.\]^_`aXH>3T@YXbYY: -p/\]^_`aXH>3T@YXbYY: -p-\]^_`aXH>3T@YXbYY: -ZH>2lpc_7seg_pad.csv&&[olpc_7seg.iseo. \]^_`a\H>3 @]\b]]^ -o/w pu\]^_`a\H>3 @]\b]]^ -!o- \]^_`a\H>3 @]\b]]^ -_H>2lpc_7seg_pad.txt%%`nlpc_7seg.isen. |\]^_`aaH>3$ @babbbc -dH+=۸ - -H>3$ en/tnem\]^_`aaH>3$ @babbbc -!dH+=  - -H>3$ en- \]^_`aaH>3$ @bab bbc - -d H+=  - -H>3$ e  -fH>2lpc_7seg_par.xrpt$$gmlpc_7seg.isem.\]^_`ahH>3l@ihbiij -m/\]^_`ahH>3l@ -ihbiij -m-\]^_`ahH>3l@ ihbiij -kH>2lpc_7seg.xpi##ll !"lpc_7seg.isel#.\]^_`am#H>3@nmb$nn%o -#l&/.ded\]^_`am&H>3@nmb'nn%o -&l(-\]^_`am(H>3@nmb)nn%o -(*+,pH>2lpc_7seg.unroutes-"".qk/01lpc_7seg.isek2.\]^_`ar2H>3;@,srb3ss4t -2k/\]^_`arH>3;@+srb5ss4t -!k6-\]^_`ar6H>3;@*srb7ss4t -689:uH>2lpc_7seg.par;!!<vj=>?lpc_7seg.isej@. -{ }\]^_`aw@H>3@@:xwbAxxBy -@CDz@EH+=@FG - -H>3@H{j/luse\]^_`awH>3@@9xwbIxxBy -J!DzKH+=FG - -H>3@H{jL-\]^_`awLH>3@@8xwbMxxBy -LNDzLOH+=LFG - -H>3@H{PQR|H>2lpc_7seg.padS T}iUVWlpc_7seg.iseiX.\]^_`a~XH>3 (@R~bYZ -Xi[/\]^_`a~[H>3 (@Q~b\Z -[i]-tnei\]^_`a~]H>3 (@P~b^Z -]_`aH>2lpc_7seg.ncdbchdeflpc_7seg.isehg. ,\]^_`agH>3S ahij -gh/ \]^_`aH>3S `hkj -!hl-t \]^_`alH>3S _hmj -lnopH>'_xmsgs/map.xmsgsq{7grstlpc_7seg.isegu. -f \]^_`auH>("@pbv: -ugw/ -;T\]^_`awH>("@obx: -wgy-O,\]^_`ayH>("@nbz: -y{|}H>'lpc_7seg_usage.xml~flpc_7seg.isef.@\]^_`aH>(@}bj -f/ \]^_`aH>(@|bj -f-)\]^_`aH>(@{bj -H>&lpc_7seg_map.ngmelpc_7seg.isee.q+\]^_`aH>(0  -e/\]^_`aH>(0  - e-\]^_`aH>(0  -H>&lpc_7seg.pcfdlpc_7seg.ised.sksa\]^_`aH>(:@b -d/\]^_`aH>(:@b - d-\]^_`aH>(:@b -H>'lpc_7seg_map.ncdcclpc_7seg.isec.Ureh\]^_`aH>' hj -c/t.sk\]^_`aH>' hj - c-[ )p\]^_`aH>' hj -H>'lpc_7seg_map.xrptgblpc_7seg.iseb.\]^_`aH>'L(@bj -b/\]^_`aH>'L(@bj -b-\]^_`aH>'L(@bj -H>'lpc_7seg_map.mrpalpc_7seg.isea.\]^_`aH>' -@b -a/xedn\]^_`aH>' -@b - a-j el\]^_`aH>' -@b -H>#_xmsgs/ngdbuild.xmsgs{7`lpc_7seg.ise`.O\]^_`aH>#@b: -`/\]^_`aH>#@b: -`-l\]^_`aH>#@b: -H>!_ngo_lpc_7seg.ise_. - \]^_`aH>#T@b -_/\]^_`aH>#T@b -_-\]^_`aH>#T@b -H>#_ngo/netlist.lst^lpc_7seg.ise^. sse\]^_`aH>#8@b -^/uo\]^_`aH>#8@b -^-ec\]^_`aH>#8@b -H>#lpc_7seg.bld]lpc_7seg.ise]. nio\]^_`aH># @b -]/elif\]^_`aH># @b -]-(xed\]^_`aH># @b -H>"lpc_7seg.ngd \ -  lpc_7seg.ise\ -.t.sk\]^_`a -H>#$  - -\/\]^_`aH>#$  -\-\]^_`aH>#$  -H6lpc_7seg_xdb/cst.xbcd[lpc_7seg.ise[.etli\]^_`aH>"@b -[/\]^_`aH>"@b -[ -\]^_`a H>"@b! - "#$H>_xmsgs/xst.xmsgs%{7Z&'(lpc_7seg.iseZ).\]^_`a)H>I@$b*: -)Z+/NG\]^_`a+H>I@#b,: -+Z--< kc\]^_`a-H>I@"b.: --/01H>lpc_7seg.cmd_log23Y456lpc_7seg.iseY7.\]^_`a7H>А@1b89 -7Y:/\]^_`a:H>А@0b;9 -:Y<-\]^_`a<H>А@/b=9 -<>?@H+#xstAXBCDlpc_7seg.iseXE. k\]^_`aEH+.@@bF -EXG/t er\]^_`aGH+.@?bH -GXI-T/\]^_`aIH+.@>bJ -IKLMH>lpc_7seg.ngrNOWPQRlpc_7seg.iseWS.re\]^_`aSH> MTUV -SW/\]^_`aH> LTWV -WX-#'\]^_`aXH> KTYV -XZ[\H>lpc_7seg.ngc] - -^V_`alpc_7seg.iseVb.moC_\]^_`abH>a` \cde -bV/S_PO\]^_`aH>a` [cfe -Vg-"A" \]^_`agH>a` Zche -gijkH>lpc_7seg_vhdl.prjl mUnoplpc_7seg.iseUq.poq\]^_`aqH>H@kbrs -qU/\]^_`aH>H@jbts -Uu-I\]^_`auH>H@ibvs -uwxyH>lpc_7seg.prjz mT{|}lpc_7seg.iseT~.of\]^_`a~H>@ybs -~T/\]^_`aH>kH@xbs -T-o )\]^_`aH>kH@wbs -H>lpc_7seg.syr - -Slpc_7seg.iseS.T<\]^_`aH>0@b -S!/>T\]^_`a!H>0@b -!S-x_PO\]^_`aH>0@b -GC7lpc_7seg.lso Rlpc_7seg.iseR. "st\]^_`aH+.@@b -R/pd::\]^_`aH+.@@b -R-nege\]^_`aH+.@@b -H>lpc_7seg.xstQlpc_7seg.iseQ."" "\]^_`aH>y@b -Q/un "\]^_`aH>y@b -Q-nUnI\]^_`aH>y@b -H>2lpc_7seg_guide.ncdcPlpc_7seg.iseP.O7 \]^_`aH>3 hj -P- -ٰ\]^_`aH>3 hj -P/ -D\]^_`aH>3 hj -H=wb_7seg.vhd lpc_7seg.ise. "" \]^_`aH>"0 -H+АH>" -H+АH+АH+АH+А )(-[ ec\]^_`a()H>"0 -(H+А(H>" -)H+АH+АH+АH+А /" ""\]^_`aH>"0 -H+АH>" -H+АH+АH+АH+А H=top_lpc_7seg.v - lpc_7seg.ise .--\]^_`aH>H ( -H+jH+T *-fo >\]^_`a*H>H ( -*H+*jH+*T /\]^_`aH>H ( -H+jH+TH+lpc_7seg.ucf lpc_7seg.ise . D\]^_`a H+L(  -  - - - - \]^_`a H+L(  -  - - /edoM\]^_`a H+L(  -  - - - !()BCDEKN GC7disp_dec.vhd   - lpc_7seg.ise  -. \]^_`a -  -H+a` -& -H+a` -H+a`H+a`H+a`H+a` ',-eb_s\]^_`a -,'H+a` -& -,H+a` -'H+a`H+a`H+a`H+a` / \]^_`a -H+a` -& -H+a` -H+a`H+a`H+a`H+a`  !"H6vC:/hharte/work/HarteTec/cores/wb_lpc/rtl/verilog/wb_lpc_periph.v -# -$%&lpc_7seg.ise -.kcol\]^_`aH6vT "7' - -+- -,\]^_`a+H6vT !7( -+ -/er e\]^_`aH6vT  7) -*+ ,1H+H-N.H>@3/01 - -H>@23 45,31Q6H+789:H>@ -H>@;6H+L(H0h h6 -H>@<  !G:+G=>?@63ABCDEFGHIJKLMNOPQRS6T/U0VWXYZ[\]1^_`abcdefghijklmnopqrstuvwQxyz{| H>:H>"H>HH>HH>":H>А!H>0H+a`H>yH6vTH>kHH>a`GH+.H>+H>IH+.@H+a`ESgyO[v@bfY /!r"o R6I"pwuKQ#3Cz$1%ME&]'T^(6?)j*s"W+N#FZda=#`xH"Ut"m#{V_P,kq'DnA-0.c"|l#X >/B0Ge1\L#JQ -H>@}2~3 516H+4MH>@0 - -H>@56 H>x7H># h@63ABCDH>#$ H># H>#TH>#8H>#H>a`H+L(8@63C9DA-B0 -H># h:;  -16H+@<LH># h - -H># h=> 1H+?KH># h3 - -H># h@A 1H+BJH># h - -H># hCD 1H+EGH># h0 - -H># hFG H>xHGIH+/0 -H+I -H+JK H+LGHH+kH -H+kHJM H+kHNFH># h - -H># hO@AB - -H># hPQ 1H+kHREH># h3/01 - -H># hST 1H+kHUDH># h - -H># hVW 1H+kHXCH># h - -H># hYZ 1H+kH[BH># h - -H># h\] 1H+0^ H>(a`w@AB  -  H>#$ H>'H>(:H>(0H>'L(H>(wH>("H>' -H+L(  @'9_`A-B0 - a -H>(a` -bc 16H+@d AH>(a` - - -H>(a` e!f 1H+0"g @#H>(a` - -H>(a`$h%i 1H+0&j ?'H>(a` - -H>(a`(k)l 1H+0*m <+H>(a`,-./00 - -H>(a`1n2o 345H>6p<>78H+0/09: -H+0;q -H+0<r=s 45H+0>t<=?H+0 -H+0<r@u 35H+0Av !BH>5 [&@CD0EFGHIJKLMNOPQRSTUVWXY H>'H>3;&H>3H>3TH>3@H>3 H>3lH>3$ H>3SH+L([H>3 (FV&@EOQYUw9XxGW&SyIH0.DR -H>5Zz[{ \]^_`abcdefghij16H+k|!;lH>5L( mnopqrstuvwH>5 `H>5 -YH>5 -H>3SH+L( vqt0us}wponmr~ -H>5L(xy j1H+0z!:{H>5| - -H>5}~ i1H+0!9H>5 - -H>5 h1H+!8H>5ssH'N hH'K -xH+L( - -H>5 g1H+!7H>5 -3 - -H>5 f1H+!6H>563 - -H>5 e1H+!5H>53 - -H>5 d1H+!4H>5| - -H>5 c1H+!3H>5 - -H>5 b1H+!2H>5 - -H>5 a1H+!+H>5,./0 - -H>5 `H>x+/H+y/0 -H+y -H+y H+y/0H+y3/0 H+y H+y01H+y3/0 H+y H+y+,H+: -H+: H+:,-H+y3/0 H+y H+y-.H+y3/0 H+y H+y!*H>5 - -H>5 _1H+!)H>5 - -H>5 ^1H+!(H>5 - -H>5 ]1H+!"H>;T'63  -   - !"#$%&'()*H>;1H>;H>; H>;TH>3S$6) 3$ "# %  -'#(* -& -H>;T+, \-./01316H+2"'3H>;T@63ABCD - -H>;T45 1316H+6"&7H>;T - -H>;T89 0316H+:"%;H>;T3<0 - -H>;T=> /316H+?"$@H>;TA3<0B - -H>;TCD .316H+E"#FH>;T63<0 - -H>;TGH -316H+IJKLH>@ -H>@M -H>@NH>"H>HH>"H+a`H6vTH+a` -H>@OP Q431Q6H+RSH'H'TU VWQ16H+АXYH+ -H+ -Z[ |W\]H>^_`H+ - -H+ -N'()*+, - -H>"ab \cde]H+ -fghH+ -]/i -H+ -j -H+ -kl em]H+ -noH+ -]3pqrstu/v0 H+ -wx my]H+ -z{H+ -3|}~/0 H+ - y]H+ -H+ - -H+ -k d]H+ -H+ -]3r/0 H+ - ]H+ -H+ - -]3/0 H+ - ]H+ -H+ -]/i -H+ - -H+ - }c]H+ -H+ -]63r/0 H+ - -H+ - ]H+ -H+ -63/0 H+ - -H+ - ~]H+ -H+ -/ H+ - H+ -H+ - 3 -H+ - V1H+ - H+ 63@AB0/ -H+А - /  H+ -Y  -O - !"H+"!30!#H+#.! $%H+ -Y%&@A0'H+ -Y'(@-)H+ -Y)*6+,-./*0(1-20&]136@AB0/6]5CDDOO  -   -,./09OPFug^zfxQvdy|ce1LERIVa|~}r<BTXjo !"#$%&'(   -SVWTUXQIPYEFHGONRGFKMLJ -    -#*$&)(%"!rsptwqmuonv|A)*W\][n_{q`bJQKmNGHSMYhilpkZrts+,  '=?>-U----,-,-i---v- - -!-!G-G<-<:+-+-,-,/-/--q,-,/-/--p-,-,/-/--u-,-,/-/--t-,-,/-/--s--w-- - C3H+ a`.34/645H+056H+ a`1678H+ a`28436479H+ -49:H+5:;H+ 6;<6<=H+7= 89  $>H+ -:>>H+ -:>>H+y:>>H+y:>>H+ -:>?H+ -;??H+ -;??H+y;??H+y;??H+ -;?@H+ -<@@H+ -<@@H+y<@@H+y<@@H+ -<@AH+ -=AAH+ -=AAH+y=AAH+y=ABH+ ->BBH+ ->BBH+y>BBH+y>BBH+ ->BCH+y?CDH+ -@D AB  $EH>xCEFH+0DF5GH>EGHH+FHIH>xGIJH+ HJK6KLH+ ILM6MNH+ JNO6OPH+ -KPPH+ -KPPH+ -KPPH+ -KPPH+yKPPH+yKPPH+ -KPPH+KPQH+LQRH+MRSH+NSTH+OTUH+PU#VH+@QV`WH+@RW XH+@SXYH+@TY ZH+@UZd [H+@V[&WXY&\H+@Z\][\] ]^y]_,&`H+^`#aH+_abH+`bcH+acdH+@bdcdeH+@ee fghH+ fh4g67iH+ ;hi4i67jH+jj"kH+kk"lH+ll"mH+mmnH+nnoH+oopH+pp#qH+qqYrH+rr sH+ssYtH+ttuH+uuvH+vv"wH+wwxH+xx#yz{I#yH+|y"z{#|H+}|#~K#}H+}~#H+#J#H+~#H+H+H+dH+H+H+H+H+dH+H++H+ -H+ zX<H+@H+ ;AH+H+H+H+H+H+0H+0H+0H+0H+0H+0H+0H+0H+0H+0H+00B00&H+0H+0H+0~H+0H+0H+0H+00B00&H+0H+0H+$ ~H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+H+@XH+@xH+@XH+@XH+@dXH+H+  (H+pH+  (GH+pH+@H+@OH+@XfgH+@XH+@XH+@XH+@XH+@H+@IH+@H+@H+@H+@&SVW&H+@&H+@&H+@yVWXy^]y_,&H+@H+@H+@dd dH+@H+aH+@H+@H+@_H+@H+@H+@H+H+@H+@H+@H+@ 8H+@ -H+@  H+@ -H+H+PH+PH+PH+H+H+H+H+H+@9H+: H+:  -H+: - H+  <6< H+  < -H+ -H+:H+  !L H+"#" H+#H+$H+%H+&H+'H+(H+)'H+*H++H+,*H+- H+@.H+@/H+0 H+@1 !H+2!"345678<"#$%&'"(H+  (9(&:;<=><&)*+,&-H+  (?-&@ABCDE<&./01#&2H+F23H+yG34H+ -H45H+ -I5J6H+ -K67H+ -L78H+ -M89H+ -N9:H+yO:;<H+yP<=Q=>H+yR>?H+yS?@H+yT@=U=AH+yVABH+yWBCH+ -XCDH+ -YDEH+ -ZEFH+ -[FGH+y\GHH+y]HIH+ -^IJ~JKH+ -_KLH+ -`LJJMH+ -aMNH+ybNJJOH+ycOPH+ydPJJQH+yeQRH+ -fRSH+ -gSTH+ -hTiUH+ -jUVH+ -kVlWH+ -mWnXH+yoXpYH+yqYrZH+ysZ[\H+t\]H+u]^H+v^_H+w_&`H+x`%aH+ya1bH+zb"cH+{cdH+|deH+}efH+~fgH+ghH+hiH+i$jH+j(kH+klH+lmH+munopH+p,qH+qrH+yrsH+0s5tH+tuH+ uK6KvH+ vM6MwH+ wO6OxH+:xyH+:y.zH+:z{H+:{|H+:|}H+:}~H+:~H+:H+:H+:[[H+:H+:H+ h6H+:ddH+:H+:H+:H+:H+:H+0B00&H+ -$$ $H+ -H+ -H+ -H+ -H+ -H+ -H+@;H+ H+@H+ H+;H+ АH+;H+ АH+;H+ АH+;H+ АH+ АH+;H+ АH+ [[H+ А[[H+ [[H+ H+ АH+ АH+ H+ H+ H+ АH+ H+ H+ H+ АH+ H+ IH+ IH+ IH -{H+TH+TH+TH+АH+@H+@H+H+H+ a`4647H>xH>H+. PK -^X4e4e7__OBJSTORE__/ProjectNavigator/__stored_objects___StrTblworkverilogonaliblpc_7seg****PROP_DevFamilyPMName=spartan3********PROP_Parse_Target=synthesis********PROP_Parse_Target=synthesis****PLUGIN_EdifPLUGIN_GeneralPLUGIN_NcdPLUGIN_VerilogPLUGIN_VhdllibHdlPROP_Parse_TargetsynthesisPROP_DevFamilyPMNamespartan3PROP_DevFamilyAutomotive CoolRunner2Spartan3PROP_Dummydum1CoolRunner XPLA3 CPLDsXC9500XV CPLDsXC9500XL CPLDsXC9500 CPLDsCoolRunner2 CPLDsAutomotive 9500XLVirtexEVirtex2PVirtex2VirtexSpartan3ESpartan-3A DSPSpartan3A and Spartan3ANSpartan2ESpartan2QPro VirtexE MilitaryQPro Virtex Hi-RelQPro Virtex Rad-HardAutomotive Spartan3EAutomotive Spartan3Automotive Spartan2EPROP_xstVeriIncludeDir_Global|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.stx|PLUGIN_General|1216953886|FILE_XST_STX|Generic||lpc_7seg.stxlpc_7seg.stxDESUT_XST_STX|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.mfp|PLUGIN_General|1216948046|FILE_MFP|Generic||lpc_7seg.mfplpc_7seg.mfpDESUT_MFP|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/bitgen.xmsgs|PLUGIN_General|1216953915|FILE_XMSGS|Generic||bitgen.xmsgsbitgen.xmsgsDESUT_XMSGS|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.bgn|PLUGIN_General|1216953915|FILE_BITGEN_REPORT|Generic||lpc_7seg.bgnlpc_7seg.bgnDESUT_BITGEN_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.bit|PLUGIN_General|1216953914|FILE_BIT|Generic||lpc_7seg.bitlpc_7seg.bitDESUT_BIT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.drc|PLUGIN_General|1216953912|FILE_BITGEN_DRC|Generic||lpc_7seg.drclpc_7seg.drcDESUT_BITGEN_DRC|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/trce.xmsgs|PLUGIN_General|1216953909||Generic||trce.xmsgstrce.xmsgs|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.twx|PLUGIN_General|1216953909|FILE_TIMING_XML_REPORT|Generic||lpc_7seg.twxlpc_7seg.twxDESUT_TIMING_XML_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.twr|PLUGIN_General|1216953909|FILE_TIMING_TXT_REPORT|Generic||lpc_7seg.twrlpc_7seg.twrDESUT_TIMING_TXT_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/par.xmsgs|PLUGIN_General|1216953906||Generic||par.xmsgspar.xmsgs|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_pad.csv|PLUGIN_General|1216953906|FILE_PAD_EXCEL_REPORT|Generic||lpc_7seg_pad.csvlpc_7seg_pad.csvDESUT_PAD_EXCEL_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_pad.txt|PLUGIN_General|1216953906|FILE_PAD_TXT_REPORT|Generic||lpc_7seg_pad.txtlpc_7seg_pad.txtDESUT_PAD_TXT_REPORTTBIND_viewPadRptsTRAN_viewPadRpts|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_par.xrpt|PLUGIN_General|1216953906|FILE_XRPT|Generic||lpc_7seg_par.xrptlpc_7seg_par.xrptDESUT_GENERIC|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.xpi|PLUGIN_General|1216953906|FILE_XPI|Generic||lpc_7seg.xpilpc_7seg.xpiDESUT_XPI|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.unroutes|PLUGIN_General|1216953906|FILE_UNROUTES|Generic||lpc_7seg.unrouteslpc_7seg.unroutesDESUT_UNROUTES|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.par|PLUGIN_General|1216953906|FILE_PAR_REPORT|Generic||lpc_7seg.parlpc_7seg.parDESUT_PAR_REPORTTBIND_viewParRptsTRAN_viewParRpts|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.pad|PLUGIN_General|1216953906|FILE_PAD_MISC|Generic||lpc_7seg.padlpc_7seg.padDESUT_PAD_MISC|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ncd|PLUGIN_NCD|1216953906|PLUGIN_NCDFILE_NCD|Module||lpc_7segDESUT_NCD|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/map.xmsgs|PLUGIN_General|1216953895||Generic||map.xmsgsmap.xmsgs|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_usage.xml|PLUGIN_General|1216953895|FILE_WEBTALK|Generic||lpc_7seg_usage.xmllpc_7seg_usage.xml|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_map.ngm|PLUGIN_NGM|1216953894|PLUGIN_NGMFILE_NGMDESUT_NGM3s400fg456-4|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.pcf|PLUGIN_General|1216953894|FILE_PCF|Generic||lpc_7seg.pcflpc_7seg.pcfDESUT_PCF|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_map.ncd|PLUGIN_NCD|1216953895||File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_map.xrpt|PLUGIN_General|1216953895||Generic||lpc_7seg_map.xrptlpc_7seg_map.xrpt|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_map.mrp|PLUGIN_General|1216953895|FILE_MAP_REPORT|Generic||lpc_7seg_map.mrplpc_7seg_map.mrpDESUT_MAP_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/ngdbuild.xmsgs|PLUGIN_General|1216953891||Generic||ngdbuild.xmsgsngdbuild.xmsgs|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_ngo|PLUGIN_General|1216953889|FILE_DIRECTORY|Generic||_ngo_ngoDESUT_DIRECTORY|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_ngo/netlist.lst|PLUGIN_General|1216953891|FILE_LST|Generic||netlist.lstnetlist.lstDESUT_LST|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.bld|PLUGIN_General|1216953891|FILE_NGDBUILD_LOG|Generic||lpc_7seg.bldlpc_7seg.bldDESUT_NGDBUILD_LOG|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ngd|PLUGIN_NGD|1216953890|PLUGIN_NGDFILE_NGDDESUT_NGD|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_xdb/cst.xbcd|PLUGIN_General|1216951952|FILE_BCD|Generic||cst.xbcdcst.xbcdDESUT_BCD|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/_xmsgs/xst.xmsgs|PLUGIN_General|1216953886||Generic||xst.xmsgsxst.xmsgs|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.cmd_log|PLUGIN_General|1216953875|FILE_CMD_LOG|Generic||lpc_7seg.cmd_loglpc_7seg.cmd_logDESUT_CMD_LOG|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/xst|PLUGIN_General|1216686883||Generic||xstxst|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ngr|PLUGIN_NGR|1216953881|PLUGIN_NGRFILE_NGRDESUT_NGR|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ngc|PLUGIN_NGC|1216953886|PLUGIN_NGCFILE_NGCDESUT_NGCxc3s400-4-fg456|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_vhdl.prj|PLUGIN_General|1216953876|FILE_XST_PROJECT|Generic||lpc_7seg_vhdl.prjlpc_7seg_vhdl.prjDESUT_XST_PROJECT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.prj|PLUGIN_General|1216953875||Generic||lpc_7seg.prjlpc_7seg.prj|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.syr|PLUGIN_General|1216953886|FILE_XST_REPORT|Generic||lpc_7seg.syrlpc_7seg.syrDESUT_XST_REPORT|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.lso|PLUGIN_General|1204699959|FILE_LSO|Generic||lpc_7seg.lsolpc_7seg.lsoDESUT_LSO|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.xst|PLUGIN_General|1216953875|FILE_XST|Generic||lpc_7seg.xstlpc_7seg.xstDESUT_XST|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg_guide.ncd|PLUGIN_NCD|1216953906||File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/wb_7seg.vhd|PLUGIN_Vhdl|1216953750|FILE_VHDL|Architecture||wb_7seg_behav|wb_7seg|||ComponentInstantiation||wb_7seg|wb_7seg_behav|u1|disp_dec||Entity||wb_7seg|Library||||Use||IEEE|STD_LOGIC_1164|all||Use||IEEE|STD_LOGIC_ARITH|all||Use||IEEE|STD_LOGIC_UNSIGNED|all|wb_7seg_behavwb_7segDESUT_VHDL_ARCHITECTUREu1disp_decDESUT_VHDL_ENTITYIEEE.STD_LOGIC_UNSIGNED.allIEEESTD_LOGIC_UNSIGNEDallIEEE.STD_LOGIC_ARITH.allSTD_LOGIC_ARITHIEEE.STD_LOGIC_1164.allSTD_LOGIC_1164|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/top_lpc_7seg.v|PLUGIN_Verilog|1216953737|FILE_VERILOG|ComponentInstantiation||lpc_7seg|lpc_7seg|lpc_periph|wb_lpc_periph||ComponentInstantiation||lpc_7seg|lpc_7seg|seven_seg0|wb_7seg|DESUT_VERILOGseven_seg0lpc_periphwb_lpc_periph|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ucf|PLUGIN_AssocModule|1216687080|PLUGIN_AssocModuleFILE_UCF|Module||lpc_7seg.ucflpc_7seg.ucfDESUT_UCF|File||C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/disp_dec.vhd|PLUGIN_Vhdl|1204699959||Architecture||disp_dec_behave|disp_dec|||Entity||disp_decdisp_dec_behave|File||C:/hharte/work/HarteTec/cores/wb_lpc/rtl/verilog/wb_lpc_periph.v|PLUGIN_Verilog|1216951926||Module||wb_lpc_periphAutoGeneratedViewVIEW_AssignPackagePinsTBIND_XSTAssignPackagePinsTRAN_assignPackagePinsVIEW_XSTPreSynthesisTBINDEXT_XSTPreSynthesisToStructural_spartan3TRAN_SubProjectPreToStructuralProxyModule|lpc_7segTRAN_compileBCD2trueSpeedfalsexc3s400LUTNoXST (VHDL/Verilog)YesAuto./xst<>None100Maintain500As OptimizedAllClockNetsNormalfg456HDL8-4/TRANEXT_xstsynthesize_spartan3VIEW_StructuralTBIND_StructuralToPost-SynthesisAbstractSimulationTRAN_postSynthesisSimModelVIEW_Post-SynthesisAbstractSimulationTBINDEXT_StructuralToTranslation_FPGATimestampOffTRANEXT_ngdbuild_FPGAVIEW_TranslationTBIND_xlateFloorPlannerTRAN_xlateFloorPlannerVIEW_Post-TranslateFloorPlannerTBIND_xlateAssignPackagePinsTRAN_xlateAssignPackagePinsVIEW_Post-TranslateAssignPinsTBIND_TranslationToPost-TranslateFormalityNetlistTRAN_postXlateFormalityNetlistVIEW_Post-TranslateFormalityNetlistTBIND_TranslationToPost-TranslateAbstractSimulationTRAN_postXlateSimModelVIEW_Post-TranslateAbstractSimulationTBIND_Post-TranslateAbstractToTBWPreSimulationTRAN_createPostXlateTestBenchTRAN_copyPost-TranslateAbstractToPreSimulationVIEW_TBWPost-TranslatePreSimulationTBIND_Post-TranslateAbstractToPreSimulationVIEW_Post-TranslatePreSimulationTBIND_TranslateToSmartTRAN_CopySmartXplorerResultTRAN_SmartXplorerVIEW_SmartXplorerTBIND_NGCAssignPackagePinsTRAN_ngcAssignPackagePinsVIEW_ngcAssignPackagePinsTBIND_FloorplanDesignTRAN_floorplanDesignVIEW_Post-TranslateFloorplanDesignTBIND_CreateTimingConstraintsTRAN_createTimingConstraintsVIEW_Post-TranslateTimingConstraintsTBIND_CreateAreaConstraintsTRAN_createAreaConstraintsVIEW_Post-TranslateAreaConstraintsTBINDEXT_TranslationToMap_spartan3Area4For Inputs and OutputsTRANEXT_map_spartan3VIEW_MapTBIND_preRouteTrceTRAN_preRouteTrceVIEW_Post-MapStaticTimingTBIND_mapFpgaEditorTRAN_mapFpgaEditorVIEW_Post-MapFpgaEditorTBIND_mapFloorPlannerTRAN_mapFloorPlannerVIEW_Post-MapFloorPlannerTBIND_MapToPost-MapAbstractSimulationTRAN_postMapSimModelVIEW_Post-MapAbstractSimulationTBIND_Post-MapAbstractToTBWPreSimulationTRAN_createPostMapTestBenchTRAN_copyPost-MapAbstractToPreSimulationVIEW_TBWPost-MapPreSimulationTBIND_Post-MapAbstractToPreSimulationVIEW_Post-MapPreSimulationTBINDEXT_MapToPar_spartan31Normal Place and RouteStandardTRANEXT_par_spartan3VIEW_ParTBIND_postRouteTrce3Error ReportTRAN_postRouteTrceVIEW_Post-ParStaticTimingTBIND_postParPrimetimeNetlistTRAN_postParPrimetimeNetlistVIEW_PrimetimeNetlistTBIND_parFpgaEditorTRAN_parFpgaEditorVIEW_Post-ParFpgaEditorTBIND_parFloorPlannerTRAN_parFloorPlannerVIEW_Post-ParFloorPlannerTBIND_genPowerDataTRAN_genPowerDataVIEW_FPGAGeneratePowerDataTBIND_createIBISModelTRAN_createIBISModelVIEW_IBISModelTBIND_XpowerTRAN_XPowerVIEW_FPGAAnalyzePowerTBIND_ParToPost-ParFormalityNetlistTRAN_postParFormalityNetlistVIEW_Post-ParFormalityNetlistTBIND_ParToPost-ParClockRegionTRAN_clkRegionRptVIEW_Post-ParClockRegionReportTBIND_ParToPost-ParAsyncDelayTRAN_asynDlyRptVIEW_Post-ParAsyncDelayReportTBIND_ParToPost-ParAbstractSimulationTRAN_postParSimModelVIEW_Post-ParAbstractSimulationTBIND_Post-ParAbstractToTBWPreSimulationTRAN_createPostParTestBenchTRAN_copyPost-ParAbstractToPreSimulationVIEW_TBWPost-ParPreSimulationTBIND_TBWPost-ParPreToFuseTRAN_ISimulatePostPlace&RouteModelRunFuse(bencher)VIEW_TBWPost-ParFuseTBIND_TBWPost-ParFuseToSimulationISimTRAN_ISimulatePostPlace&RouteModel(bencher)VIEW_TBWPost-ParSimulationISimTBIND_Post-ParAbstractToPreSimulationVIEW_Post-ParPreSimulationTBIND_Post-ParPreToFuseTRAN_ISimulatePostPlace&RouteModelRunFuseVIEW_Post-ParFuseTBIND_Post-ParFuseToSimulationISimTRAN_ISimulatePostPlace&RouteModelVIEW_Post-ParSimulationISimTBIND_ParToMpprResultTRAN_copyMpprRsltVIEW_MpprResultTBIND_ParToLockedPinConstraintsTRAN_genLockedPinConstraintsVIEW_LockedPinConstraintsTBIND_ParToBackAnnoPinLocationsTRAN_backAnnoPinLocationsVIEW_BackAnnoPinLocationsTBINDEXT_ParToFPGAConfiguration_spartan3Pull UpDefault (6)Default (4)As RequiredEnable Readback and ReconfigurationCCLKPull DownDefault (NoWait)0xFFFFFFFFDefault (5)TRANEXT_bitFile_spartan3VIEW_FPGAConfigurationTBIND_analyzeDesignUsingChipscopeTRAN_analyzeDesignUsingChipscopeVIEW_AnalyzedDesignTBIND_UpdateBitstreamXPSTRAN_xpsUpdBitstreamVIEW_UpdatedBitstreamTBIND_FPGAConfigurationToFPGAGeneratePROMTRAN_genImpactFileVIEW_FPGAGeneratePROMTBIND_FPGAConfigurationToFPGAConfigureTargetDeviceTRAN_configureTargetDeviceVIEW_FPGAConfigureTargetDeviceTBIND_FPGAConfigurationToFPGAConfigureDeviceTRAN_impactProgrammingToolVIEW_FPGAConfigureDeviceTBIND_XSTAbstractToPreSynthesisTRAN_SubProjectAbstractToPreProxyTRAN_convertToHdlTRAN_copyAbstractToPreSynthesisForSynthesisVIEW_XSTAbstractSynthesis/lpc_7segTBIND_InitialToXSTAbstractSynthesisTRAN_copyInitialToXSTAbstractSynthesisVIEW_InitialTBIND_InitialToAbstractSimulationTRAN_copyInitialToAbstractSimulationVIEW_AbstractSimulationTBIND_AbstractToPostAbstractSimulationTRAN_copyAbstractToPostAbstractSimulationVIEW_PostAbstractSimulationTBIND_PostAbstractToTBWPreSimulationTRAN_viewBehavioralTestbenchTRAN_copyPostAbstractToPreSimulationVIEW_TBWPreSimulationTBIND_TBWPreToBehavioralFuseTRAN_ISimulateBehavioralModelRunFuse(bencher)VIEW_TBWBehavioralFuseTBIND_TBWBehavioralFuseToSimulationISimTRAN_ISimulateBehavioralModel(bencher)VIEW_TBWBehavioralSimulationISimTBIND_PostAbstractToPreSimulationVIEW_PreSimulationTBIND_PreToBehavioralFuseTRAN_ISimulateBehavioralModelRunFuseVIEW_BehavioralFuseTBIND_BehavioralFuseToSimulationISimTRAN_ISimulateBehavioralModelVIEW_BehavioralSimulationISimTBIND_PostAbstractToAnnotatedPreSimulationTRAN_viewBehavioralTestbenchForAnnoTRAN_copyPostAbstractToAnnotatedPreSimulationVIEW_AnnotatedPreSimulationTBIND_PreToGenerateAnnotatedResultsFuseTRAN_ISimGenerateAnnotatedResultsRunFuseTRAN_copyPreToGenerateAnnotatedResultsFuseForTBWVIEW_AnnotatedResultsFuseTBIND_FuseToAnnotatedResultsISimTRAN_ISimGenerateAnnotatedResultsTRAN_copyFuseToAnnotatedResultsISimForTBWVIEW_AnnotatedResultsISimTBIND_AnnotatedToGenerateExpectedSimulationResultsISimTRAN_ISimGenerateExpectedSimulationResultsVIEW_ExpectedSimulationResultsISimTBINDEXT_InitialToCommon_FPGATRANEXT_compLibraries_FPGAVIEW_CommonDESPF_TRADITIONALPROP_PreferredLanguageVerilogPROP_SimulatorModelsim-SE MixedISE Simulator (VHDL/Verilog)Other MixedOther VerilogOther VHDLVCS-MXi MixedVCS-MXi VerilogVCS-MXi VHDLVCS-MX MixedVCS-MX VerilogVCS-MX VHDLNC-Sim MixedNC-Sim VerilogNC-Sim VHDLModelsim-XE VerilogModelsim-XE VHDLModelsim-PE MixedModelsim-PE VerilogModelsim-PE VHDLModelsim-SE VerilogModelsim-SE VHDLPROP_Synthesis_ToolPROP_Top_Level_Module_TypeVHDLPROP_DevSpeed-5PROP_DevPackagepq208PROP_DevDevicexc3s50xc3s1500lxc3s1500xc3s1000lxc3s1000xc3s200tq144ft256fg320PROP_ParSmartGuideFileNamelpc_7seg_guide.ncdPROP_UseSmartGuidePROP_SynthTopNCD files (*.ncd)|*.ncdPROP_MapSmartGuideFileNamePROP_ISimSpecifySearchDirPROP_xstVeriIncludeDirPROP_PostSynthesisSimModelNamelpc_7seg_synthesis.vPROP_SimModelTargetPROP_ISimSpecifyDefMacroAndValuePROP_ISimSpecifySearchDirectoryPROP_ISimValueRangeCheckPROP_ISimCompileForHdlDebugPROP_ISimIncreCompilationPROP_tbwPostParTestbenchNamePROP_tbwTestbenchTargetLangPROP_PostParSimTopPROP_tbwPostMapTestbenchNamePROP_PostMapSimTopPROP_tbwPostXlateTestbenchNamePROP_PostXlateSimTopPROP_PostParSimModelNamelpc_7seg_timesim.vPROP_PostMapSimModelNamelpc_7seg_map.vPROP_PostXlateSimModelNamelpc_7seg_translate.vPROP_TopDesignUnitPROPEXT_xilxBitgCfg_DCIUpdateMode_spartan3PROPEXT_xilxBitgCfg_Rate_spartan3PROPEXT_xilxSynthAddBufg_spartan3PROPEXT_xilxSynthMaxFanout_virtex2PROPEXT_SynthMultStyle_virtex2PROPEXT_xilxMapGenInputK_virtex2PROP_MapRegDuplicationPROP_xilxMapTimingDrivenPackingPROP_MapLogicOptimizationPROP_MapPlacerCostTablePROP_MapExtraEffortPROP_MapEffortLevelMediumHighContinue on ImpossiblePROP_xilxBitgStart_Clk_MatchCyclePROP_xilxBitgCfg_DCMShutdownPROP_xilxBitgCfg_GenOpt_EnableCRCPROP_xilxBitgCfg_GenOpt_IEEE1532FilePROP_MapPowerActivityFilePROP_MapPowerReductionSAIF Files (*.saif)|*.saifVCD files (*.vcd)|*.vcdPROP_parSmartGuideFileNamePROP_mapSmartGuideFileNamePROP_xstUseSyncResetPROP_xstUseSyncSetPROP_xstUseClockEnablePROP_xilxSynthRegDuplicationPROP_xstOptimizeInsPrimtivesPROP_xstSlicePackingPROP_xstPackIORegisterPROP_xstMoveLastFfStagePROP_xilxSynthRegBalancingPROP_xstMoveFirstFfStagePROP_SynthLogicalShifterExtractPROP_SynthShiftRegExtractPROP_SynthEncoderExtractPROP_SynthDecoderExtractPROP_SynthMuxStylePROP_SynthExtractMuxMUXCYMUXFPROP_xstROMStylePROP_SynthExtractROMBlockDistributedPROP_SynthRAMStylePROP_SynthExtractRAMPROP_xstFsmStylePROP_xstCrossClockAnalysisPROP_xstSliceUtilRatioPROP_xstWriteTimingConstraintsPROP_xstCoresSearchDirPROP_xstReadCoresPROP_xstAsynToSyncPROP_xstBRAMUtilRatioPROP_xstAutoBRAMPackingPROP_xilxSynthGlobOptPROP_CompxlibXlnxCoreLibPROP_impactConfigFileNamePROP_ImpactProjectFilePROP_AceActiveNamePROP_AutoGenFilePROP_primeTopLevelModulePROP_primeCorrelateOutputPROP_primeFlatternOutputNetlistPROP_primetimeBlockRamDataPROP_PreTrceTSIFilePROP_xilxPostTrceTSIFilePROP_PostTrceGenDatasheetPROP_PostTrceGenTimegroupsPROP_PreTrceGenDatasheetPROP_PreTrceGenTimegroupsPROP_xilxPostTrceStampPROP_PostTrceFastPathPROP_xilxPostTrceEndpointPathPROP_xilxPostTrceUncovPathPROP_xilxPostTrceSpeedAbsolute MinPROP_xilxPostTrceAdvAnaPROP_xilxPostTrceRptLimitPROP_xilxPostTrceRptPROP_PreTrceFastPathPROP_xilxPreTrceEndpointPathPROP_xilxPreTrceUncovPathPROP_xilxPreTrceSpeedPROP_xilxPreTrceAdvAnaPROP_xilxPreTrceRptLimitPROP_xilxPreTrceRptPROP_CurrentFloorplanFilePROP_xilxBitgCfg_GenOpt_MaskFilePROP_xilxBitgCfg_GenOpt_ReadBackPROP_xilxBitgCfg_GenOpt_LogicAllocFilePROP_xilxBitgReadBk_GenBitStrPROP_xilxBitgReadBk_SecPROP_xilxBitgStart_Clk_DriveDonePROP_xilxBitgStart_Clk_RelDLLPROP_xilxBitgStart_Clk_WrtEnPROP_xilxBitgStart_Clk_EnOutPROP_xilxBitgStart_Clk_DonePROP_xilxBitgStart_IntDonePROP_xilxBitgStart_ClkPROP_xilxBitgCfg_CodePROP_xilxBitgCfg_UnusedPROP_xilxBitgCfg_TMSPROP_xilxBitgCfg_TDOPROP_xilxBitgCfg_TDIPROP_xilxBitgCfg_TCKPROP_xilxBitgCfg_DonePROP_xilxBitgCfg_PgmPROP_xilxBitgCfg_M2PROP_xilxBitgCfg_M1PROP_xilxBitgCfg_M0PROP_xilxBitgCfg_ClkPROP_bitgen_otherCmdLineOptionsPROP_xilxBitgCfg_GenOpt_DbgBitStrPROP_xilxBitgCfg_GenOpt_CompressPROP_xilxBitgCfg_GenOpt_ASCIIFilePROP_xilxBitgCfg_GenOpt_BinaryFilePROP_xilxBitgCfg_GenOpt_BitFilePROP_xilxBitgCfg_GenOpt_DRCPROP_parMpprNodelistFilePROP_xilxPARstratAll files (*)|*PROP_parMpprResultsDirectoryPROP_parMpprResultsToSavePROP_parMpprParIterationsPROP_mpprRsltToCopyPROP_mpprViewPadRptForSelRsltPROP_mpprViewPadRptsForAllRsltPROP_mpprViewParRptForSelRsltPROP_mpprViewParRptsForAllRsltPROP_par_otherCmdLineOptionsPROP_parPowerActivityFilePROP_parPowerReductionPROP_parGenSimModelPROP_parGenTimingRptPROP_parGenClkRegionRptPROP_parGenAsyDlyRptPROP_xilxPARuseBondedIOPROP_parTimingModePerformance EvaluationPROP_parIgnoreTimingConstraintsNon Timing DrivenPROP_parUseTimingConstraintsPROP_xilxPARplacerCostTablePROP_xilxPARextraEffortLevelPROP_xilxPARrouterEffortLevelPROP_xilxPARplacerEffortLevelPROP_xilxPAReffortLevelPROP_map_otherCmdLineOptionsPROP_xilxMapSliceLogicInUnusedBRAMsPROP_xilxMapPackfactorPROP_xilxMapDisableRegOrderingPROP_xilxMapPackRegIntoPROP_mapUseRLOCConstraintsPROP_xilxMapReportDetailPROP_xilxMapCoverModePROP_xilxMapAllowLogicOptPROP_xilxMapReplicateLogicPROP_xilxMapTrimUnconnSigPROP_xilxNgdbldPresHierarchyPROP_xilxNgdbldURPROP_xilxNgdbldUnexpBlksPROP_xilxNgdbldIOPadsPROP_xilxNgdbldNTTypePROP_ngdbuildUseLOCConstraintsPROP_mapTimingModePROP_mapIgnoreTimingConstraintsPROP_lockPinsUcfFilePROP_Enable_Incremental_MessagingPROP_Enable_Message_FilteringPROP_Enable_Message_CapturePROP_FitterReportFormatHTMLPROP_FlowDebugLevelPROP_UserConstraintEditorPreferenceConstraints EditorPROP_UserEditorCustomSettingPROP_UserEditorPreferenceISE Text EditorPROP_XplorerModePROP_SimModelAutoInsertGlblModuleInNetlistPROP_SimModelGenMultiHierFilePROP_SimModelRetainHierarchyPROP_netgenPostSynthesisSimModelNamePROP_PostSynthSimModelNamePROP_SimModelIncUnisimInVerilogFilePROP_SimModelIncSimprimInVerilogFilePROP_xstSafeImplementPROP_SynthFsmEncodePROP_XPowerOtherXPowerOptsPROP_XPowerOptInputTclScriptPROP_XPowerOptLoadPCFFileDefaultPROP_XPowerOptLoadVCDFilePROP_XPowerOptOutputFilePROP_XPowerOptLoadXMLFilePROP_XPowerOptMaxNumberLinesPROP_XPowerOptVerboseRptPROP_XPowerOptAdvancedVerboseRptPROP_xstNetlistHierarchyPROP_xilxSynthKeepHierarchyPROP_xilxNgdbldMacroPROP_xilxNgdbld_AULPROP_SynthXORCollapsePROP_ngdbuild_otherCmdLineOptionsPROP_impactPortAuto - defaultUSB 2USB 1LPT 3LPT 2LPT 1PROP_impactConfigModeDesktop ConfigurationSelect MAPSlave SerialBoundary ScanPROP_impactBaud5760038400192009600PROP_ibiswriterShowAllModelsPROP_ISimOtherCompilerOptions_parPROP_ISimOtherCompilerOptions_behavPROP_ISimCustomCompilationOrderFilePROP_ISimUseCustomCompilationOrderPROP_isimSpecifyDefMacroAndValuePROP_isimSpecifySearchDirectoryPROP_isimValueRangeCheckPROP_ISimSDFTimingToBeReadSetup TimePROP_ISimVCDFileName_par_tbwxpower.vcdPROP_ISimGenVCDFile_par_tbwPROP_ISimUseCustomSimCmdFile_par_tbwPROP_ISimVCDFileName_par_tbPROP_ISimGenVCDFile_par_tbPROP_ISimUseCustomSimCmdFile_par_tbPROP_ISimStoreAllSignalTransitions_behav_tbwPROP_ISimUseCustomSimCmdFile_behav_tbwPROP_ISimStoreAllSignalTransitions_behav_tbPROP_ISimUseCustomSimCmdFile_behav_tbPROP_ISimStoreAllSignalTransitions_par_tbwPROP_ISimStoreAllSignalTransitions_par_tbPROP_ISimSimulationRunTime_behav_tbw1000 nsPROP_ISimSimulationRun_behav_tbwPROP_ISimSimulationRunTime_behav_tbPROP_ISimSimulationRun_behav_tbPROP_ISimSimulationRunTime_par_tbwPROP_ISimSimulationRun_par_tbwPROP_ISimSimulationRunTime_par_tbPROP_ISimSimulationRun_par_tbPROP_isimCompileForHdlDebugPROP_isimIncreCompilationPROP_ISimCustomSimCmdFileName_gen_tbwPROP_ISimUseCustomSimCmdFile_gen_tbwPROP_ISimCustomSimCmdFileName_behav_tbwPROP_ISimCustomSimCmdFileName_behav_tbPROP_ISimCustomSimCmdFileName_par_tbwPROP_ISimCustomSimCmdFileName_par_tbPROP_ISimUutInstNameUUTPROP_xstEquivRegRemovalPROP_xilxSynthAddIObufPROP_SynthResSharingPROP_SynthCaseImplStylePROP_xstBusDelimiterPROP_xstHierarchySeparatorPROP_xstGenerateRTLNetlistPROP_xst_otherCmdLineOptionsPROP_xstVerilogMacrosPROP_xstGenericsParametersPROP_xstUserCompileListPROP_xstVerilog2001PROP_xstIniFilePROP_xstWorkDirPROP_xstCasePROP_xstLibSearchOrderPROP_xstUseSynthConstFilePROP_SynthConstraintsFileCST files (*.cst)|*.cstXCF files (*.xcf)|*.xcfPROP_SynthOptEffortPROP_SynthOptPROP_bencherPostParTestbenchNamePROP_bencherPostMapTestbenchNamePROP_bencherPostXlateTestbenchNamePROP_netgenPostParSimModelNamePROP_netgenPostMapSimModelNamePROP_netgenPostXlateSimModelNamePROP_SimModelNoEscapeSignalPROP_SimModelPathUsedInSdfAnnPROP_SimModelIncSdfAnnInVerilogFilePROP_SimModelIncUselibDirInVerilogFilePROP_SimModelRenTopLevModPROP_SimModelOtherNetgenOptsPROP_SimModelOutputExtIdentPROP_SimModelGenArchOnlyPROP_SimModelInsertBuffersPulseSwallowPROP_SimModelRenTopLevInstToPROP_SimModelGenerateTestbenchFilePROP_SimModelRenTopLevArchToStructurePROP_netgenRenameTopLevEntToPROP_SimModelRocPulseWidthPROP_SimModelBringOutGsrNetAsAPortPROP_SimModelGsrPortNameGSR_PORTPROP_SimModelTocPulseWidthPROP_SimModelBringOutGtsNetAsAPortPROP_SimModelGtsPortNameGTS_PORTPROP_ChangeDevSpeedPROP_CompxlibLangAllPROP_CompxlibSimPrimativesPROP_CompxlibUniSimLibPROP_CompxlibOtherCompxlibOptsPROP_CompxlibOverwriteLibOverwritePROP_CompxlibSimPathSearch in PathPROP_CompxlibOutputDir$XILINX//PROP_MSimSDFTimingToBeReadPROP_ModelSimConfigNamePROP_ModelSimUseConfigNamePROP_ModelSimSimRunTime_tbw1000nsPROP_SimDoPROP_SimCustom_postParPROP_SimUseCustom_postParDO files (*.do)|*.doPROP_SimCustom_postMapPROP_SimUseCustom_postMapPROP_SimCustom_postXlatePROP_SimUseCustom_postXlatePROP_SimUserCompileList_behavPROP_SimCustom_behavPROP_SimUseCustom_behavPROP_SimGenVcdFilePROP_ModelSimUutInstName_postFitPROP_ModelSimUutInstName_postParPROP_ModelSimUutInstName_postMapPROP_ModelSimSimRunTime_tbPROP_SimUseExpDeclOnlyPROP_SimSyntax9387PROP_ModelSimSimResDefault (1 ps)100 sec10 sec1 sec100 ms10 ms1 ms100 us10 us1 us100 ns10 ns1 ns100 ps10 ps1 ps100 fs10 fs1 fsPROP_ModelSimDataWinPROP_ModelSimProcWinPROP_ModelSimVarsWinPROP_ModelSimListWinPROP_ModelSimSourceWinPROP_ModelSimStructWinPROP_ModelSimWaveWinPROP_ModelSimSignalWinPROP_vcom_otherCmdLineOptionsPROP_vlog_otherCmdLineOptionsPROP_vsim_otherCmdLineOptionsPROP_UserBrowsedStrategyFilesPROP_LastUnlockStatusPROP_LastAppliedStrategyXilinx Default (unlocked)PROP_LastAppliedGoalBalancedPROP_DesignNamePROP_PartitionForcePlacementPROP_PartitionForceTranslatePROP_PartitionForceSynthPROP_PartitionCreateDeletePROP_SmartGuideFileNamePROP_PostSynthSimTopPROP_BehavioralSimTopPROP_SteCreatedByPK -!__OBJSTORE__/ProjectNavigatorGui/PK -/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData  - -PK -=zz6__OBJSTORE__/ProjectNavigatorGui/GuiProjectData_StrTblModule|lpc_7seg/lpc_7seg/seven_seg0 - wb_7seg - wb_7seg_behavlpc_7seg (top_lpc_7seg.v)/lpc_7segxc3s400-4fg456Design UtilitiesDESUT_UCFDESUT_VERILOGConfigure Target DeviceGenerate Programming FileImplement DesignImplement Design/Map/Generate Post-Map Simulation ModelImplement Design/Map/Generate Post-Map Static TimingImplement Design/Place & Route/Back-annotate Pin LocationsImplement Design/Place & Route/Generate IBIS ModelImplement Design/Place & Route/Generate Post-Place & Route Simulation ModelImplement Design/Place & Route/Generate Post-Place & Route Static TimingImplement Design/Place & Route/Generate Power DataImplement Design/Place & Route/MPPR Results UtilitiesImplement Design/Translate/Generate Post-Translate Simulation ModelSynthesize - XSTSynthesize - XST/Generate Post-Synthesis Simulation ModelUser ConstraintsDESUT_VHDL_ARCHITECTUREPK -__OBJSTORE__/STE/PK -__OBJSTORE__/SrcCtrl/PK -"__OBJSTORE__/SrcCtrl/SavedOptions/PK - __OBJSTORE__/_ProjRepoInternal_/PK -__OBJSTORE__/common/PK -'__OBJSTORE__/common/HierarchicalDesign/PK -T†~~0__OBJSTORE__/common/HierarchicalDesign/HDProject PK -^^7__OBJSTORE__/common/HierarchicalDesign/HDProject_StrTbl -14/lpc_7segTS_EXPANDEDTS_FRAGCOVEREDTS_PACKEDTS_ROUTEDTS_SYNTHESISlpc_7segPK -";<<+__OBJSTORE__/common/__stored_object_table__(:PK -__OBJSTORE__/xreport/PK ->5__OBJSTORE__/xreport/Gc_RvReportViewer-Current-ModulePK -aR<__OBJSTORE__/xreport/Gc_RvReportViewer-Current-Module_StrTbllpc_7segPK -֞1B__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-Factory-Defaultj - - !"#$%&'()*+,-./0123456789:;<=>?@ABC*DEF*GHIJK*LMNOPQRSTUVWXYZPK -D I__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-Factory-Default_StrTbl[
Tue, 05 Sep 2006 12:00:00 PST Unknown
PK -/[:__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-lpc7segk - - !"#$%&'()*+,-./0123456789:;<=>?-@ABC+DEF+GHIJK+LMNOPQRSTUVWXYZPK -x -A__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-lpc7seg_StrTbl[
2008-03-03T12:05:53 lpc7seg 2008-03-03T12:05:53
PK -O+;__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-lpc_7segp - - !"#$%&'()*+,-./0123456789:;<=>?-@ABC+DEF+GHIJK+LMNOPQRSTUVWXYZ[\]^_PK -NA - B__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-lpc_7seg_StrTbl`
2008-07-21T17:34:23 lpc_7seg 2008-03-03T18:16:05
PK - -__REGISTRY__/PK -__REGISTRY__/Autonym/PK -__REGISTRY__/Autonym/regkeysPK -__REGISTRY__/Cs/PK -__REGISTRY__/Cs/regkeysPK -#__REGISTRY__/ExpandedNetlistEngine/PK -*__REGISTRY__/ExpandedNetlistEngine/regkeysPK - __REGISTRY__/HierarchicalDesign/PK -*__REGISTRY__/HierarchicalDesign/HDProject/PK -(1__REGISTRY__/HierarchicalDesign/HDProject/regkeysCommandLine-Map - -s -CommandLine-Ngdbuild -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\ngdbuild.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -dd _ngo -nt timestamp -i -p xc3s400-fg456-4 lpc_7seg.ngc lpc_7seg.ngd -s -CommandLine-Par - -s -CommandLine-Xst - -s -Previous-NGD -lpc_7seg_prev_built.ngd -s -Previous-NGM - -s -Previous-Packed-NCD - -s -Previous-Routed-NCD - -s -PK -'__REGISTRY__/HierarchicalDesign/regkeysPK -__REGISTRY__/ProjectNavigator/PK -CC%__REGISTRY__/ProjectNavigator/regkeysISE_VERSION_LAST_SAVED_WITH -10.1 -s -sMigrationTypeKey -new_project -s -PK -!__REGISTRY__/ProjectNavigatorGui/PK -(__REGISTRY__/ProjectNavigatorGui/regkeysPK -__REGISTRY__/STE/PK -__REGISTRY__/STE/bitgen/PK -s__REGISTRY__/STE/bitgen/regkeysCommandLine -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\bitgen.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -f lpc_7seg.ut lpc_7seg.ncd -s -FormatString -bitgen [-d] [-j] [-b] [-w] [-l] [-m] [-t] [-n] [-u] [-a] [--p] [-r ] [-intstyle ise|xflow|silent] [-ise ] {-bd [tag ]} {-g } [] [] -s -PK -__REGISTRY__/STE/map/PK -dء__REGISTRY__/STE/map/regkeysCommandLine -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\map.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -p xc3s400-fg456-4 -cm area -pr b -k 4 -c 100 -o lpc_7seg_map.ncd lpc_7seg.ngd lpc_7seg.pcf -s -FormatString -map [-bp] [-c []] [-cm ] [-detail] [-equivalent_register_removal on|off] [-global_opt off|&speed|&area|on] [-ignore_keep_hierarchy] [-intstyle ise|xflow|silent] [-ir] [-ise ] [-k 4|5|6|7|8] [-l] [-lc off|area|auto] [-logic_opt off|on] [-ntd] [-o ] [-ol std|med|high] [-p ] [-power off|on] [-activityfile ] [-pr off|i|o|b] [-r] [-register_duplication [off|on]] [-retiming off|on] [-smartguide ] [-t ] [-timing] [-tx on|off|aggressive|limit] [-u] [-w] [-x] [-xe c|n] [--ds ] [--hv] [--lambda ] [--m] [--ms ] [--physical_synthesis off|on] [--smartsynthesis ] [--ts_comb ] [--ts_cy ] [--ts_load ] [--ts_trigger ] [--use_soft_locs] [--global_opt_script ] [] -s -PK -__REGISTRY__/STE/ngdbuild/PK -!__REGISTRY__/STE/ngdbuild/regkeysCommandLine -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\ngdbuild.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -dd _ngo -nt timestamp -i -p xc3s400-fg456-4 lpc_7seg.ngc lpc_7seg.ngd -s -FormatString -ngdbuild [-p ] {-sd } {-l } [-ur ] [-dd ] [-r] [-a] [-u] [-nt timestamp|on|off] [-uc ] [-aul] [-bm ] [-i] [-modular initial|module|assemble] [-intstyle ise|xflow|silent] [-quiet] [-verbose] [-active ] [-pimpath ] {-use_pim } [-insert_keep_hierarchy] [--forcengd] {--n } {--sl } [--global_opt] [--script ] [--incremental] [--csttrans] [] -s -PK -__REGISTRY__/STE/par/PK -Z邘__REGISTRY__/STE/par/regkeysCommandLine -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\par.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -w -intstyle ise -ol std -t 1 lpc_7seg_map.ncd lpc_7seg.ncd lpc_7seg.pcf -s -FormatString -par [-ol std|med|high] [-pl std|med|high] [-rl std|med|high] [-xe n|c] [-t ] [-p] [-k] [-r] [-w] [-smartguide ] [-n ] [-s ] [-m ] [-x] [-ub] [-nopad] [-power on|off] [-activityfile ] [-ntd] [-intstyle ise|xflow|silent] [-ise ] [--strategy use_placement|keep_placement|ignore_placement] [] -s -PK -__REGISTRY__/STE/trce/PK -__REGISTRY__/STE/trce/regkeysCommandLine -C:/Xilinx/10.1/ISE/bin/nt/unwrapped/trce.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -e 3 -s 4 -xml lpc_7seg lpc_7seg.ncd -o lpc_7seg.twr lpc_7seg.pcf -ucf lpc_7seg.ucf -s -FormatString -trce.exe ([-e|-v []] [-l ] [-n []] [-u []] [-skew] [-a] [--p] [-s ] [-o ] [--m] [-stamp ] [-tsi ] [-xml ] [-nodatasheet] [-timegroups] [-fastpaths] [-intstyle ise|xflow|silent] [-ise ] [--ucf ] []) | ([-run [ []]] [-intstyle ise|xflow|silent] [-ise ]) -s -PK -__REGISTRY__/STE/xst/PK -ќG__REGISTRY__/STE/xst/regkeysCommandLine -C:\Xilinx\10.1\ISE\bin\nt\unwrapped\xst.exe -ise C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.ise -intstyle ise -ifn C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.xst -ofn C:/hharte/work/HarteTec/cores/wb_lpc/examples/lpc_7seg/lpc_7seg.syr -finalclean 1 -s -FormatString -xst [-ifn ] [-ofn ] [-ise ] [--quiet] [-intstyle