URL
https://opencores.org/ocsvn/zap/zap/trunk
Subversion Repositories zap
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- This comparison shows the changes necessary to convert path
/
- from Rev 34 to Rev 35
- ↔ Reverse comparison
Rev 34 → Rev 35
/zap/trunk/src/ts/thumb_test1/Config.cfg
0,0 → 1,41
# TC config. |
|
%Config = ( |
# CPU configuration. |
DATA_CACHE_SIZE => 4096, # Data cache size in bytes |
CODE_CACHE_SIZE => 4096, # Instruction cache size in bytes |
CODE_SECTION_TLB_ENTRIES => 8, # Instruction section TLB entries. |
CODE_SPAGE_TLB_ENTRIES => 32, # Instruction small page TLB entries. |
CODE_LPAGE_TLB_ENTRIES => 16, # Instruction large page TLB entries. |
DATA_SECTION_TLB_ENTRIES => 8, # Data section TLB entries. |
DATA_SPAGE_TLB_ENTRIES => 32, # Data small page TLB entries. |
DATA_LPAGE_TLB_ENTRIES => 16, # Data large page TLB entries. |
BP_DEPTH => 1024, # Branch predictor depth. |
INSTR_FIFO_DEPTH => 4, # Instruction buffer depth. |
STORE_BUFFER_DEPTH => 16, # Store buffer depth. |
SYNTHESIS => 0, # 0 allows debug messages. |
|
# Testbench configuration. |
UART_TX_TERMINAL => 0, # 1 will open a UART TX terminal. |
EXT_RAM_SIZE => 32768, # External RAM size. |
SEED => -1, # Seed. Use -1 to use random seed. |
DUMP_START => 2000, # Starting memory address from which to dump. |
DUMP_SIZE => 200, # Length of dump in bytes. |
IRQ_EN => 0, # Make this 1 to enable IRQ signal from TB. |
FIQ_EN => 0, # Make this 1 to enable FIQ signal from TB. |
MAX_CLOCK_CYCLES => 1000, # Clock cycles to run the simulation for. |
ALLOW_STALLS => 1, # Make this 1 to allow external RAM to signal a stall. |
DEFINE_TLB_DEBUG => 0, # Make this 1 to define TLB_DEBUG. Useful for debugging the TLB. |
REG_CHECK => { |
"r0" => "32'hFFFFFFFF", |
"r1" => "32'd10", |
"r2" => "32'd10", |
"r3" => "32'd10", |
"r4" => "32'd10", |
"r5" => "32'd10", |
"r6" => "32'd10", |
"r7" => "32'd10" |
}, |
FINAL_CHECK => {} |
); |
|
/zap/trunk/src/ts/thumb_test1/Description.txt
0,0 → 1,3
This test simply switches to thumb state (in SVC mode) and |
writes to R0 to R7. R0 should read -1 while the others should |
read 10. |
/zap/trunk/src/ts/thumb_test1/linker.ld
0,0 → 1,16
|
/* Linker Script */ |
|
ENTRY(_Reset) /* _Reset is the entry point. This is the entry point in the bootstrap assembler */ |
|
/* Define how sections of the program are organized. */ |
SECTIONS |
{ |
. = 0x00000; /* Location Counter. */ |
.text : { *(.text) } /* Text section is expected to be starting at 0x0.*/ |
.data : { *(.data) } /* Immediately followed by data section */ |
.bss : { *(.bss) *(COMMON) } /* Immediately followed by BSS section. Common sections are also included in BSS. */ |
. = ALIGN(8); /* Align the location counter. */ |
. = . + 0x1000; /* 4kB of descending stack memory */ |
stack_top = .; /* Make stack_top same as location counter. */ |
} |
/zap/trunk/src/ts/thumb_test1/main.c
0,0 → 1,4
int main() |
{ |
return 0; |
} |
/zap/trunk/src/ts/thumb_test1/makefile
0,0 → 1,2
# Execute the main Makefile. |
include ../../scripts/makefile |
/zap/trunk/src/ts/thumb_test1/thumb.s
0,0 → 1,23
.text |
.global _Reset |
|
_Reset: |
ldr sp, =#4000 |
ldr r0, =myThumbFunction+1 |
mov lr, pc |
bx r0 |
ldr r0, =#0xFFFFFFFF |
here: b here |
|
.thumb_func |
myThumbFunction: |
mov r0, #10 |
mov r1, #10 |
mov r2, #10 |
mov r3, #10 |
mov r4, #10 |
mov r5, #10 |
mov r6, #10 |
mov r7, #10 |
bx lr |
|
/zap/trunk/src/ts/uart_tx/Config.cfg
0,0 → 1,32
# TC config. |
|
%Config = ( |
# CPU configuration. |
DATA_CACHE_SIZE => 4096, # Data cache size in bytes |
CODE_CACHE_SIZE => 4096, # Instruction cache size in bytes |
CODE_SECTION_TLB_ENTRIES => 8, # Instruction section TLB entries. |
CODE_SPAGE_TLB_ENTRIES => 32, # Instruction small page TLB entries. |
CODE_LPAGE_TLB_ENTRIES => 16, # Instruction large page TLB entries. |
DATA_SECTION_TLB_ENTRIES => 8, # Data section TLB entries. |
DATA_SPAGE_TLB_ENTRIES => 32, # Data small page TLB entries. |
DATA_LPAGE_TLB_ENTRIES => 16, # Data large page TLB entries. |
BP_DEPTH => 1024, # Branch predictor depth. |
INSTR_FIFO_DEPTH => 4, # Instruction buffer depth. |
STORE_BUFFER_DEPTH => 16, # Store buffer depth. |
SYNTHESIS => 0, # 0 allows debug messages. |
|
# Testbench configuration. |
UART_TX_TERMINAL => 1, # Show TX terminal. |
EXT_RAM_SIZE => 32768, # External RAM size. |
SEED => -1, # Seed. Use -1 to use random seed. |
DUMP_START => 2000, # Starting memory address from which to dump. |
DUMP_SIZE => 200, # Length of dump in bytes. |
IRQ_EN => 0, # Make this 1 to enable IRQ signal from TB. |
FIQ_EN => 0, # Make this 1 to enable FIQ signal from TB. |
MAX_CLOCK_CYCLES => 150000, # Clock cycles to run the simulation for. |
ALLOW_STALLS => 1, # Make this 1 to allow external RAM to signal a stall. |
DEFINE_TLB_DEBUG => 0, # Make this 1 to define TLB_DEBUG. Useful for debugging the TLB. |
REG_CHECK => {}, |
FINAL_CHECK => {} |
); |
|
/zap/trunk/src/ts/uart_tx/Description.txt
0,0 → 1,32
This test displays a string to the TB UART output console. |
/zap/trunk/src/ts/uart_tx/main.c
0,0 → 1,12
#include "uart.h" |
|
char* str = "Hello World"; |
|
int main(void) |
{ |
UARTInit(); |
UARTWrite(str); |
return 0; |
} |
|
|
/zap/trunk/src/ts/uart_tx/makefile
0,0 → 1,2
# Execute the main Makefile. |
include ../../scripts/makefile |
/zap/trunk/src/ts/uart_tx/uart.c
0,0 → 1,38
#include "uart.h" |
|
void UARTInit() |
{ |
*UART_LCR = (*UART_LCR) | (1 << 7); |
*UART_DLAB1 = 1; |
*UART_DLAB2 = 0; |
*UART_LCR = (*UART_LCR) & ~(1 << 7); |
return 0; |
} |
|
void UARTWrite(char* s) |
{ |
int len; |
|
len = strlen(s); |
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for(int i=0;i<len;i++) |
{ |
UARTWriteByte(s[i]); |
} |
} |
|
void UARTWriteByte(char c) |
{ |
*UART_THR = c; |
} |
|
int strlen(char* s) |
{ |
int i; |
i = 0; |
|
while(s[i] != '\0') |
i++; |
|
return i; |
} |
/zap/trunk/src/ts/uart_tx/uart.h
0,0 → 1,14
#ifndef UART_H |
|
#define UART_H |
#define UART_DLAB1 ((char*)0xFFFFFFE0) |
#define UART_DLAB2 ((char*)0xFFFFFFE1) |
#define UART_THR ((char*)0xFFFFFFE0) |
#define UART_LCR ((char*)0xFFFFFFE3) |
|
void UARTInit(void); |
void UARTWrite(char*); |
void UARTWriteByte(char c); |
int strlen(char*); |
|
#endif |
/zap/trunk/src/ts/uart_tx/uart.ld
0,0 → 1,16
|
/* Linker Script */ |
|
ENTRY(_Reset) /* _Reset is the entry point. This is the entry point in the bootstrap assembler */ |
|
/* Define how sections of the program are organized. */ |
SECTIONS |
{ |
. = 0x00000; /* Location Counter. */ |
.text : { *(.text) } /* Text section is expected to be starting at 0x0.*/ |
.data : { *(.data) } /* Immediately followed by data section */ |
.bss : { *(.bss) *(COMMON) } /* Immediately followed by BSS section. Common sections are also included in BSS. */ |
. = ALIGN(8); /* Align the location counter. */ |
. = . + 0x1000; /* 4kB of descending stack memory */ |
stack_top = .; /* Make stack_top same as location counter. */ |
} |
/zap/trunk/src/ts/uart_tx/uart.s
0,0 → 1,7
.text |
.global _Reset |
_Reset: |
ldr sp, =#3500 |
bl main |
here: b here |
|