URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/zipcpu/trunk/bench
- from Rev 74 to Rev 69
- ↔ Reverse comparison
Rev 74 → Rev 69
/asm/poptest.s
File deleted
/asm/nullpc.s
File deleted
/asm/zipdhry.S
49,11 → 49,10
// DMIPS: 40.5 100 MHz (sim) 0.41 // 20151212 (H/W DIV) |
// DMIPS: 8.2 100 MHz (sim) 0.08 // 20151104--!pipelined |
// DMIPS: 60.1 100 MHz (sim) 0.60 // 20151215 (New PF) |
// DMIPS: 60.0 100 MHz (sim) 0.60 // 20151226 (BugFix) |
// DMIPS: 54.8 100 MHz (sim) 0.55 // 20151219 |
// On real hardware: |
// DMIPS: 24.7 100 MHz (basys) 0.25 // Initial baseline |
// DMIPS: 30.6 100 MHz (basys) 0.31 // 20151017 |
// DMIPS: 48.4 100 MHz (basys) 0.48 // 20151227 (New pf/ISA) |
// |
// (And, under Verilator, if the cache holds the entire 4kW program: 55.1 DMIPS) |
// |
158,18 → 157,11
#define PIPELINED_STRCMP |
// |
// |
dev.scope.cpu equ 0x0120 |
sys.ctr.mtask equ 0xc0000008 |
// int main(int argc, char **argv) { |
// dhrystone(); |
// } |
// #define LOAD_ADDRESS entry+PC |
#define LOAD_ADDRESS lcl_strcpy+PC |
entry: |
LDI 0x0c000010,R0 |
LDI dev.scope.cpu,R1 |
STO R0,(R1) |
; |
MOV top_of_stack(PC),uSP |
MOV entry(PC),uR12 |
; Store our tick counter in R1 |
188,7 → 180,6
LOD (R1),R0 |
HALT ; Stop the CPU--We're done!!!!!!! |
|
// |
// typedef enum { Ident_1, Ident_2, Ident_3, Ident_4, Ident_5 } test_enum; |
// typedef enum { false, true } bool; |
|
202,7 → 193,53
variant.var_1.int_comp equ 3 |
variant.var_1.str_comp equ 4 |
|
gbl_arr_1: |
fill 50,0 |
gbl_arr_2: |
fill 2500,0 |
gbl_ch: |
word 0 |
gbl_ch_2: |
word 0 |
gbl_bool: |
word 0 |
gbl_int: |
word 0 |
gbl_ptr: |
word 0 |
|
some_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word 'S','O','M','E',' ','S','T','R','I','N','G' |
word 0 |
|
first_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',' |
word ' ','1','\'','S','T' |
word ' ','S','T','R','I','N','G' |
word 0 |
|
second_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word '2','\'','N','D',' ','S','T','R','I','N','G' |
word 0 |
|
third_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word '3','\'','R','D',' ','S','T','R','I','N','G' |
word 0 |
|
// Arr_1_Dim gbl_arr_1; |
// Arr_2_Dim gbl_arr_2; |
// char gbl_ch, gbl_ch_2; |
// bool gbl_bool; |
// int gbl_int; |
// RECP gbl_ptr; |
|
//char *lcl_strcpy(char *d, char *s) { |
// char *cpd = d, ch; |
// |
255,9 → 292,9
CMP.NZ 0,R3 |
STO.NZ R3,1(R0) |
CMP.NZ 0,R4 |
STO.NZ R4,2(R0) |
STO.NZ R4,1(R0) |
CMP.NZ 0,R5 |
STO.NZ R5,3(R0) |
STO.NZ R5,1(R0) |
|
LOD (SP),R2 |
LOD 1(SP),R3 |
264,11 → 301,8
LOD 2(SP),R4 |
LOD 3(SP),R5 |
ADD 4,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
HALT.LT |
#endif |
JMP R2 |
NOP |
|
#else |
lcl_strcpy: |
311,10 → 345,6
lcl_strcpy_end_of_loop: |
LOD (SP),R2 |
ADD 1,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
JMP R2 |
#endif |
|
350,7 → 380,6
LOD 2(R1),R8 |
LOD 3(R1),R9 |
; |
; |
CMP 0,R2 |
CMP.NZ 0,R3 |
CMP.NZ 0,R4 |
403,11 → 432,8
LOD 6(SP),R8 |
LOD 7(SP),R9 |
ADD 8,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
JMP R2 |
NOP |
|
#else |
lcl_strcmp: |
473,10 → 499,6
LOD (SP),R2 |
LOD 1(SP),R3 |
ADD 2,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
JMP R2 |
#endif |
|
510,10 → 532,6
LDILO.Z 1,R0 |
LOD (SP),R2 |
ADD 1,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
JMP R2 |
#endif |
|
544,11 → 562,7
func_2: |
; |
SUB 6,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
STO R2,(SP) ; SP = 0x08daf |
STO R2,(SP) |
STO R3,1(SP) |
STO R4,2(SP) |
STO R5,3(SP) |
636,11 → 650,8
LOD 4(SP),R6 |
LOD 5(SP),R7 |
ADD 6,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 |
BUSY.LT |
#endif |
JMP R2 |
NOP |
|
//bool func_3(test_enum a) { |
// test_enum lcl_enum; |
660,10 → 671,6
CMP 2,R0 |
CLR R0 ; CLR Doesn't set flags |
LDILO.Z 1,R0 |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R1 |
BUSY.LT |
#endif |
JMP R1 |
#endif |
|
726,7 → 733,7
#else |
CMP 2,R0 |
LDI 3,R1 |
#ifndef SKIP_SHORT_CIRCUITS |
#ifdef SKIP_SHORT_CIRCUITS |
BUSY.NZ |
#endif |
STO.NZ R1,(R3) |
764,8 → 771,7
BRA proc_6_end_of_case |
proc_6_case_not_two: |
#ifndef SKIP_SHORT_CIRCUITS |
NOOP ;;;;;;;; TODO This fails--needs the NOOP |
BUSY ;;;;;;;; TODO so as not to do the BUSY |
BUSY |
#endif |
CMP 4,R2 |
BNZ proc_6_case_not_four |
776,12 → 782,9
proc_6_end_of_case: |
LOD (SP),R2 |
LOD 1(SP),R3 |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R2 ; TODO This fails, even when the address |
BUSY.LT |
#endif |
ADD 2,SP |
JMP R2 |
NOP |
|
// void proc_7(int a, int b, int *c) { |
// int lcl; |
795,10 → 798,6
ADD 2+R0,R1 |
STO R1,(R2) |
|
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R3 |
BUSY.LT |
#endif |
JMP R3 |
#endif |
|
872,10 → 871,6
LOD 1(SP),R5 |
LOD 2(SP),R6 |
ADD 3,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R4 |
BUSY.LT |
#endif |
JMP R4 |
|
// void proc_5(void) { |
960,11 → 955,8
LOD 1(SP),R2 |
LOD 2(SP),R3 |
ADD 3,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R1 |
BUSY.LT |
#endif |
JMP R1 |
NOP |
|
// void proc_2(int *a) { |
// int lcl_int; |
1024,11 → 1016,8
LOD 4(SP),R5 |
LOD 5(SP),R6 |
ADD 6,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R1 |
BUSY.LT |
#endif |
JMP R1 |
NOP |
|
//void proc_1 (RECP a) { |
// RECP nxt = a->ptr_comp; |
1072,19 → 1061,18
MOV R0,R9 |
LOD ptr_comp(R9),R4 |
#ifndef SKIP_SHORT_CIRCUITS |
TST -1,R4 ; R4 = 0x100e9f |
TST -1,R4 |
BUSY.Z |
CMP PC,R9 ; R9 = 0x100ec2 |
CMP PC,R9 |
BUSY.LT |
#endif |
MOV R9,R6 |
LOD gbl_ptr(R12),R7 ; (0x100a04) -> 0x100ec2 |
; BUSY ; R7 = 0x0100ec2 |
LOD gbl_ptr(R12),R7 |
|
#ifndef SKIP_SHORT_CIRCUITS |
LOD variant.var_1.enum_comp(R7), R0 |
CMP 2,R0 ; R0 = 0 |
BUSY.NZ ; TODO Fails here |
CMP 2,R0 |
BUSY.NZ |
#endif |
|
#ifdef NO_LOOP_UNROLLING |
1136,7 → 1124,7
LDI 5,R5 |
STO R5,variant.var_1.int_comp(R9) |
STO R5,variant.var_1.int_comp(R4) |
MOV ptr_comp(R4),R0 ; R4 = 0x8e41, ptr_comp(R4)=R4 |
MOV ptr_comp(R4),R0 |
MOV __HERE__+2(PC),R1 |
BRA proc_3 ; Uses R0 and R1 |
|
1157,7 → 1145,7
BRA proc_6 |
; |
LOD gbl_ptr(R12),R5 |
LOD ptr_comp(R5),R5 |
LOD ptr_comp(R5),R5 |
STO R5,ptr_comp(R4) |
; |
#ifdef NO_INLINE |
1204,11 → 1192,8
LOD 10(SP),R11 |
#endif |
ADD 11,SP |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R1 |
BUSY.LT |
#endif |
JMP R1 // Jumps to wrong address ?? |
NOP |
|
// void dhrystone(void) { |
// int lcl_int_1, lcl_int_2, lcl_int_3, index, number_of_runs = 500; |
1382,8 → 1367,7
dhrystone_while_loop: |
// lcl_int_3 = 5 * lcl_int_1 - lcl_int_2; |
MOV R5,R7 |
LDI 5,R0 |
MPYS R0,R7 |
MPYS 5,R7 |
SUB R6,R7 |
STO R7,lcl_int_3(SP) |
#ifndef SKIP_SHORT_CIRCUITS |
1418,7 → 1402,7
CMP 3,R0 |
BUSY.NZ |
CMP 3,R6 |
BUSY.NZ |
BUSY.NZ |
LOD lcl_int_3(SP),R0 |
CMP 7,R0 |
BUSY.NZ |
1432,11 → 1416,6
BRA proc_8 |
// proc_1(gbl_ptr); |
LOD gbl_ptr(PC),R0 |
#ifndef SKIP_SHORT_CIRCUITS |
LOD variant.var_1.enum_comp(R0), R1 |
CMP 2,R1 ; R0 = 0 |
BUSY.NZ ; TODO Fails here |
#endif |
MOV __HERE__+2(PC),R1 |
BRA proc_1 |
// |
1521,7 → 1500,7
LDI 9,R0 |
#endif |
#endif |
STO R0,lcl_int_1(SP) ;;; TODO FAILS HERE (Watched it fail!) |
STO R0,lcl_int_1(SP) |
// lcl_int_2 = 7 * ( lcl_int_2 - lcl_int_3) - lcl_int_1; |
LOD lcl_int_3(SP),R2 |
SUB R2,R6 |
1531,12 → 1510,12
#ifndef SKIP_SHORT_CIRCUITS |
LOD lcl_int_1(SP),R0 |
CMP 1,R0 |
CMP.Z 13,R6 |
LOD.Z lcl_int_3(SP),R0 |
CMP.Z 7,R0 |
BZ dhrystone_triple_test_still_good |
BUSY |
dhrystone_triple_test_still_good: |
BUSY.NZ |
CMP 13,R6 |
BUSY.NZ |
LOD lcl_int_3(SP),R0 |
CMP 7,R0 |
BUSY.NZ |
#endif |
MOV lcl_int_1(SP),R0 |
MOV __HERE__+2(PC),R1 |
1569,10 → 1548,6
; |
ADD 12+RECSIZE+RECSIZE+30+30+3,SP |
; Return from subroutine |
#ifndef SKIP_SHORT_CIRCUITS |
CMP LOAD_ADDRESS,R0 |
BUSY.LT |
#endif |
JMP R0 |
#else |
LDI 0,CC |
1580,51 → 1555,4
NOP |
BUSY |
#endif |
gbl_arr_1: |
fill 50,0 |
gbl_arr_2: |
fill 2500,0 |
gbl_ch: |
word 0 |
gbl_ch_2: |
word 0 |
gbl_bool: |
word 0 |
gbl_int: |
word 0 |
gbl_ptr: |
word 0 |
|
some_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word 'S','O','M','E',' ','S','T','R','I','N','G' |
word 0 |
|
first_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',' |
word ' ','1','\'','S','T' |
word ' ','S','T','R','I','N','G' |
word 0 |
|
second_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word '2','\'','N','D',' ','S','T','R','I','N','G' |
word 0 |
|
third_string: |
word 'D','H','R','Y','S','T','O','N','E',' ' |
word 'P','R','O','G','R','A','M',',',' ' |
word '3','\'','R','D',' ','S','T','R','I','N','G' |
word 0 |
|
// Arr_1_Dim gbl_arr_1; |
// Arr_2_Dim gbl_arr_2; |
// char gbl_ch, gbl_ch_2; |
// bool gbl_bool; |
// int gbl_int; |
// RECP gbl_ptr; |
|
; |
/asm/Makefile
30,8 → 30,8
# |
################################################################################ |
# |
all: zipdhry.z testdiv.z wdt.z halttest.z zipdhry.txt nullpc.txt poptest.txt |
ZDIR := ../../sw/zasm |
all: zipdhry.z testdiv.z wdt.z halttest.z |
ZDIR := ../../sw/zasm/z2 |
ZASM := $(ZDIR)/zasm |
ZDMP := $(ZDIR)/zdump |
LIBS := ../../sw/lib |
46,16 → 46,6
zipdhry.txt: zipdhry.z |
$(ZDMP) zipdhry.z > zipdhry.txt |
|
nullpc.z: nullpc.s |
$(ZASM) $(INCS) $^ -o $@ |
nullpc.txt: nullpc.z |
$(ZDMP) nullpc.z > nullpc.txt |
|
poptest.z: poptest.s |
$(ZASM) $(INCS) $^ -o $@ |
poptest.txt: poptest.z |
$(ZDMP) poptest.z > poptest.txt |
|
wdt.z: wdt.S |
$(ZASM) $(INCS) $^ -o $@ |
|