URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/zipcpu/trunk/sw
- from Rev 206 to Rev 203
- ↔ Reverse comparison
Rev 206 → Rev 203
/gas-script.sh
38,7 → 38,6
tar -xjf ./$VERSION.tar.bz2 --transform s,$VERSION,$VERSION-zip, |
if [[ -e gas-zippatch.patch ]] |
then |
cd $VERSION-zip |
patch -p1 <../gas-zippatch.patch |
cd .. |
else |
/gas-zippatch.patch
1705,8 → 1705,8
# If we aren't building newlib, then don't build libgloss, since libgloss |
diff -Naur '--exclude=*.swp' binutils-2.27/gas/config/tc-zip.c binutils-2.27-zip/gas/config/tc-zip.c |
--- binutils-2.27/gas/config/tc-zip.c 1969-12-31 19:00:00.000000000 -0500 |
+++ binutils-2.27-zip/gas/config/tc-zip.c 2017-03-15 23:03:15.801504568 -0400 |
@@ -0,0 +1,3340 @@ |
+++ binutils-2.27-zip/gas/config/tc-zip.c 2017-03-08 17:57:01.048791909 -0500 |
@@ -0,0 +1,3329 @@ |
+//////////////////////////////////////////////////////////////////////////////// |
+// |
+// Filename: tc-zip.c |
2465,8 → 2465,6
+ const char *ustr = str; |
+ int userreg = 0; |
+ |
+ if ((!str)||(str[0]=='\0')) |
+ return "No register given"; |
+ ustr = zip_skip_white_spaces(str); |
+ |
+ if (toupper(ustr[0]) == 'U') { |
3306,9 → 3304,7
+ if (NULL != right) |
+ err = "Instruction opcode expects only one operand"; |
+ else { |
+ if ((NULL == left)||(left[0] == '\0')) { |
+ err = "No address given"; |
+ } else if ((NULL == strchr(left,'(')) |
+ if ((NULL == strchr(left,'(')) |
+ &&(NULL == strchr(left,'+'))) { |
+ char *longerstr = (char *)xmalloc(strlen(left)+6); |
+ // If not stated, assume PC relative |
3644,7 → 3640,6
+ return 0; |
+ if ((opb == ZIPO_MOV)&&(b & 0x44000)) |
+ return 0; |
+ |
+ imma = zip_non_cis_immediate(a); |
+ immb = zip_non_cis_immediate(b); |
+ |
3666,11 → 3661,7
+ case ZIPO_MOV: |
+ if (!fits_within(3,imma)) |
+ return 0; |
+ // Prohibit a MOV x(PC),Ry to move into a first |
+ // instruction position. While the CPU supports it, |
+ // making sure x remains valid isn't yet supported |
+ // here. |
+ if ((ZIP_PC == aareg)||(ZIP_CC == aareg)) |
+ if (aareg == ZIP_CC) |
+ return 0; |
+ break; |
+ case ZIPO_LDI: case ZIPO_LDIn: |
3982,14 → 3973,8
+ switch(insn->i_op) { |
+ case ZIPO_LDI: // May or may not be conditional |
+ if ((sym_known)&&(this_segment) |
+ &&(fits_within(15,immv+symv-fragP->fr_address-insn->i_rp->r_fr_offset-sizeof(uint32_t)))) { |
+ &&(fits_within(13,immv+symv-fragP->fr_address-insn->i_rp->r_fr_offset-sizeof(uint32_t)))) { |
+ // Turn this into a MOV x(PC),Rx |
+ // |
+ // Although moves can normally only handle 13 bits, |
+ // when the immediate is an offset to the PC, the bottom |
+ // two bits are always zero, and so the immediate |
+ // gets an extra two free bits--hence the test for |
+ // fitting into 15 bits above. |
+ insn->i_breg = ZIP_PC; |
+ insn->i_op = ZIPO_MOV; |
+ insn->i_naux = 0; |
4002,7 → 3987,8
+ // 0.111.x111.11 |
+ insn->i_aux[0] = 0x7fc00000; // NOOP -- if never used. |
+ immv += symv; |
+ if ((!insn->i_rp)&&(insn->i_cnd == ZIPC_ALWAYS) |
+ if (((!insn->i_rp)||(sym_known)) |
+ &&(insn->i_cnd == ZIPC_ALWAYS) |
+ &&(fits_within(23, immv))) { |
+ insn->i_naux = 0; |
+ insn->i_code = LDIOP(immv,insn->i_areg); |
4019,6 → 4005,11
+ if (insn->i_rp) |
+ insn->i_rp->r_type = BFD_RELOC_NONE; |
+// 0000 1110 0000 0000 0000 0000 0100 0000 |
+ } else if (((!insn->i_rp)||(sym_known)) |
+ &&(insn->i_cnd == ZIPC_ALWAYS) |
+ &&(fits_within(23, immv))) { |
+ insn->i_naux = 0; |
+ insn->i_code = LDIOP(immv,insn->i_areg); |
+ } else if ((zip_param_use_machine)&&(pzipm)&&((!insn->i_rp)||(sym_known)) |
+ &&(pzipm->r[insn->i_areg].m_known) |
+ &&(0==((immv^pzipm->r[insn->i_areg].m_value) |
4847,8 → 4838,6
+ relP->addend = fixP->fx_offset; |
+ if (fixP->fx_r_type == BFD_RELOC_ZIP_OPB_PCREL) |
+ relP->addend -= 4; |
+ else if (fixP->fx_r_type == BFD_RELOC_ZIP_MOV_PCREL) |
+ relP->addend -= 4; |
+#ifdef ZIP_DEBUG |
+ fprintf(stderr, "ADDEND = %08lx\n", relP->addend); |
+#endif |