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Subversion Repositories zipcpu
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- from Rev 103 to Rev 102
- ↔ Reverse comparison
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/sw/gcc-script.sh
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/sw/gcc-5.3.0-specs-1.patch
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Index: sw/gcc-zippatch.patch
===================================================================
--- sw/gcc-zippatch.patch (revision 103)
+++ sw/gcc-zippatch.patch (revision 102)
@@ -103,7 +103,7 @@
+
+struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
---- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h 2015-07-24 12:00:26.000000000 -0400
@@ -21,7 +21,7 @@
#ifndef GCC_AARCH64_LINUX_H
@@ -115,7 +115,7 @@
#undef ASAN_CC1_SPEC
#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
---- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h 2015-01-05 07:33:28.000000000 -0500
@@ -23,8 +23,8 @@
#define EXTRA_SPECS \
@@ -129,7 +129,7 @@
#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
#elif DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
---- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h 2015-01-05 07:33:28.000000000 -0500
@@ -68,8 +68,8 @@
GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */
@@ -143,7 +143,7 @@
#define GLIBC_DYNAMIC_LINKER \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
---- gcc-5.3.0-original/gcc/config/arm/linux-elf.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h 2015-06-23 05:26:54.000000000 -0400
@@ -62,7 +62,7 @@
@@ -155,7 +155,7 @@
#define LINUX_TARGET_LINK_SPEC "%{h*} \
%{static:-Bstatic} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
---- gcc-5.3.0-original/gcc/config/bfin/linux.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/bfin/linux.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -45,7 +45,7 @@
%{shared:-G -Bdynamic} \
@@ -167,7 +167,7 @@
#undef TARGET_SUPPORTS_SYNC_CALLS
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
---- gcc-5.3.0-original/gcc/config/cris/linux.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/cris/linux.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -102,7 +102,7 @@
#undef CRIS_DEFAULT_CPU_VERSION
@@ -179,7 +179,7 @@
#undef CRIS_LINK_SUBTARGET_SPEC
#define CRIS_LINK_SUBTARGET_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
---- gcc-5.3.0-original/gcc/config/freebsd-spec.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/freebsd-spec.h 2016-02-05 15:18:17.489469806 -0500
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h 2015-06-25 13:53:14.000000000 -0400
@@ -129,9 +129,9 @@
#endif
@@ -194,7 +194,7 @@
/* NOTE: The freebsd-spec.h header is included also for various
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
---- gcc-5.3.0-original/gcc/config/frv/linux.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/frv/linux.h 2016-02-05 15:18:17.493469779 -0500
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -34,7 +34,7 @@
#define ENDFILE_SPEC \
@@ -206,7 +206,7 @@
#undef LINK_SPEC
#define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
---- gcc-5.3.0-original/gcc/config/i386/gnu.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/i386/gnu.h 2016-02-05 15:18:17.493469779 -0500
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,7 +22,7 @@
#define GNU_USER_LINK_EMULATION "elf_i386"
@@ -218,7 +218,7 @@
#undef STARTFILE_SPEC
#if defined HAVE_LD_PIE
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
---- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-02-05 15:18:17.493469779 -0500
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,6 +22,6 @@
#define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
@@ -231,7 +231,7 @@
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
---- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h 2016-03-08 04:57:02.962902614 -0500
+--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h 2016-02-05 15:18:17.493469779 -0500
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -19,4 +19,4 @@
calls_alloca)
-+ return true;
+ return (frame_pointer_needed);
++// return (cfun->calls_alloca);
+/*
+ fprintf(stderr, "ZIP_FRAME_POINTER_REQUIRED()\n");
+ if (frame_pointer_needed) {
@@ -1159,7 +2107,6 @@
+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+ zip_compute_frame();
+
-+ if (dbg) fprintf(stderr, "Computing Prologue instructions\n");
+ if (cfun->machine->size_for_adjusting_sp != 0) {
+ insn = emit_insn(gen_subsi3(stack_pointer_rtx,
+ stack_pointer_rtx,
@@ -1183,8 +2130,6 @@
+ RTX_FRAME_RELATED_P(insn) = 1;
+ }
+ }
-+ if (dbg) fprintf(stderr, "%d registers saved%s\n", offset,
-+ (crtl->saves_all_registers)?", should be all of them":", less than all");
+ }
+
+ if (cfun->machine->fp_needed) {
@@ -1195,7 +2140,6 @@
+ cfun->machine->sp_fp_offset,
+ SImode)));
+ RTX_FRAME_RELATED_P(insn) = 1;
-+ if (dbg) fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
+ }
+}
+
@@ -2125,7 +3069,7 @@
+static bool
+zip_legitimate_operand_address(const_rtx x, bool strict)
+{
-+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
++ const bool dbg = ((ALL_DEBUG_ON)||(true))&&(!ALL_DEBUG_OFF);
+
+ if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS\n");
+ if (dbg) zip_debug_rtx_pfx("Test: ", x);
@@ -2172,8 +3116,6 @@
+ &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
+ &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
+ if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (reg+int)\n");
-+ // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
-+ // gcc_unreachable();
+ return true;
+ } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
+ ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
@@ -2395,7 +3337,7 @@
+#define SREG_P(RTX) ((REG_P(RTX))||(SUBREG_P(RTX)))
+
+bool zip_gen_move_rtl(rtx dst, rtx src) {
-+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
++ const bool dbg = ((ALL_DEBUG_ON)||(true))&&(!ALL_DEBUG_OFF);
+
+ if (dbg) fprintf(stderr, "ZIP-GEN-MOVE\n");
+ if (dbg) zip_debug_rtx_pfx("FROM: ", src);
@@ -2409,7 +3351,6 @@
+ if (can_create_pseudo_p()) {
+ rtx tmp = gen_reg_rtx(Pmode);
+ zip_gen_move_rtl(tmp, XEXP(dst,0));
-+ // mark_reg_pointer(tmp,0);
+ zip_gen_move_rtl(gen_rtx_MEM(GET_MODE(src), tmp), src);
+ } else {
+ fprintf(stderr, "ZIP:Cannot move into mem w/o pseudo\n");
@@ -2419,7 +3360,6 @@
+ if (can_create_pseudo_p()) {
+ rtx tmp = gen_reg_rtx(Pmode);
+ zip_gen_move_rtl(tmp, XEXP(src,0));
-+ // mark_reg_pointer(tmp,0);
+ zip_gen_move_rtl(dst, gen_rtx_MEM(GET_MODE(src), tmp));
+ } else {
+ fprintf(stderr, "ZIP: Cannot move from mem(mem(ptr)) w/o pseudo\n");
@@ -2466,11 +3406,11 @@
+ if (zip_legitimate_operand_address(XEXP(src, 0), false)) {
+ if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/SIMPLE-LOD(ADDR)\n");
+ if (dbg) zip_debug_rtx_pfx("Smple-Addr: ", src);
-+ // if (REG_P(XEXP(src,0)))
-+ // mark_reg_pointer(XEXP(src,0),0);
-+ // else if ((GET_CODE(XEXP(src,0))==PLUS)
-+ // &&(REG_P(XEXP(XEXP(src,0),0))))
-+ // mark_reg_pointer(XEXP(XEXP(src,0),0),0);
++ if (REG_P(XEXP(src,0)))
++ mark_reg_pointer(XEXP(src,0),0);
++ else if ((GET_CODE(XEXP(src,0))==PLUS)
++ &&(REG_P(XEXP(XEXP(src,0),0))))
++ mark_reg_pointer(XEXP(XEXP(src,0),0),0);
+ emit_insn(gen_movsi_lod(dst, src));
+ } else if (zip_const_address_operand(XEXP(src,0))) {
+ if (can_create_pseudo_p()) {
@@ -2477,8 +3417,8 @@
+ rtx tmp;
+ if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR)\n");
+ tmp = gen_reg_rtx(Pmode);
++ mark_reg_pointer(tmp,0);
+ emit_insn(gen_movsi_ldi(tmp, XEXP(src,0)));
-+ // mark_reg_pointer(tmp,0);
+ emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),tmp)));
+ } else {
+ if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR,SELF)\n");
@@ -2494,11 +3434,6 @@
+ if (zip_legitimate_operand_address(XEXP(dst, 0), false)) {
+ // If it's a legitimate address already, do nothing mor
+ if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Legit Addr)--EMIT\n");
-+ // if (REG_P(XEXP(dst,0)))
-+ // mark_reg_pointer(XEXP(dst,0),0);
-+ // else if ((GET_CODE(XEXP(dst,0))==PLUS)
-+ // &&(REG_P(XEXP(XEXP(dst,0),0))))
-+ // mark_reg_pointer(XEXP(XEXP(dst,0),0),0);
+ emit_insn(gen_movsi_sto(dst, src));
+ } else if (zip_const_address_operand(XEXP(dst,0))) {
+ rtx tmp;
@@ -2508,7 +3443,7 @@
+ // Otherwise we need to load the memory address
+ // into a register
+ tmp = gen_reg_rtx(Pmode);
-+ // mark_reg_pointer(tmp,0);
++ mark_reg_pointer(tmp,0);
+ emit_insn(gen_movsi_ldi(tmp, XEXP(dst,0)));
+ //
+ // Then we can do our load
@@ -2576,7 +3511,7 @@
+}
+
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
-+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
++ const bool dbg = ((ALL_DEBUG_ON)||(true))&&(!ALL_DEBUG_OFF);
+ if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
+ if (dbg) zip_debug_rtx_pfx("CND", condition);
+ if (dbg) zip_debug_rtx_pfx("REG", dst);
@@ -2669,7 +3604,7 @@
+}
+
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
-+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
++ const bool dbg = ((ALL_DEBUG_ON)||(true))&&(!ALL_DEBUG_OFF);
+ if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
+ if (dbg) zip_debug_rtx_pfx("DST", dst);
+ if (dbg) zip_debug_rtx_pfx("CND", condition);
@@ -2829,7 +3764,7 @@
+*/
+}
+
-+static int zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
++static int zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in) {
+ int rv = 14;
+ if ((mode == DImode)||(mode == DFmode))
+ rv += 2;
@@ -2836,12 +3771,11 @@
+ return rv;
+}
+
-+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
+
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
--- gcc-5.3.0-original/gcc/config/zip/zip.h 1969-12-31 19:00:00.000000000 -0500
-+++ gcc-5.3.0-zip/gcc/config/zip/zip.h 2016-03-07 20:19:32.623843475 -0500
-@@ -0,0 +1,3707 @@
++++ gcc-5.3.0-zip/gcc/config/zip/zip.h 2016-03-05 12:28:06.303411350 -0500
+@@ -0,0 +1,3667 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: gcc/config/zip/zip.h
@@ -2915,15 +3849,14 @@
+#undef LIB_SPEC
+#define LIB_SPEC "%{!g:-lc} %{g:-lg} -lzip"
+
-+// #define zip_FP_PSEUDO 16
-+#define zip_PC 15
-+#define zip_CC 14
-+#define zip_SP 13
-+#define zip_FP 12
-+#define zip_GOT 11
-+#define zip_AP 10
-+#define zip_R1 1
-+#define zip_R0 0
++#define zip_PC 15
++#define zip_CC 14
++#define zip_SP 13
++#define zip_FP 12
++#define zip_GOT 11
++#define zip_AP 10
++#define zip_R1 1
++#define zip_R0 0
+
+#define ZIP_FIRST_ARG_REGNO 1
+#define ZIP_LAST_ARG_REGNO 5
@@ -3121,7 +4054,7 @@
+ * set this to zero, so let's come back to this.
+ */
+// #warning "Wrong answer encoded to date"
-+// #undef TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
++// #undef TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X)
+// #define TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
+
+/* 17.04 Defining data structures for per-function information */
@@ -3330,7 +4263,7 @@
+#define DEFAULT_SIGNED_CHAR 1
+
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
-+ * the compiler should give an enum type only as many bytes as it takes to
++ * the compiler should give an enum type onyl as many bytes as it takes to
+ * represent the range of possible values of that type. It should return
+ * false if all enum types should be allocated like int.
+ *
@@ -3381,8 +4314,8 @@
+ * type to use for wide characters passed to printf and returned from getwc.
+ * The typedef name wint_t is defined using the contents of the string. See
+ *
-+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
-+ * best for us again.
++ * If you don't define this macro, the default is "unsigned int"--also best
++ * for us again.
+ */
+
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
@@ -3483,13 +4416,9 @@
+ * with it.
+ */
+#ifdef DEFINE_USER_REGS
-+# define FIRST_PSEUDO_REGISTER 32
++#define FIRST_PSEUDO_REGISTER 32
+#else
-+# ifdef zip_FP_PSEUDO
-+# define FIRST_PSEUDO_REGISTER (zip_FP_PSEUDO+1)
-+# else
-+# define FIRST_PSEUDO_REGISTER 16
-+# endif
++#define FIRST_PSEUDO_REGISTER 16
+#endif
+
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
@@ -3514,11 +4443,7 @@
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
+ * table pointer) are registers that we hope will not be so fixed.
+ */
-+#ifdef zip_FP_PSEUDO
-+# define FIXED_REGISTERS { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
-+#else
-+# define FIXED_REGISTERS { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
-+#endif
++#define FIXED_REGISTERS { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
+
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
+ * that is clobbered (in general) by function calls as well as for fixed
@@ -3533,11 +4458,7 @@
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
+ * register above R5.
+ */
-+#ifdef zip_FP_PSEUDO
-+# define CALL_USED_REGISTERS { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
-+#else
-+# define CALL_USED_REGISTERS { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
-+#endif
++#define CALL_USED_REGISTERS { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
+
+/* CALL_REALLY_USED_REGISTERS ... optional macro that, if not defined, defaults
+ * to the value of CALL_USED_REGISTERS.
@@ -3547,7 +4468,7 @@
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
+ * across a call without some part of it being clobbbered. For most machines,
+ * this macro need not be defined. It is only required for machines that do
-+ * not preserve the entire contents of a register across a call.
++ * not preserve the eentire contents of a register across a call.
+ *
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
+ * make sure this gets included here.
@@ -3594,7 +4515,7 @@
+ * containing the number of hard registers in the order in which GCC should
+ * prefer to use them (from most preferred to least.
+ *
-+ * If this macro is not defined, registers are used lowest numbered first (all
++ * If this macro is not definedd, registers are used lowest numbered first (all
+ * else being equal).
+ *
+ * Since the default is the ZipCPU desired case, we won't define this here.
@@ -3658,7 +4579,7 @@
+// #define REGMODE_NATURAL_SIZE(MODE) (((MODE)==DImode)?2:1)
+
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
-+ * to store a value of mode MODE in a hard register number REGNO (or in several
++ * to store a value of mode MODE in a hard regsiter number REGNO (or in several
+ * registers starting with that one). For a machine where all registers are
+ * equivalent, a suitable definition is '1'. You need not include code to check
+ * for the numbers of fixed registers, because the allocation mechanism
@@ -3668,7 +4589,7 @@
+ * suitable default definition mentioned above should be sufficient.
+ */
+#undef HARD_REGNO_MODE_OK
-+#define HARD_REGNO_MODE_OK(R,M) (R_lod" ; Load from memory
-+; [(set (match_operand:ZI 0 "register_operand" "=r")
-+; (match_operand:ZI 1 "zip_memory_operand_p" "Q"))]
-+; ""
-+; "LOD %1,%0"
-+; [(set_attr "ccresult" "unchanged")])
-+;(define_insn "mov_sto" ; Store into memory
-+; [(set (match_operand:ZI 0 "zip_memory_operand_p" "=Q")
-+; (match_operand:ZI 1 "register_operand" "r"))]
-+; ""
-+; "STO %1,%0"
-+; [(set_attr "ccresult" "unchanged")])
-+(define_expand "mov_lod" ; Load from memory
++(define_insn "mov_lod" ; Load from memory
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (match_operand:ZI 1 "zip_memory_operand_p" "Q"))]
-+ "")
-+(define_insn "*movsi_lod"
-+ [(set (match_operand:SI 0 "register_operand" "=r")
-+ (mem:SI (match_operand:SI 1 "register_operand" "r")))]
+ ""
-+ "LOD\t%1,%0"
-+ [(set_attr "predicable" "yes") (set_attr "ccresult" "unchanged")])
-+(define_insn "*movsi_lod_off"
-+ [(set (match_operand:SI 0 "register_operand" "=r")
-+ (mem:SI (plus:SI (match_operand:SI 1 "register_operand" "r")
-+ (match_operand:SI 2 "const_int_operand" "N"))))]
-+ ""
-+ "LOD\t%2(%1),%0"
-+ [(set_attr "predicable" "yes") (set_attr "ccresult" "unchanged")])
-+(define_expand "mov_sto" ; Store into memory
++ "LOD %1,%0"
++ [(set_attr "ccresult" "unchanged")])
++(define_insn "mov_sto" ; Store into memory
+ [(set (match_operand:ZI 0 "zip_memory_operand_p" "=Q")
+ (match_operand:ZI 1 "register_operand" "r"))]
-+ "")
-+(define_insn "*movsi_sto"
-+ [(set (mem:SI (match_operand:SI 0 "register_operand" "r"))
-+ (match_operand:SI 1 "register_operand" "r"))]
+ ""
-+ "STO\t%1,(%0)"
-+ [(set_attr "predicable" "yes") (set_attr "ccresult" "unchanged")])
-+(define_insn "*movsi_sto_off"
-+ [(set (mem:SI (plus:SI
-+ (match_operand:SI 0 "register_operand" "r")
-+ (match_operand:SI 1 "const_int_operand" "N")))
-+ (match_operand:SI 2 "register_operand" "r"))]
-+ ""
-+ "STO\t%2,%1(%0)"
-+ [(set_attr "predicable" "yes") (set_attr "ccresult" "unchanged")])
++ "STO %1,%0"
++ [(set_attr "ccresult" "unchanged")])
+(define_insn "mov_ldi" ; Load immediate
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (match_operand:ZI 1 "immediate_operand" "ipU"))]
@@ -6859,8 +7718,8 @@
+;
+(define_insn "add3" ; Fastest/best instruction always goes first
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (plus:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))
++ (plus:ZI (match_operand:ZI 1 "general_operand" "0")
++ (match_operand:ZI 2 "general_operand" "rO")))
+ ]
+ ""
+ "ADD %2,%0"
@@ -6867,8 +7726,8 @@
+ [(set_attr "ccresult" "set")])
+(define_insn "add3_off" ; Fastest/best instruction always goes first
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (plus:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (plus:ZI (match_operand:ZI 2 "register_operand" "r")
++ (plus:ZI (match_operand:ZI 1 "general_operand" "0")
++ (plus:ZI (match_operand:ZI 2 "general_operand" "r")
+ (match_operand:ZI 3 "const_int_operand" "N"))))
+ ]
+ ""
@@ -6877,15 +7736,10 @@
+;
+;
+;
-+(define_expand "sub3"
++(define_insn "sub3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (minus:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "")))
-+ ])
-+(define_insn "*subsi3"
-+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (minus:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))
++ (minus:ZI (match_operand:ZI 1 "general_operand" "0")
++ (match_operand:ZI 2 "general_operand" "rO")))
+ ]
+ ""
+ "SUB %2,%0"
@@ -6892,8 +7746,8 @@
+ [(set_attr "ccresult" "set")])
+(define_insn "sub3_off"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (minus:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (plus:ZI (match_operand:ZI 2 "register_operand" "%r")
++ (minus:ZI (match_operand:ZI 1 "general_operand" "0")
++ (plus:ZI (match_operand:ZI 2 "general_operand" "%r")
+ (match_operand:ZI 3 "const_int_operand" "N"))))
+ ]
+ ""
@@ -6924,15 +7778,15 @@
+
+(define_insn "div3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (div:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))]
++ (div:ZI (match_operand:ZI 1 "general_operand" "0")
++ (match_operand:ZI 2 "general_operand" "rO")))]
+ ""
+ "DIVS %2,%0"
+ [(set_attr "ccresult" "set")])
+(define_insn "div3_off"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (div:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (plus:ZI (match_operand:ZI 2 "register_operand" "r")
++ (div:ZI (match_operand:ZI 1 "general_operand" "0")
++ (plus:ZI (match_operand:ZI 2 "general_operand" "r")
+ (match_operand:ZI 3 "const_int_operand" "N"))))]
+ ""
+ "DIVS %3+%2,%0"
@@ -6939,15 +7793,15 @@
+ [(set_attr "ccresult" "set")])
+(define_insn "udiv3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (udiv:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))]
++ (udiv:ZI (match_operand:ZI 1 "general_operand" "0")
++ (match_operand:ZI 2 "general_operand" "rO")))]
+ ""
+ "DIVU %2,%0"
+ [(set_attr "ccresult" "set")])
+(define_insn "udiv3_off"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
-+ (udiv:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (plus:ZI (match_operand:ZI 2 "register_operand" "r")
++ (udiv:ZI (match_operand:ZI 1 "general_operand" "0")
++ (plus:ZI (match_operand:ZI 2 "general_operand" "r")
+ (match_operand:ZI 3 "const_int_operand" "N"))))]
+ ""
+ "DIVU %3+%2,%0"
@@ -6995,7 +7849,7 @@
+(define_insn "and3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (and:ZI (match_operand:ZI 1 "register_operand" "%0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))
++ (match_operand:ZI 2 "general_operand" "rO")))
+ ]
+ ""
+ "AND %2,%0"
@@ -7012,7 +7866,7 @@
+(define_insn "ior3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (ior:ZI (match_operand:ZI 1 "register_operand" "%0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))
++ (match_operand:ZI 2 "general_operand" "rO")))
+ ]
+ ""
+ "OR %2,%0"
@@ -7021,7 +7875,7 @@
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (ior:ZI (match_operand:ZI 1 "register_operand" "0")
+ (plus:ZI (match_operand:ZI 2 "register_operand" "r")
-+ (match_operand:ZI 3 "nonmemory_operand" "N"))))
++ (match_operand:ZI 3 "general_operand" "N"))))
+ ]
+ ""
+ "OR %3+%2,%0"
@@ -7029,7 +7883,7 @@
+(define_insn "xor3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (xor:ZI (match_operand:ZI 1 "register_operand" "%0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rO")))
++ (match_operand:ZI 2 "general_operand" "rO")))
+ ]
+ ""
+ "XOR %2,%0"
@@ -7038,7 +7892,7 @@
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (xor:ZI (match_operand:ZI 1 "register_operand" "0")
+ (plus:ZI (match_operand:ZI 2 "register_operand" "r")
-+ (match_operand:ZI 3 "nonmemory_operand" "N"))))
++ (match_operand:ZI 3 "general_operand" "N"))))
+ ]
+ ""
+ "XOR %3+%2,%0"
@@ -7074,7 +7928,7 @@
+(define_insn "ashr3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (ashiftrt:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rR")))]
++ (match_operand:ZI 2 "general_operand" "rR")))]
+ ""
+ "ASR %2,%0"
+ [(set_attr "ccresult" "set")])
@@ -7088,7 +7942,7 @@
+(define_insn "rotl3"
+ [(set (match_operand:ZI 0 "register_operand" "=r")
+ (rotate:ZI (match_operand:ZI 1 "register_operand" "0")
-+ (match_operand:ZI 2 "nonmemory_operand" "rR")))]
++ (match_operand:ZI 2 "general_operand" "rR")))]
+ ""
+ "ROL %2,%0"
+ [(set_attr "ccresult" "set")])
@@ -7141,7 +7995,7 @@
+;
+(define_insn "adddi3" ; Fastest/best instruction always goes first
+ [(set (match_operand:DI 0 "register_operand" "=r")
-+ (plus:DI (match_operand:DI 1 "register_operand" "0")
++ (plus:DI (match_operand:DI 1 "general_operand" "0")
+ (match_operand:DI 2 "register_operand" "r")))
+ ]
+ ""
@@ -7150,7 +8004,7 @@
+;
+(define_insn "subdi3"
+ [(set (match_operand:DI 0 "register_operand" "=r")
-+ (minus:DI (match_operand:DI 1 "register_operand" "0")
++ (minus:DI (match_operand:DI 1 "general_operand" "0")
+ (match_operand:DI 2 "register_operand" "r")))
+ ]
+ ""
@@ -7604,7 +8458,7 @@
+ emit_jump_insn(gen_cbranch_jmp_ltu(operands[3]));
+ DONE;
+ } else if((GET_CODE(operands[0])==GEU)&&(REG_P(operands[2]))) {
-+ // fprintf(stderr, "CBRANCH:(GEU,?,REG,?)\n");
++ fprintf(stderr, "CBRANCH:(GEU,?,REG,?)\n");
+ emit_insn(gen_rtx_SET(VOIDmode, cc0_rtx,
+ gen_rtx_COMPARE(VOIDmode, operands[2], operands[1])));
+ emit_jump_insn(gen_cbranch_jmp_leu(operands[3]));
@@ -8767,7 +9621,7 @@
+duced!
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/expr.c gcc-5.3.0-zip/gcc/expr.c
--- gcc-5.3.0-original/gcc/expr.c 2015-04-07 10:34:06.000000000 -0400
-+++ gcc-5.3.0-zip/gcc/expr.c 2016-03-08 04:07:01.426335724 -0500
++++ gcc-5.3.0-zip/gcc/expr.c 2016-03-05 10:47:57.804889921 -0500
@@ -7999,6 +7999,8 @@
the back of the caller.
The normal operating mode is to pass FALSE for this parameter. */
@@ -8980,7 +9834,7 @@
if (type == long_integer_type_node)
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/postreload.c gcc-5.3.0-zip/gcc/postreload.c
--- gcc-5.3.0-original/gcc/postreload.c 2015-07-17 09:50:38.000000000 -0400
-+++ gcc-5.3.0-zip/gcc/postreload.c 2016-03-07 18:24:22.263499116 -0500
++++ gcc-5.3.0-zip/gcc/postreload.c 2016-03-05 20:42:53.707428238 -0500
@@ -71,6 +71,13 @@
#include "df.h"
#include "dbgcnt.h"
@@ -9077,38 +9931,6 @@
return apply_change_group ();
}
-diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/reload1.c gcc-5.3.0-zip/gcc/reload1.c
---- gcc-5.3.0-original/gcc/reload1.c 2015-01-15 08:28:42.000000000 -0500
-+++ gcc-5.3.0-zip/gcc/reload1.c 2016-03-07 18:25:12.311162959 -0500
-@@ -2271,11 +2271,11 @@
- && spill_stack_slot_width[from_reg] >= total_size
- && (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg]))
- >= inherent_size)
-- && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align)
-+ && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align) {
- x = spill_stack_slot[from_reg];
-
- /* Allocate a bigger slot. */
-- else
-+ } else
- {
- /* Compute maximum size needed, both for inherent size
- and for total size. */
-@@ -3477,11 +3477,14 @@
- /* Eliminate all eliminable registers occurring in operands that
- can be handled by reload. */
- extract_insn (insn);
-+
- for (i = 0; i < recog_data.n_operands; i++)
- {
- orig_operand[i] = recog_data.operand[i];
- substed_operand[i] = recog_data.operand[i];
-
-+ if (insn_data[icode].operand[i].eliminable)
-+
- /* For an asm statement, every operand is eliminable. */
- if (insn_is_asm || insn_data[icode].operand[i].eliminable)
- {
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/reload.c gcc-5.3.0-zip/gcc/reload.c
--- gcc-5.3.0-original/gcc/reload.c 2015-01-15 08:28:42.000000000 -0500
+++ gcc-5.3.0-zip/gcc/reload.c 2016-02-19 08:15:17.546189655 -0500
@@ -9326,3 +10148,396 @@
*)
;;
+diff -Naur '--exclude=*.swp' gcc-5.3.0-original/.rej gcc-5.3.0-zip/.rej
+--- gcc-5.3.0-original/.rej 2016-02-05 15:14:37.982942298 -0500
++++ gcc-5.3.0-zip/.rej 1969-12-31 19:00:00.000000000 -0500
+@@ -1,389 +0,0 @@
+---- gcc-5.2.0.orig/gcc/config/aarch64/aarch64-linux.h 2015-05-12 08:49:59.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/aarch64/aarch64-linux.h 2015-10-17 20:29:44.970812436 +0000
+-@@ -21,7 +21,7 @@
+- #ifndef GCC_AARCH64_LINUX_H
+- #define GCC_AARCH64_LINUX_H
+-
+--#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
+-+#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
+-
+- #undef ASAN_CC1_SPEC
+- #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
+---- gcc-5.2.0.orig/gcc/config/alpha/linux-elf.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/alpha/linux-elf.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -23,8 +23,8 @@
+- #define EXTRA_SPECS \
+- { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
+-
+--#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+--#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
+-+#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+-+#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
+- #if DEFAULT_LIBC == LIBC_UCLIBC
+- #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
+- #elif DEFAULT_LIBC == LIBC_GLIBC
+---- gcc-5.2.0.orig/gcc/config/arm/linux-eabi.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/arm/linux-eabi.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -68,8 +68,8 @@
+- GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */
+-
+- #undef GLIBC_DYNAMIC_LINKER
+--#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
+--#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
+-+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
+-+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
+- #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
+-
+- #define GLIBC_DYNAMIC_LINKER \
+---- gcc-5.2.0.orig/gcc/config/arm/linux-elf.h 2015-06-23 09:26:54.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/arm/linux-elf.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -62,7 +62,7 @@
+-
+- #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
+-
+--#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+-+#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+-
+- #define LINUX_TARGET_LINK_SPEC "%{h*} \
+- %{static:-Bstatic} \
+---- gcc-5.2.0.orig/gcc/config/bfin/linux.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/bfin/linux.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -45,7 +45,7 @@
+- %{shared:-G -Bdynamic} \
+- %{!shared: %{!static: \
+- %{rdynamic:-export-dynamic} \
+-- -dynamic-linker /lib/ld-uClibc.so.0} \
+-+ -dynamic-linker /tools/lib/ld-uClibc.so.0} \
+- %{static}} -init __init -fini __fini"
+-
+- #undef TARGET_SUPPORTS_SYNC_CALLS
+---- gcc-5.2.0.orig/gcc/config/cris/linux.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/cris/linux.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -102,7 +102,7 @@
+- #undef CRIS_DEFAULT_CPU_VERSION
+- #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
+-
+--#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
+-+#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+-
+- #undef CRIS_LINK_SUBTARGET_SPEC
+- #define CRIS_LINK_SUBTARGET_SPEC \
+---- gcc-5.2.0.orig/gcc/config/freebsd-spec.h 2015-06-25 17:53:14.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/freebsd-spec.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -129,9 +129,9 @@
+- #endif
+-
+- #if FBSD_MAJOR < 6
+--#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
+-+#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
+- #else
+--#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
+-+#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
+- #endif
+-
+- /* NOTE: The freebsd-spec.h header is included also for various
+---- gcc-5.2.0.orig/gcc/config/frv/linux.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/frv/linux.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -34,7 +34,7 @@
+- #define ENDFILE_SPEC \
+- "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+-
+--#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
+-+#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+-
+- #undef LINK_SPEC
+- #define LINK_SPEC "\
+---- gcc-5.2.0.orig/gcc/config/i386/gnu.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/i386/gnu.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -22,7 +22,7 @@
+- #define GNU_USER_LINK_EMULATION "elf_i386"
+-
+- #undef GNU_USER_DYNAMIC_LINKER
+--#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
+-+#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
+-
+- #undef STARTFILE_SPEC
+- #if defined HAVE_LD_PIE
+---- gcc-5.2.0.orig/gcc/config/i386/kfreebsd-gnu.h 2015-01-05 12:33:28.000000000 +0000
+-+++ gcc-5.2.0/gcc/config/i386/kfreebsd-gnu.h 2015-10-17 20:28:41.529210187 +0000
+-@@ -19,4 +19,4 @@
+-
/sw/zasm/test.S
76,7 → 76,6
sys.bus.uastl equ 0x00e |
sys.bus.ustl equ 0x00f |
#define DO_TEST_ASSEMBLER |
#define LJMP_TEST |
#define BREAK_TEST |
#define OVERFLOW_TEST |
#define CARRY_TEST |
240,37 → 239,6
#else ; After else |
#endif /* and after endif */ |
|
#ifdef LJMP_TEST |
CLR R0 |
CLR R1 |
LJMP |
.dat __here__+0x0100000+4 |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
CMP 3,R0 |
BNZ test_failure |
LOD.Z __here__+2(PC),PC |
BRA test_failure |
.dat __here__+0x0100000+2 |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
CMP 5,R0 |
BNZ test_failure |
// And our last early branching test |
LDI 0x0100000+__here__+4,PC |
ADD 1,R0 |
ADD 1,R0 |
ADD 1,R0 |
SUB 1,R0 |
CMP 4,R0 |
BNZ test_failure |
#endif |
|
#ifdef BREAK_TEST |
breaktest: |
bra breaksupervisor |
496,7 → 464,7
lsr 0,r0 ; the carry flag |
bc test_failure |
lsr 1,r0 |
tst sys.ccc,cc |
tst sys.ccc,cc ; FAILS HERE!!! @0x010007c |
bz test_failure |
lsr 31,r0 |
tst sys.ccc,cc |
662,7 → 630,7
#endif |
// Return success / Test the trap interrupt |
clr r11 |
trap r11 // FAILS HERE FAILS FAILS FAILS !!!!!!!!!!! |
trap r11 |
noop |
noop |
|
/sw/gas-script.sh
3,9 → 3,8
if [[ ! -d binutils-2.25 ]] |
then |
tar -xvjf ./binutils-2.25.tar.bz2 |
patch -p0 <./binutils-2.25.patch |
cd binutils-2.25 |
patch -p1 <../binutils-2.25.patch |
cd .. |
fi |
|
set +h |
12,13 → 11,13
set -e |
CLFS_HOST="x86_64-cross-linux-gnu" |
CLFS_TARGET="zip" |
INSTALL_BASE=`pwd`/install |
INSTALL_BASE=`pwd`/../install |
mkdir -p ${INSTALL_BASE}/cross-tools |
mkdir -p ${INSTALL_BASE}/tools/lib |
mkdir -p build-gas |
cd build-gas |
mkdir -p build |
cd build |
AR=ar AS=as \ |
../binutils-2.25/configure --with-gas --prefix=${INSTALL_BASE}/cross-tools \ |
../configure --with-gas --prefix=${INSTALL_BASE}/cross-tools \ |
--host=${CLFS_HOST} --target=${CLFS_TARGET} \ |
--with-sysroot=${INSTALL_BASE} \ |
--with-lib-path=${INSTALL_BASE}/tools/lib \ |
26,5 → 25,3
--enable-gold=yes --enable-plugins --enable-threads \ |
--disable-werror |
|
make |
make install |