OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

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  • This comparison shows the changes necessary to convert path 
    /zipcpu
    from Rev 116 to Rev 115
    ↔ Reverse comparison
  •

Rev 116 → Rev 115

/trunk/sw/binutils-2.25.patch
2375,8 → 2375,8
optimize the copying in the simple case without using the
diff -Naur '--exclude=*.swp' binutils-2.25-original/gas/config/tc-zip.c binutils-2.25/gas/config/tc-zip.c
--- binutils-2.25-original/gas/config/tc-zip.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/gas/config/tc-zip.c 2016-04-01 16:12:24.012795897 -0400
@@ -0,0 +1,2299 @@
+++ binutils-2.25/gas/config/tc-zip.c 2016-03-27 21:55:58.208988917 -0400
@@ -0,0 +1,2258 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: tc-zip.c
2442,14 → 2442,8
+
+void md_begin(void) {
+ vliw_mergable = 0;
+ //
+ // While the following alignment lines may seem reasonable, the
+ // alignment is done in the bfd in bytes, not octets, so it just adds
+ // useless and unnecessary data to the file.
+ //
+ // record_alignment(text_section, 2);
+ // record_alignment(data_section, 2);
+ //
+ lex_type['('] = lex_type['A'];
+}
+
2459,10 → 2453,6
+void zip_cons_align(int s ATTRIBUTE_UNUSED) {
+ // printf("CONS-ALIGN\n");
+
+ // Unlike the section alignment, *this* alignment is done in host
+ // bytes, which are (must be) octets. Therefore, we align any
+ // data structure to every four octets.
+ //
+ frag_align(2, // Desired alignment is 2^this number
+ 0, // Fill character
+ 3); // Maximum number of characters to emit to get alignment
2475,9 → 2465,6
+ { "string", stringer, 32+1},
+ { "string8", stringer, 32+1},
+ { "string16",stringer, 32+1},
+ // Since our smallest data structure is 4 words, .byte, .hword, .short,
+ // .word, .dc.a, .dc.b, and .dc.w directives all yield the same sized
+ // word: 4 octets (1 target byte, 4 host bytes)
+ { "byte", cons, 4},
+ { "hword",cons, 4},
+ { "short",cons, 4},
2486,7 → 2473,6
+ { "dc.a", cons, 4},
+ { "dc.b", cons, 4},
+ { "dc.w", cons, 4},
+ // The same is true for padding space(s)
+ { "dcb", s_space, 4},
+ { "dcb.b",s_space, 4},
+ { "dcb.w",s_space, 4},
2627,7 → 2613,7
+symbolS *
+md_undefined_symbol(char *name ATTRIBUTE_UNUSED)
+{
+//#warning "This is where other architectures check for any GOT references"
+#warning "This is where other architectures check for any GOT references"
+ return NULL;
+}
+
2726,12 → 2712,10
+ break;
+ }
+ printf("\n\tAREG = %d\n\tB = ", insn->i_areg);
+ if (insn->i_rp) {
+ if (insn->i_imm != 0)
+ printf("$%d + ", insn->i_imm);
+ if (insn->i_rp)
+ printf("%s ", (insn->i_rp->r_sym) ?
+ S_GET_NAME(insn->i_rp->r_sym) : "(null)");
+ } else
+ else
+ printf("%d[%08x] (no sym)", insn->i_imm, insn->i_imm);
+ if (insn->i_breg != ZIP_RNONE)
+ printf("+ R%d", insn->i_breg);
3165,13 → 3149,10
+ ||(strcasecmp(opstr, "LLO")==0)) {
+ insn->i_op = ZIPO_LDILO;
+ insn_form = TWO_OP;
+ // } else if (strcasecmp(opstr, "MPY")==0) {
+ // insn->i_op = ZIPO_MPY;
+ // insn_form = TWO_OP
+ } else if (strcasecmp(opstr, "MPYU")==0) { // MPUHI
+ } else if (strcasecmp(opstr, "MPYU")==0) {
+ insn->i_op = ZIPO_MPYU;
+ insn_form = TWO_OP;
+ } else if (strcasecmp(opstr, "MPYS")==0) { // MPSHI
+ } else if (strcasecmp(opstr, "MPYS")==0) {
+ insn->i_op = ZIPO_MPYS;
+ insn_form = TWO_OP;
+ } else if (strcasecmp(opstr, "BREV")==0) {
3615,7 → 3596,7
+ imm = (a & 0x03fffff); break;
+ case ZIPO_LDIn:
+ imm = (a & 0x03fffff); imm |= -0x0200000; break;
+ case ZIPO_LDILO: case ZIPO_LDIHI: // BREVx would rm LDIHI
+ case ZIPO_LDILO: case ZIPO_LDIHI:
+ imm = (a & 0x0ffff); break;
+ default:
+ if (a & 0x040000) {
3672,7 → 3653,7
+ if (a & 0x03fff) return 0;
+ break;
+ case ZIPO_LDI: case ZIPO_LDIn:
+ case ZIPO_LDILO: case ZIPO_LDIHI: // BREVx would rm LDIHI
+ case ZIPO_LDILO: case ZIPO_LDIHI:
+ // LDIxx instructions have only immediates. If the
+ // immediate doesn't fit in 5 bits, this won't work.
+ imma = zip_non_vliw_immediate(a);
3897,44 → 3878,36
+ sym_defined, sym_known, this_frag, this_segment,
+ insn->i_imm);
+#endif
+ unsigned immv = insn->i_imm;
+ switch(insn->i_op) {
+ case ZIPO_LDI: // May or may not be conditional
+ if ((sym_known)&&(this_segment)
+ &&(fits_within(13,immv+symv-fragP->fr_address/OCTETS_PER_BYTE-insn->i_rp->r_fr_offset-1))) {
+ if (this_frag) {
+ // Turn this into a MOV x(PC),Rx
+ insn->i_breg = ZIP_PC;
+ insn->i_imm = (symv-fragP->fr_address/OCTETS_PER_BYTE-insn->i_rp->r_fr_offset-1);
+ insn->i_op = ZIPO_MOV;
+ insn->i_naux = 0;
+ zip_assemble_insn_words(fragP, seg, insn, relax_state,
+ stretch);
+ // Tested--this works
+ return;
+ } else // Otherwise while we might know the symbol, we don't
+ // know where the segment containing it is set. That
+ // is, sym_known means we know the offset of the
+ // symbol within its segment, not that we know its
+ // absolute address (yet). Since we don't know the
+ // absolute address, set it to be an unknown symbol.
+ sym_known = 0;
+ }
+
+
+ insn->i_aux[0] = 0x7e000000; // NOOP -- if never used.
+ if (insn->i_rp)
+ immv += symv;
+ insn->i_imm = symv;
+ if ((insn->i_cnd == ZIPC_ALWAYS)
+ // and either no symbol, or we know the symbol
+ &&((!insn->i_rp)||(sym_known))
+ &&(fits_within(23, immv))) {
+ &&(fits_within(23, insn->i_imm))) {
+
+ insn->i_naux = 0;
+ insn->i_code = ((insn->i_areg&0x0f)<<27)
+ |(ZIPO_LDI<<22)
+ |(immv & 0x07fffff);
+ |(insn->i_imm & 0x07fffff);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ } else if (((!insn->i_rp)||(sym_known))
+ &&(fits_within(18, zip_brev(immv)))) {
+ &&(fits_within(18, zip_brev(insn->i_imm)))) {
+ // Can we do this with a BREV instruction using an
+ // immediate? If so, we can then conditionally load
+ // the top 18 bist of any value ...
3941,25 → 3914,21
+ //
+ insn->i_naux = 0;
+ insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
+ zip_brev(immv),
+ zip_brev(insn->i_imm),
+ insn->i_areg&0x0f);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ } else {
+ //
+ // If the symbol isn't defined, then any immv value
+ // If the symbol isn't defined, then any i_imm value
+ // will work--we have to come back anyway.
+ //
+
+ // BREV Extension would modify this statement
+ insn->i_naux = 1;
+ // insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
+ // zip_brev(immv)&0x01ffff, insn->i_areg);
+ insn->i_code = IMMOP(ZIPO_LDIHI, insn->i_cnd,
+ (immv>>16)&0x0ffff,
+ (insn->i_imm>>16)&0x0ffff,
+ insn->i_areg);
+ insn->i_aux[0]=IMMOP(ZIPO_LDILO, insn->i_cnd,
+ (immv&0x0ffff), insn->i_areg);
+ (insn->i_imm&0x0ffff), insn->i_areg);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_ZIP_LDI;
+ else if ((zip_param_vliw)&&(zip_can_merge(insn->i_code, insn->i_aux[0]))) {
3970,8 → 3939,8
+ }
+#ifdef ZIP_DEBUG
+ printf("LDI %04x:%04x,%d Instruction assembled into %08x : %08x\n",
+ (immv>>16)&0x0ffff,
+ immv & 0x0ffff, insn->i_areg,
+ (insn->i_imm>>16)&0x0ffff,
+ insn->i_imm & 0x0ffff, insn->i_areg,
+ insn->i_code, insn->i_aux[0]);
+#endif
+ break;
3982,15 → 3951,15
+ (insn->i_rp)?insn->i_rp->r_fr_offset:0);
+#endif
+ if (insn->i_rp)
+ immv += (int)(symv
+ insn->i_imm = (int)(symv
+ - fragP->fr_address/OCTETS_PER_BYTE
+ - (insn->i_rp->r_fr_offset+1));
+
+#ifdef ZIP_DEBUG
+ if (!fits_within(18,immv))
+ if (!fits_within(18,insn->i_imm))
+ printf("doesn't fit in 18 bits\n");
+#endif
+ if ((!sym_known)||(!fits_within(18,immv))) {
+ if ((!sym_known)||(!fits_within(18,insn->i_imm))) {
+ //
+ // Long jump code
+ //
3998,7 → 3967,7
+ // be branching (or jumping) to a location defined by a
+ // symbol.
+#ifdef ZIP_DEBUG
+ printf("BRA IMM = %08x = %d\n", immv, immv);
+ printf("BRA IMM = %08x = %d\n", insn->i_imm, insn->i_imm);
+#endif
+ if (insn->i_cnd == ZIPC_ALWAYS) {
+ insn->i_naux = 1;
4035,19 → 4004,23
+ insn->i_aux[0] = NOOP_OPCODE;
+ insn->i_aux[1] = NOOP_OPCODE;
+ insn->i_code = IMMOP(ZIPO_ADD, insn->i_cnd,
+ immv, ZIP_PC); // Add value to PC
+ insn->i_imm, ZIP_PC); // Add value to PC
+ insn->i_rp->r_pcrel = TRUE;
+ // No relocation is required--we just did it
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ // Tested--this works
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
+ }
+#ifdef ZIP_DEBUG
+ printf("BRA %08lx->%08x(%d,%d) assembled into(%d) %08x : %08x : %08x\n",
+ symv, immv, sym_defined, relax_state,
+ symv, insn->i_imm, sym_defined, relax_state,
+ insn->i_naux, insn->i_code,
+ insn->i_aux[0], insn->i_aux[1]);
+#endif
+ break;
+ /*
+ case ZIPO_JSR: // JSR Rx,symbol
+ break;
+ case ZIPO_JSRC: // (Conditional) JSR Rx,symbol
+ break;
+ */
+ case ZIPO_MOV:
+ //
+ // We could go a little wild here:
4068,23 → 4041,21
+ if (insn->i_rp) {
+ insn->i_rp->r_pcrel = (insn->i_breg == ZIP_PC);
+ if (insn->i_rp->r_sym)
+ immv += symv;
+ insn->i_imm = symv;
+ if (insn->i_breg == ZIP_PC) {
+ immv +=(int)(-fragP->fr_address/OCTETS_PER_BYTE
+ insn->i_imm=(int)(symv-fragP->fr_address/OCTETS_PER_BYTE
+ -insn->i_rp->r_fr_offset-1);
+ if ((sym_known)&&(this_segment))
+ // Tested--this works
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ else
+ insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_PCREL;
+// } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+// immv = symv;
+// insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_GOTREL;
+// as_bad("MOV x(GOT),Ry not yet implemented");
+ insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_PCREL;
+ // if ((this_frag)&&(!insn->i_rp->r_fix))
+ // insn->i_rp->r_type = BFD_RELOC_NONE;
+ } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+ insn->i_imm = symv;
+ insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_GOTREL;
+ as_bad("MOV x(GOT),Ry not yet implemented");
+ } else {
+ // Do we really want to assume this is an
+ // address?
+ immv += symv;
+ insn->i_imm = symv;
+ insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_OFFSET;
+ }
+ }
4113,7 → 4084,7
+ |((insn->i_cnd &0x07)<<(31-4-5-3));
+ insn->i_code |=
+ ((insn->i_breg&0x0f)<<(31-17))
+ |(immv&0x01fff);
+ |(insn->i_imm&0x01fff);
+ //
+ // Now for the extra two register bits only present in move
+ // instructions
4128,7 → 4099,7
+ insn->i_naux = 1;
+ if (insn->i_rp)
+ as_bad("NEG cannot handle symbols");
+ if ((immv == 0)&&(insn->i_areg == insn->i_breg)) {
+ if ((insn->i_imm == 0)&&(insn->i_areg == insn->i_breg)) {
+ insn->i_code = IMMOP(ZIPO_SUB, insn->i_cnd, 1, insn->i_areg);
+ insn->i_aux[0]= IMMOP(ZIPO_XOR, insn->i_cnd,-1, insn->i_areg);
+
4138,7 → 4109,7
+ }
+ } else {
+ insn->i_code = DBLREGOP(ZIPO_MOV, insn->i_cnd,
+ (-1+immv), insn->i_breg, insn->i_areg);
+ (-1+insn->i_imm), insn->i_breg, insn->i_areg);
+ insn->i_code &= 0xfffbdfff;
+ insn->i_aux[0] = IMMOP(ZIPO_XOR, insn->i_cnd, -1,
+ insn->i_areg);
4149,39 → 4120,37
+ default:
+ if (insn->i_rp) {
+ insn->i_rp->r_pcrel = FALSE;
+ immv += symv;
+ insn->i_imm = symv;
+ if (insn->i_breg == ZIP_PC) {
+ immv+=(int)(-fragP->fr_address/OCTETS_PER_BYTE
+ insn->i_imm=(int)(symv-fragP->fr_address/OCTETS_PER_BYTE
+ -insn->i_rp->r_fr_offset-1);
+ insn->i_rp->r_pcrel= TRUE;
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
+ if ((sym_known)&&(this_segment))
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+// } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+// as_bad("<OP> x(GOT),Ry not yet implemented");
+// immv += symv;
+// insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
+ } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+ as_bad("<OP> x(GOT),Ry not yet implemented");
+ insn->i_imm = symv;
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
+ } else {
+ // Do we really want to assume this is an
+ // address?
+ immv += symv;
+ insn->i_imm = symv;
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_OFFSET;
+ }
+ } if (insn->i_breg != ZIP_RNONE) {
+ insn->i_code = DBLREGOP(insn->i_op, insn->i_cnd,
+ immv, insn->i_breg, insn->i_areg);
+ insn->i_imm, insn->i_breg, insn->i_areg);
+ if (insn->i_rp) {
+ if (insn->i_breg == ZIP_PC) {
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
+ insn->i_rp->r_pcrel = TRUE;
+// } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+// insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
+ } else
+ } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL))
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
+ else
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_OFFSET;
+ }
+ } else {
+ insn->i_code = IMMOP(insn->i_op, insn->i_cnd,
+ immv, insn->i_areg);
+ insn->i_imm, insn->i_areg);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_IMM;
+ }
4396,7 → 4365,7
+ break;
+ case BFD_RELOC_ZIP_OPB_OFFSET:
+ case BFD_RELOC_ZIP_OPB_PCREL:
+// case BFD_RELOC_ZIP_OPB_GOTREL:
+ case BFD_RELOC_ZIP_OPB_GOTREL:
+ case BFD_RELOC_14:
+ // if (fixP->fx_r_type == BFD_RELOC_ZIP_OPB_OFFSET)
+ // printf("\tMD-APPLY-FIX: BFD_RELOC_ZIP_OPB_OFFSET\n");
4442,12 → 4411,6
+ md_number_to_chars((char *)buf, iword, 4);
+ fixP->fx_done = final_fix;
+ break;
+ // BREV extension would replace LHI here ...
+ // case BFD_RELOC_ZIP_BREV:
+ // iword |= zip_brev(*val)&0x01ffff;
+ // md_number_to_chars((char *)buf, iword, 4);
+ // fixP->fx_done = final_fix;
+ // break;
+ case BFD_RELOC_ZIP_LHI:
+ // printf("\tMD-APPLY-FIX: BFD_RELOC_ZIP_LHI\n");
+ iword |= ((*val)>>16)&0x0ffff;
4623,8 → 4586,6
+ &&(!insn->i_rp->r_fix)) {
+ if (insn->i_op == ZIPO_LDI) {
+ if (insn->i_naux == 1) {
+ // BREV extension would go here
+ //
+ fix_new(fragP,
+ OCTETS_PER_BYTE * insn->i_rp->r_fr_offset, // where w/in frag?
+ 4, // 1,2, or 4 usually ... ??
4631,8 → 4592,6
+ insn->i_rp->r_sym, // Add symbol,
+ 0, // Fixed/known offset to the symbol
+ insn->i_rp->r_pcrel, // T if PC-Relative reloc
+ // BREV would change the Reloc type
+ // to BFD_RELOC_ZIP_BREV
+ BFD_RELOC_ZIP_LHI); // Reloc type
+ fix_new(fragP,
+ OCTETS_PER_BYTE * (insn->i_rp->r_fr_offset+1), // where w/in frag?
6287,8 → 6246,8
@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Plo
diff -Naur '--exclude=*.swp' binutils-2.25-original/opcodes/zip-dis.c binutils-2.25/opcodes/zip-dis.c
--- binutils-2.25-original/opcodes/zip-dis.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/opcodes/zip-dis.c 2016-04-02 10:28:35.120580722 -0400
@@ -0,0 +1,224 @@
+++ binutils-2.25/opcodes/zip-dis.c 2016-03-01 17:47:01.691255025 -0500
@@ -0,0 +1,231 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: zip-dis.c
6362,7 → 6321,7
+}
+
+static void
+zipi_to_halfstring(const unsigned addr, const ZIPI ins, const unsigned nxtword, char *line, const ZOPCODE *listp)
+zipi_to_halfstring(const unsigned addr, const ZIPI ins, char *line, const ZOPCODE *listp)
+{
+ int i;
+ for(i=0; i<nzip_oplist; i++) {
6382,12 → 6341,11
+ // i, zip_oplist[i].s_opstr, ins,
+ // zip_oplist[i].s_mask, zip_oplist[i].s_val);
+ if ((ins & listp[i].s_mask) == listp[i].s_val) {
+ // Write the opcode onto our line
+ sprintf(line, "%s", listp[i].s_opstr);
+ if (listp[i].s_cf != ZIP_OPUNUSED) {
+ int bv = zip_getbits(ins, listp[i].s_cf);
+ strcat(line, zip_ccstr[bv]);
+ } sprintf(line, "%-11s", line); // Pad it to 11 chars
+ } sprintf(line, "%-11s", line);
+
+ // Treat stores special
+ if (strncasecmp("STO",listp[i].s_opstr, 3)==0) {
6409,9 → 6367,6
+ sprintf(&line[strlen(line)],
+ "(%s)", zip_regstr[rb]);
+ }
+ // Treat long jumps special
+ } else if (strncasecmp("LJMP",listp[i].s_opstr, 3)==0) {
+ sprintf(&line[strlen(line)], "@0x%08x", nxtword);
+ // Treat relative jumps (branches) specially as well
+ } else if ((toupper(listp[i].s_opstr[0]=='B'))
+ &&(toupper(listp[i].s_opstr[2])!='S')
6465,11 → 6420,11
+}
+
+static void
+zipi_to_double_string(const unsigned addr, const ZIPI ins, const unsigned nxtword, char *la, char *lb) {
+ zipi_to_halfstring(addr, ins, nxtword, la, zip_oplist);
+zipi_to_double_string(const unsigned addr, const ZIPI ins, char *la, char *lb) {
+ zipi_to_halfstring(addr, ins, la, zip_oplist);
+ if (lb) {
+ if (ins & 0x80000000) {
+ zipi_to_halfstring(addr, ins, nxtword, lb, zip_opbottomlist);
+ zipi_to_halfstring(addr, ins, lb, zip_opbottomlist);
+ } else lb[0] = '\0';
+ }
+}
6479,16 → 6434,27
+{
+ ZIPI iword;
+ char astr[80], bstr[80];
+ unsigned char ibytes[8];
+ unsigned nxtword;
+ unsigned char ibytes[4];
+
+ (*info->read_memory_func)(vma, ibytes, 8, info);
+ iword = (ibytes[0]<<24)|(ibytes[1]<<16)|(ibytes[2]<<8)|(ibytes[3]);
+ nxtword= (ibytes[4]<<24)|(ibytes[5]<<16)|(ibytes[6]<<8)|(ibytes[7]);
+ zipi_to_double_string(vma, iword, nxtword, astr, bstr);
+ (*info->read_memory_func)(vma, ibytes, 4, info);
+ iword = (ibytes[0]<<24)|(ibytes[1]<<16)|(ibytes[2]<<8)|(ibytes[3]);
+ zipi_to_double_string(vma, iword, astr, bstr);
+
+/*
+ if (vma&2) {
+ (*info->fprintf_func)(info->stream, "%s", bstr);
+ return 2;
+ } else {
+ (*info->fprintf_func)(info->stream, "%s", astr);
+ if (bstr[0])
+ return 2;
+ else
+ return 4;
+ }
+*/
+
+ if (bstr[0])
+ (*info->fprintf_func)(info->stream, "%-25s | %-25s", astr, bstr);
+ (*info->fprintf_func)(info->stream, "%-20s | %-20s", astr, bstr);
+ else
+ (*info->fprintf_func)(info->stream, "%s", astr);
+
6564,7 → 6530,7
+#endif
diff -Naur '--exclude=*.swp' binutils-2.25-original/opcodes/zip-opc.c binutils-2.25/opcodes/zip-opc.c
--- binutils-2.25-original/opcodes/zip-opc.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/opcodes/zip-opc.c 2016-03-28 20:00:16.433315009 -0400
+++ binutils-2.25/opcodes/zip-opc.c 2016-03-01 12:06:43.266929923 -0500
@@ -0,0 +1,501 @@
+////////////////////////////////////////////////////////////////////////////////
+//
6631,11 → 6597,11
+ { "BUSY", 0xffc7ffff, 0x7bc3dfff, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
+ { "BRA", 0xfffc0000, 0x78800000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BLT", 0xfffc0000, 0x78880000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BZ", 0xfffc0000, 0x78900000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BRZ", 0xfffc0000, 0x78900000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BNZ", 0xfffc0000, 0x78980000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BGE", 0xfffc0000, 0x78a00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BGT", 0xfffc0000, 0x78a80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BC", 0xfffc0000, 0x78b00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BRC", 0xfffc0000, 0x78b00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BRV", 0xfffc0000, 0x78b80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ // CLRF ... an XOR w/ self instruction
+ // 0.rrrr.00100.ccc.1.rrrr.iiiii---
6789,7 → 6755,7
+ // 1111.1000.10xc.c0ii.iixx.xxxx.xxxx.xxxx
+ { "BRA", 0xffd40000, 0xf8800000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_OPUNUSED },
+ { "BLT", 0xffd40000, 0xf8840000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_OPUNUSED },
+ { "BZ", 0xffd40000, 0xf8900000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_OPUNUSED },
+ { "BRZ", 0xffd40000, 0xf8900000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_OPUNUSED },
+ { "BNZ", 0xffd40000, 0xf8940000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_OPUNUSED },
+ // LDI 1.rrrr.1011x.ccc.iiiii -> 1rrr r101 1xcc ciii ii
+ { "CLR", 0x8787c000, 0x85800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
6901,7 → 6867,7
+ // 1xxx.xxxx.xx1c.cxxx.xx11.1100.0100.iiii
+ { "BRA", 0x80203ff0, 0x80003c40, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "BLT", 0x80383ff0, 0x80283c40, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "BZ", 0x80383ff0, 0x80303c40, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "BRZ", 0x80383ff0, 0x80303c40, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "BNZ", 0x80383ff0, 0x80383c40, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ //
+ { "LJMP", 0x80203fff, 0x80003e5f, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },

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