URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/zipcpu/trunk/bench/cpp
- from Rev 147 to Rev 148
- ↔ Reverse comparison
Rev 147 → Rev 148
/zippy_tb.cpp
80,8 → 80,8
unsigned int m_sR[16], m_uR[16]; |
unsigned int m_p[20]; |
unsigned int m_last_pc, m_pc, m_sp; |
SPARSEMEM m_smem[5]; |
SPARSEMEM m_imem[5]; |
SPARSEMEM m_smem[5]; // Nearby stack memory |
SPARSEMEM m_imem[5]; // Nearby instruction memory |
ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {} |
|
void step(void) { |
684,22 → 684,41
else if (m_core->v__DOT__thecpu__DOT__opvalid_alu) |
mvprintw(ln-1,10,"A"); |
|
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
if (m_core->v__DOT__thecpu__DOT__opvalid_mem) { |
showins(ln, "Mm", |
m_core->v__DOT__thecpu__DOT__mem_ce, |
m_core->v__DOT__thecpu__DOT__mem_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
m_core->v__DOT__thecpu__DOT__mem_stall, |
#else |
0, |
0, |
#endif |
alu_pc(), |
alu_pc(), |
#ifdef OPT_VLIW |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
#else |
false |
false |
#endif |
); ln++; |
); |
} else { |
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
#else |
0, |
#endif |
alu_pc(), |
#ifdef OPT_VLIW |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
#else |
false |
#endif |
); |
} ln++; |
if (m_core->v__DOT__thecpu__DOT__wr_reg_ce) |
mvprintw(ln-1,10,"W"); |
else if (m_core->v__DOT__thecpu__DOT__alu_valid) |
1024,22 → 1043,41
#endif |
); ln++; |
|
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
if (m_core->v__DOT__thecpu__DOT__opvalid_mem) { |
showins(ln, "Mm", |
m_core->v__DOT__thecpu__DOT__mem_ce, |
m_core->v__DOT__thecpu__DOT__mem_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
m_core->v__DOT__thecpu__DOT__mem_stall, |
#else |
0, |
0, |
#endif |
alu_pc(), |
alu_pc(), |
#ifdef OPT_VLIW |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
#else |
false |
false |
#endif |
); ln++; |
); |
} else { |
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
#else |
0, |
#endif |
alu_pc(), |
#ifdef OPT_VLIW |
m_core->v__DOT__thecpu__DOT__r_alu_phase |
#else |
false |
#endif |
); |
} ln++; |
} |
|
void tick(void) { |
1604,6 → 1642,12
printf("USAGE: zippy_tb [-a] <testfile.out>\n"); |
printf("\n"); |
printf("\tWhere testfile.out is an output file from the assembler.\n"); |
printf("\tThis file needs to be in a raw format and not an ELF\n"); |
printf("\texecutable. It will be inserted into memory at a memory\n"); |
printf("\taddress of 0x0100000. The memory device itself, the only\n"); |
printf("\tdevice supported by this simulator, occupies addresses from\n"); |
printf("\t0x0100000 to 0x01fffff.\n"); |
printf("\n"); |
printf("\t-a\tSets the testbench to run automatically without any\n"); |
printf("\t\tuser interaction.\n"); |
printf("\n"); |