URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
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- This comparison shows the changes necessary to convert path
/zipcpu/trunk
- from Rev 149 to Rev 150
- ↔ Reverse comparison
Rev 149 → Rev 150
/bench/asm/lodsto.S
41,9 → 41,9
infloop: |
MOV R0,PC |
HALT ; We should never get here. |
peripheral_memory_address |
peripheral_memory_address: |
WORD 0xc0000000 |
enable_all_interrupts_const |
enable_all_interrupts_const: |
WORD 0x8001ffff |
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/bench/asm/helloworld.S
46,23 → 46,33
; uR11 = rawsseg |
; uR9 = state |
; R8 = new value for SSEG |
.file "helloworld.S" |
.text |
.globl entry |
.org 0x2000 |
.type entry, @function |
entry: |
build_supervisor_state: |
CLR R12 ; Load a pointer to our peripherals |
LDIHI $c000h,R12 |
LDI $5f5e1h,R11 ; An amount to reset the timer to: 1/4 sec |
.set peripheral_base, 0xc0000000<<2 |
LDI build_supervisor_state,R0 |
LDI peripheral_base,R12 |
LDI 0xc0000000,R12 ; Load a pointer to our peripherals |
LDI $0x5f5e1,R11 ; An amount to reset the timer to: 1/4 sec |
LSL $6,R11 |
LDIHI $8010h,R10 ; A value to clear/reset the PIC for timerA ints |
LDILO $ffffh,R10 |
MOV $1+PC,uR12 ; User memory (so this isn't supervisor state..) |
BRA $4 |
.DAT $0x6e9e1c1c ; Raw SSEG for 'HELL' |
.DAT $0xfc007c70 ; Raw SSEG for 'O UJ' |
.DAT $0x3a0a607b ; Raw SSEG for 'orld.' |
.DAT $0x00000000 ; Raw SSEG for ' ' |
LDI 0x8010ffff,R0 ; A value to clear/reset the PIC for timerA inst |
MOV user_data(PC),uR12 ; User memory (so this isn't supervisor state..) |
; BRA $4 |
BRA build_user_state |
user_data: |
.INT 0x6e9e1c1c ; Raw SSEG for 'HELL' |
.INT 0xfc007c70 ; Raw SSEG for 'O UJ' |
.INT 0x3a0a607b ; Raw SSEG for 'orld.' |
.INT 0x00000000 ; Raw SSEG for ' ' |
.text |
build_user_state: |
LDI $15h,R0 |
LDI $0x15,R0 |
MOV R0,uR11 |
MOV $6+PC,uPC |
MOV user_task(PC),uPC |
CLR R0 |
MOV R0,uR9 |
repeat: |
69,7 → 79,8
STO R11,$4(R12) ; Reset the timer |
STO R10,(R12) ; Reset the PIC |
RTU |
BRA $-4 |
; BRA $-4 |
BRA repeat |
user_task: |
MOV R9,R0 |
LSR $2,R0 |
95,8 → 106,12
AND $15,R9 |
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WAIT ; Wait for the next interrupt |
BRA $-21 ; Back up to the top to start over |
; BRA $-21 ; Back up to the top to start over |
BRA user_task |
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BREAK |
BREAK |
BREAK |
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