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https://opencores.org/ocsvn/a-z80/a-z80/trunk
[/] [a-z80/] [trunk/] [cpu/] [toplevel/] [globals.vh] - Diff between revs 8 and 13
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Rev 13 |
Line 21... |
Line 21... |
// Module: control/exec_module.vh
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// Module: control/exec_module.vh
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wire ctl_state_iy_set;
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wire ctl_state_iy_set;
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wire ctl_state_ixiy_clr;
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wire ctl_state_ixiy_clr;
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wire ctl_state_ixiy_we;
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wire ctl_state_ixiy_we;
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wire ctl_state_halt_set;
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wire ctl_state_halt_set;
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wire ctl_state_tbl_clr;
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wire ctl_state_tbl_ed_set;
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wire ctl_state_tbl_ed_set;
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wire ctl_state_tbl_cb_set;
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wire ctl_state_tbl_cb_set;
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wire ctl_state_alu;
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wire ctl_state_alu;
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wire ctl_repeat_we;
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wire ctl_repeat_we;
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wire ctl_state_tbl_we;
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wire ctl_iff1_iff2;
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wire ctl_iff1_iff2;
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wire ctl_iffx_we;
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wire ctl_iffx_we;
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wire ctl_iffx_bit;
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wire ctl_iffx_bit;
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wire ctl_im_we;
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wire ctl_im_we;
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wire ctl_no_ints;
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wire ctl_no_ints;
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Line 157... |
Line 157... |
wire nMREQ_out;
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wire nMREQ_out;
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wire nRD_out;
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wire nRD_out;
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wire nWR_out;
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wire nWR_out;
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wire nIORQ_out;
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wire nIORQ_out;
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wire latch_wait;
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wire latch_wait;
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wire wait_m1;
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// Module: control/sequencer.v
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// Module: control/sequencer.v
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wire M1;
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wire M1;
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wire M2;
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wire M2;
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wire M3;
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wire M3;
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