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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1.1.1 2005/12/13 01:51:44 Administrator
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// no message
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//
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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// This file can only used for simulation .
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// This file can only used for simulation .
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// You need to replace it with your own element according to technology
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// You need to replace it with your own element according to technology
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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module CLK_DIV2 (
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module CLK_DIV2 (
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input Reset,
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input IN,
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input IN,
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output reg OUT
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output reg OUT
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);
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);
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always @ (posedge IN)
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always @ (posedge IN or posedge Reset)
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if (Reset)
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OUT <=0;
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else
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OUT <=!OUT;
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OUT <=!OUT;
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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