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https://opencores.org/ocsvn/ethmac/ethmac/trunk
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#/////////////////////////////////////////////////////////////////////
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#/////////////////////////////////////////////////////////////////////
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#/
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#/
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#/ CVS Revision History
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#/ CVS Revision History
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#/
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#/
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#/ $Log: not supported by cvs2svn $
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#/ $Log: not supported by cvs2svn $
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#/ Revision 1.4 2002/10/11 13:33:56 mohor
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#/ Bist supported.
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#/
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#/ Revision 1.3 2002/10/11 12:42:12 mohor
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#/ Revision 1.3 2002/10/11 12:42:12 mohor
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#/ Bist supported.
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#/ Bist supported.
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#/
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#/
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#/ Revision 1.2 2002/09/23 18:27:36 mohor
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#/ Revision 1.2 2002/09/23 18:27:36 mohor
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#/ ETH_VIRTUAL_SILICON_RAM supported.
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#/ ETH_VIRTUAL_SILICON_RAM supported.
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#/
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#/
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#/
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#/
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#/
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#/
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#/
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#/
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#write format wave -window .wave C:/Projects/ethernet/tadejm/ethernet/sim/rtl_sim/modelsim_sim/bin/wave.do
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#.main clear
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_clockgen.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_clockgen.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_crc.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_crc.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_defines.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_defines.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_fifo.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_fifo.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_maccontrol.v}
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vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_maccontrol.v}
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vsim work.tb_ethernet
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vsim work.tb_ethernet
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# ETH_XILINX_RAMB4
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# ETH_XILINX_RAMB4
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# vsim work.glbl work.tb_ethernet
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# vsim work.glbl work.tb_ethernet
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do ../bin/eth_wave.do
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#do ../bin/wave.do
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run -all
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run -all
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