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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_rxaddrcheck.v] - Diff between revs 65 and 75
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Rev 75 |
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Line 100... |
reg RxAbort;
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reg RxAbort;
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reg CrcHashGood_d; // delay HashGood by one cycle
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reg CrcHashGood_d; // delay HashGood by one cycle
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assign RxAddressInvalid = ~(UnicastOK | BroadcastOK | MulticastOK);
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assign RxAddressInvalid = ~(UnicastOK | BroadcastOK | MulticastOK);
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assign BroadcastOK = Broadcast;
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assign BroadcastOK = Broadcast & ~r_Bro;
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assign RxCheckEn = | StateData;
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assign RxCheckEn = | StateData;
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// Address Error Reported at end of address cycle
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// Address Error Reported at end of address cycle
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// RxAbort clears after one cycle
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// RxAbort clears after one cycle
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