| Line 29... |
Line 29... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 103 $
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// $Rev: 111 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
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// $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`ifdef OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
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`else
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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`endif
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`endif
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| Line 90... |
Line 90... |
input [3:0] Y;
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input [3:0] Y;
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input C;
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input C;
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|
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reg [4:0] Z;
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reg [4:0] Z;
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begin
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begin
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Z = {1'b0,X}+{1'b0,Y}+C;
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Z = {1'b0,X}+{1'b0,Y}+{4'b0,C};
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if (Z<10) bcd_add = Z;
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if (Z<5'd10) bcd_add = Z;
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else bcd_add = Z+6;
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else bcd_add = Z+5'd6;
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end
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end
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endfunction
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endfunction
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| Line 202... |
Line 202... |
inst_alu[`ALU_XOR] |
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inst_alu[`ALU_XOR] |
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inst_alu[`ALU_SHIFT] |
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inst_alu[`ALU_SHIFT] |
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inst_so[`SWPB] |
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inst_so[`SWPB] |
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inst_so[`SXT]);
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inst_so[`SXT]);
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|
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wire [16:0] alu_short = ({16{inst_alu[`ALU_AND]}} & alu_and) |
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wire [16:0] alu_short = ({17{inst_alu[`ALU_AND]}} & alu_and) |
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({16{inst_alu[`ALU_OR]}} & alu_or) |
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({17{inst_alu[`ALU_OR]}} & alu_or) |
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({16{inst_alu[`ALU_XOR]}} & alu_xor) |
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({17{inst_alu[`ALU_XOR]}} & alu_xor) |
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({16{inst_alu[`ALU_SHIFT]}} & alu_shift) |
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({17{inst_alu[`ALU_SHIFT]}} & alu_shift) |
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({16{inst_so[`SWPB]}} & alu_swpb) |
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({17{inst_so[`SWPB]}} & alu_swpb) |
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({16{inst_so[`SXT]}} & alu_sxt) |
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({17{inst_so[`SXT]}} & alu_sxt) |
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({16{alu_short_thro}} & op_src_in);
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({17{alu_short_thro}} & op_src_in);
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|
|
|
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// ALU output mux
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// ALU output mux
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wire [16:0] alu_out_nxt = (inst_so[`IRQ] | dbg_halt_st |
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wire [16:0] alu_out_nxt = (inst_so[`IRQ] | dbg_halt_st |
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inst_alu[`ALU_ADD]) ? alu_add_inc :
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inst_alu[`ALU_ADD]) ? alu_add_inc :
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