URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Show entire file |
Details |
Blame |
View Log
Rev 180 |
Rev 202 |
Line 28... |
Line 28... |
/* */
|
/* */
|
/* Author(s): */
|
/* Author(s): */
|
/* - Olivier Girard, olgirard@gmail.com */
|
/* - Olivier Girard, olgirard@gmail.com */
|
/* */
|
/* */
|
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
/* $Rev: 180 $ */
|
/* $Rev: 202 $ */
|
/* $LastChangedBy: olivier.girard $ */
|
/* $LastChangedBy: olivier.girard $ */
|
/* $LastChangedDate: 2013-02-25 22:23:18 +0100 (Mon, 25 Feb 2013) $ */
|
/* $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $ */
|
/*===========================================================================*/
|
/*===========================================================================*/
|
|
|
`define LONG_TIMEOUT
|
`define LONG_TIMEOUT
|
|
|
initial
|
initial
|
Line 212... |
Line 212... |
`endif
|
`endif
|
|
|
$display("Interval mode /32768 mode test completed...");
|
$display("Interval mode /32768 mode test completed...");
|
|
|
`else
|
`else
|
$display(" ===============================================");
|
tb_skip_finish("| (the Watchdog is not included) |");
|
$display("| SIMULATION SKIPPED |");
|
|
$display("| (the Watchdog is not included) |");
|
|
$display(" ===============================================");
|
|
$finish;
|
|
`endif
|
`endif
|
|
|
stimulus_done = 1;
|
stimulus_done = 1;
|
end
|
end
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.