URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 412 |
Rev 468 |
Line 7... |
Line 7... |
|
|
# Figure out actual path the common software directory
|
# Figure out actual path the common software directory
|
SW_ROOT=$(BOARD_SW_ROOT)/$(PROJ_ROOT)/sw
|
SW_ROOT=$(BOARD_SW_ROOT)/$(PROJ_ROOT)/sw
|
|
|
# Set the BOARD_PATH to point to the root of this board build
|
# Set the BOARD_PATH to point to the root of this board build
|
BOARD_PATH=$(shell pwd)/$(BOARD_SW_ROOT)/..
|
BOARD=xilinx/ml501
|
|
|
# Set RTL_VERILOG_INCLUDE_DIR so software
|
# Set RTL_VERILOG_INCLUDE_DIR so software
|
RTL_VERILOG_INCLUDE_DIR=$(BOARD_PATH)/rtl/verilog/include
|
RTL_VERILOG_INCLUDE_DIR=$(shell pwd)/$(BOARD_SW_ROOT)/../rtl/verilog/include
|
|
|
# Set the processor capability flags
|
# Set the processor capability flags
|
# This doesn't work! :-( Need to figure out way to set these and have them
|
# This doesn't work! :-( Need to figure out way to set these and have them
|
# carry through to things like the liborpsoc driver modules etc.
|
# carry through to things like the liborpsoc driver modules etc.
|
#MARCH_FLAGS =-mhard-mul -mhard-div -msoft-float
|
#MARCH_FLAGS =-mhard-mul -mhard-div -msoft-float
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.